1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 28a3d9c16SRob Herring #ifndef __DTS_MARVELL_PXA1928_CLOCK_H 38a3d9c16SRob Herring #define __DTS_MARVELL_PXA1928_CLOCK_H 48a3d9c16SRob Herring 58a3d9c16SRob Herring /* 68a3d9c16SRob Herring * Clock ID values here correspond to the control register offset/4. 78a3d9c16SRob Herring */ 88a3d9c16SRob Herring 98a3d9c16SRob Herring /* apb peripherals */ 108a3d9c16SRob Herring #define PXA1928_CLK_RTC 0x00 118a3d9c16SRob Herring #define PXA1928_CLK_TWSI0 0x01 128a3d9c16SRob Herring #define PXA1928_CLK_TWSI1 0x02 138a3d9c16SRob Herring #define PXA1928_CLK_TWSI2 0x03 148a3d9c16SRob Herring #define PXA1928_CLK_TWSI3 0x04 158a3d9c16SRob Herring #define PXA1928_CLK_OWIRE 0x05 168a3d9c16SRob Herring #define PXA1928_CLK_KPC 0x06 178a3d9c16SRob Herring #define PXA1928_CLK_TB_ROTARY 0x07 188a3d9c16SRob Herring #define PXA1928_CLK_SW_JTAG 0x08 198a3d9c16SRob Herring #define PXA1928_CLK_TIMER1 0x09 208a3d9c16SRob Herring #define PXA1928_CLK_UART0 0x0b 218a3d9c16SRob Herring #define PXA1928_CLK_UART1 0x0c 228a3d9c16SRob Herring #define PXA1928_CLK_UART2 0x0d 238a3d9c16SRob Herring #define PXA1928_CLK_GPIO 0x0e 248a3d9c16SRob Herring #define PXA1928_CLK_PWM0 0x0f 258a3d9c16SRob Herring #define PXA1928_CLK_PWM1 0x10 268a3d9c16SRob Herring #define PXA1928_CLK_PWM2 0x11 278a3d9c16SRob Herring #define PXA1928_CLK_PWM3 0x12 288a3d9c16SRob Herring #define PXA1928_CLK_SSP0 0x13 298a3d9c16SRob Herring #define PXA1928_CLK_SSP1 0x14 308a3d9c16SRob Herring #define PXA1928_CLK_SSP2 0x15 318a3d9c16SRob Herring 328a3d9c16SRob Herring #define PXA1928_CLK_TWSI4 0x1f 338a3d9c16SRob Herring #define PXA1928_CLK_TWSI5 0x20 348a3d9c16SRob Herring #define PXA1928_CLK_UART3 0x22 358a3d9c16SRob Herring #define PXA1928_CLK_THSENS_GLOB 0x24 368a3d9c16SRob Herring #define PXA1928_CLK_THSENS_CPU 0x26 378a3d9c16SRob Herring #define PXA1928_CLK_THSENS_VPU 0x27 388a3d9c16SRob Herring #define PXA1928_CLK_THSENS_GC 0x28 398a3d9c16SRob Herring 408a3d9c16SRob Herring 418a3d9c16SRob Herring /* axi peripherals */ 428a3d9c16SRob Herring #define PXA1928_CLK_SDH0 0x15 438a3d9c16SRob Herring #define PXA1928_CLK_SDH1 0x16 448a3d9c16SRob Herring #define PXA1928_CLK_USB 0x17 458a3d9c16SRob Herring #define PXA1928_CLK_NAND 0x18 468a3d9c16SRob Herring #define PXA1928_CLK_DMA 0x19 478a3d9c16SRob Herring 488a3d9c16SRob Herring #define PXA1928_CLK_SDH2 0x3a 498a3d9c16SRob Herring #define PXA1928_CLK_SDH3 0x3b 508a3d9c16SRob Herring #define PXA1928_CLK_HSIC 0x3e 518a3d9c16SRob Herring #define PXA1928_CLK_SDH4 0x57 528a3d9c16SRob Herring #define PXA1928_CLK_GC3D 0x5d 538a3d9c16SRob Herring #define PXA1928_CLK_GC2D 0x5f 548a3d9c16SRob Herring 558a3d9c16SRob Herring #endif 56