1037a474fSBai Ping /* SPDX-License-Identifier: GPL-2.0 */ 2037a474fSBai Ping /* 3037a474fSBai Ping * Copyright 2017-2018 NXP 4037a474fSBai Ping */ 5037a474fSBai Ping 6037a474fSBai Ping #ifndef __DT_BINDINGS_CLOCK_IMX8MM_H 7037a474fSBai Ping #define __DT_BINDINGS_CLOCK_IMX8MM_H 8037a474fSBai Ping 9037a474fSBai Ping #define IMX8MM_CLK_DUMMY 0 10037a474fSBai Ping #define IMX8MM_CLK_32K 1 11037a474fSBai Ping #define IMX8MM_CLK_24M 2 12037a474fSBai Ping #define IMX8MM_OSC_HDMI_CLK 3 13037a474fSBai Ping #define IMX8MM_CLK_EXT1 4 14037a474fSBai Ping #define IMX8MM_CLK_EXT2 5 15037a474fSBai Ping #define IMX8MM_CLK_EXT3 6 16037a474fSBai Ping #define IMX8MM_CLK_EXT4 7 17037a474fSBai Ping #define IMX8MM_AUDIO_PLL1_REF_SEL 8 18037a474fSBai Ping #define IMX8MM_AUDIO_PLL2_REF_SEL 9 19037a474fSBai Ping #define IMX8MM_VIDEO_PLL1_REF_SEL 10 20037a474fSBai Ping #define IMX8MM_DRAM_PLL_REF_SEL 11 21037a474fSBai Ping #define IMX8MM_GPU_PLL_REF_SEL 12 22037a474fSBai Ping #define IMX8MM_VPU_PLL_REF_SEL 13 23037a474fSBai Ping #define IMX8MM_ARM_PLL_REF_SEL 14 24037a474fSBai Ping #define IMX8MM_SYS_PLL1_REF_SEL 15 25037a474fSBai Ping #define IMX8MM_SYS_PLL2_REF_SEL 16 26037a474fSBai Ping #define IMX8MM_SYS_PLL3_REF_SEL 17 27037a474fSBai Ping #define IMX8MM_AUDIO_PLL1 18 28037a474fSBai Ping #define IMX8MM_AUDIO_PLL2 19 29037a474fSBai Ping #define IMX8MM_VIDEO_PLL1 20 30037a474fSBai Ping #define IMX8MM_DRAM_PLL 21 31037a474fSBai Ping #define IMX8MM_GPU_PLL 22 32037a474fSBai Ping #define IMX8MM_VPU_PLL 23 33037a474fSBai Ping #define IMX8MM_ARM_PLL 24 34037a474fSBai Ping #define IMX8MM_SYS_PLL1 25 35037a474fSBai Ping #define IMX8MM_SYS_PLL2 26 36037a474fSBai Ping #define IMX8MM_SYS_PLL3 27 37037a474fSBai Ping #define IMX8MM_AUDIO_PLL1_BYPASS 28 38037a474fSBai Ping #define IMX8MM_AUDIO_PLL2_BYPASS 29 39037a474fSBai Ping #define IMX8MM_VIDEO_PLL1_BYPASS 30 40037a474fSBai Ping #define IMX8MM_DRAM_PLL_BYPASS 31 41037a474fSBai Ping #define IMX8MM_GPU_PLL_BYPASS 32 42037a474fSBai Ping #define IMX8MM_VPU_PLL_BYPASS 33 43037a474fSBai Ping #define IMX8MM_ARM_PLL_BYPASS 34 44037a474fSBai Ping #define IMX8MM_SYS_PLL1_BYPASS 35 45037a474fSBai Ping #define IMX8MM_SYS_PLL2_BYPASS 36 46037a474fSBai Ping #define IMX8MM_SYS_PLL3_BYPASS 37 47037a474fSBai Ping #define IMX8MM_AUDIO_PLL1_OUT 38 48037a474fSBai Ping #define IMX8MM_AUDIO_PLL2_OUT 39 49037a474fSBai Ping #define IMX8MM_VIDEO_PLL1_OUT 40 50037a474fSBai Ping #define IMX8MM_DRAM_PLL_OUT 41 51037a474fSBai Ping #define IMX8MM_GPU_PLL_OUT 42 52037a474fSBai Ping #define IMX8MM_VPU_PLL_OUT 43 53037a474fSBai Ping #define IMX8MM_ARM_PLL_OUT 44 54037a474fSBai Ping #define IMX8MM_SYS_PLL1_OUT 45 55037a474fSBai Ping #define IMX8MM_SYS_PLL2_OUT 46 56037a474fSBai Ping #define IMX8MM_SYS_PLL3_OUT 47 57037a474fSBai Ping #define IMX8MM_SYS_PLL1_40M 48 58037a474fSBai Ping #define IMX8MM_SYS_PLL1_80M 49 59037a474fSBai Ping #define IMX8MM_SYS_PLL1_100M 50 60037a474fSBai Ping #define IMX8MM_SYS_PLL1_133M 51 61037a474fSBai Ping #define IMX8MM_SYS_PLL1_160M 52 62037a474fSBai Ping #define IMX8MM_SYS_PLL1_200M 53 63037a474fSBai Ping #define IMX8MM_SYS_PLL1_266M 54 64037a474fSBai Ping #define IMX8MM_SYS_PLL1_400M 55 65037a474fSBai Ping #define IMX8MM_SYS_PLL1_800M 56 66037a474fSBai Ping #define IMX8MM_SYS_PLL2_50M 57 67037a474fSBai Ping #define IMX8MM_SYS_PLL2_100M 58 68037a474fSBai Ping #define IMX8MM_SYS_PLL2_125M 59 69037a474fSBai Ping #define IMX8MM_SYS_PLL2_166M 60 70037a474fSBai Ping #define IMX8MM_SYS_PLL2_200M 61 71037a474fSBai Ping #define IMX8MM_SYS_PLL2_250M 62 72037a474fSBai Ping #define IMX8MM_SYS_PLL2_333M 63 73037a474fSBai Ping #define IMX8MM_SYS_PLL2_500M 64 74037a474fSBai Ping #define IMX8MM_SYS_PLL2_1000M 65 75037a474fSBai Ping 76037a474fSBai Ping /* core */ 77037a474fSBai Ping #define IMX8MM_CLK_A53_SRC 66 78037a474fSBai Ping #define IMX8MM_CLK_M4_SRC 67 79037a474fSBai Ping #define IMX8MM_CLK_VPU_SRC 68 80037a474fSBai Ping #define IMX8MM_CLK_GPU3D_SRC 69 81037a474fSBai Ping #define IMX8MM_CLK_GPU2D_SRC 70 82037a474fSBai Ping #define IMX8MM_CLK_A53_CG 71 83037a474fSBai Ping #define IMX8MM_CLK_M4_CG 72 84037a474fSBai Ping #define IMX8MM_CLK_VPU_CG 73 85037a474fSBai Ping #define IMX8MM_CLK_GPU3D_CG 74 86037a474fSBai Ping #define IMX8MM_CLK_GPU2D_CG 75 87037a474fSBai Ping #define IMX8MM_CLK_A53_DIV 76 88037a474fSBai Ping #define IMX8MM_CLK_M4_DIV 77 89037a474fSBai Ping #define IMX8MM_CLK_VPU_DIV 78 90037a474fSBai Ping #define IMX8MM_CLK_GPU3D_DIV 79 91037a474fSBai Ping #define IMX8MM_CLK_GPU2D_DIV 80 92037a474fSBai Ping 93037a474fSBai Ping /* bus */ 94037a474fSBai Ping #define IMX8MM_CLK_MAIN_AXI 81 95037a474fSBai Ping #define IMX8MM_CLK_ENET_AXI 82 96037a474fSBai Ping #define IMX8MM_CLK_NAND_USDHC_BUS 83 97037a474fSBai Ping #define IMX8MM_CLK_VPU_BUS 84 98037a474fSBai Ping #define IMX8MM_CLK_DISP_AXI 85 99037a474fSBai Ping #define IMX8MM_CLK_DISP_APB 86 100037a474fSBai Ping #define IMX8MM_CLK_DISP_RTRM 87 101037a474fSBai Ping #define IMX8MM_CLK_USB_BUS 88 102037a474fSBai Ping #define IMX8MM_CLK_GPU_AXI 89 103037a474fSBai Ping #define IMX8MM_CLK_GPU_AHB 90 104037a474fSBai Ping #define IMX8MM_CLK_NOC 91 105037a474fSBai Ping #define IMX8MM_CLK_NOC_APB 92 106037a474fSBai Ping 107037a474fSBai Ping #define IMX8MM_CLK_AHB 93 108037a474fSBai Ping #define IMX8MM_CLK_AUDIO_AHB 94 109037a474fSBai Ping #define IMX8MM_CLK_IPG_ROOT 95 110037a474fSBai Ping #define IMX8MM_CLK_IPG_AUDIO_ROOT 96 111037a474fSBai Ping 112037a474fSBai Ping #define IMX8MM_CLK_DRAM_ALT 97 113037a474fSBai Ping #define IMX8MM_CLK_DRAM_APB 98 114037a474fSBai Ping #define IMX8MM_CLK_VPU_G1 99 115037a474fSBai Ping #define IMX8MM_CLK_VPU_G2 100 116037a474fSBai Ping #define IMX8MM_CLK_DISP_DTRC 101 117037a474fSBai Ping #define IMX8MM_CLK_DISP_DC8000 102 118037a474fSBai Ping #define IMX8MM_CLK_PCIE1_CTRL 103 119037a474fSBai Ping #define IMX8MM_CLK_PCIE1_PHY 104 120037a474fSBai Ping #define IMX8MM_CLK_PCIE1_AUX 105 121037a474fSBai Ping #define IMX8MM_CLK_DC_PIXEL 106 122037a474fSBai Ping #define IMX8MM_CLK_LCDIF_PIXEL 107 123037a474fSBai Ping #define IMX8MM_CLK_SAI1 108 124037a474fSBai Ping #define IMX8MM_CLK_SAI2 109 125037a474fSBai Ping #define IMX8MM_CLK_SAI3 110 126037a474fSBai Ping #define IMX8MM_CLK_SAI4 111 127037a474fSBai Ping #define IMX8MM_CLK_SAI5 112 128037a474fSBai Ping #define IMX8MM_CLK_SAI6 113 129037a474fSBai Ping #define IMX8MM_CLK_SPDIF1 114 130037a474fSBai Ping #define IMX8MM_CLK_SPDIF2 115 131037a474fSBai Ping #define IMX8MM_CLK_ENET_REF 116 132037a474fSBai Ping #define IMX8MM_CLK_ENET_TIMER 117 133037a474fSBai Ping #define IMX8MM_CLK_ENET_PHY_REF 118 134037a474fSBai Ping #define IMX8MM_CLK_NAND 119 135037a474fSBai Ping #define IMX8MM_CLK_QSPI 120 136037a474fSBai Ping #define IMX8MM_CLK_USDHC1 121 137037a474fSBai Ping #define IMX8MM_CLK_USDHC2 122 138037a474fSBai Ping #define IMX8MM_CLK_I2C1 123 139037a474fSBai Ping #define IMX8MM_CLK_I2C2 124 140037a474fSBai Ping #define IMX8MM_CLK_I2C3 125 141037a474fSBai Ping #define IMX8MM_CLK_I2C4 126 142037a474fSBai Ping #define IMX8MM_CLK_UART1 127 143037a474fSBai Ping #define IMX8MM_CLK_UART2 128 144037a474fSBai Ping #define IMX8MM_CLK_UART3 129 145037a474fSBai Ping #define IMX8MM_CLK_UART4 130 146037a474fSBai Ping #define IMX8MM_CLK_USB_CORE_REF 131 147037a474fSBai Ping #define IMX8MM_CLK_USB_PHY_REF 132 148037a474fSBai Ping #define IMX8MM_CLK_ECSPI1 133 149037a474fSBai Ping #define IMX8MM_CLK_ECSPI2 134 150037a474fSBai Ping #define IMX8MM_CLK_PWM1 135 151037a474fSBai Ping #define IMX8MM_CLK_PWM2 136 152037a474fSBai Ping #define IMX8MM_CLK_PWM3 137 153037a474fSBai Ping #define IMX8MM_CLK_PWM4 138 154037a474fSBai Ping #define IMX8MM_CLK_GPT1 139 155037a474fSBai Ping #define IMX8MM_CLK_WDOG 140 156037a474fSBai Ping #define IMX8MM_CLK_WRCLK 141 157037a474fSBai Ping #define IMX8MM_CLK_DSI_CORE 142 158037a474fSBai Ping #define IMX8MM_CLK_DSI_PHY_REF 143 159037a474fSBai Ping #define IMX8MM_CLK_DSI_DBI 144 160037a474fSBai Ping #define IMX8MM_CLK_USDHC3 145 161037a474fSBai Ping #define IMX8MM_CLK_CSI1_CORE 146 162037a474fSBai Ping #define IMX8MM_CLK_CSI1_PHY_REF 147 163037a474fSBai Ping #define IMX8MM_CLK_CSI1_ESC 148 164037a474fSBai Ping #define IMX8MM_CLK_CSI2_CORE 149 165037a474fSBai Ping #define IMX8MM_CLK_CSI2_PHY_REF 150 166037a474fSBai Ping #define IMX8MM_CLK_CSI2_ESC 151 167037a474fSBai Ping #define IMX8MM_CLK_PCIE2_CTRL 152 168037a474fSBai Ping #define IMX8MM_CLK_PCIE2_PHY 153 169037a474fSBai Ping #define IMX8MM_CLK_PCIE2_AUX 154 170037a474fSBai Ping #define IMX8MM_CLK_ECSPI3 155 171037a474fSBai Ping #define IMX8MM_CLK_PDM 156 172037a474fSBai Ping #define IMX8MM_CLK_VPU_H1 157 173037a474fSBai Ping #define IMX8MM_CLK_CLKO1 158 174037a474fSBai Ping 175037a474fSBai Ping #define IMX8MM_CLK_ECSPI1_ROOT 159 176037a474fSBai Ping #define IMX8MM_CLK_ECSPI2_ROOT 160 177037a474fSBai Ping #define IMX8MM_CLK_ECSPI3_ROOT 161 178037a474fSBai Ping #define IMX8MM_CLK_ENET1_ROOT 162 179037a474fSBai Ping #define IMX8MM_CLK_GPT1_ROOT 163 180037a474fSBai Ping #define IMX8MM_CLK_I2C1_ROOT 164 181037a474fSBai Ping #define IMX8MM_CLK_I2C2_ROOT 165 182037a474fSBai Ping #define IMX8MM_CLK_I2C3_ROOT 166 183037a474fSBai Ping #define IMX8MM_CLK_I2C4_ROOT 167 184037a474fSBai Ping #define IMX8MM_CLK_OCOTP_ROOT 168 185037a474fSBai Ping #define IMX8MM_CLK_PCIE1_ROOT 169 186037a474fSBai Ping #define IMX8MM_CLK_PWM1_ROOT 170 187037a474fSBai Ping #define IMX8MM_CLK_PWM2_ROOT 171 188037a474fSBai Ping #define IMX8MM_CLK_PWM3_ROOT 172 189037a474fSBai Ping #define IMX8MM_CLK_PWM4_ROOT 173 190037a474fSBai Ping #define IMX8MM_CLK_QSPI_ROOT 174 191037a474fSBai Ping #define IMX8MM_CLK_NAND_ROOT 175 192037a474fSBai Ping #define IMX8MM_CLK_SAI1_ROOT 176 193037a474fSBai Ping #define IMX8MM_CLK_SAI1_IPG 177 194037a474fSBai Ping #define IMX8MM_CLK_SAI2_ROOT 178 195037a474fSBai Ping #define IMX8MM_CLK_SAI2_IPG 179 196037a474fSBai Ping #define IMX8MM_CLK_SAI3_ROOT 180 197037a474fSBai Ping #define IMX8MM_CLK_SAI3_IPG 181 198037a474fSBai Ping #define IMX8MM_CLK_SAI4_ROOT 182 199037a474fSBai Ping #define IMX8MM_CLK_SAI4_IPG 183 200037a474fSBai Ping #define IMX8MM_CLK_SAI5_ROOT 184 201037a474fSBai Ping #define IMX8MM_CLK_SAI5_IPG 185 202037a474fSBai Ping #define IMX8MM_CLK_SAI6_ROOT 186 203037a474fSBai Ping #define IMX8MM_CLK_SAI6_IPG 187 204037a474fSBai Ping #define IMX8MM_CLK_UART1_ROOT 188 205037a474fSBai Ping #define IMX8MM_CLK_UART2_ROOT 189 206037a474fSBai Ping #define IMX8MM_CLK_UART3_ROOT 190 207037a474fSBai Ping #define IMX8MM_CLK_UART4_ROOT 191 208037a474fSBai Ping #define IMX8MM_CLK_USB1_CTRL_ROOT 192 209037a474fSBai Ping #define IMX8MM_CLK_GPU3D_ROOT 193 210037a474fSBai Ping #define IMX8MM_CLK_USDHC1_ROOT 194 211037a474fSBai Ping #define IMX8MM_CLK_USDHC2_ROOT 195 212037a474fSBai Ping #define IMX8MM_CLK_WDOG1_ROOT 196 213037a474fSBai Ping #define IMX8MM_CLK_WDOG2_ROOT 197 214037a474fSBai Ping #define IMX8MM_CLK_WDOG3_ROOT 198 215037a474fSBai Ping #define IMX8MM_CLK_VPU_G1_ROOT 199 216037a474fSBai Ping #define IMX8MM_CLK_GPU_BUS_ROOT 200 217037a474fSBai Ping #define IMX8MM_CLK_VPU_H1_ROOT 201 218037a474fSBai Ping #define IMX8MM_CLK_VPU_G2_ROOT 202 219037a474fSBai Ping #define IMX8MM_CLK_PDM_ROOT 203 220037a474fSBai Ping #define IMX8MM_CLK_DISP_ROOT 204 221037a474fSBai Ping #define IMX8MM_CLK_DISP_AXI_ROOT 205 222037a474fSBai Ping #define IMX8MM_CLK_DISP_APB_ROOT 206 223037a474fSBai Ping #define IMX8MM_CLK_DISP_RTRM_ROOT 207 224037a474fSBai Ping #define IMX8MM_CLK_USDHC3_ROOT 208 225037a474fSBai Ping #define IMX8MM_CLK_TMU_ROOT 209 226037a474fSBai Ping #define IMX8MM_CLK_VPU_DEC_ROOT 210 227037a474fSBai Ping #define IMX8MM_CLK_SDMA1_ROOT 211 228037a474fSBai Ping #define IMX8MM_CLK_SDMA2_ROOT 212 229037a474fSBai Ping #define IMX8MM_CLK_SDMA3_ROOT 213 230037a474fSBai Ping #define IMX8MM_CLK_GPT_3M 214 231037a474fSBai Ping #define IMX8MM_CLK_ARM 215 232037a474fSBai Ping #define IMX8MM_CLK_PDM_IPG 216 233037a474fSBai Ping #define IMX8MM_CLK_GPU2D_ROOT 217 234037a474fSBai Ping #define IMX8MM_CLK_MU_ROOT 218 235037a474fSBai Ping #define IMX8MM_CLK_CSI1_ROOT 219 236037a474fSBai Ping 237037a474fSBai Ping #define IMX8MM_CLK_DRAM_CORE 220 238037a474fSBai Ping #define IMX8MM_CLK_DRAM_ALT_ROOT 221 239037a474fSBai Ping 240037a474fSBai Ping #define IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK 222 241037a474fSBai Ping 2422c61a545SAnson Huang #define IMX8MM_CLK_GPIO1_ROOT 223 2432c61a545SAnson Huang #define IMX8MM_CLK_GPIO2_ROOT 224 2442c61a545SAnson Huang #define IMX8MM_CLK_GPIO3_ROOT 225 2452c61a545SAnson Huang #define IMX8MM_CLK_GPIO4_ROOT 226 2462c61a545SAnson Huang #define IMX8MM_CLK_GPIO5_ROOT 227 2472c61a545SAnson Huang 2482b2ebb9aSAnson Huang #define IMX8MM_CLK_SNVS_ROOT 228 24987def8d0SLeonard Crestez #define IMX8MM_CLK_GIC 229 2502b2ebb9aSAnson Huang 2513e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_40M_CG 230 2523e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_80M_CG 231 2533e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_100M_CG 232 2543e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_133M_CG 233 2553e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_160M_CG 234 2563e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_200M_CG 235 2573e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_266M_CG 236 2583e4947acSLeonard Crestez #define IMX8MM_SYS_PLL1_400M_CG 237 2593e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_50M_CG 238 2603e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_100M_CG 239 2613e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_125M_CG 240 2623e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_166M_CG 241 2633e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_200M_CG 242 2643e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_250M_CG 243 2653e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_333M_CG 244 2663e4947acSLeonard Crestez #define IMX8MM_SYS_PLL2_500M_CG 245 2673e4947acSLeonard Crestez 268811e4171SPeng Fan #define IMX8MM_CLK_M4_CORE 246 269811e4171SPeng Fan #define IMX8MM_CLK_VPU_CORE 247 270811e4171SPeng Fan #define IMX8MM_CLK_GPU3D_CORE 248 271811e4171SPeng Fan #define IMX8MM_CLK_GPU2D_CORE 249 272811e4171SPeng Fan 273811e4171SPeng Fan #define IMX8MM_CLK_END 250 274037a474fSBai Ping 275037a474fSBai Ping #endif 276