1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  */
9 
10 #ifndef __DT_BINDINGS_CLOCK_IMX6SL_H
11 #define __DT_BINDINGS_CLOCK_IMX6SL_H
12 
13 #define IMX6SL_CLK_DUMMY		0
14 #define IMX6SL_CLK_CKIL			1
15 #define IMX6SL_CLK_OSC			2
16 #define IMX6SL_CLK_PLL1_SYS		3
17 #define IMX6SL_CLK_PLL2_BUS		4
18 #define IMX6SL_CLK_PLL3_USB_OTG		5
19 #define IMX6SL_CLK_PLL4_AUDIO		6
20 #define IMX6SL_CLK_PLL5_VIDEO		7
21 #define IMX6SL_CLK_PLL6_ENET		8
22 #define IMX6SL_CLK_PLL7_USB_HOST	9
23 #define IMX6SL_CLK_USBPHY1		10
24 #define IMX6SL_CLK_USBPHY2		11
25 #define IMX6SL_CLK_USBPHY1_GATE		12
26 #define IMX6SL_CLK_USBPHY2_GATE		13
27 #define IMX6SL_CLK_PLL4_POST_DIV	14
28 #define IMX6SL_CLK_PLL5_POST_DIV	15
29 #define IMX6SL_CLK_PLL5_VIDEO_DIV	16
30 #define IMX6SL_CLK_ENET_REF		17
31 #define IMX6SL_CLK_PLL2_PFD0		18
32 #define IMX6SL_CLK_PLL2_PFD1		19
33 #define IMX6SL_CLK_PLL2_PFD2		20
34 #define IMX6SL_CLK_PLL3_PFD0		21
35 #define IMX6SL_CLK_PLL3_PFD1		22
36 #define IMX6SL_CLK_PLL3_PFD2		23
37 #define IMX6SL_CLK_PLL3_PFD3		24
38 #define IMX6SL_CLK_PLL2_198M		25
39 #define IMX6SL_CLK_PLL3_120M		26
40 #define IMX6SL_CLK_PLL3_80M		27
41 #define IMX6SL_CLK_PLL3_60M		28
42 #define IMX6SL_CLK_STEP			29
43 #define IMX6SL_CLK_PLL1_SW		30
44 #define IMX6SL_CLK_OCRAM_ALT_SEL	31
45 #define IMX6SL_CLK_OCRAM_SEL		32
46 #define IMX6SL_CLK_PRE_PERIPH2_SEL	33
47 #define IMX6SL_CLK_PRE_PERIPH_SEL	34
48 #define IMX6SL_CLK_PERIPH2_CLK2_SEL	35
49 #define IMX6SL_CLK_PERIPH_CLK2_SEL	36
50 #define IMX6SL_CLK_CSI_SEL		37
51 #define IMX6SL_CLK_LCDIF_AXI_SEL	38
52 #define IMX6SL_CLK_USDHC1_SEL		39
53 #define IMX6SL_CLK_USDHC2_SEL		40
54 #define IMX6SL_CLK_USDHC3_SEL		41
55 #define IMX6SL_CLK_USDHC4_SEL		42
56 #define IMX6SL_CLK_SSI1_SEL		43
57 #define IMX6SL_CLK_SSI2_SEL		44
58 #define IMX6SL_CLK_SSI3_SEL		45
59 #define IMX6SL_CLK_PERCLK_SEL		46
60 #define IMX6SL_CLK_PXP_AXI_SEL		47
61 #define IMX6SL_CLK_EPDC_AXI_SEL		48
62 #define IMX6SL_CLK_GPU2D_OVG_SEL	49
63 #define IMX6SL_CLK_GPU2D_SEL		50
64 #define IMX6SL_CLK_LCDIF_PIX_SEL	51
65 #define IMX6SL_CLK_EPDC_PIX_SEL		52
66 #define IMX6SL_CLK_SPDIF0_SEL		53
67 #define IMX6SL_CLK_SPDIF1_SEL		54
68 #define IMX6SL_CLK_EXTERN_AUDIO_SEL	55
69 #define IMX6SL_CLK_ECSPI_SEL		56
70 #define IMX6SL_CLK_UART_SEL		57
71 #define IMX6SL_CLK_PERIPH		58
72 #define IMX6SL_CLK_PERIPH2		59
73 #define IMX6SL_CLK_OCRAM_PODF		60
74 #define IMX6SL_CLK_PERIPH_CLK2_PODF	61
75 #define IMX6SL_CLK_PERIPH2_CLK2_PODF	62
76 #define IMX6SL_CLK_IPG			63
77 #define IMX6SL_CLK_CSI_PODF		64
78 #define IMX6SL_CLK_LCDIF_AXI_PODF	65
79 #define IMX6SL_CLK_USDHC1_PODF		66
80 #define IMX6SL_CLK_USDHC2_PODF		67
81 #define IMX6SL_CLK_USDHC3_PODF		68
82 #define IMX6SL_CLK_USDHC4_PODF		69
83 #define IMX6SL_CLK_SSI1_PRED		70
84 #define IMX6SL_CLK_SSI1_PODF		71
85 #define IMX6SL_CLK_SSI2_PRED		72
86 #define IMX6SL_CLK_SSI2_PODF		73
87 #define IMX6SL_CLK_SSI3_PRED		74
88 #define IMX6SL_CLK_SSI3_PODF		75
89 #define IMX6SL_CLK_PERCLK		76
90 #define IMX6SL_CLK_PXP_AXI_PODF		77
91 #define IMX6SL_CLK_EPDC_AXI_PODF	78
92 #define IMX6SL_CLK_GPU2D_OVG_PODF	79
93 #define IMX6SL_CLK_GPU2D_PODF		80
94 #define IMX6SL_CLK_LCDIF_PIX_PRED	81
95 #define IMX6SL_CLK_EPDC_PIX_PRED	82
96 #define IMX6SL_CLK_LCDIF_PIX_PODF	83
97 #define IMX6SL_CLK_EPDC_PIX_PODF	84
98 #define IMX6SL_CLK_SPDIF0_PRED		85
99 #define IMX6SL_CLK_SPDIF0_PODF		86
100 #define IMX6SL_CLK_SPDIF1_PRED		87
101 #define IMX6SL_CLK_SPDIF1_PODF		88
102 #define IMX6SL_CLK_EXTERN_AUDIO_PRED	89
103 #define IMX6SL_CLK_EXTERN_AUDIO_PODF	90
104 #define IMX6SL_CLK_ECSPI_ROOT		91
105 #define IMX6SL_CLK_UART_ROOT		92
106 #define IMX6SL_CLK_AHB			93
107 #define IMX6SL_CLK_MMDC_ROOT		94
108 #define IMX6SL_CLK_ARM			95
109 #define IMX6SL_CLK_ECSPI1		96
110 #define IMX6SL_CLK_ECSPI2		97
111 #define IMX6SL_CLK_ECSPI3		98
112 #define IMX6SL_CLK_ECSPI4		99
113 #define IMX6SL_CLK_EPIT1		100
114 #define IMX6SL_CLK_EPIT2		101
115 #define IMX6SL_CLK_EXTERN_AUDIO		102
116 #define IMX6SL_CLK_GPT			103
117 #define IMX6SL_CLK_GPT_SERIAL		104
118 #define IMX6SL_CLK_GPU2D_OVG		105
119 #define IMX6SL_CLK_I2C1			106
120 #define IMX6SL_CLK_I2C2			107
121 #define IMX6SL_CLK_I2C3			108
122 #define IMX6SL_CLK_OCOTP		109
123 #define IMX6SL_CLK_CSI			110
124 #define IMX6SL_CLK_PXP_AXI		111
125 #define IMX6SL_CLK_EPDC_AXI		112
126 #define IMX6SL_CLK_LCDIF_AXI		113
127 #define IMX6SL_CLK_LCDIF_PIX		114
128 #define IMX6SL_CLK_EPDC_PIX		115
129 #define IMX6SL_CLK_OCRAM		116
130 #define IMX6SL_CLK_PWM1			117
131 #define IMX6SL_CLK_PWM2			118
132 #define IMX6SL_CLK_PWM3			119
133 #define IMX6SL_CLK_PWM4			120
134 #define IMX6SL_CLK_SDMA			121
135 #define IMX6SL_CLK_SPDIF		122
136 #define IMX6SL_CLK_SSI1			123
137 #define IMX6SL_CLK_SSI2			124
138 #define IMX6SL_CLK_SSI3			125
139 #define IMX6SL_CLK_UART			126
140 #define IMX6SL_CLK_UART_SERIAL		127
141 #define IMX6SL_CLK_USBOH3		128
142 #define IMX6SL_CLK_USDHC1		129
143 #define IMX6SL_CLK_USDHC2		130
144 #define IMX6SL_CLK_USDHC3		131
145 #define IMX6SL_CLK_USDHC4		132
146 #define IMX6SL_CLK_CLK_END		133
147 
148 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
149