1 /* 2 * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 */ 9 10 #ifndef __DT_BINDINGS_CLOCK_IMX1_H 11 #define __DT_BINDINGS_CLOCK_IMX1_H 12 13 #define IMX1_CLK_DUMMY 0 14 #define IMX1_CLK_CLK32 1 15 #define IMX1_CLK_CLK16M_EXT 2 16 #define IMX1_CLK_CLK16M 3 17 #define IMX1_CLK_CLK32_PREMULT 4 18 #define IMX1_CLK_PREM 5 19 #define IMX1_CLK_MPLL 6 20 #define IMX1_CLK_MPLL_GATE 7 21 #define IMX1_CLK_SPLL 8 22 #define IMX1_CLK_SPLL_GATE 9 23 #define IMX1_CLK_MCU 10 24 #define IMX1_CLK_FCLK 11 25 #define IMX1_CLK_HCLK 12 26 #define IMX1_CLK_CLK48M 13 27 #define IMX1_CLK_PER1 14 28 #define IMX1_CLK_PER2 15 29 #define IMX1_CLK_PER3 16 30 #define IMX1_CLK_CLKO 17 31 #define IMX1_CLK_UART3_GATE 18 32 #define IMX1_CLK_SSI2_GATE 19 33 #define IMX1_CLK_BROM_GATE 20 34 #define IMX1_CLK_DMA_GATE 21 35 #define IMX1_CLK_CSI_GATE 22 36 #define IMX1_CLK_MMA_GATE 23 37 #define IMX1_CLK_USBD_GATE 24 38 #define IMX1_CLK_MAX 25 39 40 #endif 41