1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * This header provides constants for AT91 pmc status. 4 * 5 * The constants defined in this header are being used in dts. 6 */ 7 8 #ifndef _DT_BINDINGS_CLK_AT91_H 9 #define _DT_BINDINGS_CLK_AT91_H 10 11 #define PMC_TYPE_CORE 0 12 #define PMC_TYPE_SYSTEM 1 13 #define PMC_TYPE_PERIPHERAL 2 14 #define PMC_TYPE_GCK 3 15 #define PMC_TYPE_PROGRAMMABLE 4 16 17 #define PMC_SLOW 0 18 #define PMC_MCK 1 19 #define PMC_UTMI 2 20 #define PMC_MAIN 3 21 #define PMC_MCK2 4 22 #define PMC_I2S0_MUX 5 23 #define PMC_I2S1_MUX 6 24 #define PMC_PLLACK 7 25 #define PMC_PLLBCK 8 26 #define PMC_AUDIOPLLCK 9 27 28 /* SAMA7G5 */ 29 #define PMC_CPUPLL (PMC_MAIN + 1) 30 #define PMC_SYSPLL (PMC_MAIN + 2) 31 #define PMC_DDRPLL (PMC_MAIN + 3) 32 #define PMC_IMGPLL (PMC_MAIN + 4) 33 #define PMC_BAUDPLL (PMC_MAIN + 5) 34 #define PMC_AUDIOPMCPLL (PMC_MAIN + 6) 35 #define PMC_AUDIOIOPLL (PMC_MAIN + 7) 36 #define PMC_ETHPLL (PMC_MAIN + 8) 37 #define PMC_CPU (PMC_MAIN + 9) 38 39 #ifndef AT91_PMC_MOSCS 40 #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ 41 #define AT91_PMC_LOCKA 1 /* PLLA Lock */ 42 #define AT91_PMC_LOCKB 2 /* PLLB Lock */ 43 #define AT91_PMC_MCKRDY 3 /* Master Clock */ 44 #define AT91_PMC_LOCKU 6 /* UPLL Lock */ 45 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ 46 #define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ 47 #define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ 48 #define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ 49 #define AT91_PMC_GCKRDY 24 /* Generated Clocks */ 50 #endif 51 52 #endif 53