1a636cd6cSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 235d35aaeSTushar Behera /* 335d35aaeSTushar Behera * This header provides constants for AT91 pmc status. 435d35aaeSTushar Behera * 535d35aaeSTushar Behera * The constants defined in this header are being used in dts. 635d35aaeSTushar Behera */ 735d35aaeSTushar Behera 835d35aaeSTushar Behera #ifndef _DT_BINDINGS_CLK_AT91_H 935d35aaeSTushar Behera #define _DT_BINDINGS_CLK_AT91_H 1035d35aaeSTushar Behera 11d387ff54SAlexandre Belloni #define PMC_TYPE_CORE 0 12d387ff54SAlexandre Belloni #define PMC_TYPE_SYSTEM 1 13d387ff54SAlexandre Belloni #define PMC_TYPE_PERIPHERAL 2 14d387ff54SAlexandre Belloni #define PMC_TYPE_GCK 3 15d387ff54SAlexandre Belloni 16d387ff54SAlexandre Belloni #define PMC_SLOW 0 17d387ff54SAlexandre Belloni #define PMC_MCK 1 18d387ff54SAlexandre Belloni #define PMC_UTMI 2 19d387ff54SAlexandre Belloni #define PMC_MAIN 3 20d387ff54SAlexandre Belloni #define PMC_MCK2 4 21d387ff54SAlexandre Belloni #define PMC_I2S0_MUX 5 22d387ff54SAlexandre Belloni #define PMC_I2S1_MUX 6 23d387ff54SAlexandre Belloni 24d387ff54SAlexandre Belloni #ifndef AT91_PMC_MOSCS 2535d35aaeSTushar Behera #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ 2635d35aaeSTushar Behera #define AT91_PMC_LOCKA 1 /* PLLA Lock */ 2735d35aaeSTushar Behera #define AT91_PMC_LOCKB 2 /* PLLB Lock */ 2835d35aaeSTushar Behera #define AT91_PMC_MCKRDY 3 /* Master Clock */ 2935d35aaeSTushar Behera #define AT91_PMC_LOCKU 6 /* UPLL Lock */ 3035d35aaeSTushar Behera #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ 3135d35aaeSTushar Behera #define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ 3235d35aaeSTushar Behera #define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ 3335d35aaeSTushar Behera #define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ 34a5752e57SNicolas Ferre #define AT91_PMC_GCKRDY 24 /* Generated Clocks */ 35d387ff54SAlexandre Belloni #endif 3635d35aaeSTushar Behera 3735d35aaeSTushar Behera #endif 38