135d35aaeSTushar Behera /* 235d35aaeSTushar Behera * This header provides constants for AT91 pmc status. 335d35aaeSTushar Behera * 435d35aaeSTushar Behera * The constants defined in this header are being used in dts. 535d35aaeSTushar Behera * 635d35aaeSTushar Behera * Licensed under GPLv2 or later. 735d35aaeSTushar Behera */ 835d35aaeSTushar Behera 935d35aaeSTushar Behera #ifndef _DT_BINDINGS_CLK_AT91_H 1035d35aaeSTushar Behera #define _DT_BINDINGS_CLK_AT91_H 1135d35aaeSTushar Behera 1235d35aaeSTushar Behera #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ 1335d35aaeSTushar Behera #define AT91_PMC_LOCKA 1 /* PLLA Lock */ 1435d35aaeSTushar Behera #define AT91_PMC_LOCKB 2 /* PLLB Lock */ 1535d35aaeSTushar Behera #define AT91_PMC_MCKRDY 3 /* Master Clock */ 1635d35aaeSTushar Behera #define AT91_PMC_LOCKU 6 /* UPLL Lock */ 1735d35aaeSTushar Behera #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ 1835d35aaeSTushar Behera #define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ 1935d35aaeSTushar Behera #define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ 2035d35aaeSTushar Behera #define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ 21a5752e57SNicolas Ferre #define AT91_PMC_GCKRDY 24 /* Generated Clocks */ 2235d35aaeSTushar Behera 2335d35aaeSTushar Behera #endif 24