198872da6SDmitry Rokosov /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 298872da6SDmitry Rokosov /* 398872da6SDmitry Rokosov * Copyright (c) 2019 Amlogic, Inc. All rights reserved. 498872da6SDmitry Rokosov * Author: Jian Hu <jian.hu@amlogic.com> 598872da6SDmitry Rokosov * 698872da6SDmitry Rokosov * Copyright (c) 2023, SberDevices. All Rights Reserved. 798872da6SDmitry Rokosov * Author: Dmitry Rokosov <ddrokosov@sberdevices.ru> 898872da6SDmitry Rokosov */ 998872da6SDmitry Rokosov 1098872da6SDmitry Rokosov #ifndef __A1_PERIPHERALS_CLKC_H 1198872da6SDmitry Rokosov #define __A1_PERIPHERALS_CLKC_H 1298872da6SDmitry Rokosov 13*57049a1cSNeil Armstrong #define CLKID_XTAL_IN 0 1498872da6SDmitry Rokosov #define CLKID_FIXPLL_IN 1 1598872da6SDmitry Rokosov #define CLKID_USB_PHY_IN 2 1698872da6SDmitry Rokosov #define CLKID_USB_CTRL_IN 3 1798872da6SDmitry Rokosov #define CLKID_HIFIPLL_IN 4 1898872da6SDmitry Rokosov #define CLKID_SYSPLL_IN 5 1998872da6SDmitry Rokosov #define CLKID_DDS_IN 6 2098872da6SDmitry Rokosov #define CLKID_SYS 7 2198872da6SDmitry Rokosov #define CLKID_CLKTREE 8 2298872da6SDmitry Rokosov #define CLKID_RESET_CTRL 9 2398872da6SDmitry Rokosov #define CLKID_ANALOG_CTRL 10 2498872da6SDmitry Rokosov #define CLKID_PWR_CTRL 11 2598872da6SDmitry Rokosov #define CLKID_PAD_CTRL 12 2698872da6SDmitry Rokosov #define CLKID_SYS_CTRL 13 2798872da6SDmitry Rokosov #define CLKID_TEMP_SENSOR 14 2898872da6SDmitry Rokosov #define CLKID_AM2AXI_DIV 15 2998872da6SDmitry Rokosov #define CLKID_SPICC_B 16 3098872da6SDmitry Rokosov #define CLKID_SPICC_A 17 3198872da6SDmitry Rokosov #define CLKID_MSR 18 3298872da6SDmitry Rokosov #define CLKID_AUDIO 19 3398872da6SDmitry Rokosov #define CLKID_JTAG_CTRL 20 3498872da6SDmitry Rokosov #define CLKID_SARADC_EN 21 3598872da6SDmitry Rokosov #define CLKID_PWM_EF 22 3698872da6SDmitry Rokosov #define CLKID_PWM_CD 23 3798872da6SDmitry Rokosov #define CLKID_PWM_AB 24 3898872da6SDmitry Rokosov #define CLKID_CEC 25 3998872da6SDmitry Rokosov #define CLKID_I2C_S 26 4098872da6SDmitry Rokosov #define CLKID_IR_CTRL 27 4198872da6SDmitry Rokosov #define CLKID_I2C_M_D 28 4298872da6SDmitry Rokosov #define CLKID_I2C_M_C 29 4398872da6SDmitry Rokosov #define CLKID_I2C_M_B 30 4498872da6SDmitry Rokosov #define CLKID_I2C_M_A 31 4598872da6SDmitry Rokosov #define CLKID_ACODEC 32 4698872da6SDmitry Rokosov #define CLKID_OTP 33 4798872da6SDmitry Rokosov #define CLKID_SD_EMMC_A 34 4898872da6SDmitry Rokosov #define CLKID_USB_PHY 35 4998872da6SDmitry Rokosov #define CLKID_USB_CTRL 36 5098872da6SDmitry Rokosov #define CLKID_SYS_DSPB 37 5198872da6SDmitry Rokosov #define CLKID_SYS_DSPA 38 5298872da6SDmitry Rokosov #define CLKID_DMA 39 5398872da6SDmitry Rokosov #define CLKID_IRQ_CTRL 40 5498872da6SDmitry Rokosov #define CLKID_NIC 41 5598872da6SDmitry Rokosov #define CLKID_GIC 42 5698872da6SDmitry Rokosov #define CLKID_UART_C 43 5798872da6SDmitry Rokosov #define CLKID_UART_B 44 5898872da6SDmitry Rokosov #define CLKID_UART_A 45 5998872da6SDmitry Rokosov #define CLKID_SYS_PSRAM 46 6098872da6SDmitry Rokosov #define CLKID_RSA 47 6198872da6SDmitry Rokosov #define CLKID_CORESIGHT 48 6298872da6SDmitry Rokosov #define CLKID_AM2AXI_VAD 49 6398872da6SDmitry Rokosov #define CLKID_AUDIO_VAD 50 6498872da6SDmitry Rokosov #define CLKID_AXI_DMC 51 6598872da6SDmitry Rokosov #define CLKID_AXI_PSRAM 52 6698872da6SDmitry Rokosov #define CLKID_RAMB 53 6798872da6SDmitry Rokosov #define CLKID_RAMA 54 6898872da6SDmitry Rokosov #define CLKID_AXI_SPIFC 55 6998872da6SDmitry Rokosov #define CLKID_AXI_NIC 56 7098872da6SDmitry Rokosov #define CLKID_AXI_DMA 57 7198872da6SDmitry Rokosov #define CLKID_CPU_CTRL 58 7298872da6SDmitry Rokosov #define CLKID_ROM 59 7398872da6SDmitry Rokosov #define CLKID_PROC_I2C 60 74*57049a1cSNeil Armstrong #define CLKID_DSPA_SEL 61 75*57049a1cSNeil Armstrong #define CLKID_DSPB_SEL 62 7698872da6SDmitry Rokosov #define CLKID_DSPA_EN 63 7798872da6SDmitry Rokosov #define CLKID_DSPA_EN_NIC 64 7898872da6SDmitry Rokosov #define CLKID_DSPB_EN 65 7998872da6SDmitry Rokosov #define CLKID_DSPB_EN_NIC 66 8098872da6SDmitry Rokosov #define CLKID_RTC 67 8198872da6SDmitry Rokosov #define CLKID_CECA_32K 68 8298872da6SDmitry Rokosov #define CLKID_CECB_32K 69 8398872da6SDmitry Rokosov #define CLKID_24M 70 8498872da6SDmitry Rokosov #define CLKID_12M 71 8598872da6SDmitry Rokosov #define CLKID_FCLK_DIV2_DIVN 72 8698872da6SDmitry Rokosov #define CLKID_GEN 73 87*57049a1cSNeil Armstrong #define CLKID_SARADC_SEL 74 8898872da6SDmitry Rokosov #define CLKID_SARADC 75 8998872da6SDmitry Rokosov #define CLKID_PWM_A 76 9098872da6SDmitry Rokosov #define CLKID_PWM_B 77 9198872da6SDmitry Rokosov #define CLKID_PWM_C 78 9298872da6SDmitry Rokosov #define CLKID_PWM_D 79 9398872da6SDmitry Rokosov #define CLKID_PWM_E 80 9498872da6SDmitry Rokosov #define CLKID_PWM_F 81 9598872da6SDmitry Rokosov #define CLKID_SPICC 82 9698872da6SDmitry Rokosov #define CLKID_TS 83 9798872da6SDmitry Rokosov #define CLKID_SPIFC 84 9898872da6SDmitry Rokosov #define CLKID_USB_BUS 85 9998872da6SDmitry Rokosov #define CLKID_SD_EMMC 86 10098872da6SDmitry Rokosov #define CLKID_PSRAM 87 10198872da6SDmitry Rokosov #define CLKID_DMC 88 102*57049a1cSNeil Armstrong #define CLKID_SYS_A_SEL 89 103*57049a1cSNeil Armstrong #define CLKID_SYS_A_DIV 90 104*57049a1cSNeil Armstrong #define CLKID_SYS_A 91 105*57049a1cSNeil Armstrong #define CLKID_SYS_B_SEL 92 106*57049a1cSNeil Armstrong #define CLKID_SYS_B_DIV 93 107*57049a1cSNeil Armstrong #define CLKID_SYS_B 94 10898872da6SDmitry Rokosov #define CLKID_DSPA_A_SEL 95 109*57049a1cSNeil Armstrong #define CLKID_DSPA_A_DIV 96 110*57049a1cSNeil Armstrong #define CLKID_DSPA_A 97 11198872da6SDmitry Rokosov #define CLKID_DSPA_B_SEL 98 112*57049a1cSNeil Armstrong #define CLKID_DSPA_B_DIV 99 113*57049a1cSNeil Armstrong #define CLKID_DSPA_B 100 11498872da6SDmitry Rokosov #define CLKID_DSPB_A_SEL 101 115*57049a1cSNeil Armstrong #define CLKID_DSPB_A_DIV 102 116*57049a1cSNeil Armstrong #define CLKID_DSPB_A 103 11798872da6SDmitry Rokosov #define CLKID_DSPB_B_SEL 104 118*57049a1cSNeil Armstrong #define CLKID_DSPB_B_DIV 105 119*57049a1cSNeil Armstrong #define CLKID_DSPB_B 106 120*57049a1cSNeil Armstrong #define CLKID_RTC_32K_IN 107 121*57049a1cSNeil Armstrong #define CLKID_RTC_32K_DIV 108 122*57049a1cSNeil Armstrong #define CLKID_RTC_32K_XTAL 109 123*57049a1cSNeil Armstrong #define CLKID_RTC_32K_SEL 110 124*57049a1cSNeil Armstrong #define CLKID_CECB_32K_IN 111 125*57049a1cSNeil Armstrong #define CLKID_CECB_32K_DIV 112 12698872da6SDmitry Rokosov #define CLKID_CECB_32K_SEL_PRE 113 12798872da6SDmitry Rokosov #define CLKID_CECB_32K_SEL 114 128*57049a1cSNeil Armstrong #define CLKID_CECA_32K_IN 115 129*57049a1cSNeil Armstrong #define CLKID_CECA_32K_DIV 116 13098872da6SDmitry Rokosov #define CLKID_CECA_32K_SEL_PRE 117 13198872da6SDmitry Rokosov #define CLKID_CECA_32K_SEL 118 132*57049a1cSNeil Armstrong #define CLKID_DIV2_PRE 119 133*57049a1cSNeil Armstrong #define CLKID_24M_DIV2 120 13498872da6SDmitry Rokosov #define CLKID_GEN_SEL 121 135*57049a1cSNeil Armstrong #define CLKID_GEN_DIV 122 136*57049a1cSNeil Armstrong #define CLKID_SARADC_DIV 123 13798872da6SDmitry Rokosov #define CLKID_PWM_A_SEL 124 138*57049a1cSNeil Armstrong #define CLKID_PWM_A_DIV 125 13998872da6SDmitry Rokosov #define CLKID_PWM_B_SEL 126 140*57049a1cSNeil Armstrong #define CLKID_PWM_B_DIV 127 14198872da6SDmitry Rokosov #define CLKID_PWM_C_SEL 128 142*57049a1cSNeil Armstrong #define CLKID_PWM_C_DIV 129 14398872da6SDmitry Rokosov #define CLKID_PWM_D_SEL 130 144*57049a1cSNeil Armstrong #define CLKID_PWM_D_DIV 131 14598872da6SDmitry Rokosov #define CLKID_PWM_E_SEL 132 146*57049a1cSNeil Armstrong #define CLKID_PWM_E_DIV 133 14798872da6SDmitry Rokosov #define CLKID_PWM_F_SEL 134 148*57049a1cSNeil Armstrong #define CLKID_PWM_F_DIV 135 149*57049a1cSNeil Armstrong #define CLKID_SPICC_SEL 136 150*57049a1cSNeil Armstrong #define CLKID_SPICC_DIV 137 151*57049a1cSNeil Armstrong #define CLKID_SPICC_SEL2 138 152*57049a1cSNeil Armstrong #define CLKID_TS_DIV 139 153*57049a1cSNeil Armstrong #define CLKID_SPIFC_SEL 140 154*57049a1cSNeil Armstrong #define CLKID_SPIFC_DIV 141 155*57049a1cSNeil Armstrong #define CLKID_SPIFC_SEL2 142 156*57049a1cSNeil Armstrong #define CLKID_USB_BUS_SEL 143 157*57049a1cSNeil Armstrong #define CLKID_USB_BUS_DIV 144 158*57049a1cSNeil Armstrong #define CLKID_SD_EMMC_SEL 145 159*57049a1cSNeil Armstrong #define CLKID_SD_EMMC_DIV 146 16098872da6SDmitry Rokosov #define CLKID_SD_EMMC_SEL2 147 161*57049a1cSNeil Armstrong #define CLKID_PSRAM_SEL 148 162*57049a1cSNeil Armstrong #define CLKID_PSRAM_DIV 149 163*57049a1cSNeil Armstrong #define CLKID_PSRAM_SEL2 150 164*57049a1cSNeil Armstrong #define CLKID_DMC_SEL 151 165*57049a1cSNeil Armstrong #define CLKID_DMC_DIV 152 166*57049a1cSNeil Armstrong #define CLKID_DMC_SEL2 153 16798872da6SDmitry Rokosov 16898872da6SDmitry Rokosov #endif /* __A1_PERIPHERALS_CLKC_H */ 169