1 /* Common header for intel-gtt.ko and i915.ko */ 2 3 #ifndef _DRM_INTEL_GTT_H 4 #define _DRM_INTEL_GTT_H 5 6 struct intel_gtt { 7 /* Size of memory reserved for graphics by the BIOS */ 8 unsigned int stolen_size; 9 /* Total number of gtt entries. */ 10 unsigned int gtt_total_entries; 11 /* Part of the gtt that is mappable by the cpu, for those chips where 12 * this is not the full gtt. */ 13 unsigned int gtt_mappable_entries; 14 /* Whether i915 needs to use the dmar apis or not. */ 15 unsigned int needs_dmar : 1; 16 /* Whether we idle the gpu before mapping/unmapping */ 17 unsigned int do_idle_maps : 1; 18 /* Share the scratch page dma with ppgtts. */ 19 dma_addr_t scratch_page_dma; 20 struct page *scratch_page; 21 /* needed for ioremap in drm/i915 */ 22 phys_addr_t gma_bus_addr; 23 } *intel_gtt_get(void); 24 25 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, 26 struct agp_bridge_data *bridge); 27 void intel_gmch_remove(void); 28 29 bool intel_enable_gtt(void); 30 31 void intel_gtt_chipset_flush(void); 32 void intel_gtt_insert_sg_entries(struct sg_table *st, 33 unsigned int pg_start, 34 unsigned int flags); 35 void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); 36 37 /* Special gtt memory types */ 38 #define AGP_DCACHE_MEMORY 1 39 #define AGP_PHYS_MEMORY 2 40 41 /* flag for GFDT type */ 42 #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) 43 44 #ifdef CONFIG_INTEL_IOMMU 45 extern int intel_iommu_gfx_mapped; 46 #endif 47 48 #endif 49