1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 20ade6386SDaniel Vetter /* Common header for intel-gtt.ko and i915.ko */ 30ade6386SDaniel Vetter 40ade6386SDaniel Vetter #ifndef _DRM_INTEL_GTT_H 50ade6386SDaniel Vetter #define _DRM_INTEL_GTT_H 6c64f7ba5SChris Wilson 75c27b9faSJani Nikula #include <linux/agp_backend.h> 8c7eb900fSAndy Shevchenko #include <linux/intel-iommu.h> 9*ce6838afSAndy Shevchenko #include <linux/types.h> 10*ce6838afSAndy Shevchenko 11*ce6838afSAndy Shevchenko struct pci_dev; 12*ce6838afSAndy Shevchenko struct sg_table; 135c27b9faSJani Nikula 14edd1f2feSChris Wilson void intel_gtt_get(u64 *gtt_total, 15edd1f2feSChris Wilson phys_addr_t *mappable_base, 16b7128ef1SMatthew Auld resource_size_t *mappable_end); 1719966754SDaniel Vetter 1814be93ddSDaniel Vetter int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, 1914be93ddSDaniel Vetter struct agp_bridge_data *bridge); 2014be93ddSDaniel Vetter void intel_gmch_remove(void); 2114be93ddSDaniel Vetter 228ecd1a66SDaniel Vetter bool intel_enable_gtt(void); 238ecd1a66SDaniel Vetter 2440ce6575SDaniel Vetter void intel_gtt_chipset_flush(void); 25d6473f56SChris Wilson void intel_gtt_insert_page(dma_addr_t addr, 26d6473f56SChris Wilson unsigned int pg, 27d6473f56SChris Wilson unsigned int flags); 289da3da66SChris Wilson void intel_gtt_insert_sg_entries(struct sg_table *st, 294080775bSDaniel Vetter unsigned int pg_start, 304080775bSDaniel Vetter unsigned int flags); 319da3da66SChris Wilson void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); 3223ed992aSDaniel Vetter 3323ed992aSDaniel Vetter /* Special gtt memory types */ 3423ed992aSDaniel Vetter #define AGP_DCACHE_MEMORY 1 3523ed992aSDaniel Vetter #define AGP_PHYS_MEMORY 2 3623ed992aSDaniel Vetter 3723ed992aSDaniel Vetter /* flag for GFDT type */ 3823ed992aSDaniel Vetter #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) 3923ed992aSDaniel Vetter 400ade6386SDaniel Vetter #endif 41