1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 20ade6386SDaniel Vetter /* Common header for intel-gtt.ko and i915.ko */ 30ade6386SDaniel Vetter 40ade6386SDaniel Vetter #ifndef _DRM_INTEL_GTT_H 50ade6386SDaniel Vetter #define _DRM_INTEL_GTT_H 6c64f7ba5SChris Wilson 7edd1f2feSChris Wilson void intel_gtt_get(u64 *gtt_total, 8edd1f2feSChris Wilson u32 *stolen_size, 9edd1f2feSChris Wilson phys_addr_t *mappable_base, 10edd1f2feSChris Wilson u64 *mappable_end); 1119966754SDaniel Vetter 1214be93ddSDaniel Vetter int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, 1314be93ddSDaniel Vetter struct agp_bridge_data *bridge); 1414be93ddSDaniel Vetter void intel_gmch_remove(void); 1514be93ddSDaniel Vetter 168ecd1a66SDaniel Vetter bool intel_enable_gtt(void); 178ecd1a66SDaniel Vetter 1840ce6575SDaniel Vetter void intel_gtt_chipset_flush(void); 19d6473f56SChris Wilson void intel_gtt_insert_page(dma_addr_t addr, 20d6473f56SChris Wilson unsigned int pg, 21d6473f56SChris Wilson unsigned int flags); 229da3da66SChris Wilson void intel_gtt_insert_sg_entries(struct sg_table *st, 234080775bSDaniel Vetter unsigned int pg_start, 244080775bSDaniel Vetter unsigned int flags); 259da3da66SChris Wilson void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); 2623ed992aSDaniel Vetter 2723ed992aSDaniel Vetter /* Special gtt memory types */ 2823ed992aSDaniel Vetter #define AGP_DCACHE_MEMORY 1 2923ed992aSDaniel Vetter #define AGP_PHYS_MEMORY 2 3023ed992aSDaniel Vetter 3123ed992aSDaniel Vetter /* flag for GFDT type */ 3223ed992aSDaniel Vetter #define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) 3323ed992aSDaniel Vetter 34650dc07eSDaniel Vetter #ifdef CONFIG_INTEL_IOMMU 35650dc07eSDaniel Vetter extern int intel_iommu_gfx_mapped; 36650dc07eSDaniel Vetter #endif 37650dc07eSDaniel Vetter 380ade6386SDaniel Vetter #endif 39