1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 28a4da6e3SMark Rutland /* 38a4da6e3SMark Rutland * Copyright (C) 2012 ARM Ltd. 48a4da6e3SMark Rutland */ 58a4da6e3SMark Rutland #ifndef __CLKSOURCE_ARM_ARCH_TIMER_H 68a4da6e3SMark Rutland #define __CLKSOURCE_ARM_ARCH_TIMER_H 78a4da6e3SMark Rutland 8831610c0SFu Wei #include <linux/bitops.h> 974d23cc7SRichard Cochran #include <linux/timecounter.h> 108a4da6e3SMark Rutland #include <linux/types.h> 118a4da6e3SMark Rutland 12831610c0SFu Wei #define ARCH_TIMER_TYPE_CP15 BIT(0) 13831610c0SFu Wei #define ARCH_TIMER_TYPE_MEM BIT(1) 14831610c0SFu Wei 158a4da6e3SMark Rutland #define ARCH_TIMER_CTRL_ENABLE (1 << 0) 168a4da6e3SMark Rutland #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) 178a4da6e3SMark Rutland #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) 188a4da6e3SMark Rutland 191431af36SMarc Zyngier #define CNTHCTL_EL1PCTEN (1 << 0) 201431af36SMarc Zyngier #define CNTHCTL_EL1PCEN (1 << 1) 211431af36SMarc Zyngier #define CNTHCTL_EVNTEN (1 << 2) 221431af36SMarc Zyngier #define CNTHCTL_EVNTDIR (1 << 3) 231431af36SMarc Zyngier #define CNTHCTL_EVNTI (0xF << 4) 24*2b4825a8SMarc Zyngier #define CNTHCTL_ECV (1 << 12) 251431af36SMarc Zyngier 26e09f3cc0SStephen Boyd enum arch_timer_reg { 27e09f3cc0SStephen Boyd ARCH_TIMER_REG_CTRL, 28a38b71b0SMarc Zyngier ARCH_TIMER_REG_CVAL, 29e09f3cc0SStephen Boyd }; 308a4da6e3SMark Rutland 31831610c0SFu Wei enum arch_timer_ppi_nr { 32831610c0SFu Wei ARCH_TIMER_PHYS_SECURE_PPI, 33831610c0SFu Wei ARCH_TIMER_PHYS_NONSECURE_PPI, 34831610c0SFu Wei ARCH_TIMER_VIRT_PPI, 35831610c0SFu Wei ARCH_TIMER_HYP_PPI, 3686332e9eSHector Martin ARCH_TIMER_HYP_VIRT_PPI, 37831610c0SFu Wei ARCH_TIMER_MAX_TIMER_PPI 38831610c0SFu Wei }; 39831610c0SFu Wei 40097cd143SFu Wei enum arch_timer_spi_nr { 41097cd143SFu Wei ARCH_TIMER_PHYS_SPI, 42097cd143SFu Wei ARCH_TIMER_VIRT_SPI, 43097cd143SFu Wei ARCH_TIMER_MAX_TIMER_SPI 44097cd143SFu Wei }; 45097cd143SFu Wei 468a4da6e3SMark Rutland #define ARCH_TIMER_PHYS_ACCESS 0 478a4da6e3SMark Rutland #define ARCH_TIMER_VIRT_ACCESS 1 4822006994SStephen Boyd #define ARCH_TIMER_MEM_PHYS_ACCESS 2 4922006994SStephen Boyd #define ARCH_TIMER_MEM_VIRT_ACCESS 3 508a4da6e3SMark Rutland 51b3251b8fSFu Wei #define ARCH_TIMER_MEM_MAX_FRAMES 8 52b3251b8fSFu Wei 5328061758SSudeep KarkadaNagesha #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ 5428061758SSudeep KarkadaNagesha #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ 5528061758SSudeep KarkadaNagesha #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) 5628061758SSudeep KarkadaNagesha #define ARCH_TIMER_EVT_TRIGGER_SHIFT (4) 5728061758SSudeep KarkadaNagesha #define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT) 5828061758SSudeep KarkadaNagesha #define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */ 5928061758SSudeep KarkadaNagesha #define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */ 608c4b810aSMarc Zyngier #define ARCH_TIMER_EVT_INTERVAL_SCALE (1 << 17) /* EVNTIS in the ARMv8 ARM */ 6128061758SSudeep KarkadaNagesha 627b77452eSJulien Thierry #define ARCH_TIMER_EVT_STREAM_PERIOD_US 100 637b77452eSJulien Thierry #define ARCH_TIMER_EVT_STREAM_FREQ \ 647b77452eSJulien Thierry (USEC_PER_SEC / ARCH_TIMER_EVT_STREAM_PERIOD_US) 65037f6377SWill Deacon 66b4d6ce97SJulien Grall struct arch_timer_kvm_info { 67b4d6ce97SJulien Grall struct timecounter timecounter; 68d9b5e415SJulien Grall int virtual_irq; 69ee793049SAndre Przywara int physical_irq; 70b4d6ce97SJulien Grall }; 71b4d6ce97SJulien Grall 72b3251b8fSFu Wei struct arch_timer_mem_frame { 73b3251b8fSFu Wei bool valid; 74b3251b8fSFu Wei phys_addr_t cntbase; 75b3251b8fSFu Wei size_t size; 76b3251b8fSFu Wei int phys_irq; 77b3251b8fSFu Wei int virt_irq; 78b3251b8fSFu Wei }; 79b3251b8fSFu Wei 80b3251b8fSFu Wei struct arch_timer_mem { 81b3251b8fSFu Wei phys_addr_t cntctlbase; 82b3251b8fSFu Wei size_t size; 83b3251b8fSFu Wei struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES]; 84b3251b8fSFu Wei }; 85b3251b8fSFu Wei 868a4da6e3SMark Rutland #ifdef CONFIG_ARM_ARCH_TIMER 878a4da6e3SMark Rutland 888a4da6e3SMark Rutland extern u32 arch_timer_get_rate(void); 8922006994SStephen Boyd extern u64 (*arch_timer_read_counter)(void); 90b4d6ce97SJulien Grall extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void); 91ec5c8e42SJulien Thierry extern bool arch_timer_evtstrm_available(void); 928a4da6e3SMark Rutland 938a4da6e3SMark Rutland #else 948a4da6e3SMark Rutland arch_timer_get_rate(void)958a4da6e3SMark Rutlandstatic inline u32 arch_timer_get_rate(void) 968a4da6e3SMark Rutland { 978a4da6e3SMark Rutland return 0; 988a4da6e3SMark Rutland } 998a4da6e3SMark Rutland arch_timer_read_counter(void)1008a4da6e3SMark Rutlandstatic inline u64 arch_timer_read_counter(void) 1018a4da6e3SMark Rutland { 1028a4da6e3SMark Rutland return 0; 1038a4da6e3SMark Rutland } 1048a4da6e3SMark Rutland arch_timer_evtstrm_available(void)105ec5c8e42SJulien Thierrystatic inline bool arch_timer_evtstrm_available(void) 106ec5c8e42SJulien Thierry { 107ec5c8e42SJulien Thierry return false; 108ec5c8e42SJulien Thierry } 109ec5c8e42SJulien Thierry 1108a4da6e3SMark Rutland #endif 1118a4da6e3SMark Rutland 1128a4da6e3SMark Rutland #endif 113