1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* include/asm-generic/tlb.h 3 * 4 * Generic TLB shootdown code 5 * 6 * Copyright 2001 Red Hat, Inc. 7 * Based on code from mm/memory.c Copyright Linus Torvalds and others. 8 * 9 * Copyright 2011 Red Hat, Inc., Peter Zijlstra 10 */ 11 #ifndef _ASM_GENERIC__TLB_H 12 #define _ASM_GENERIC__TLB_H 13 14 #include <linux/mmu_notifier.h> 15 #include <linux/swap.h> 16 #include <linux/hugetlb_inline.h> 17 #include <asm/tlbflush.h> 18 #include <asm/cacheflush.h> 19 20 /* 21 * Blindly accessing user memory from NMI context can be dangerous 22 * if we're in the middle of switching the current user task or switching 23 * the loaded mm. 24 */ 25 #ifndef nmi_uaccess_okay 26 # define nmi_uaccess_okay() true 27 #endif 28 29 #ifdef CONFIG_MMU 30 31 /* 32 * Generic MMU-gather implementation. 33 * 34 * The mmu_gather data structure is used by the mm code to implement the 35 * correct and efficient ordering of freeing pages and TLB invalidations. 36 * 37 * This correct ordering is: 38 * 39 * 1) unhook page 40 * 2) TLB invalidate page 41 * 3) free page 42 * 43 * That is, we must never free a page before we have ensured there are no live 44 * translations left to it. Otherwise it might be possible to observe (or 45 * worse, change) the page content after it has been reused. 46 * 47 * The mmu_gather API consists of: 48 * 49 * - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu() 50 * 51 * start and finish a mmu_gather 52 * 53 * Finish in particular will issue a (final) TLB invalidate and free 54 * all (remaining) queued pages. 55 * 56 * - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA 57 * 58 * Defaults to flushing at tlb_end_vma() to reset the range; helps when 59 * there's large holes between the VMAs. 60 * 61 * - tlb_remove_table() 62 * 63 * tlb_remove_table() is the basic primitive to free page-table directories 64 * (__p*_free_tlb()). In it's most primitive form it is an alias for 65 * tlb_remove_page() below, for when page directories are pages and have no 66 * additional constraints. 67 * 68 * See also MMU_GATHER_TABLE_FREE and MMU_GATHER_RCU_TABLE_FREE. 69 * 70 * - tlb_remove_page() / __tlb_remove_page() 71 * - tlb_remove_page_size() / __tlb_remove_page_size() 72 * 73 * __tlb_remove_page_size() is the basic primitive that queues a page for 74 * freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a 75 * boolean indicating if the queue is (now) full and a call to 76 * tlb_flush_mmu() is required. 77 * 78 * tlb_remove_page() and tlb_remove_page_size() imply the call to 79 * tlb_flush_mmu() when required and has no return value. 80 * 81 * - tlb_change_page_size() 82 * 83 * call before __tlb_remove_page*() to set the current page-size; implies a 84 * possible tlb_flush_mmu() call. 85 * 86 * - tlb_flush_mmu() / tlb_flush_mmu_tlbonly() 87 * 88 * tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets 89 * related state, like the range) 90 * 91 * tlb_flush_mmu() - in addition to the above TLB invalidate, also frees 92 * whatever pages are still batched. 93 * 94 * - mmu_gather::fullmm 95 * 96 * A flag set by tlb_gather_mmu_fullmm() to indicate we're going to free 97 * the entire mm; this allows a number of optimizations. 98 * 99 * - We can ignore tlb_{start,end}_vma(); because we don't 100 * care about ranges. Everything will be shot down. 101 * 102 * - (RISC) architectures that use ASIDs can cycle to a new ASID 103 * and delay the invalidation until ASID space runs out. 104 * 105 * - mmu_gather::need_flush_all 106 * 107 * A flag that can be set by the arch code if it wants to force 108 * flush the entire TLB irrespective of the range. For instance 109 * x86-PAE needs this when changing top-level entries. 110 * 111 * And allows the architecture to provide and implement tlb_flush(): 112 * 113 * tlb_flush() may, in addition to the above mentioned mmu_gather fields, make 114 * use of: 115 * 116 * - mmu_gather::start / mmu_gather::end 117 * 118 * which provides the range that needs to be flushed to cover the pages to 119 * be freed. 120 * 121 * - mmu_gather::freed_tables 122 * 123 * set when we freed page table pages 124 * 125 * - tlb_get_unmap_shift() / tlb_get_unmap_size() 126 * 127 * returns the smallest TLB entry size unmapped in this range. 128 * 129 * If an architecture does not provide tlb_flush() a default implementation 130 * based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is 131 * specified, in which case we'll default to flush_tlb_mm(). 132 * 133 * Additionally there are a few opt-in features: 134 * 135 * MMU_GATHER_PAGE_SIZE 136 * 137 * This ensures we call tlb_flush() every time tlb_change_page_size() actually 138 * changes the size and provides mmu_gather::page_size to tlb_flush(). 139 * 140 * This might be useful if your architecture has size specific TLB 141 * invalidation instructions. 142 * 143 * MMU_GATHER_TABLE_FREE 144 * 145 * This provides tlb_remove_table(), to be used instead of tlb_remove_page() 146 * for page directores (__p*_free_tlb()). 147 * 148 * Useful if your architecture has non-page page directories. 149 * 150 * When used, an architecture is expected to provide __tlb_remove_table() 151 * which does the actual freeing of these pages. 152 * 153 * MMU_GATHER_RCU_TABLE_FREE 154 * 155 * Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see 156 * comment below). 157 * 158 * Useful if your architecture doesn't use IPIs for remote TLB invalidates 159 * and therefore doesn't naturally serialize with software page-table walkers. 160 * 161 * MMU_GATHER_NO_FLUSH_CACHE 162 * 163 * Indicates the architecture has flush_cache_range() but it needs *NOT* be called 164 * before unmapping a VMA. 165 * 166 * NOTE: strictly speaking we shouldn't have this knob and instead rely on 167 * flush_cache_range() being a NOP, except Sparc64 seems to be 168 * different here. 169 * 170 * MMU_GATHER_MERGE_VMAS 171 * 172 * Indicates the architecture wants to merge ranges over VMAs; typical when 173 * multiple range invalidates are more expensive than a full invalidate. 174 * 175 * MMU_GATHER_NO_RANGE 176 * 177 * Use this if your architecture lacks an efficient flush_tlb_range(). This 178 * option implies MMU_GATHER_MERGE_VMAS above. 179 * 180 * MMU_GATHER_NO_GATHER 181 * 182 * If the option is set the mmu_gather will not track individual pages for 183 * delayed page free anymore. A platform that enables the option needs to 184 * provide its own implementation of the __tlb_remove_page_size() function to 185 * free pages. 186 * 187 * This is useful if your architecture already flushes TLB entries in the 188 * various ptep_get_and_clear() functions. 189 */ 190 191 #ifdef CONFIG_MMU_GATHER_TABLE_FREE 192 193 struct mmu_table_batch { 194 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE 195 struct rcu_head rcu; 196 #endif 197 unsigned int nr; 198 void *tables[]; 199 }; 200 201 #define MAX_TABLE_BATCH \ 202 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *)) 203 204 extern void tlb_remove_table(struct mmu_gather *tlb, void *table); 205 206 #else /* !CONFIG_MMU_GATHER_HAVE_TABLE_FREE */ 207 208 /* 209 * Without MMU_GATHER_TABLE_FREE the architecture is assumed to have page based 210 * page directories and we can use the normal page batching to free them. 211 */ 212 #define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page)) 213 214 #endif /* CONFIG_MMU_GATHER_TABLE_FREE */ 215 216 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE 217 /* 218 * This allows an architecture that does not use the linux page-tables for 219 * hardware to skip the TLBI when freeing page tables. 220 */ 221 #ifndef tlb_needs_table_invalidate 222 #define tlb_needs_table_invalidate() (true) 223 #endif 224 225 #else 226 227 #ifdef tlb_needs_table_invalidate 228 #error tlb_needs_table_invalidate() requires MMU_GATHER_RCU_TABLE_FREE 229 #endif 230 231 #endif /* CONFIG_MMU_GATHER_RCU_TABLE_FREE */ 232 233 234 #ifndef CONFIG_MMU_GATHER_NO_GATHER 235 /* 236 * If we can't allocate a page to make a big batch of page pointers 237 * to work on, then just handle a few from the on-stack structure. 238 */ 239 #define MMU_GATHER_BUNDLE 8 240 241 struct mmu_gather_batch { 242 struct mmu_gather_batch *next; 243 unsigned int nr; 244 unsigned int max; 245 struct page *pages[]; 246 }; 247 248 #define MAX_GATHER_BATCH \ 249 ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *)) 250 251 /* 252 * Limit the maximum number of mmu_gather batches to reduce a risk of soft 253 * lockups for non-preemptible kernels on huge machines when a lot of memory 254 * is zapped during unmapping. 255 * 10K pages freed at once should be safe even without a preemption point. 256 */ 257 #define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH) 258 259 extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page, 260 int page_size); 261 #endif 262 263 /* 264 * struct mmu_gather is an opaque type used by the mm code for passing around 265 * any data needed by arch specific code for tlb_remove_page. 266 */ 267 struct mmu_gather { 268 struct mm_struct *mm; 269 270 #ifdef CONFIG_MMU_GATHER_TABLE_FREE 271 struct mmu_table_batch *batch; 272 #endif 273 274 unsigned long start; 275 unsigned long end; 276 /* 277 * we are in the middle of an operation to clear 278 * a full mm and can make some optimizations 279 */ 280 unsigned int fullmm : 1; 281 282 /* 283 * we have performed an operation which 284 * requires a complete flush of the tlb 285 */ 286 unsigned int need_flush_all : 1; 287 288 /* 289 * we have removed page directories 290 */ 291 unsigned int freed_tables : 1; 292 293 /* 294 * at which levels have we cleared entries? 295 */ 296 unsigned int cleared_ptes : 1; 297 unsigned int cleared_pmds : 1; 298 unsigned int cleared_puds : 1; 299 unsigned int cleared_p4ds : 1; 300 301 /* 302 * tracks VM_EXEC | VM_HUGETLB in tlb_start_vma 303 */ 304 unsigned int vma_exec : 1; 305 unsigned int vma_huge : 1; 306 unsigned int vma_pfn : 1; 307 308 unsigned int batch_count; 309 310 #ifndef CONFIG_MMU_GATHER_NO_GATHER 311 struct mmu_gather_batch *active; 312 struct mmu_gather_batch local; 313 struct page *__pages[MMU_GATHER_BUNDLE]; 314 315 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE 316 unsigned int page_size; 317 #endif 318 #endif 319 }; 320 321 void tlb_flush_mmu(struct mmu_gather *tlb); 322 323 static inline void __tlb_adjust_range(struct mmu_gather *tlb, 324 unsigned long address, 325 unsigned int range_size) 326 { 327 tlb->start = min(tlb->start, address); 328 tlb->end = max(tlb->end, address + range_size); 329 } 330 331 static inline void __tlb_reset_range(struct mmu_gather *tlb) 332 { 333 if (tlb->fullmm) { 334 tlb->start = tlb->end = ~0; 335 } else { 336 tlb->start = TASK_SIZE; 337 tlb->end = 0; 338 } 339 tlb->freed_tables = 0; 340 tlb->cleared_ptes = 0; 341 tlb->cleared_pmds = 0; 342 tlb->cleared_puds = 0; 343 tlb->cleared_p4ds = 0; 344 /* 345 * Do not reset mmu_gather::vma_* fields here, we do not 346 * call into tlb_start_vma() again to set them if there is an 347 * intermediate flush. 348 */ 349 } 350 351 #ifdef CONFIG_MMU_GATHER_NO_RANGE 352 353 #if defined(tlb_flush) 354 #error MMU_GATHER_NO_RANGE relies on default tlb_flush() 355 #endif 356 357 /* 358 * When an architecture does not have efficient means of range flushing TLBs 359 * there is no point in doing intermediate flushes on tlb_end_vma() to keep the 360 * range small. We equally don't have to worry about page granularity or other 361 * things. 362 * 363 * All we need to do is issue a full flush for any !0 range. 364 */ 365 static inline void tlb_flush(struct mmu_gather *tlb) 366 { 367 if (tlb->end) 368 flush_tlb_mm(tlb->mm); 369 } 370 371 #else /* CONFIG_MMU_GATHER_NO_RANGE */ 372 373 #ifndef tlb_flush 374 /* 375 * When an architecture does not provide its own tlb_flush() implementation 376 * but does have a reasonably efficient flush_vma_range() implementation 377 * use that. 378 */ 379 static inline void tlb_flush(struct mmu_gather *tlb) 380 { 381 if (tlb->fullmm || tlb->need_flush_all) { 382 flush_tlb_mm(tlb->mm); 383 } else if (tlb->end) { 384 struct vm_area_struct vma = { 385 .vm_mm = tlb->mm, 386 .vm_flags = (tlb->vma_exec ? VM_EXEC : 0) | 387 (tlb->vma_huge ? VM_HUGETLB : 0), 388 }; 389 390 flush_tlb_range(&vma, tlb->start, tlb->end); 391 } 392 } 393 #endif 394 395 #endif /* CONFIG_MMU_GATHER_NO_RANGE */ 396 397 static inline void 398 tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) 399 { 400 /* 401 * flush_tlb_range() implementations that look at VM_HUGETLB (tile, 402 * mips-4k) flush only large pages. 403 * 404 * flush_tlb_range() implementations that flush I-TLB also flush D-TLB 405 * (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing 406 * range. 407 * 408 * We rely on tlb_end_vma() to issue a flush, such that when we reset 409 * these values the batch is empty. 410 */ 411 tlb->vma_huge = is_vm_hugetlb_page(vma); 412 tlb->vma_exec = !!(vma->vm_flags & VM_EXEC); 413 tlb->vma_pfn = !!(vma->vm_flags & (VM_PFNMAP|VM_MIXEDMAP)); 414 } 415 416 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) 417 { 418 /* 419 * Anything calling __tlb_adjust_range() also sets at least one of 420 * these bits. 421 */ 422 if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds || 423 tlb->cleared_puds || tlb->cleared_p4ds)) 424 return; 425 426 tlb_flush(tlb); 427 mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end); 428 __tlb_reset_range(tlb); 429 } 430 431 static inline void tlb_remove_page_size(struct mmu_gather *tlb, 432 struct page *page, int page_size) 433 { 434 if (__tlb_remove_page_size(tlb, page, page_size)) 435 tlb_flush_mmu(tlb); 436 } 437 438 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page) 439 { 440 return __tlb_remove_page_size(tlb, page, PAGE_SIZE); 441 } 442 443 /* tlb_remove_page 444 * Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when 445 * required. 446 */ 447 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) 448 { 449 return tlb_remove_page_size(tlb, page, PAGE_SIZE); 450 } 451 452 static inline void tlb_change_page_size(struct mmu_gather *tlb, 453 unsigned int page_size) 454 { 455 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE 456 if (tlb->page_size && tlb->page_size != page_size) { 457 if (!tlb->fullmm && !tlb->need_flush_all) 458 tlb_flush_mmu(tlb); 459 } 460 461 tlb->page_size = page_size; 462 #endif 463 } 464 465 static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb) 466 { 467 if (tlb->cleared_ptes) 468 return PAGE_SHIFT; 469 if (tlb->cleared_pmds) 470 return PMD_SHIFT; 471 if (tlb->cleared_puds) 472 return PUD_SHIFT; 473 if (tlb->cleared_p4ds) 474 return P4D_SHIFT; 475 476 return PAGE_SHIFT; 477 } 478 479 static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb) 480 { 481 return 1UL << tlb_get_unmap_shift(tlb); 482 } 483 484 /* 485 * In the case of tlb vma handling, we can optimise these away in the 486 * case where we're doing a full MM flush. When we're doing a munmap, 487 * the vmas are adjusted to only cover the region to be torn down. 488 */ 489 static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 490 { 491 if (tlb->fullmm) 492 return; 493 494 tlb_update_vma_flags(tlb, vma); 495 #ifndef CONFIG_MMU_GATHER_NO_FLUSH_CACHE 496 flush_cache_range(vma, vma->vm_start, vma->vm_end); 497 #endif 498 } 499 500 static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 501 { 502 if (tlb->fullmm) 503 return; 504 505 /* 506 * VM_PFNMAP is more fragile because the core mm will not track the 507 * page mapcount -- there might not be page-frames for these PFNs after 508 * all. Force flush TLBs for such ranges to avoid munmap() vs 509 * unmap_mapping_range() races. 510 */ 511 if (tlb->vma_pfn || !IS_ENABLED(CONFIG_MMU_GATHER_MERGE_VMAS)) { 512 /* 513 * Do a TLB flush and reset the range at VMA boundaries; this avoids 514 * the ranges growing with the unused space between consecutive VMAs. 515 */ 516 tlb_flush_mmu_tlbonly(tlb); 517 } 518 } 519 520 /* 521 * tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end, 522 * and set corresponding cleared_*. 523 */ 524 static inline void tlb_flush_pte_range(struct mmu_gather *tlb, 525 unsigned long address, unsigned long size) 526 { 527 __tlb_adjust_range(tlb, address, size); 528 tlb->cleared_ptes = 1; 529 } 530 531 static inline void tlb_flush_pmd_range(struct mmu_gather *tlb, 532 unsigned long address, unsigned long size) 533 { 534 __tlb_adjust_range(tlb, address, size); 535 tlb->cleared_pmds = 1; 536 } 537 538 static inline void tlb_flush_pud_range(struct mmu_gather *tlb, 539 unsigned long address, unsigned long size) 540 { 541 __tlb_adjust_range(tlb, address, size); 542 tlb->cleared_puds = 1; 543 } 544 545 static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, 546 unsigned long address, unsigned long size) 547 { 548 __tlb_adjust_range(tlb, address, size); 549 tlb->cleared_p4ds = 1; 550 } 551 552 #ifndef __tlb_remove_tlb_entry 553 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) 554 #endif 555 556 /** 557 * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation. 558 * 559 * Record the fact that pte's were really unmapped by updating the range, 560 * so we can later optimise away the tlb invalidate. This helps when 561 * userspace is unmapping already-unmapped pages, which happens quite a lot. 562 */ 563 #define tlb_remove_tlb_entry(tlb, ptep, address) \ 564 do { \ 565 tlb_flush_pte_range(tlb, address, PAGE_SIZE); \ 566 __tlb_remove_tlb_entry(tlb, ptep, address); \ 567 } while (0) 568 569 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ 570 do { \ 571 unsigned long _sz = huge_page_size(h); \ 572 if (_sz >= P4D_SIZE) \ 573 tlb_flush_p4d_range(tlb, address, _sz); \ 574 else if (_sz >= PUD_SIZE) \ 575 tlb_flush_pud_range(tlb, address, _sz); \ 576 else if (_sz >= PMD_SIZE) \ 577 tlb_flush_pmd_range(tlb, address, _sz); \ 578 else \ 579 tlb_flush_pte_range(tlb, address, _sz); \ 580 __tlb_remove_tlb_entry(tlb, ptep, address); \ 581 } while (0) 582 583 /** 584 * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation 585 * This is a nop so far, because only x86 needs it. 586 */ 587 #ifndef __tlb_remove_pmd_tlb_entry 588 #define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0) 589 #endif 590 591 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \ 592 do { \ 593 tlb_flush_pmd_range(tlb, address, HPAGE_PMD_SIZE); \ 594 __tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \ 595 } while (0) 596 597 /** 598 * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb 599 * invalidation. This is a nop so far, because only x86 needs it. 600 */ 601 #ifndef __tlb_remove_pud_tlb_entry 602 #define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0) 603 #endif 604 605 #define tlb_remove_pud_tlb_entry(tlb, pudp, address) \ 606 do { \ 607 tlb_flush_pud_range(tlb, address, HPAGE_PUD_SIZE); \ 608 __tlb_remove_pud_tlb_entry(tlb, pudp, address); \ 609 } while (0) 610 611 /* 612 * For things like page tables caches (ie caching addresses "inside" the 613 * page tables, like x86 does), for legacy reasons, flushing an 614 * individual page had better flush the page table caches behind it. This 615 * is definitely how x86 works, for example. And if you have an 616 * architected non-legacy page table cache (which I'm not aware of 617 * anybody actually doing), you're going to have some architecturally 618 * explicit flushing for that, likely *separate* from a regular TLB entry 619 * flush, and thus you'd need more than just some range expansion.. 620 * 621 * So if we ever find an architecture 622 * that would want something that odd, I think it is up to that 623 * architecture to do its own odd thing, not cause pain for others 624 * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com 625 * 626 * For now w.r.t page table cache, mark the range_size as PAGE_SIZE 627 */ 628 629 #ifndef pte_free_tlb 630 #define pte_free_tlb(tlb, ptep, address) \ 631 do { \ 632 tlb_flush_pmd_range(tlb, address, PAGE_SIZE); \ 633 tlb->freed_tables = 1; \ 634 __pte_free_tlb(tlb, ptep, address); \ 635 } while (0) 636 #endif 637 638 #ifndef pmd_free_tlb 639 #define pmd_free_tlb(tlb, pmdp, address) \ 640 do { \ 641 tlb_flush_pud_range(tlb, address, PAGE_SIZE); \ 642 tlb->freed_tables = 1; \ 643 __pmd_free_tlb(tlb, pmdp, address); \ 644 } while (0) 645 #endif 646 647 #ifndef pud_free_tlb 648 #define pud_free_tlb(tlb, pudp, address) \ 649 do { \ 650 tlb_flush_p4d_range(tlb, address, PAGE_SIZE); \ 651 tlb->freed_tables = 1; \ 652 __pud_free_tlb(tlb, pudp, address); \ 653 } while (0) 654 #endif 655 656 #ifndef p4d_free_tlb 657 #define p4d_free_tlb(tlb, pudp, address) \ 658 do { \ 659 __tlb_adjust_range(tlb, address, PAGE_SIZE); \ 660 tlb->freed_tables = 1; \ 661 __p4d_free_tlb(tlb, pudp, address); \ 662 } while (0) 663 #endif 664 665 #ifndef pte_needs_flush 666 static inline bool pte_needs_flush(pte_t oldpte, pte_t newpte) 667 { 668 return true; 669 } 670 #endif 671 672 #ifndef huge_pmd_needs_flush 673 static inline bool huge_pmd_needs_flush(pmd_t oldpmd, pmd_t newpmd) 674 { 675 return true; 676 } 677 #endif 678 679 #endif /* CONFIG_MMU */ 680 681 #endif /* _ASM_GENERIC__TLB_H */ 682