1 /* Generic I/O port emulation, based on MN10300 code 2 * 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public Licence 8 * as published by the Free Software Foundation; either version 9 * 2 of the Licence, or (at your option) any later version. 10 */ 11 #ifndef __ASM_GENERIC_IO_H 12 #define __ASM_GENERIC_IO_H 13 14 #include <asm/page.h> /* I/O is all done through memory accesses */ 15 #include <linux/types.h> 16 17 #ifdef CONFIG_GENERIC_IOMAP 18 #include <asm-generic/iomap.h> 19 #endif 20 21 #include <asm-generic/pci_iomap.h> 22 23 #ifndef mmiowb 24 #define mmiowb() do {} while (0) 25 #endif 26 27 /*****************************************************************************/ 28 /* 29 * readX/writeX() are used to access memory mapped devices. On some 30 * architectures the memory mapped IO stuff needs to be accessed 31 * differently. On the simple architectures, we just read/write the 32 * memory location directly. 33 */ 34 #ifndef __raw_readb 35 static inline u8 __raw_readb(const volatile void __iomem *addr) 36 { 37 return *(const volatile u8 __force *) addr; 38 } 39 #endif 40 41 #ifndef __raw_readw 42 static inline u16 __raw_readw(const volatile void __iomem *addr) 43 { 44 return *(const volatile u16 __force *) addr; 45 } 46 #endif 47 48 #ifndef __raw_readl 49 static inline u32 __raw_readl(const volatile void __iomem *addr) 50 { 51 return *(const volatile u32 __force *) addr; 52 } 53 #endif 54 55 #define readb __raw_readb 56 #define readw(addr) __le16_to_cpu(__raw_readw(addr)) 57 #define readl(addr) __le32_to_cpu(__raw_readl(addr)) 58 59 #ifndef __raw_writeb 60 static inline void __raw_writeb(u8 b, volatile void __iomem *addr) 61 { 62 *(volatile u8 __force *) addr = b; 63 } 64 #endif 65 66 #ifndef __raw_writew 67 static inline void __raw_writew(u16 b, volatile void __iomem *addr) 68 { 69 *(volatile u16 __force *) addr = b; 70 } 71 #endif 72 73 #ifndef __raw_writel 74 static inline void __raw_writel(u32 b, volatile void __iomem *addr) 75 { 76 *(volatile u32 __force *) addr = b; 77 } 78 #endif 79 80 #define writeb __raw_writeb 81 #define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr) 82 #define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr) 83 84 #ifdef CONFIG_64BIT 85 #ifndef __raw_readq 86 static inline u64 __raw_readq(const volatile void __iomem *addr) 87 { 88 return *(const volatile u64 __force *) addr; 89 } 90 #endif 91 92 #define readq(addr) __le64_to_cpu(__raw_readq(addr)) 93 94 #ifndef __raw_writeq 95 static inline void __raw_writeq(u64 b, volatile void __iomem *addr) 96 { 97 *(volatile u64 __force *) addr = b; 98 } 99 #endif 100 101 #define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr) 102 #endif /* CONFIG_64BIT */ 103 104 #ifndef PCI_IOBASE 105 #define PCI_IOBASE ((void __iomem *) 0) 106 #endif 107 108 /*****************************************************************************/ 109 /* 110 * traditional input/output functions 111 */ 112 113 static inline u8 inb(unsigned long addr) 114 { 115 return readb(addr + PCI_IOBASE); 116 } 117 118 static inline u16 inw(unsigned long addr) 119 { 120 return readw(addr + PCI_IOBASE); 121 } 122 123 static inline u32 inl(unsigned long addr) 124 { 125 return readl(addr + PCI_IOBASE); 126 } 127 128 static inline void outb(u8 b, unsigned long addr) 129 { 130 writeb(b, addr + PCI_IOBASE); 131 } 132 133 static inline void outw(u16 b, unsigned long addr) 134 { 135 writew(b, addr + PCI_IOBASE); 136 } 137 138 static inline void outl(u32 b, unsigned long addr) 139 { 140 writel(b, addr + PCI_IOBASE); 141 } 142 143 #define inb_p(addr) inb(addr) 144 #define inw_p(addr) inw(addr) 145 #define inl_p(addr) inl(addr) 146 #define outb_p(x, addr) outb((x), (addr)) 147 #define outw_p(x, addr) outw((x), (addr)) 148 #define outl_p(x, addr) outl((x), (addr)) 149 150 #ifndef insb 151 static inline void insb(unsigned long addr, void *buffer, int count) 152 { 153 if (count) { 154 u8 *buf = buffer; 155 do { 156 u8 x = __raw_readb(addr + PCI_IOBASE); 157 *buf++ = x; 158 } while (--count); 159 } 160 } 161 #endif 162 163 #ifndef insw 164 static inline void insw(unsigned long addr, void *buffer, int count) 165 { 166 if (count) { 167 u16 *buf = buffer; 168 do { 169 u16 x = __raw_readw(addr + PCI_IOBASE); 170 *buf++ = x; 171 } while (--count); 172 } 173 } 174 #endif 175 176 #ifndef insl 177 static inline void insl(unsigned long addr, void *buffer, int count) 178 { 179 if (count) { 180 u32 *buf = buffer; 181 do { 182 u32 x = __raw_readl(addr + PCI_IOBASE); 183 *buf++ = x; 184 } while (--count); 185 } 186 } 187 #endif 188 189 #ifndef outsb 190 static inline void outsb(unsigned long addr, const void *buffer, int count) 191 { 192 if (count) { 193 const u8 *buf = buffer; 194 do { 195 __raw_writeb(*buf++, addr + PCI_IOBASE); 196 } while (--count); 197 } 198 } 199 #endif 200 201 #ifndef outsw 202 static inline void outsw(unsigned long addr, const void *buffer, int count) 203 { 204 if (count) { 205 const u16 *buf = buffer; 206 do { 207 __raw_writew(*buf++, addr + PCI_IOBASE); 208 } while (--count); 209 } 210 } 211 #endif 212 213 #ifndef outsl 214 static inline void outsl(unsigned long addr, const void *buffer, int count) 215 { 216 if (count) { 217 const u32 *buf = buffer; 218 do { 219 __raw_writel(*buf++, addr + PCI_IOBASE); 220 } while (--count); 221 } 222 } 223 #endif 224 225 #ifndef CONFIG_GENERIC_IOMAP 226 #define ioread8(addr) readb(addr) 227 #define ioread16(addr) readw(addr) 228 #define ioread16be(addr) be16_to_cpu(ioread16(addr)) 229 #define ioread32(addr) readl(addr) 230 #define ioread32be(addr) be32_to_cpu(ioread32(addr)) 231 232 #define iowrite8(v, addr) writeb((v), (addr)) 233 #define iowrite16(v, addr) writew((v), (addr)) 234 #define iowrite16be(v, addr) iowrite16(be16_to_cpu(v), (addr)) 235 #define iowrite32(v, addr) writel((v), (addr)) 236 #define iowrite32be(v, addr) iowrite32(be32_to_cpu(v), (addr)) 237 238 #define ioread8_rep(p, dst, count) \ 239 insb((unsigned long) (p), (dst), (count)) 240 #define ioread16_rep(p, dst, count) \ 241 insw((unsigned long) (p), (dst), (count)) 242 #define ioread32_rep(p, dst, count) \ 243 insl((unsigned long) (p), (dst), (count)) 244 245 #define iowrite8_rep(p, src, count) \ 246 outsb((unsigned long) (p), (src), (count)) 247 #define iowrite16_rep(p, src, count) \ 248 outsw((unsigned long) (p), (src), (count)) 249 #define iowrite32_rep(p, src, count) \ 250 outsl((unsigned long) (p), (src), (count)) 251 #endif /* CONFIG_GENERIC_IOMAP */ 252 253 #ifndef IO_SPACE_LIMIT 254 #define IO_SPACE_LIMIT 0xffff 255 #endif 256 257 #ifdef __KERNEL__ 258 259 #include <linux/vmalloc.h> 260 #define __io_virt(x) ((void __force *) (x)) 261 262 #ifndef CONFIG_GENERIC_IOMAP 263 struct pci_dev; 264 extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); 265 266 #ifndef pci_iounmap 267 static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) 268 { 269 } 270 #endif 271 #endif /* CONFIG_GENERIC_IOMAP */ 272 273 /* 274 * Change virtual addresses to physical addresses and vv. 275 * These are pretty trivial 276 */ 277 #ifndef virt_to_phys 278 static inline unsigned long virt_to_phys(volatile void *address) 279 { 280 return __pa((unsigned long)address); 281 } 282 283 static inline void *phys_to_virt(unsigned long address) 284 { 285 return __va(address); 286 } 287 #endif 288 289 /* 290 * Change "struct page" to physical address. 291 * 292 * This implementation is for the no-MMU case only... if you have an MMU 293 * you'll need to provide your own definitions. 294 */ 295 #ifndef CONFIG_MMU 296 static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size) 297 { 298 return (void __iomem*) (unsigned long)offset; 299 } 300 301 #define __ioremap(offset, size, flags) ioremap(offset, size) 302 303 #ifndef ioremap_nocache 304 #define ioremap_nocache ioremap 305 #endif 306 307 #ifndef ioremap_wc 308 #define ioremap_wc ioremap_nocache 309 #endif 310 311 static inline void iounmap(void __iomem *addr) 312 { 313 } 314 #endif /* CONFIG_MMU */ 315 316 #ifdef CONFIG_HAS_IOPORT 317 #ifndef CONFIG_GENERIC_IOMAP 318 static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) 319 { 320 return (void __iomem *) port; 321 } 322 323 static inline void ioport_unmap(void __iomem *p) 324 { 325 } 326 #else /* CONFIG_GENERIC_IOMAP */ 327 extern void __iomem *ioport_map(unsigned long port, unsigned int nr); 328 extern void ioport_unmap(void __iomem *p); 329 #endif /* CONFIG_GENERIC_IOMAP */ 330 #endif /* CONFIG_HAS_IOPORT */ 331 332 #define xlate_dev_kmem_ptr(p) p 333 #define xlate_dev_mem_ptr(p) __va(p) 334 335 #ifndef virt_to_bus 336 static inline unsigned long virt_to_bus(volatile void *address) 337 { 338 return ((unsigned long) address); 339 } 340 341 static inline void *bus_to_virt(unsigned long address) 342 { 343 return (void *) address; 344 } 345 #endif 346 347 #ifndef memset_io 348 #define memset_io(a, b, c) memset(__io_virt(a), (b), (c)) 349 #endif 350 351 #ifndef memcpy_fromio 352 #define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c)) 353 #endif 354 #ifndef memcpy_toio 355 #define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c)) 356 #endif 357 358 #endif /* __KERNEL__ */ 359 360 #endif /* __ASM_GENERIC_IO_H */ 361