1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 /*
4  * This file contains definitions from Hyper-V Hypervisor Top-Level Functional
5  * Specification (TLFS):
6  * https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/reference/tlfs
7  */
8 
9 #ifndef _ASM_GENERIC_HYPERV_TLFS_H
10 #define _ASM_GENERIC_HYPERV_TLFS_H
11 
12 #include <linux/types.h>
13 #include <linux/bits.h>
14 #include <linux/time64.h>
15 
16 /*
17  * While not explicitly listed in the TLFS, Hyper-V always runs with a page size
18  * of 4096. These definitions are used when communicating with Hyper-V using
19  * guest physical pages and guest physical page addresses, since the guest page
20  * size may not be 4096 on all architectures.
21  */
22 #define HV_HYP_PAGE_SHIFT      12
23 #define HV_HYP_PAGE_SIZE       BIT(HV_HYP_PAGE_SHIFT)
24 #define HV_HYP_PAGE_MASK       (~(HV_HYP_PAGE_SIZE - 1))
25 
26 /*
27  * Hyper-V provides two categories of flags relevant to guest VMs.  The
28  * "Features" category indicates specific functionality that is available
29  * to guests on this particular instance of Hyper-V. The "Features"
30  * are presented in four groups, each of which is 32 bits. The group A
31  * and B definitions are common across architectures and are listed here.
32  * However, not all flags are relevant on all architectures.
33  *
34  * Groups C and D vary across architectures and are listed in the
35  * architecture specific portion of hyperv-tlfs.h. Some of these flags exist
36  * on multiple architectures, but the bit positions are different so they
37  * cannot appear in the generic portion of hyperv-tlfs.h.
38  *
39  * The "Enlightenments" category provides recommendations on whether to use
40  * specific enlightenments that are available. The Enlighenments are a single
41  * group of 32 bits, but they vary across architectures and are listed in
42  * the architecture specific portion of hyperv-tlfs.h.
43  */
44 
45 /*
46  * Group A Features.
47  */
48 
49 /* VP Runtime register available */
50 #define HV_MSR_VP_RUNTIME_AVAILABLE		BIT(0)
51 /* Partition Reference Counter available*/
52 #define HV_MSR_TIME_REF_COUNT_AVAILABLE		BIT(1)
53 /* Basic SynIC register available */
54 #define HV_MSR_SYNIC_AVAILABLE			BIT(2)
55 /* Synthetic Timer registers available */
56 #define HV_MSR_SYNTIMER_AVAILABLE		BIT(3)
57 /* Virtual APIC assist and VP assist page registers available */
58 #define HV_MSR_APIC_ACCESS_AVAILABLE		BIT(4)
59 /* Hypercall and Guest OS ID registers available*/
60 #define HV_MSR_HYPERCALL_AVAILABLE		BIT(5)
61 /* Access virtual processor index register available*/
62 #define HV_MSR_VP_INDEX_AVAILABLE		BIT(6)
63 /* Virtual system reset register available*/
64 #define HV_MSR_RESET_AVAILABLE			BIT(7)
65 /* Access statistics page registers available */
66 #define HV_MSR_STAT_PAGES_AVAILABLE		BIT(8)
67 /* Partition reference TSC register is available */
68 #define HV_MSR_REFERENCE_TSC_AVAILABLE		BIT(9)
69 /* Partition Guest IDLE register is available */
70 #define HV_MSR_GUEST_IDLE_AVAILABLE		BIT(10)
71 /* Partition local APIC and TSC frequency registers available */
72 #define HV_ACCESS_FREQUENCY_MSRS		BIT(11)
73 /* AccessReenlightenmentControls privilege */
74 #define HV_ACCESS_REENLIGHTENMENT		BIT(13)
75 /* AccessTscInvariantControls privilege */
76 #define HV_ACCESS_TSC_INVARIANT			BIT(15)
77 
78 /*
79  * Group B features.
80  */
81 #define HV_CREATE_PARTITIONS			BIT(0)
82 #define HV_ACCESS_PARTITION_ID			BIT(1)
83 #define HV_ACCESS_MEMORY_POOL			BIT(2)
84 #define HV_ADJUST_MESSAGE_BUFFERS		BIT(3)
85 #define HV_POST_MESSAGES			BIT(4)
86 #define HV_SIGNAL_EVENTS			BIT(5)
87 #define HV_CREATE_PORT				BIT(6)
88 #define HV_CONNECT_PORT				BIT(7)
89 #define HV_ACCESS_STATS				BIT(8)
90 #define HV_DEBUGGING				BIT(11)
91 #define HV_CPU_MANAGEMENT			BIT(12)
92 #define HV_ISOLATION				BIT(22)
93 
94 
95 /*
96  * TSC page layout.
97  */
98 struct ms_hyperv_tsc_page {
99 	volatile u32 tsc_sequence;
100 	u32 reserved1;
101 	volatile u64 tsc_scale;
102 	volatile s64 tsc_offset;
103 } __packed;
104 
105 /*
106  * The guest OS needs to register the guest ID with the hypervisor.
107  * The guest ID is a 64 bit entity and the structure of this ID is
108  * specified in the Hyper-V specification:
109  *
110  * msdn.microsoft.com/en-us/library/windows/hardware/ff542653%28v=vs.85%29.aspx
111  *
112  * While the current guideline does not specify how Linux guest ID(s)
113  * need to be generated, our plan is to publish the guidelines for
114  * Linux and other guest operating systems that currently are hosted
115  * on Hyper-V. The implementation here conforms to this yet
116  * unpublished guidelines.
117  *
118  *
119  * Bit(s)
120  * 63 - Indicates if the OS is Open Source or not; 1 is Open Source
121  * 62:56 - Os Type; Linux is 0x100
122  * 55:48 - Distro specific identification
123  * 47:16 - Linux kernel version number
124  * 15:0  - Distro specific identification
125  *
126  *
127  */
128 
129 #define HV_LINUX_VENDOR_ID              0x8100
130 
131 /*
132  * Crash notification flags.
133  */
134 #define HV_CRASH_CTL_CRASH_NOTIFY_MSG		BIT_ULL(62)
135 #define HV_CRASH_CTL_CRASH_NOTIFY		BIT_ULL(63)
136 
137 /* Declare the various hypercall operations. */
138 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE	0x0002
139 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST	0x0003
140 #define HVCALL_NOTIFY_LONG_SPIN_WAIT		0x0008
141 #define HVCALL_SEND_IPI				0x000b
142 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX	0x0013
143 #define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX	0x0014
144 #define HVCALL_SEND_IPI_EX			0x0015
145 #define HVCALL_GET_PARTITION_ID			0x0046
146 #define HVCALL_DEPOSIT_MEMORY			0x0048
147 #define HVCALL_CREATE_VP			0x004e
148 #define HVCALL_GET_VP_REGISTERS			0x0050
149 #define HVCALL_SET_VP_REGISTERS			0x0051
150 #define HVCALL_POST_MESSAGE			0x005c
151 #define HVCALL_SIGNAL_EVENT			0x005d
152 #define HVCALL_POST_DEBUG_DATA			0x0069
153 #define HVCALL_RETRIEVE_DEBUG_DATA		0x006a
154 #define HVCALL_RESET_DEBUG_SESSION		0x006b
155 #define HVCALL_ADD_LOGICAL_PROCESSOR		0x0076
156 #define HVCALL_MAP_DEVICE_INTERRUPT		0x007c
157 #define HVCALL_UNMAP_DEVICE_INTERRUPT		0x007d
158 #define HVCALL_RETARGET_INTERRUPT		0x007e
159 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_SPACE 0x00af
160 #define HVCALL_FLUSH_GUEST_PHYSICAL_ADDRESS_LIST 0x00b0
161 
162 #define HV_FLUSH_ALL_PROCESSORS			BIT(0)
163 #define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES	BIT(1)
164 #define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY	BIT(2)
165 #define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT	BIT(3)
166 
167 enum HV_GENERIC_SET_FORMAT {
168 	HV_GENERIC_SET_SPARSE_4K,
169 	HV_GENERIC_SET_ALL,
170 };
171 
172 #define HV_PARTITION_ID_SELF		((u64)-1)
173 #define HV_VP_INDEX_SELF		((u32)-2)
174 
175 #define HV_HYPERCALL_RESULT_MASK	GENMASK_ULL(15, 0)
176 #define HV_HYPERCALL_FAST_BIT		BIT(16)
177 #define HV_HYPERCALL_VARHEAD_OFFSET	17
178 #define HV_HYPERCALL_REP_COMP_OFFSET	32
179 #define HV_HYPERCALL_REP_COMP_1		BIT_ULL(32)
180 #define HV_HYPERCALL_REP_COMP_MASK	GENMASK_ULL(43, 32)
181 #define HV_HYPERCALL_REP_START_OFFSET	48
182 #define HV_HYPERCALL_REP_START_MASK	GENMASK_ULL(59, 48)
183 
184 /* hypercall status code */
185 #define HV_STATUS_SUCCESS			0
186 #define HV_STATUS_INVALID_HYPERCALL_CODE	2
187 #define HV_STATUS_INVALID_HYPERCALL_INPUT	3
188 #define HV_STATUS_INVALID_ALIGNMENT		4
189 #define HV_STATUS_INVALID_PARAMETER		5
190 #define HV_STATUS_OPERATION_DENIED		8
191 #define HV_STATUS_INSUFFICIENT_MEMORY		11
192 #define HV_STATUS_INVALID_PORT_ID		17
193 #define HV_STATUS_INVALID_CONNECTION_ID		18
194 #define HV_STATUS_INSUFFICIENT_BUFFERS		19
195 
196 /*
197  * The Hyper-V TimeRefCount register and the TSC
198  * page provide a guest VM clock with 100ns tick rate
199  */
200 #define HV_CLOCK_HZ (NSEC_PER_SEC/100)
201 
202 /* Define the number of synthetic interrupt sources. */
203 #define HV_SYNIC_SINT_COUNT		(16)
204 /* Define the expected SynIC version. */
205 #define HV_SYNIC_VERSION_1		(0x1)
206 /* Valid SynIC vectors are 16-255. */
207 #define HV_SYNIC_FIRST_VALID_VECTOR	(16)
208 
209 #define HV_SYNIC_CONTROL_ENABLE		(1ULL << 0)
210 #define HV_SYNIC_SIMP_ENABLE		(1ULL << 0)
211 #define HV_SYNIC_SIEFP_ENABLE		(1ULL << 0)
212 #define HV_SYNIC_SINT_MASKED		(1ULL << 16)
213 #define HV_SYNIC_SINT_AUTO_EOI		(1ULL << 17)
214 #define HV_SYNIC_SINT_VECTOR_MASK	(0xFF)
215 
216 #define HV_SYNIC_STIMER_COUNT		(4)
217 
218 /* Define synthetic interrupt controller message constants. */
219 #define HV_MESSAGE_SIZE			(256)
220 #define HV_MESSAGE_PAYLOAD_BYTE_COUNT	(240)
221 #define HV_MESSAGE_PAYLOAD_QWORD_COUNT	(30)
222 
223 /* Define synthetic interrupt controller message flags. */
224 union hv_message_flags {
225 	__u8 asu8;
226 	struct {
227 		__u8 msg_pending:1;
228 		__u8 reserved:7;
229 	} __packed;
230 };
231 
232 /* Define port identifier type. */
233 union hv_port_id {
234 	__u32 asu32;
235 	struct {
236 		__u32 id:24;
237 		__u32 reserved:8;
238 	} __packed u;
239 };
240 
241 /* Define synthetic interrupt controller message header. */
242 struct hv_message_header {
243 	__u32 message_type;
244 	__u8 payload_size;
245 	union hv_message_flags message_flags;
246 	__u8 reserved[2];
247 	union {
248 		__u64 sender;
249 		union hv_port_id port;
250 	};
251 } __packed;
252 
253 /* Define synthetic interrupt controller message format. */
254 struct hv_message {
255 	struct hv_message_header header;
256 	union {
257 		__u64 payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT];
258 	} u;
259 } __packed;
260 
261 /* Define the synthetic interrupt message page layout. */
262 struct hv_message_page {
263 	struct hv_message sint_message[HV_SYNIC_SINT_COUNT];
264 } __packed;
265 
266 /* Define timer message payload structure. */
267 struct hv_timer_message_payload {
268 	__u32 timer_index;
269 	__u32 reserved;
270 	__u64 expiration_time;	/* When the timer expired */
271 	__u64 delivery_time;	/* When the message was delivered */
272 } __packed;
273 
274 
275 /* Define synthetic interrupt controller flag constants. */
276 #define HV_EVENT_FLAGS_COUNT		(256 * 8)
277 #define HV_EVENT_FLAGS_LONG_COUNT	(256 / sizeof(unsigned long))
278 
279 /*
280  * Synthetic timer configuration.
281  */
282 union hv_stimer_config {
283 	u64 as_uint64;
284 	struct {
285 		u64 enable:1;
286 		u64 periodic:1;
287 		u64 lazy:1;
288 		u64 auto_enable:1;
289 		u64 apic_vector:8;
290 		u64 direct_mode:1;
291 		u64 reserved_z0:3;
292 		u64 sintx:4;
293 		u64 reserved_z1:44;
294 	} __packed;
295 };
296 
297 
298 /* Define the synthetic interrupt controller event flags format. */
299 union hv_synic_event_flags {
300 	unsigned long flags[HV_EVENT_FLAGS_LONG_COUNT];
301 };
302 
303 /* Define SynIC control register. */
304 union hv_synic_scontrol {
305 	u64 as_uint64;
306 	struct {
307 		u64 enable:1;
308 		u64 reserved:63;
309 	} __packed;
310 };
311 
312 /* Define synthetic interrupt source. */
313 union hv_synic_sint {
314 	u64 as_uint64;
315 	struct {
316 		u64 vector:8;
317 		u64 reserved1:8;
318 		u64 masked:1;
319 		u64 auto_eoi:1;
320 		u64 polling:1;
321 		u64 reserved2:45;
322 	} __packed;
323 };
324 
325 /* Define the format of the SIMP register */
326 union hv_synic_simp {
327 	u64 as_uint64;
328 	struct {
329 		u64 simp_enabled:1;
330 		u64 preserved:11;
331 		u64 base_simp_gpa:52;
332 	} __packed;
333 };
334 
335 /* Define the format of the SIEFP register */
336 union hv_synic_siefp {
337 	u64 as_uint64;
338 	struct {
339 		u64 siefp_enabled:1;
340 		u64 preserved:11;
341 		u64 base_siefp_gpa:52;
342 	} __packed;
343 };
344 
345 struct hv_vpset {
346 	u64 format;
347 	u64 valid_bank_mask;
348 	u64 bank_contents[];
349 } __packed;
350 
351 /* HvCallSendSyntheticClusterIpi hypercall */
352 struct hv_send_ipi {
353 	u32 vector;
354 	u32 reserved;
355 	u64 cpu_mask;
356 } __packed;
357 
358 /* HvCallSendSyntheticClusterIpiEx hypercall */
359 struct hv_send_ipi_ex {
360 	u32 vector;
361 	u32 reserved;
362 	struct hv_vpset vp_set;
363 } __packed;
364 
365 /* HvFlushGuestPhysicalAddressSpace hypercalls */
366 struct hv_guest_mapping_flush {
367 	u64 address_space;
368 	u64 flags;
369 } __packed;
370 
371 /*
372  *  HV_MAX_FLUSH_PAGES = "additional_pages" + 1. It's limited
373  *  by the bitwidth of "additional_pages" in union hv_gpa_page_range.
374  */
375 #define HV_MAX_FLUSH_PAGES (2048)
376 
377 /* HvFlushGuestPhysicalAddressList hypercall */
378 union hv_gpa_page_range {
379 	u64 address_space;
380 	struct {
381 		u64 additional_pages:11;
382 		u64 largepage:1;
383 		u64 basepfn:52;
384 	} page;
385 };
386 
387 /*
388  * All input flush parameters should be in single page. The max flush
389  * count is equal with how many entries of union hv_gpa_page_range can
390  * be populated into the input parameter page.
391  */
392 #define HV_MAX_FLUSH_REP_COUNT ((HV_HYP_PAGE_SIZE - 2 * sizeof(u64)) /	\
393 				sizeof(union hv_gpa_page_range))
394 
395 struct hv_guest_mapping_flush_list {
396 	u64 address_space;
397 	u64 flags;
398 	union hv_gpa_page_range gpa_list[HV_MAX_FLUSH_REP_COUNT];
399 };
400 
401 /* HvFlushVirtualAddressSpace, HvFlushVirtualAddressList hypercalls */
402 struct hv_tlb_flush {
403 	u64 address_space;
404 	u64 flags;
405 	u64 processor_mask;
406 	u64 gva_list[];
407 } __packed;
408 
409 /* HvFlushVirtualAddressSpaceEx, HvFlushVirtualAddressListEx hypercalls */
410 struct hv_tlb_flush_ex {
411 	u64 address_space;
412 	u64 flags;
413 	struct hv_vpset hv_vp_set;
414 	u64 gva_list[];
415 } __packed;
416 
417 /* HvGetPartitionId hypercall (output only) */
418 struct hv_get_partition_id {
419 	u64 partition_id;
420 } __packed;
421 
422 /* HvDepositMemory hypercall */
423 struct hv_deposit_memory {
424 	u64 partition_id;
425 	u64 gpa_page_list[];
426 } __packed;
427 
428 struct hv_proximity_domain_flags {
429 	u32 proximity_preferred : 1;
430 	u32 reserved : 30;
431 	u32 proximity_info_valid : 1;
432 } __packed;
433 
434 /* Not a union in windows but useful for zeroing */
435 union hv_proximity_domain_info {
436 	struct {
437 		u32 domain_id;
438 		struct hv_proximity_domain_flags flags;
439 	};
440 	u64 as_uint64;
441 } __packed;
442 
443 struct hv_lp_startup_status {
444 	u64 hv_status;
445 	u64 substatus1;
446 	u64 substatus2;
447 	u64 substatus3;
448 	u64 substatus4;
449 	u64 substatus5;
450 	u64 substatus6;
451 } __packed;
452 
453 /* HvAddLogicalProcessor hypercall */
454 struct hv_add_logical_processor_in {
455 	u32 lp_index;
456 	u32 apic_id;
457 	union hv_proximity_domain_info proximity_domain_info;
458 	u64 flags;
459 } __packed;
460 
461 struct hv_add_logical_processor_out {
462 	struct hv_lp_startup_status startup_status;
463 } __packed;
464 
465 enum HV_SUBNODE_TYPE
466 {
467     HvSubnodeAny = 0,
468     HvSubnodeSocket = 1,
469     HvSubnodeAmdNode = 2,
470     HvSubnodeL3 = 3,
471     HvSubnodeCount = 4,
472     HvSubnodeInvalid = -1
473 };
474 
475 /* HvCreateVp hypercall */
476 struct hv_create_vp {
477 	u64 partition_id;
478 	u32 vp_index;
479 	u8 padding[3];
480 	u8 subnode_type;
481 	u64 subnode_id;
482 	union hv_proximity_domain_info proximity_domain_info;
483 	u64 flags;
484 } __packed;
485 
486 enum hv_interrupt_source {
487 	HV_INTERRUPT_SOURCE_MSI = 1, /* MSI and MSI-X */
488 	HV_INTERRUPT_SOURCE_IOAPIC,
489 };
490 
491 union hv_msi_address_register {
492 	u32 as_uint32;
493 	struct {
494 		u32 reserved1:2;
495 		u32 destination_mode:1;
496 		u32 redirection_hint:1;
497 		u32 reserved2:8;
498 		u32 destination_id:8;
499 		u32 msi_base:12;
500 	};
501 } __packed;
502 
503 union hv_msi_data_register {
504 	u32 as_uint32;
505 	struct {
506 		u32 vector:8;
507 		u32 delivery_mode:3;
508 		u32 reserved1:3;
509 		u32 level_assert:1;
510 		u32 trigger_mode:1;
511 		u32 reserved2:16;
512 	};
513 } __packed;
514 
515 /* HvRetargetDeviceInterrupt hypercall */
516 union hv_msi_entry {
517 	u64 as_uint64;
518 	struct {
519 		union hv_msi_address_register address;
520 		union hv_msi_data_register data;
521 	} __packed;
522 };
523 
524 union hv_ioapic_rte {
525 	u64 as_uint64;
526 
527 	struct {
528 		u32 vector:8;
529 		u32 delivery_mode:3;
530 		u32 destination_mode:1;
531 		u32 delivery_status:1;
532 		u32 interrupt_polarity:1;
533 		u32 remote_irr:1;
534 		u32 trigger_mode:1;
535 		u32 interrupt_mask:1;
536 		u32 reserved1:15;
537 
538 		u32 reserved2:24;
539 		u32 destination_id:8;
540 	};
541 
542 	struct {
543 		u32 low_uint32;
544 		u32 high_uint32;
545 	};
546 } __packed;
547 
548 struct hv_interrupt_entry {
549 	u32 source;
550 	u32 reserved1;
551 	union {
552 		union hv_msi_entry msi_entry;
553 		union hv_ioapic_rte ioapic_rte;
554 	};
555 } __packed;
556 
557 /*
558  * flags for hv_device_interrupt_target.flags
559  */
560 #define HV_DEVICE_INTERRUPT_TARGET_MULTICAST		1
561 #define HV_DEVICE_INTERRUPT_TARGET_PROCESSOR_SET	2
562 
563 struct hv_device_interrupt_target {
564 	u32 vector;
565 	u32 flags;
566 	union {
567 		u64 vp_mask;
568 		struct hv_vpset vp_set;
569 	};
570 } __packed;
571 
572 struct hv_retarget_device_interrupt {
573 	u64 partition_id;		/* use "self" */
574 	u64 device_id;
575 	struct hv_interrupt_entry int_entry;
576 	u64 reserved2;
577 	struct hv_device_interrupt_target int_target;
578 } __packed __aligned(8);
579 
580 
581 /* HvGetVpRegisters hypercall input with variable size reg name list*/
582 struct hv_get_vp_registers_input {
583 	struct {
584 		u64 partitionid;
585 		u32 vpindex;
586 		u8  inputvtl;
587 		u8  padding[3];
588 	} header;
589 	struct input {
590 		u32 name0;
591 		u32 name1;
592 	} element[];
593 } __packed;
594 
595 
596 /* HvGetVpRegisters returns an array of these output elements */
597 struct hv_get_vp_registers_output {
598 	union {
599 		struct {
600 			u32 a;
601 			u32 b;
602 			u32 c;
603 			u32 d;
604 		} as32 __packed;
605 		struct {
606 			u64 low;
607 			u64 high;
608 		} as64 __packed;
609 	};
610 };
611 
612 /* HvSetVpRegisters hypercall with variable size reg name/value list*/
613 struct hv_set_vp_registers_input {
614 	struct {
615 		u64 partitionid;
616 		u32 vpindex;
617 		u8  inputvtl;
618 		u8  padding[3];
619 	} header;
620 	struct {
621 		u32 name;
622 		u32 padding1;
623 		u64 padding2;
624 		u64 valuelow;
625 		u64 valuehigh;
626 	} element[];
627 } __packed;
628 
629 enum hv_device_type {
630 	HV_DEVICE_TYPE_LOGICAL = 0,
631 	HV_DEVICE_TYPE_PCI = 1,
632 	HV_DEVICE_TYPE_IOAPIC = 2,
633 	HV_DEVICE_TYPE_ACPI = 3,
634 };
635 
636 typedef u16 hv_pci_rid;
637 typedef u16 hv_pci_segment;
638 typedef u64 hv_logical_device_id;
639 union hv_pci_bdf {
640 	u16 as_uint16;
641 
642 	struct {
643 		u8 function:3;
644 		u8 device:5;
645 		u8 bus;
646 	};
647 } __packed;
648 
649 union hv_pci_bus_range {
650 	u16 as_uint16;
651 
652 	struct {
653 		u8 subordinate_bus;
654 		u8 secondary_bus;
655 	};
656 } __packed;
657 
658 union hv_device_id {
659 	u64 as_uint64;
660 
661 	struct {
662 		u64 reserved0:62;
663 		u64 device_type:2;
664 	};
665 
666 	/* HV_DEVICE_TYPE_LOGICAL */
667 	struct {
668 		u64 id:62;
669 		u64 device_type:2;
670 	} logical;
671 
672 	/* HV_DEVICE_TYPE_PCI */
673 	struct {
674 		union {
675 			hv_pci_rid rid;
676 			union hv_pci_bdf bdf;
677 		};
678 
679 		hv_pci_segment segment;
680 		union hv_pci_bus_range shadow_bus_range;
681 
682 		u16 phantom_function_bits:2;
683 		u16 source_shadow:1;
684 
685 		u16 rsvdz0:11;
686 		u16 device_type:2;
687 	} pci;
688 
689 	/* HV_DEVICE_TYPE_IOAPIC */
690 	struct {
691 		u8 ioapic_id;
692 		u8 rsvdz0;
693 		u16 rsvdz1;
694 		u16 rsvdz2;
695 
696 		u16 rsvdz3:14;
697 		u16 device_type:2;
698 	} ioapic;
699 
700 	/* HV_DEVICE_TYPE_ACPI */
701 	struct {
702 		u32 input_mapping_base;
703 		u32 input_mapping_count:30;
704 		u32 device_type:2;
705 	} acpi;
706 } __packed;
707 
708 enum hv_interrupt_trigger_mode {
709 	HV_INTERRUPT_TRIGGER_MODE_EDGE = 0,
710 	HV_INTERRUPT_TRIGGER_MODE_LEVEL = 1,
711 };
712 
713 struct hv_device_interrupt_descriptor {
714 	u32 interrupt_type;
715 	u32 trigger_mode;
716 	u32 vector_count;
717 	u32 reserved;
718 	struct hv_device_interrupt_target target;
719 } __packed;
720 
721 struct hv_input_map_device_interrupt {
722 	u64 partition_id;
723 	u64 device_id;
724 	u64 flags;
725 	struct hv_interrupt_entry logical_interrupt_entry;
726 	struct hv_device_interrupt_descriptor interrupt_descriptor;
727 } __packed;
728 
729 struct hv_output_map_device_interrupt {
730 	struct hv_interrupt_entry interrupt_entry;
731 } __packed;
732 
733 struct hv_input_unmap_device_interrupt {
734 	u64 partition_id;
735 	u64 device_id;
736 	struct hv_interrupt_entry interrupt_entry;
737 } __packed;
738 
739 #define HV_SOURCE_SHADOW_NONE               0x0
740 #define HV_SOURCE_SHADOW_BRIDGE_BUS_RANGE   0x1
741 
742 #endif
743