1 /* 2 * CPPC (Collaborative Processor Performance Control) methods used 3 * by CPUfreq drivers. 4 * 5 * (C) Copyright 2014, 2015 Linaro Ltd. 6 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; version 2 11 * of the License. 12 */ 13 14 #ifndef _CPPC_ACPI_H 15 #define _CPPC_ACPI_H 16 17 #include <linux/acpi.h> 18 #include <linux/types.h> 19 20 #include <acpi/pcc.h> 21 #include <acpi/processor.h> 22 23 /* Only support CPPCv2 for now. */ 24 #define CPPC_NUM_ENT 21 25 #define CPPC_REV 2 26 27 #define PCC_CMD_COMPLETE 1 28 #define MAX_CPC_REG_ENT 19 29 30 /* CPPC specific PCC commands. */ 31 #define CMD_READ 0 32 #define CMD_WRITE 1 33 34 /* Each register has the folowing format. */ 35 struct cpc_reg { 36 u8 descriptor; 37 u16 length; 38 u8 space_id; 39 u8 bit_width; 40 u8 bit_offset; 41 u8 access_width; 42 u64 __iomem address; 43 } __packed; 44 45 /* 46 * Each entry in the CPC table is either 47 * of type ACPI_TYPE_BUFFER or 48 * ACPI_TYPE_INTEGER. 49 */ 50 struct cpc_register_resource { 51 acpi_object_type type; 52 u64 __iomem *sys_mem_vaddr; 53 union { 54 struct cpc_reg reg; 55 u64 int_value; 56 } cpc_entry; 57 }; 58 59 /* Container to hold the CPC details for each CPU */ 60 struct cpc_desc { 61 int num_entries; 62 int version; 63 int cpu_id; 64 int write_cmd_status; 65 int write_cmd_id; 66 struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT]; 67 struct acpi_psd_package domain_info; 68 }; 69 70 /* These are indexes into the per-cpu cpc_regs[]. Order is important. */ 71 enum cppc_regs { 72 HIGHEST_PERF, 73 NOMINAL_PERF, 74 LOW_NON_LINEAR_PERF, 75 LOWEST_PERF, 76 GUARANTEED_PERF, 77 DESIRED_PERF, 78 MIN_PERF, 79 MAX_PERF, 80 PERF_REDUC_TOLERANCE, 81 TIME_WINDOW, 82 CTR_WRAP_TIME, 83 REFERENCE_CTR, 84 DELIVERED_CTR, 85 PERF_LIMITED, 86 ENABLE, 87 AUTO_SEL_ENABLE, 88 AUTO_ACT_WINDOW, 89 ENERGY_PERF, 90 REFERENCE_PERF, 91 }; 92 93 /* 94 * Categorization of registers as described 95 * in the ACPI v.5.1 spec. 96 * XXX: Only filling up ones which are used by governors 97 * today. 98 */ 99 struct cppc_perf_caps { 100 u32 highest_perf; 101 u32 nominal_perf; 102 u32 reference_perf; 103 u32 lowest_perf; 104 }; 105 106 struct cppc_perf_ctrls { 107 u32 max_perf; 108 u32 min_perf; 109 u32 desired_perf; 110 }; 111 112 struct cppc_perf_fb_ctrs { 113 u64 reference; 114 u64 prev_reference; 115 u64 delivered; 116 u64 prev_delivered; 117 }; 118 119 /* Per CPU container for runtime CPPC management. */ 120 struct cpudata { 121 int cpu; 122 struct cppc_perf_caps perf_caps; 123 struct cppc_perf_ctrls perf_ctrls; 124 struct cppc_perf_fb_ctrs perf_fb_ctrs; 125 struct cpufreq_policy *cur_policy; 126 unsigned int shared_type; 127 cpumask_var_t shared_cpu_map; 128 }; 129 130 extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs); 131 extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls); 132 extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps); 133 extern int acpi_get_psd_map(struct cpudata **); 134 extern unsigned int cppc_get_transition_latency(int cpu); 135 136 #endif /* _CPPC_ACPI_H*/ 137