1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 50 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 51 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 52 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 53 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 54 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 55 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 56 57 /* 58 * All tables must be byte-packed to match the ACPI specification, since 59 * the tables are provided by the system BIOS. 60 */ 61 #pragma pack(1) 62 63 /* 64 * Note: C bitfields are not used for this reason: 65 * 66 * "Bitfields are great and easy to read, but unfortunately the C language 67 * does not specify the layout of bitfields in memory, which means they are 68 * essentially useless for dealing with packed data in on-disk formats or 69 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 70 * this decision was a design error in C. Ritchie could have picked an order 71 * and stuck with it." Norman Ramsey. 72 * See http://stackoverflow.com/a/1053662/41661 73 */ 74 75 /******************************************************************************* 76 * 77 * AEST - Arm Error Source Table 78 * 79 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 80 * September 2020. 81 * 82 ******************************************************************************/ 83 84 struct acpi_table_aest { 85 struct acpi_table_header header; 86 }; 87 88 /* Common Subtable header - one per Node Structure (Subtable) */ 89 90 struct acpi_aest_hdr { 91 u8 type; 92 u16 length; 93 u8 reserved; 94 u32 node_specific_offset; 95 u32 node_interface_offset; 96 u32 node_interrupt_offset; 97 u32 node_interrupt_count; 98 u64 timestamp_rate; 99 u64 reserved1; 100 u64 error_injection_rate; 101 }; 102 103 /* Values for Type above */ 104 105 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 106 #define ACPI_AEST_MEMORY_ERROR_NODE 1 107 #define ACPI_AEST_SMMU_ERROR_NODE 2 108 #define ACPI_AEST_VENDOR_ERROR_NODE 3 109 #define ACPI_AEST_GIC_ERROR_NODE 4 110 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 111 112 /* 113 * AEST subtables (Error nodes) 114 */ 115 116 /* 0: Processor Error */ 117 118 typedef struct acpi_aest_processor { 119 u32 processor_id; 120 u8 resource_type; 121 u8 reserved; 122 u8 flags; 123 u8 revision; 124 u64 processor_affinity; 125 126 } acpi_aest_processor; 127 128 /* Values for resource_type above, related structs below */ 129 130 #define ACPI_AEST_CACHE_RESOURCE 0 131 #define ACPI_AEST_TLB_RESOURCE 1 132 #define ACPI_AEST_GENERIC_RESOURCE 2 133 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 134 135 /* 0R: Processor Cache Resource Substructure */ 136 137 typedef struct acpi_aest_processor_cache { 138 u32 cache_reference; 139 u32 reserved; 140 141 } acpi_aest_processor_cache; 142 143 /* Values for cache_type above */ 144 145 #define ACPI_AEST_CACHE_DATA 0 146 #define ACPI_AEST_CACHE_INSTRUCTION 1 147 #define ACPI_AEST_CACHE_UNIFIED 2 148 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 149 150 /* 1R: Processor TLB Resource Substructure */ 151 152 typedef struct acpi_aest_processor_tlb { 153 u32 tlb_level; 154 u32 reserved; 155 156 } acpi_aest_processor_tlb; 157 158 /* 2R: Processor Generic Resource Substructure */ 159 160 typedef struct acpi_aest_processor_generic { 161 u32 resource; 162 163 } acpi_aest_processor_generic; 164 165 /* 1: Memory Error */ 166 167 typedef struct acpi_aest_memory { 168 u32 srat_proximity_domain; 169 170 } acpi_aest_memory; 171 172 /* 2: Smmu Error */ 173 174 typedef struct acpi_aest_smmu { 175 u32 iort_node_reference; 176 u32 subcomponent_reference; 177 178 } acpi_aest_smmu; 179 180 /* 3: Vendor Defined */ 181 182 typedef struct acpi_aest_vendor { 183 u32 acpi_hid; 184 u32 acpi_uid; 185 u8 vendor_specific_data[16]; 186 187 } acpi_aest_vendor; 188 189 /* 4: Gic Error */ 190 191 typedef struct acpi_aest_gic { 192 u32 interface_type; 193 u32 instance_id; 194 195 } acpi_aest_gic; 196 197 /* Values for interface_type above */ 198 199 #define ACPI_AEST_GIC_CPU 0 200 #define ACPI_AEST_GIC_DISTRIBUTOR 1 201 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 202 #define ACPI_AEST_GIC_ITS 3 203 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 204 205 /* Node Interface Structure */ 206 207 typedef struct acpi_aest_node_interface { 208 u8 type; 209 u8 reserved[3]; 210 u32 flags; 211 u64 address; 212 u32 error_record_index; 213 u32 error_record_count; 214 u64 error_record_implemented; 215 u64 error_status_reporting; 216 u64 addressing_mode; 217 218 } acpi_aest_node_interface; 219 220 /* Values for Type field above */ 221 222 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 223 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 224 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 225 226 /* Node Interrupt Structure */ 227 228 typedef struct acpi_aest_node_interrupt { 229 u8 type; 230 u8 reserved[2]; 231 u8 flags; 232 u32 gsiv; 233 u8 iort_id; 234 u8 reserved1[3]; 235 236 } acpi_aest_node_interrupt; 237 238 /* Values for Type field above */ 239 240 #define ACPI_AEST_NODE_FAULT_HANDLING 0 241 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 242 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 243 244 /******************************************************************************* 245 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 246 * 247 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 248 * ARM DEN0093 v1.1 249 * 250 ******************************************************************************/ 251 struct acpi_table_agdi { 252 struct acpi_table_header header; /* Common ACPI table header */ 253 u8 flags; 254 u8 reserved[3]; 255 u32 sdei_event; 256 u32 gsiv; 257 }; 258 259 /* Mask for Flags field above */ 260 261 #define ACPI_AGDI_SIGNALING_MODE (1) 262 263 /******************************************************************************* 264 * 265 * APMT - ARM Performance Monitoring Unit Table 266 * 267 * Conforms to: 268 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 269 * ARM DEN0117 v1.0 November 25, 2021 270 * 271 ******************************************************************************/ 272 273 struct acpi_table_apmt { 274 struct acpi_table_header header; /* Common ACPI table header */ 275 }; 276 277 #define ACPI_APMT_NODE_ID_LENGTH 4 278 279 /* 280 * APMT subtables 281 */ 282 struct acpi_apmt_node { 283 u16 length; 284 u8 flags; 285 u8 type; 286 u32 id; 287 u64 inst_primary; 288 u32 inst_secondary; 289 u64 base_address0; 290 u64 base_address1; 291 u32 ovflw_irq; 292 u32 reserved; 293 u32 ovflw_irq_flags; 294 u32 proc_affinity; 295 u32 impl_id; 296 }; 297 298 /* Masks for Flags field above */ 299 300 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 301 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 302 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 303 304 /* Values for Flags dual page field above */ 305 306 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 307 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 308 309 /* Values for Flags processor affinity field above */ 310 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 311 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 312 313 /* Values for Flags 64-bit atomic field above */ 314 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 315 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 316 317 /* Values for Type field above */ 318 319 enum acpi_apmt_node_type { 320 ACPI_APMT_NODE_TYPE_MC = 0x00, 321 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 322 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 323 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 324 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 325 ACPI_APMT_NODE_TYPE_COUNT 326 }; 327 328 /* Masks for ovflw_irq_flags field above */ 329 330 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 331 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 332 333 /* Values for ovflw_irq_flags mode field above */ 334 335 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 336 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 337 338 /* Values for ovflw_irq_flags type field above */ 339 340 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 341 342 /******************************************************************************* 343 * 344 * BDAT - BIOS Data ACPI Table 345 * 346 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 347 * Nov 2020 348 * 349 ******************************************************************************/ 350 351 struct acpi_table_bdat { 352 struct acpi_table_header header; 353 struct acpi_generic_address gas; 354 }; 355 356 /******************************************************************************* 357 * 358 * CCEL - CC-Event Log 359 * From: "Guest-Host-Communication Interface (GHCI) for Intel 360 * Trust Domain Extensions (Intel TDX)". Feb 2022 361 * 362 ******************************************************************************/ 363 364 struct acpi_table_ccel { 365 struct acpi_table_header header; /* Common ACPI table header */ 366 u8 CCtype; 367 u8 Ccsub_type; 368 u16 reserved; 369 u64 log_area_minimum_length; 370 u64 log_area_start_address; 371 }; 372 373 /******************************************************************************* 374 * 375 * IORT - IO Remapping Table 376 * 377 * Conforms to "IO Remapping Table System Software on ARM Platforms", 378 * Document number: ARM DEN 0049E.e, Sep 2022 379 * 380 ******************************************************************************/ 381 382 struct acpi_table_iort { 383 struct acpi_table_header header; 384 u32 node_count; 385 u32 node_offset; 386 u32 reserved; 387 }; 388 389 /* 390 * IORT subtables 391 */ 392 struct acpi_iort_node { 393 u8 type; 394 u16 length; 395 u8 revision; 396 u32 identifier; 397 u32 mapping_count; 398 u32 mapping_offset; 399 char node_data[1]; 400 }; 401 402 /* Values for subtable Type above */ 403 404 enum acpi_iort_node_type { 405 ACPI_IORT_NODE_ITS_GROUP = 0x00, 406 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 407 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 408 ACPI_IORT_NODE_SMMU = 0x03, 409 ACPI_IORT_NODE_SMMU_V3 = 0x04, 410 ACPI_IORT_NODE_PMCG = 0x05, 411 ACPI_IORT_NODE_RMR = 0x06, 412 }; 413 414 struct acpi_iort_id_mapping { 415 u32 input_base; /* Lowest value in input range */ 416 u32 id_count; /* Number of IDs */ 417 u32 output_base; /* Lowest value in output range */ 418 u32 output_reference; /* A reference to the output node */ 419 u32 flags; 420 }; 421 422 /* Masks for Flags field above for IORT subtable */ 423 424 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 425 426 struct acpi_iort_memory_access { 427 u32 cache_coherency; 428 u8 hints; 429 u16 reserved; 430 u8 memory_flags; 431 }; 432 433 /* Values for cache_coherency field above */ 434 435 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 436 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 437 438 /* Masks for Hints field above */ 439 440 #define ACPI_IORT_HT_TRANSIENT (1) 441 #define ACPI_IORT_HT_WRITE (1<<1) 442 #define ACPI_IORT_HT_READ (1<<2) 443 #define ACPI_IORT_HT_OVERRIDE (1<<3) 444 445 /* Masks for memory_flags field above */ 446 447 #define ACPI_IORT_MF_COHERENCY (1) 448 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 449 450 /* 451 * IORT node specific subtables 452 */ 453 struct acpi_iort_its_group { 454 u32 its_count; 455 u32 identifiers[1]; /* GIC ITS identifier array */ 456 }; 457 458 struct acpi_iort_named_component { 459 u32 node_flags; 460 u64 memory_properties; /* Memory access properties */ 461 u8 memory_address_limit; /* Memory address size limit */ 462 char device_name[1]; /* Path of namespace object */ 463 }; 464 465 /* Masks for Flags field above */ 466 467 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 468 #define ACPI_IORT_NC_PASID_BITS (31<<1) 469 470 struct acpi_iort_root_complex { 471 u64 memory_properties; /* Memory access properties */ 472 u32 ats_attribute; 473 u32 pci_segment_number; 474 u8 memory_address_limit; /* Memory address size limit */ 475 u16 pasid_capabilities; /* PASID Capabilities */ 476 u8 reserved[1]; /* Reserved, must be zero */ 477 }; 478 479 /* Masks for ats_attribute field above */ 480 481 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 482 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 483 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 484 485 /* Masks for pasid_capabilities field above */ 486 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 487 488 struct acpi_iort_smmu { 489 u64 base_address; /* SMMU base address */ 490 u64 span; /* Length of memory range */ 491 u32 model; 492 u32 flags; 493 u32 global_interrupt_offset; 494 u32 context_interrupt_count; 495 u32 context_interrupt_offset; 496 u32 pmu_interrupt_count; 497 u32 pmu_interrupt_offset; 498 u64 interrupts[1]; /* Interrupt array */ 499 }; 500 501 /* Values for Model field above */ 502 503 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 504 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 505 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 506 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 507 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 508 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 509 510 /* Masks for Flags field above */ 511 512 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 513 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 514 515 /* Global interrupt format */ 516 517 struct acpi_iort_smmu_gsi { 518 u32 nsg_irpt; 519 u32 nsg_irpt_flags; 520 u32 nsg_cfg_irpt; 521 u32 nsg_cfg_irpt_flags; 522 }; 523 524 struct acpi_iort_smmu_v3 { 525 u64 base_address; /* SMMUv3 base address */ 526 u32 flags; 527 u32 reserved; 528 u64 vatos_address; 529 u32 model; 530 u32 event_gsiv; 531 u32 pri_gsiv; 532 u32 gerr_gsiv; 533 u32 sync_gsiv; 534 u32 pxm; 535 u32 id_mapping_index; 536 }; 537 538 /* Values for Model field above */ 539 540 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 541 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 542 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 543 544 /* Masks for Flags field above */ 545 546 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 547 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 548 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 549 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 550 551 struct acpi_iort_pmcg { 552 u64 page0_base_address; 553 u32 overflow_gsiv; 554 u32 node_reference; 555 u64 page1_base_address; 556 }; 557 558 struct acpi_iort_rmr { 559 u32 flags; 560 u32 rmr_count; 561 u32 rmr_offset; 562 }; 563 564 /* Masks for Flags field above */ 565 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 566 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 567 568 /* 569 * Macro to access the Access Attributes in flags field above: 570 * Access Attributes is encoded in bits 9:2 571 */ 572 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 573 574 /* Values for above Access Attributes */ 575 576 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 577 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 578 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 579 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 580 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 581 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 582 583 struct acpi_iort_rmr_desc { 584 u64 base_address; 585 u64 length; 586 u32 reserved; 587 }; 588 589 /******************************************************************************* 590 * 591 * IVRS - I/O Virtualization Reporting Structure 592 * Version 1 593 * 594 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 595 * Revision 1.26, February 2009. 596 * 597 ******************************************************************************/ 598 599 struct acpi_table_ivrs { 600 struct acpi_table_header header; /* Common ACPI table header */ 601 u32 info; /* Common virtualization info */ 602 u64 reserved; 603 }; 604 605 /* Values for Info field above */ 606 607 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 608 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 609 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 610 611 /* IVRS subtable header */ 612 613 struct acpi_ivrs_header { 614 u8 type; /* Subtable type */ 615 u8 flags; 616 u16 length; /* Subtable length */ 617 u16 device_id; /* ID of IOMMU */ 618 }; 619 620 /* Values for subtable Type above */ 621 622 enum acpi_ivrs_type { 623 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 624 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 625 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 626 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 627 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 628 ACPI_IVRS_TYPE_MEMORY3 = 0x22 629 }; 630 631 /* Masks for Flags field above for IVHD subtable */ 632 633 #define ACPI_IVHD_TT_ENABLE (1) 634 #define ACPI_IVHD_PASS_PW (1<<1) 635 #define ACPI_IVHD_RES_PASS_PW (1<<2) 636 #define ACPI_IVHD_ISOC (1<<3) 637 #define ACPI_IVHD_IOTLB (1<<4) 638 639 /* Masks for Flags field above for IVMD subtable */ 640 641 #define ACPI_IVMD_UNITY (1) 642 #define ACPI_IVMD_READ (1<<1) 643 #define ACPI_IVMD_WRITE (1<<2) 644 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 645 646 /* 647 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 648 */ 649 650 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 651 652 struct acpi_ivrs_hardware_10 { 653 struct acpi_ivrs_header header; 654 u16 capability_offset; /* Offset for IOMMU control fields */ 655 u64 base_address; /* IOMMU control registers */ 656 u16 pci_segment_group; 657 u16 info; /* MSI number and unit ID */ 658 u32 feature_reporting; 659 }; 660 661 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 662 663 struct acpi_ivrs_hardware_11 { 664 struct acpi_ivrs_header header; 665 u16 capability_offset; /* Offset for IOMMU control fields */ 666 u64 base_address; /* IOMMU control registers */ 667 u16 pci_segment_group; 668 u16 info; /* MSI number and unit ID */ 669 u32 attributes; 670 u64 efr_register_image; 671 u64 reserved; 672 }; 673 674 /* Masks for Info field above */ 675 676 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 677 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 678 679 /* 680 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 681 * Upper two bits of the Type field are the (encoded) length of the structure. 682 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 683 * are reserved for future use but not defined. 684 */ 685 struct acpi_ivrs_de_header { 686 u8 type; 687 u16 id; 688 u8 data_setting; 689 }; 690 691 /* Length of device entry is in the top two bits of Type field above */ 692 693 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 694 695 /* Values for device entry Type field above */ 696 697 enum acpi_ivrs_device_entry_type { 698 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 699 700 ACPI_IVRS_TYPE_PAD4 = 0, 701 ACPI_IVRS_TYPE_ALL = 1, 702 ACPI_IVRS_TYPE_SELECT = 2, 703 ACPI_IVRS_TYPE_START = 3, 704 ACPI_IVRS_TYPE_END = 4, 705 706 /* 8-byte device entries */ 707 708 ACPI_IVRS_TYPE_PAD8 = 64, 709 ACPI_IVRS_TYPE_NOT_USED = 65, 710 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 711 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 712 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 713 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 714 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 715 716 /* Variable-length device entries */ 717 718 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 719 }; 720 721 /* Values for Data field above */ 722 723 #define ACPI_IVHD_INIT_PASS (1) 724 #define ACPI_IVHD_EINT_PASS (1<<1) 725 #define ACPI_IVHD_NMI_PASS (1<<2) 726 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 727 #define ACPI_IVHD_LINT0_PASS (1<<6) 728 #define ACPI_IVHD_LINT1_PASS (1<<7) 729 730 /* Types 0-4: 4-byte device entry */ 731 732 struct acpi_ivrs_device4 { 733 struct acpi_ivrs_de_header header; 734 }; 735 736 /* Types 66-67: 8-byte device entry */ 737 738 struct acpi_ivrs_device8a { 739 struct acpi_ivrs_de_header header; 740 u8 reserved1; 741 u16 used_id; 742 u8 reserved2; 743 }; 744 745 /* Types 70-71: 8-byte device entry */ 746 747 struct acpi_ivrs_device8b { 748 struct acpi_ivrs_de_header header; 749 u32 extended_data; 750 }; 751 752 /* Values for extended_data above */ 753 754 #define ACPI_IVHD_ATS_DISABLED (1<<31) 755 756 /* Type 72: 8-byte device entry */ 757 758 struct acpi_ivrs_device8c { 759 struct acpi_ivrs_de_header header; 760 u8 handle; 761 u16 used_id; 762 u8 variety; 763 }; 764 765 /* Values for Variety field above */ 766 767 #define ACPI_IVHD_IOAPIC 1 768 #define ACPI_IVHD_HPET 2 769 770 /* Type 240: variable-length device entry */ 771 772 struct acpi_ivrs_device_hid { 773 struct acpi_ivrs_de_header header; 774 u64 acpi_hid; 775 u64 acpi_cid; 776 u8 uid_type; 777 u8 uid_length; 778 }; 779 780 /* Values for uid_type above */ 781 782 #define ACPI_IVRS_UID_NOT_PRESENT 0 783 #define ACPI_IVRS_UID_IS_INTEGER 1 784 #define ACPI_IVRS_UID_IS_STRING 2 785 786 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 787 788 struct acpi_ivrs_memory { 789 struct acpi_ivrs_header header; 790 u16 aux_data; 791 u64 reserved; 792 u64 start_address; 793 u64 memory_length; 794 }; 795 796 /******************************************************************************* 797 * 798 * LPIT - Low Power Idle Table 799 * 800 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 801 * 802 ******************************************************************************/ 803 804 struct acpi_table_lpit { 805 struct acpi_table_header header; /* Common ACPI table header */ 806 }; 807 808 /* LPIT subtable header */ 809 810 struct acpi_lpit_header { 811 u32 type; /* Subtable type */ 812 u32 length; /* Subtable length */ 813 u16 unique_id; 814 u16 reserved; 815 u32 flags; 816 }; 817 818 /* Values for subtable Type above */ 819 820 enum acpi_lpit_type { 821 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 822 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 823 }; 824 825 /* Masks for Flags field above */ 826 827 #define ACPI_LPIT_STATE_DISABLED (1) 828 #define ACPI_LPIT_NO_COUNTER (1<<1) 829 830 /* 831 * LPIT subtables, correspond to Type in struct acpi_lpit_header 832 */ 833 834 /* 0x00: Native C-state instruction based LPI structure */ 835 836 struct acpi_lpit_native { 837 struct acpi_lpit_header header; 838 struct acpi_generic_address entry_trigger; 839 u32 residency; 840 u32 latency; 841 struct acpi_generic_address residency_counter; 842 u64 counter_frequency; 843 }; 844 845 /******************************************************************************* 846 * 847 * MADT - Multiple APIC Description Table 848 * Version 3 849 * 850 ******************************************************************************/ 851 852 struct acpi_table_madt { 853 struct acpi_table_header header; /* Common ACPI table header */ 854 u32 address; /* Physical address of local APIC */ 855 u32 flags; 856 }; 857 858 /* Masks for Flags field above */ 859 860 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 861 862 /* Values for PCATCompat flag */ 863 864 #define ACPI_MADT_DUAL_PIC 1 865 #define ACPI_MADT_MULTIPLE_APIC 0 866 867 /* Values for MADT subtable type in struct acpi_subtable_header */ 868 869 enum acpi_madt_type { 870 ACPI_MADT_TYPE_LOCAL_APIC = 0, 871 ACPI_MADT_TYPE_IO_APIC = 1, 872 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 873 ACPI_MADT_TYPE_NMI_SOURCE = 3, 874 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 875 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 876 ACPI_MADT_TYPE_IO_SAPIC = 6, 877 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 878 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 879 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 880 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 881 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 882 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 883 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 884 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 885 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 886 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 887 ACPI_MADT_TYPE_CORE_PIC = 17, 888 ACPI_MADT_TYPE_LIO_PIC = 18, 889 ACPI_MADT_TYPE_HT_PIC = 19, 890 ACPI_MADT_TYPE_EIO_PIC = 20, 891 ACPI_MADT_TYPE_MSI_PIC = 21, 892 ACPI_MADT_TYPE_BIO_PIC = 22, 893 ACPI_MADT_TYPE_LPC_PIC = 23, 894 ACPI_MADT_TYPE_RINTC = 24, 895 ACPI_MADT_TYPE_RESERVED = 25, /* 25 to 0x7F are reserved */ 896 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 897 }; 898 899 /* 900 * MADT Subtables, correspond to Type in struct acpi_subtable_header 901 */ 902 903 /* 0: Processor Local APIC */ 904 905 struct acpi_madt_local_apic { 906 struct acpi_subtable_header header; 907 u8 processor_id; /* ACPI processor id */ 908 u8 id; /* Processor's local APIC id */ 909 u32 lapic_flags; 910 }; 911 912 /* 1: IO APIC */ 913 914 struct acpi_madt_io_apic { 915 struct acpi_subtable_header header; 916 u8 id; /* I/O APIC ID */ 917 u8 reserved; /* reserved - must be zero */ 918 u32 address; /* APIC physical address */ 919 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 920 }; 921 922 /* 2: Interrupt Override */ 923 924 struct acpi_madt_interrupt_override { 925 struct acpi_subtable_header header; 926 u8 bus; /* 0 - ISA */ 927 u8 source_irq; /* Interrupt source (IRQ) */ 928 u32 global_irq; /* Global system interrupt */ 929 u16 inti_flags; 930 }; 931 932 /* 3: NMI Source */ 933 934 struct acpi_madt_nmi_source { 935 struct acpi_subtable_header header; 936 u16 inti_flags; 937 u32 global_irq; /* Global system interrupt */ 938 }; 939 940 /* 4: Local APIC NMI */ 941 942 struct acpi_madt_local_apic_nmi { 943 struct acpi_subtable_header header; 944 u8 processor_id; /* ACPI processor id */ 945 u16 inti_flags; 946 u8 lint; /* LINTn to which NMI is connected */ 947 }; 948 949 /* 5: Address Override */ 950 951 struct acpi_madt_local_apic_override { 952 struct acpi_subtable_header header; 953 u16 reserved; /* Reserved, must be zero */ 954 u64 address; /* APIC physical address */ 955 }; 956 957 /* 6: I/O Sapic */ 958 959 struct acpi_madt_io_sapic { 960 struct acpi_subtable_header header; 961 u8 id; /* I/O SAPIC ID */ 962 u8 reserved; /* Reserved, must be zero */ 963 u32 global_irq_base; /* Global interrupt for SAPIC start */ 964 u64 address; /* SAPIC physical address */ 965 }; 966 967 /* 7: Local Sapic */ 968 969 struct acpi_madt_local_sapic { 970 struct acpi_subtable_header header; 971 u8 processor_id; /* ACPI processor id */ 972 u8 id; /* SAPIC ID */ 973 u8 eid; /* SAPIC EID */ 974 u8 reserved[3]; /* Reserved, must be zero */ 975 u32 lapic_flags; 976 u32 uid; /* Numeric UID - ACPI 3.0 */ 977 char uid_string[1]; /* String UID - ACPI 3.0 */ 978 }; 979 980 /* 8: Platform Interrupt Source */ 981 982 struct acpi_madt_interrupt_source { 983 struct acpi_subtable_header header; 984 u16 inti_flags; 985 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 986 u8 id; /* Processor ID */ 987 u8 eid; /* Processor EID */ 988 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 989 u32 global_irq; /* Global system interrupt */ 990 u32 flags; /* Interrupt Source Flags */ 991 }; 992 993 /* Masks for Flags field above */ 994 995 #define ACPI_MADT_CPEI_OVERRIDE (1) 996 997 /* 9: Processor Local X2APIC (ACPI 4.0) */ 998 999 struct acpi_madt_local_x2apic { 1000 struct acpi_subtable_header header; 1001 u16 reserved; /* reserved - must be zero */ 1002 u32 local_apic_id; /* Processor x2APIC ID */ 1003 u32 lapic_flags; 1004 u32 uid; /* ACPI processor UID */ 1005 }; 1006 1007 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1008 1009 struct acpi_madt_local_x2apic_nmi { 1010 struct acpi_subtable_header header; 1011 u16 inti_flags; 1012 u32 uid; /* ACPI processor UID */ 1013 u8 lint; /* LINTn to which NMI is connected */ 1014 u8 reserved[3]; /* reserved - must be zero */ 1015 }; 1016 1017 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1018 1019 struct acpi_madt_generic_interrupt { 1020 struct acpi_subtable_header header; 1021 u16 reserved; /* reserved - must be zero */ 1022 u32 cpu_interface_number; 1023 u32 uid; 1024 u32 flags; 1025 u32 parking_version; 1026 u32 performance_interrupt; 1027 u64 parked_address; 1028 u64 base_address; 1029 u64 gicv_base_address; 1030 u64 gich_base_address; 1031 u32 vgic_interrupt; 1032 u64 gicr_base_address; 1033 u64 arm_mpidr; 1034 u8 efficiency_class; 1035 u8 reserved2[1]; 1036 u16 spe_interrupt; /* ACPI 6.3 */ 1037 u16 trbe_interrupt; /* ACPI 6.5 */ 1038 }; 1039 1040 /* Masks for Flags field above */ 1041 1042 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1043 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1044 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1045 1046 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1047 1048 struct acpi_madt_generic_distributor { 1049 struct acpi_subtable_header header; 1050 u16 reserved; /* reserved - must be zero */ 1051 u32 gic_id; 1052 u64 base_address; 1053 u32 global_irq_base; 1054 u8 version; 1055 u8 reserved2[3]; /* reserved - must be zero */ 1056 }; 1057 1058 /* Values for Version field above */ 1059 1060 enum acpi_madt_gic_version { 1061 ACPI_MADT_GIC_VERSION_NONE = 0, 1062 ACPI_MADT_GIC_VERSION_V1 = 1, 1063 ACPI_MADT_GIC_VERSION_V2 = 2, 1064 ACPI_MADT_GIC_VERSION_V3 = 3, 1065 ACPI_MADT_GIC_VERSION_V4 = 4, 1066 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1067 }; 1068 1069 /* 13: Generic MSI Frame (ACPI 5.1) */ 1070 1071 struct acpi_madt_generic_msi_frame { 1072 struct acpi_subtable_header header; 1073 u16 reserved; /* reserved - must be zero */ 1074 u32 msi_frame_id; 1075 u64 base_address; 1076 u32 flags; 1077 u16 spi_count; 1078 u16 spi_base; 1079 }; 1080 1081 /* Masks for Flags field above */ 1082 1083 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1084 1085 /* 14: Generic Redistributor (ACPI 5.1) */ 1086 1087 struct acpi_madt_generic_redistributor { 1088 struct acpi_subtable_header header; 1089 u16 reserved; /* reserved - must be zero */ 1090 u64 base_address; 1091 u32 length; 1092 }; 1093 1094 /* 15: Generic Translator (ACPI 6.0) */ 1095 1096 struct acpi_madt_generic_translator { 1097 struct acpi_subtable_header header; 1098 u16 reserved; /* reserved - must be zero */ 1099 u32 translation_id; 1100 u64 base_address; 1101 u32 reserved2; 1102 }; 1103 1104 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1105 1106 struct acpi_madt_multiproc_wakeup { 1107 struct acpi_subtable_header header; 1108 u16 mailbox_version; 1109 u32 reserved; /* reserved - must be zero */ 1110 u64 base_address; 1111 }; 1112 1113 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1114 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1115 1116 struct acpi_madt_multiproc_wakeup_mailbox { 1117 u16 command; 1118 u16 reserved; /* reserved - must be zero */ 1119 u32 apic_id; 1120 u64 wakeup_vector; 1121 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1122 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1123 }; 1124 1125 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1126 1127 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1128 1129 struct acpi_madt_core_pic { 1130 struct acpi_subtable_header header; 1131 u8 version; 1132 u32 processor_id; 1133 u32 core_id; 1134 u32 flags; 1135 }; 1136 1137 /* Values for Version field above */ 1138 1139 enum acpi_madt_core_pic_version { 1140 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1141 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1142 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1143 }; 1144 1145 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1146 1147 struct acpi_madt_lio_pic { 1148 struct acpi_subtable_header header; 1149 u8 version; 1150 u64 address; 1151 u16 size; 1152 u8 cascade[2]; 1153 u32 cascade_map[2]; 1154 }; 1155 1156 /* Values for Version field above */ 1157 1158 enum acpi_madt_lio_pic_version { 1159 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1160 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1161 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1162 }; 1163 1164 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1165 1166 struct acpi_madt_ht_pic { 1167 struct acpi_subtable_header header; 1168 u8 version; 1169 u64 address; 1170 u16 size; 1171 u8 cascade[8]; 1172 }; 1173 1174 /* Values for Version field above */ 1175 1176 enum acpi_madt_ht_pic_version { 1177 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1178 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1179 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1180 }; 1181 1182 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1183 1184 struct acpi_madt_eio_pic { 1185 struct acpi_subtable_header header; 1186 u8 version; 1187 u8 cascade; 1188 u8 node; 1189 u64 node_map; 1190 }; 1191 1192 /* Values for Version field above */ 1193 1194 enum acpi_madt_eio_pic_version { 1195 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1196 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1197 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1198 }; 1199 1200 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1201 1202 struct acpi_madt_msi_pic { 1203 struct acpi_subtable_header header; 1204 u8 version; 1205 u64 msg_address; 1206 u32 start; 1207 u32 count; 1208 }; 1209 1210 /* Values for Version field above */ 1211 1212 enum acpi_madt_msi_pic_version { 1213 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1214 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1215 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1216 }; 1217 1218 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1219 1220 struct acpi_madt_bio_pic { 1221 struct acpi_subtable_header header; 1222 u8 version; 1223 u64 address; 1224 u16 size; 1225 u16 id; 1226 u16 gsi_base; 1227 }; 1228 1229 /* Values for Version field above */ 1230 1231 enum acpi_madt_bio_pic_version { 1232 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1233 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1234 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1235 }; 1236 1237 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1238 1239 struct acpi_madt_lpc_pic { 1240 struct acpi_subtable_header header; 1241 u8 version; 1242 u64 address; 1243 u16 size; 1244 u8 cascade; 1245 }; 1246 1247 /* Values for Version field above */ 1248 1249 enum acpi_madt_lpc_pic_version { 1250 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1251 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1252 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1253 }; 1254 1255 /* 24: RISC-V INTC */ 1256 struct acpi_madt_rintc { 1257 struct acpi_subtable_header header; 1258 u8 version; 1259 u8 reserved; 1260 u32 flags; 1261 u64 hart_id; 1262 u32 uid; /* ACPI processor UID */ 1263 }; 1264 1265 /* Values for RISC-V INTC Version field above */ 1266 1267 enum acpi_madt_rintc_version { 1268 ACPI_MADT_RINTC_VERSION_NONE = 0, 1269 ACPI_MADT_RINTC_VERSION_V1 = 1, 1270 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1271 }; 1272 1273 /* 80: OEM data */ 1274 1275 struct acpi_madt_oem_data { 1276 u8 oem_data[0]; 1277 }; 1278 1279 /* 1280 * Common flags fields for MADT subtables 1281 */ 1282 1283 /* MADT Local APIC flags */ 1284 1285 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1286 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1287 1288 /* MADT MPS INTI flags (inti_flags) */ 1289 1290 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1291 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1292 1293 /* Values for MPS INTI flags */ 1294 1295 #define ACPI_MADT_POLARITY_CONFORMS 0 1296 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1297 #define ACPI_MADT_POLARITY_RESERVED 2 1298 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1299 1300 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1301 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1302 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1303 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1304 1305 /******************************************************************************* 1306 * 1307 * MCFG - PCI Memory Mapped Configuration table and subtable 1308 * Version 1 1309 * 1310 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1311 * 1312 ******************************************************************************/ 1313 1314 struct acpi_table_mcfg { 1315 struct acpi_table_header header; /* Common ACPI table header */ 1316 u8 reserved[8]; 1317 }; 1318 1319 /* Subtable */ 1320 1321 struct acpi_mcfg_allocation { 1322 u64 address; /* Base address, processor-relative */ 1323 u16 pci_segment; /* PCI segment group number */ 1324 u8 start_bus_number; /* Starting PCI Bus number */ 1325 u8 end_bus_number; /* Final PCI Bus number */ 1326 u32 reserved; 1327 }; 1328 1329 /******************************************************************************* 1330 * 1331 * MCHI - Management Controller Host Interface Table 1332 * Version 1 1333 * 1334 * Conforms to "Management Component Transport Protocol (MCTP) Host 1335 * Interface Specification", Revision 1.0.0a, October 13, 2009 1336 * 1337 ******************************************************************************/ 1338 1339 struct acpi_table_mchi { 1340 struct acpi_table_header header; /* Common ACPI table header */ 1341 u8 interface_type; 1342 u8 protocol; 1343 u64 protocol_data; 1344 u8 interrupt_type; 1345 u8 gpe; 1346 u8 pci_device_flag; 1347 u32 global_interrupt; 1348 struct acpi_generic_address control_register; 1349 u8 pci_segment; 1350 u8 pci_bus; 1351 u8 pci_device; 1352 u8 pci_function; 1353 }; 1354 1355 /******************************************************************************* 1356 * 1357 * MPAM - Memory System Resource Partitioning and Monitoring 1358 * 1359 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1360 * Document number: ARM DEN 0065, December, 2022. 1361 * 1362 ******************************************************************************/ 1363 1364 /* MPAM RIS locator types. Table 11, Location types */ 1365 enum acpi_mpam_locator_type { 1366 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1367 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1368 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1369 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1370 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1371 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1372 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1373 }; 1374 1375 /* MPAM Functional dependency descriptor. Table 10 */ 1376 struct acpi_mpam_func_deps { 1377 u32 producer; 1378 u32 reserved; 1379 }; 1380 1381 /* MPAM Processor cache locator descriptor. Table 13 */ 1382 struct acpi_mpam_resource_cache_locator { 1383 u64 cache_reference; 1384 u32 reserved; 1385 }; 1386 1387 /* MPAM Memory locator descriptor. Table 14 */ 1388 struct acpi_mpam_resource_memory_locator { 1389 u64 proximity_domain; 1390 u32 reserved; 1391 }; 1392 1393 /* MPAM SMMU locator descriptor. Table 15 */ 1394 struct acpi_mpam_resource_smmu_locator { 1395 u64 smmu_interface; 1396 u32 reserved; 1397 }; 1398 1399 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1400 struct acpi_mpam_resource_memcache_locator { 1401 u8 reserved[7]; 1402 u8 level; 1403 u32 reference; 1404 }; 1405 1406 /* MPAM ACPI device locator descriptor. Table 17 */ 1407 struct acpi_mpam_resource_acpi_locator { 1408 u64 acpi_hw_id; 1409 u32 acpi_unique_id; 1410 }; 1411 1412 /* MPAM Interconnect locator descriptor. Table 18 */ 1413 struct acpi_mpam_resource_interconnect_locator { 1414 u64 inter_connect_desc_tbl_off; 1415 u32 reserved; 1416 }; 1417 1418 /* MPAM Locator structure. Table 12 */ 1419 struct acpi_mpam_resource_generic_locator { 1420 u64 descriptor1; 1421 u32 descriptor2; 1422 }; 1423 1424 union acpi_mpam_resource_locator { 1425 struct acpi_mpam_resource_cache_locator cache_locator; 1426 struct acpi_mpam_resource_memory_locator memory_locator; 1427 struct acpi_mpam_resource_smmu_locator smmu_locator; 1428 struct acpi_mpam_resource_memcache_locator mem_cache_locator; 1429 struct acpi_mpam_resource_acpi_locator acpi_locator; 1430 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator; 1431 struct acpi_mpam_resource_generic_locator generic_locator; 1432 }; 1433 1434 /* Memory System Component Resource Node Structure Table 9 */ 1435 struct acpi_mpam_resource_node { 1436 u32 identifier; 1437 u8 ris_index; 1438 u16 reserved1; 1439 u8 locator_type; 1440 union acpi_mpam_resource_locator locator; 1441 u32 num_functional_deps; 1442 }; 1443 1444 /* Memory System Component (MSC) Node Structure. Table 4 */ 1445 struct acpi_mpam_msc_node { 1446 u16 length; 1447 u8 interface_type; 1448 u8 reserved; 1449 u32 identifier; 1450 u64 base_address; 1451 u32 mmio_size; 1452 u32 overflow_interrupt; 1453 u32 overflow_interrupt_flags; 1454 u32 reserved1; 1455 u32 overflow_interrupt_affinity; 1456 u32 error_interrupt; 1457 u32 error_interrupt_flags; 1458 u32 reserved2; 1459 u32 error_interrupt_affinity; 1460 u32 max_nrdy_usec; 1461 u64 hardware_id_linked_device; 1462 u32 instance_id_linked_device; 1463 u32 num_resouce_nodes; 1464 }; 1465 1466 struct acpi_table_mpam { 1467 struct acpi_table_header header; /* Common ACPI table header */ 1468 }; 1469 1470 /******************************************************************************* 1471 * 1472 * MPST - Memory Power State Table (ACPI 5.0) 1473 * Version 1 1474 * 1475 ******************************************************************************/ 1476 1477 #define ACPI_MPST_CHANNEL_INFO \ 1478 u8 channel_id; \ 1479 u8 reserved1[3]; \ 1480 u16 power_node_count; \ 1481 u16 reserved2; 1482 1483 /* Main table */ 1484 1485 struct acpi_table_mpst { 1486 struct acpi_table_header header; /* Common ACPI table header */ 1487 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1488 }; 1489 1490 /* Memory Platform Communication Channel Info */ 1491 1492 struct acpi_mpst_channel { 1493 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1494 }; 1495 1496 /* Memory Power Node Structure */ 1497 1498 struct acpi_mpst_power_node { 1499 u8 flags; 1500 u8 reserved1; 1501 u16 node_id; 1502 u32 length; 1503 u64 range_address; 1504 u64 range_length; 1505 u32 num_power_states; 1506 u32 num_physical_components; 1507 }; 1508 1509 /* Values for Flags field above */ 1510 1511 #define ACPI_MPST_ENABLED 1 1512 #define ACPI_MPST_POWER_MANAGED 2 1513 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1514 1515 /* Memory Power State Structure (follows POWER_NODE above) */ 1516 1517 struct acpi_mpst_power_state { 1518 u8 power_state; 1519 u8 info_index; 1520 }; 1521 1522 /* Physical Component ID Structure (follows POWER_STATE above) */ 1523 1524 struct acpi_mpst_component { 1525 u16 component_id; 1526 }; 1527 1528 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1529 1530 struct acpi_mpst_data_hdr { 1531 u16 characteristics_count; 1532 u16 reserved; 1533 }; 1534 1535 struct acpi_mpst_power_data { 1536 u8 structure_id; 1537 u8 flags; 1538 u16 reserved1; 1539 u32 average_power; 1540 u32 power_saving; 1541 u64 exit_latency; 1542 u64 reserved2; 1543 }; 1544 1545 /* Values for Flags field above */ 1546 1547 #define ACPI_MPST_PRESERVE 1 1548 #define ACPI_MPST_AUTOENTRY 2 1549 #define ACPI_MPST_AUTOEXIT 4 1550 1551 /* Shared Memory Region (not part of an ACPI table) */ 1552 1553 struct acpi_mpst_shared { 1554 u32 signature; 1555 u16 pcc_command; 1556 u16 pcc_status; 1557 u32 command_register; 1558 u32 status_register; 1559 u32 power_state_id; 1560 u32 power_node_id; 1561 u64 energy_consumed; 1562 u64 average_power; 1563 }; 1564 1565 /******************************************************************************* 1566 * 1567 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1568 * Version 1 1569 * 1570 ******************************************************************************/ 1571 1572 struct acpi_table_msct { 1573 struct acpi_table_header header; /* Common ACPI table header */ 1574 u32 proximity_offset; /* Location of proximity info struct(s) */ 1575 u32 max_proximity_domains; /* Max number of proximity domains */ 1576 u32 max_clock_domains; /* Max number of clock domains */ 1577 u64 max_address; /* Max physical address in system */ 1578 }; 1579 1580 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1581 1582 struct acpi_msct_proximity { 1583 u8 revision; 1584 u8 length; 1585 u32 range_start; /* Start of domain range */ 1586 u32 range_end; /* End of domain range */ 1587 u32 processor_capacity; 1588 u64 memory_capacity; /* In bytes */ 1589 }; 1590 1591 /******************************************************************************* 1592 * 1593 * MSDM - Microsoft Data Management table 1594 * 1595 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1596 * November 29, 2011. Copyright 2011 Microsoft 1597 * 1598 ******************************************************************************/ 1599 1600 /* Basic MSDM table is only the common ACPI header */ 1601 1602 struct acpi_table_msdm { 1603 struct acpi_table_header header; /* Common ACPI table header */ 1604 }; 1605 1606 /******************************************************************************* 1607 * 1608 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1609 * Version 1 1610 * 1611 ******************************************************************************/ 1612 1613 struct acpi_table_nfit { 1614 struct acpi_table_header header; /* Common ACPI table header */ 1615 u32 reserved; /* Reserved, must be zero */ 1616 }; 1617 1618 /* Subtable header for NFIT */ 1619 1620 struct acpi_nfit_header { 1621 u16 type; 1622 u16 length; 1623 }; 1624 1625 /* Values for subtable type in struct acpi_nfit_header */ 1626 1627 enum acpi_nfit_type { 1628 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1629 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1630 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1631 ACPI_NFIT_TYPE_SMBIOS = 3, 1632 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1633 ACPI_NFIT_TYPE_DATA_REGION = 5, 1634 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1635 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1636 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1637 }; 1638 1639 /* 1640 * NFIT Subtables 1641 */ 1642 1643 /* 0: System Physical Address Range Structure */ 1644 1645 struct acpi_nfit_system_address { 1646 struct acpi_nfit_header header; 1647 u16 range_index; 1648 u16 flags; 1649 u32 reserved; /* Reserved, must be zero */ 1650 u32 proximity_domain; 1651 u8 range_guid[16]; 1652 u64 address; 1653 u64 length; 1654 u64 memory_mapping; 1655 u64 location_cookie; /* ACPI 6.4 */ 1656 }; 1657 1658 /* Flags */ 1659 1660 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1661 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1662 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1663 1664 /* Range Type GUIDs appear in the include/acuuid.h file */ 1665 1666 /* 1: Memory Device to System Address Range Map Structure */ 1667 1668 struct acpi_nfit_memory_map { 1669 struct acpi_nfit_header header; 1670 u32 device_handle; 1671 u16 physical_id; 1672 u16 region_id; 1673 u16 range_index; 1674 u16 region_index; 1675 u64 region_size; 1676 u64 region_offset; 1677 u64 address; 1678 u16 interleave_index; 1679 u16 interleave_ways; 1680 u16 flags; 1681 u16 reserved; /* Reserved, must be zero */ 1682 }; 1683 1684 /* Flags */ 1685 1686 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1687 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1688 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1689 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1690 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1691 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1692 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1693 1694 /* 2: Interleave Structure */ 1695 1696 struct acpi_nfit_interleave { 1697 struct acpi_nfit_header header; 1698 u16 interleave_index; 1699 u16 reserved; /* Reserved, must be zero */ 1700 u32 line_count; 1701 u32 line_size; 1702 u32 line_offset[1]; /* Variable length */ 1703 }; 1704 1705 /* 3: SMBIOS Management Information Structure */ 1706 1707 struct acpi_nfit_smbios { 1708 struct acpi_nfit_header header; 1709 u32 reserved; /* Reserved, must be zero */ 1710 u8 data[1]; /* Variable length */ 1711 }; 1712 1713 /* 4: NVDIMM Control Region Structure */ 1714 1715 struct acpi_nfit_control_region { 1716 struct acpi_nfit_header header; 1717 u16 region_index; 1718 u16 vendor_id; 1719 u16 device_id; 1720 u16 revision_id; 1721 u16 subsystem_vendor_id; 1722 u16 subsystem_device_id; 1723 u16 subsystem_revision_id; 1724 u8 valid_fields; 1725 u8 manufacturing_location; 1726 u16 manufacturing_date; 1727 u8 reserved[2]; /* Reserved, must be zero */ 1728 u32 serial_number; 1729 u16 code; 1730 u16 windows; 1731 u64 window_size; 1732 u64 command_offset; 1733 u64 command_size; 1734 u64 status_offset; 1735 u64 status_size; 1736 u16 flags; 1737 u8 reserved1[6]; /* Reserved, must be zero */ 1738 }; 1739 1740 /* Flags */ 1741 1742 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1743 1744 /* valid_fields bits */ 1745 1746 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1747 1748 /* 5: NVDIMM Block Data Window Region Structure */ 1749 1750 struct acpi_nfit_data_region { 1751 struct acpi_nfit_header header; 1752 u16 region_index; 1753 u16 windows; 1754 u64 offset; 1755 u64 size; 1756 u64 capacity; 1757 u64 start_address; 1758 }; 1759 1760 /* 6: Flush Hint Address Structure */ 1761 1762 struct acpi_nfit_flush_address { 1763 struct acpi_nfit_header header; 1764 u32 device_handle; 1765 u16 hint_count; 1766 u8 reserved[6]; /* Reserved, must be zero */ 1767 u64 hint_address[1]; /* Variable length */ 1768 }; 1769 1770 /* 7: Platform Capabilities Structure */ 1771 1772 struct acpi_nfit_capabilities { 1773 struct acpi_nfit_header header; 1774 u8 highest_capability; 1775 u8 reserved[3]; /* Reserved, must be zero */ 1776 u32 capabilities; 1777 u32 reserved2; 1778 }; 1779 1780 /* Capabilities Flags */ 1781 1782 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1783 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1784 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1785 1786 /* 1787 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1788 */ 1789 struct nfit_device_handle { 1790 u32 handle; 1791 }; 1792 1793 /* Device handle construction and extraction macros */ 1794 1795 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1796 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1797 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1798 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1799 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1800 1801 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1802 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1803 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1804 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1805 #define ACPI_NFIT_NODE_ID_OFFSET 16 1806 1807 /* Macro to construct a NFIT/NVDIMM device handle */ 1808 1809 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1810 ((dimm) | \ 1811 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1812 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1813 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1814 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1815 1816 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1817 1818 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1819 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1820 1821 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1822 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1823 1824 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1825 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1826 1827 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1828 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1829 1830 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1831 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1832 1833 /******************************************************************************* 1834 * 1835 * NHLT - Non HD Audio Link Table 1836 * 1837 * Conforms to: Intel Smart Sound Technology NHLT Specification 1838 * Version 0.8.1, January 2020. 1839 * 1840 ******************************************************************************/ 1841 1842 /* Main table */ 1843 1844 struct acpi_table_nhlt { 1845 struct acpi_table_header header; /* Common ACPI table header */ 1846 u8 endpoint_count; 1847 }; 1848 1849 struct acpi_nhlt_endpoint { 1850 u32 descriptor_length; 1851 u8 link_type; 1852 u8 instance_id; 1853 u16 vendor_id; 1854 u16 device_id; 1855 u16 revision_id; 1856 u32 subsystem_id; 1857 u8 device_type; 1858 u8 direction; 1859 u8 virtual_bus_id; 1860 }; 1861 1862 /* Types for link_type field above */ 1863 1864 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1865 #define ACPI_NHLT_RESERVED_DSP 1 1866 #define ACPI_NHLT_PDM 2 1867 #define ACPI_NHLT_SSP 3 1868 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1869 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1870 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1871 1872 /* All other values above are reserved */ 1873 1874 /* Values for device_id field above */ 1875 1876 #define ACPI_NHLT_PDM_DMIC 0xAE20 1877 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1878 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1879 1880 /* Values for device_type field above */ 1881 1882 /* SSP Link */ 1883 1884 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1885 #define ACPI_NHLT_LINK_FM 1 1886 #define ACPI_NHLT_LINK_MODEM 2 1887 /* 3 is reserved */ 1888 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1889 1890 /* PDM Link */ 1891 1892 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1893 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1894 1895 /* Values for Direction field above */ 1896 1897 #define ACPI_NHLT_DIR_RENDER 0 1898 #define ACPI_NHLT_DIR_CAPTURE 1 1899 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1900 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1901 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1902 1903 struct acpi_nhlt_device_specific_config { 1904 u32 capabilities_size; 1905 u8 virtual_slot; 1906 u8 config_type; 1907 }; 1908 1909 struct acpi_nhlt_device_specific_config_a { 1910 u32 capabilities_size; 1911 u8 virtual_slot; 1912 u8 config_type; 1913 u8 array_type; 1914 }; 1915 1916 /* Values for Config Type above */ 1917 1918 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1919 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1920 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1921 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1922 1923 struct acpi_nhlt_device_specific_config_b { 1924 u32 capabilities_size; 1925 }; 1926 1927 struct acpi_nhlt_device_specific_config_c { 1928 u32 capabilities_size; 1929 u8 virtual_slot; 1930 }; 1931 1932 struct acpi_nhlt_render_device_specific_config { 1933 u32 capabilities_size; 1934 u8 virtual_slot; 1935 }; 1936 1937 struct acpi_nhlt_wave_extensible { 1938 u16 format_tag; 1939 u16 channel_count; 1940 u32 samples_per_sec; 1941 u32 avg_bytes_per_sec; 1942 u16 block_align; 1943 u16 bits_per_sample; 1944 u16 extra_format_size; 1945 u16 valid_bits_per_sample; 1946 u32 channel_mask; 1947 u8 sub_format_guid[16]; 1948 }; 1949 1950 /* Values for channel_mask above */ 1951 1952 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1953 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1954 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1955 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1956 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1957 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1958 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1959 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1960 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1961 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1962 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1963 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1964 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1965 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1966 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1967 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1968 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1969 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1970 1971 struct acpi_nhlt_format_config { 1972 struct acpi_nhlt_wave_extensible format; 1973 u32 capability_size; 1974 u8 capabilities[]; 1975 }; 1976 1977 struct acpi_nhlt_formats_config { 1978 u8 formats_count; 1979 }; 1980 1981 struct acpi_nhlt_device_specific_hdr { 1982 u8 virtual_slot; 1983 u8 config_type; 1984 }; 1985 1986 /* Types for config_type above */ 1987 1988 #define ACPI_NHLT_GENERIC 0 1989 #define ACPI_NHLT_MIC 1 1990 #define ACPI_NHLT_RENDER 3 1991 1992 struct acpi_nhlt_mic_device_specific_config { 1993 struct acpi_nhlt_device_specific_hdr device_config; 1994 u8 array_type_ext; 1995 }; 1996 1997 /* Values for array_type_ext above */ 1998 1999 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 2000 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 2001 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 2002 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 2003 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 2004 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 2005 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 2006 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 2007 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 2008 2009 #define ACPI_NHLT_NO_EXTENSION 0x0 2010 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 2011 2012 struct acpi_nhlt_vendor_mic_count { 2013 u8 microphone_count; 2014 }; 2015 2016 struct acpi_nhlt_vendor_mic_config { 2017 u8 type; 2018 u8 panel; 2019 u16 speaker_position_distance; /* mm */ 2020 u16 horizontal_offset; /* mm */ 2021 u16 vertical_offset; /* mm */ 2022 u8 frequency_low_band; /* 5*Hz */ 2023 u8 frequency_high_band; /* 500*Hz */ 2024 u16 direction_angle; /* -180 - + 180 */ 2025 u16 elevation_angle; /* -180 - + 180 */ 2026 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */ 2027 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */ 2028 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */ 2029 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */ 2030 }; 2031 2032 /* Values for Type field above */ 2033 2034 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2035 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2036 #define ACPI_NHLT_MIC_CARDIOID 2 2037 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2038 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2039 #define ACPI_NHLT_MIC_8_SHAPED 5 2040 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2041 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2042 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2043 2044 /* Values for Panel field above */ 2045 2046 #define ACPI_NHLT_MIC_POSITION_TOP 0 2047 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2048 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2049 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2050 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2051 #define ACPI_NHLT_MIC_POSITION_BACK 5 2052 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2053 2054 struct acpi_nhlt_vendor_mic_device_specific_config { 2055 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 2056 u8 number_of_microphones; 2057 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */ 2058 }; 2059 2060 /* Microphone SNR and Sensitivity extension */ 2061 2062 struct acpi_nhlt_mic_snr_sensitivity_extension { 2063 u32 SNR; 2064 u32 sensitivity; 2065 }; 2066 2067 /* Render device with feedback */ 2068 2069 struct acpi_nhlt_render_feedback_device_specific_config { 2070 u8 feedback_virtual_slot; /* Render slot in case of capture */ 2071 u16 feedback_channels; /* Informative only */ 2072 u16 feedback_valid_bits_per_sample; 2073 }; 2074 2075 /* Non documented structures */ 2076 2077 struct acpi_nhlt_device_info_count { 2078 u8 structure_count; 2079 }; 2080 2081 struct acpi_nhlt_device_info { 2082 u8 device_id[16]; 2083 u8 device_instance_id; 2084 u8 device_port_id; 2085 }; 2086 2087 /******************************************************************************* 2088 * 2089 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2090 * Version 2 (ACPI 6.2) 2091 * 2092 ******************************************************************************/ 2093 2094 struct acpi_table_pcct { 2095 struct acpi_table_header header; /* Common ACPI table header */ 2096 u32 flags; 2097 u64 reserved; 2098 }; 2099 2100 /* Values for Flags field above */ 2101 2102 #define ACPI_PCCT_DOORBELL 1 2103 2104 /* Values for subtable type in struct acpi_subtable_header */ 2105 2106 enum acpi_pcct_type { 2107 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2108 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2109 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2110 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2111 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2112 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2113 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2114 }; 2115 2116 /* 2117 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 2118 */ 2119 2120 /* 0: Generic Communications Subspace */ 2121 2122 struct acpi_pcct_subspace { 2123 struct acpi_subtable_header header; 2124 u8 reserved[6]; 2125 u64 base_address; 2126 u64 length; 2127 struct acpi_generic_address doorbell_register; 2128 u64 preserve_mask; 2129 u64 write_mask; 2130 u32 latency; 2131 u32 max_access_rate; 2132 u16 min_turnaround_time; 2133 }; 2134 2135 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2136 2137 struct acpi_pcct_hw_reduced { 2138 struct acpi_subtable_header header; 2139 u32 platform_interrupt; 2140 u8 flags; 2141 u8 reserved; 2142 u64 base_address; 2143 u64 length; 2144 struct acpi_generic_address doorbell_register; 2145 u64 preserve_mask; 2146 u64 write_mask; 2147 u32 latency; 2148 u32 max_access_rate; 2149 u16 min_turnaround_time; 2150 }; 2151 2152 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2153 2154 struct acpi_pcct_hw_reduced_type2 { 2155 struct acpi_subtable_header header; 2156 u32 platform_interrupt; 2157 u8 flags; 2158 u8 reserved; 2159 u64 base_address; 2160 u64 length; 2161 struct acpi_generic_address doorbell_register; 2162 u64 preserve_mask; 2163 u64 write_mask; 2164 u32 latency; 2165 u32 max_access_rate; 2166 u16 min_turnaround_time; 2167 struct acpi_generic_address platform_ack_register; 2168 u64 ack_preserve_mask; 2169 u64 ack_write_mask; 2170 }; 2171 2172 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2173 2174 struct acpi_pcct_ext_pcc_master { 2175 struct acpi_subtable_header header; 2176 u32 platform_interrupt; 2177 u8 flags; 2178 u8 reserved1; 2179 u64 base_address; 2180 u32 length; 2181 struct acpi_generic_address doorbell_register; 2182 u64 preserve_mask; 2183 u64 write_mask; 2184 u32 latency; 2185 u32 max_access_rate; 2186 u32 min_turnaround_time; 2187 struct acpi_generic_address platform_ack_register; 2188 u64 ack_preserve_mask; 2189 u64 ack_set_mask; 2190 u64 reserved2; 2191 struct acpi_generic_address cmd_complete_register; 2192 u64 cmd_complete_mask; 2193 struct acpi_generic_address cmd_update_register; 2194 u64 cmd_update_preserve_mask; 2195 u64 cmd_update_set_mask; 2196 struct acpi_generic_address error_status_register; 2197 u64 error_status_mask; 2198 }; 2199 2200 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2201 2202 struct acpi_pcct_ext_pcc_slave { 2203 struct acpi_subtable_header header; 2204 u32 platform_interrupt; 2205 u8 flags; 2206 u8 reserved1; 2207 u64 base_address; 2208 u32 length; 2209 struct acpi_generic_address doorbell_register; 2210 u64 preserve_mask; 2211 u64 write_mask; 2212 u32 latency; 2213 u32 max_access_rate; 2214 u32 min_turnaround_time; 2215 struct acpi_generic_address platform_ack_register; 2216 u64 ack_preserve_mask; 2217 u64 ack_set_mask; 2218 u64 reserved2; 2219 struct acpi_generic_address cmd_complete_register; 2220 u64 cmd_complete_mask; 2221 struct acpi_generic_address cmd_update_register; 2222 u64 cmd_update_preserve_mask; 2223 u64 cmd_update_set_mask; 2224 struct acpi_generic_address error_status_register; 2225 u64 error_status_mask; 2226 }; 2227 2228 /* 5: HW Registers based Communications Subspace */ 2229 2230 struct acpi_pcct_hw_reg { 2231 struct acpi_subtable_header header; 2232 u16 version; 2233 u64 base_address; 2234 u64 length; 2235 struct acpi_generic_address doorbell_register; 2236 u64 doorbell_preserve; 2237 u64 doorbell_write; 2238 struct acpi_generic_address cmd_complete_register; 2239 u64 cmd_complete_mask; 2240 struct acpi_generic_address error_status_register; 2241 u64 error_status_mask; 2242 u32 nominal_latency; 2243 u32 min_turnaround_time; 2244 }; 2245 2246 /* Values for doorbell flags above */ 2247 2248 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2249 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2250 2251 /* 2252 * PCC memory structures (not part of the ACPI table) 2253 */ 2254 2255 /* Shared Memory Region */ 2256 2257 struct acpi_pcct_shared_memory { 2258 u32 signature; 2259 u16 command; 2260 u16 status; 2261 }; 2262 2263 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2264 2265 struct acpi_pcct_ext_pcc_shared_memory { 2266 u32 signature; 2267 u32 flags; 2268 u32 length; 2269 u32 command; 2270 }; 2271 2272 /******************************************************************************* 2273 * 2274 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2275 * Version 0 2276 * 2277 ******************************************************************************/ 2278 2279 struct acpi_table_pdtt { 2280 struct acpi_table_header header; /* Common ACPI table header */ 2281 u8 trigger_count; 2282 u8 reserved[3]; 2283 u32 array_offset; 2284 }; 2285 2286 /* 2287 * PDTT Communication Channel Identifier Structure. 2288 * The number of these structures is defined by trigger_count above, 2289 * starting at array_offset. 2290 */ 2291 struct acpi_pdtt_channel { 2292 u8 subchannel_id; 2293 u8 flags; 2294 }; 2295 2296 /* Flags for above */ 2297 2298 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2299 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2300 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2301 2302 /******************************************************************************* 2303 * 2304 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2305 * Version 1 2306 * 2307 ******************************************************************************/ 2308 2309 struct acpi_table_phat { 2310 struct acpi_table_header header; /* Common ACPI table header */ 2311 }; 2312 2313 /* Common header for PHAT subtables that follow main table */ 2314 2315 struct acpi_phat_header { 2316 u16 type; 2317 u16 length; 2318 u8 revision; 2319 }; 2320 2321 /* Values for Type field above */ 2322 2323 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2324 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2325 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2326 2327 /* 2328 * PHAT subtables, correspond to Type in struct acpi_phat_header 2329 */ 2330 2331 /* 0: Firmware Version Data Record */ 2332 2333 struct acpi_phat_version_data { 2334 struct acpi_phat_header header; 2335 u8 reserved[3]; 2336 u32 element_count; 2337 }; 2338 2339 struct acpi_phat_version_element { 2340 u8 guid[16]; 2341 u64 version_value; 2342 u32 producer_id; 2343 }; 2344 2345 /* 1: Firmware Health Data Record */ 2346 2347 struct acpi_phat_health_data { 2348 struct acpi_phat_header header; 2349 u8 reserved[2]; 2350 u8 health; 2351 u8 device_guid[16]; 2352 u32 device_specific_offset; /* Zero if no Device-specific data */ 2353 }; 2354 2355 /* Values for Health field above */ 2356 2357 #define ACPI_PHAT_ERRORS_FOUND 0 2358 #define ACPI_PHAT_NO_ERRORS 1 2359 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2360 #define ACPI_PHAT_ADVISORY 3 2361 2362 /******************************************************************************* 2363 * 2364 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2365 * Version 1 2366 * 2367 ******************************************************************************/ 2368 2369 struct acpi_table_pmtt { 2370 struct acpi_table_header header; /* Common ACPI table header */ 2371 u32 memory_device_count; 2372 /* 2373 * Immediately followed by: 2374 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2375 */ 2376 }; 2377 2378 /* Common header for PMTT subtables that follow main table */ 2379 2380 struct acpi_pmtt_header { 2381 u8 type; 2382 u8 reserved1; 2383 u16 length; 2384 u16 flags; 2385 u16 reserved2; 2386 u32 memory_device_count; /* Zero means no memory device structs follow */ 2387 /* 2388 * Immediately followed by: 2389 * u8 type_specific_data[] 2390 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2391 */ 2392 }; 2393 2394 /* Values for Type field above */ 2395 2396 #define ACPI_PMTT_TYPE_SOCKET 0 2397 #define ACPI_PMTT_TYPE_CONTROLLER 1 2398 #define ACPI_PMTT_TYPE_DIMM 2 2399 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2400 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2401 2402 /* Values for Flags field above */ 2403 2404 #define ACPI_PMTT_TOP_LEVEL 0x0001 2405 #define ACPI_PMTT_PHYSICAL 0x0002 2406 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2407 2408 /* 2409 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2410 */ 2411 2412 /* 0: Socket Structure */ 2413 2414 struct acpi_pmtt_socket { 2415 struct acpi_pmtt_header header; 2416 u16 socket_id; 2417 u16 reserved; 2418 }; 2419 /* 2420 * Immediately followed by: 2421 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2422 */ 2423 2424 /* 1: Memory Controller subtable */ 2425 2426 struct acpi_pmtt_controller { 2427 struct acpi_pmtt_header header; 2428 u16 controller_id; 2429 u16 reserved; 2430 }; 2431 /* 2432 * Immediately followed by: 2433 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2434 */ 2435 2436 /* 2: Physical Component Identifier (DIMM) */ 2437 2438 struct acpi_pmtt_physical_component { 2439 struct acpi_pmtt_header header; 2440 u32 bios_handle; 2441 }; 2442 2443 /* 0xFF: Vendor Specific Data */ 2444 2445 struct acpi_pmtt_vendor_specific { 2446 struct acpi_pmtt_header header; 2447 u8 type_uuid[16]; 2448 u8 specific[]; 2449 /* 2450 * Immediately followed by: 2451 * u8 vendor_specific_data[]; 2452 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2453 */ 2454 }; 2455 2456 /******************************************************************************* 2457 * 2458 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2459 * Version 1 2460 * 2461 ******************************************************************************/ 2462 2463 struct acpi_table_pptt { 2464 struct acpi_table_header header; /* Common ACPI table header */ 2465 }; 2466 2467 /* Values for Type field above */ 2468 2469 enum acpi_pptt_type { 2470 ACPI_PPTT_TYPE_PROCESSOR = 0, 2471 ACPI_PPTT_TYPE_CACHE = 1, 2472 ACPI_PPTT_TYPE_ID = 2, 2473 ACPI_PPTT_TYPE_RESERVED = 3 2474 }; 2475 2476 /* 0: Processor Hierarchy Node Structure */ 2477 2478 struct acpi_pptt_processor { 2479 struct acpi_subtable_header header; 2480 u16 reserved; 2481 u32 flags; 2482 u32 parent; 2483 u32 acpi_processor_id; 2484 u32 number_of_priv_resources; 2485 }; 2486 2487 /* Flags */ 2488 2489 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2490 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2491 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2492 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2493 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2494 2495 /* 1: Cache Type Structure */ 2496 2497 struct acpi_pptt_cache { 2498 struct acpi_subtable_header header; 2499 u16 reserved; 2500 u32 flags; 2501 u32 next_level_of_cache; 2502 u32 size; 2503 u32 number_of_sets; 2504 u8 associativity; 2505 u8 attributes; 2506 u16 line_size; 2507 }; 2508 2509 /* 1: Cache Type Structure for PPTT version 3 */ 2510 2511 struct acpi_pptt_cache_v1 { 2512 u32 cache_id; 2513 }; 2514 2515 /* Flags */ 2516 2517 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2518 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2519 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2520 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2521 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2522 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2523 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2524 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2525 2526 /* Masks for Attributes */ 2527 2528 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2529 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2530 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2531 2532 /* Attributes describing cache */ 2533 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2534 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2535 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2536 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2537 2538 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2539 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2540 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2541 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2542 2543 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2544 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2545 2546 /* 2: ID Structure */ 2547 2548 struct acpi_pptt_id { 2549 struct acpi_subtable_header header; 2550 u16 reserved; 2551 u32 vendor_id; 2552 u64 level1_id; 2553 u64 level2_id; 2554 u16 major_rev; 2555 u16 minor_rev; 2556 u16 spin_rev; 2557 }; 2558 2559 /******************************************************************************* 2560 * 2561 * PRMT - Platform Runtime Mechanism Table 2562 * Version 1 2563 * 2564 ******************************************************************************/ 2565 2566 struct acpi_table_prmt { 2567 struct acpi_table_header header; /* Common ACPI table header */ 2568 }; 2569 2570 struct acpi_table_prmt_header { 2571 u8 platform_guid[16]; 2572 u32 module_info_offset; 2573 u32 module_info_count; 2574 }; 2575 2576 struct acpi_prmt_module_header { 2577 u16 revision; 2578 u16 length; 2579 }; 2580 2581 struct acpi_prmt_module_info { 2582 u16 revision; 2583 u16 length; 2584 u8 module_guid[16]; 2585 u16 major_rev; 2586 u16 minor_rev; 2587 u16 handler_info_count; 2588 u32 handler_info_offset; 2589 u64 mmio_list_pointer; 2590 }; 2591 2592 struct acpi_prmt_handler_info { 2593 u16 revision; 2594 u16 length; 2595 u8 handler_guid[16]; 2596 u64 handler_address; 2597 u64 static_data_buffer_address; 2598 u64 acpi_param_buffer_address; 2599 }; 2600 2601 /******************************************************************************* 2602 * 2603 * RASF - RAS Feature Table (ACPI 5.0) 2604 * Version 1 2605 * 2606 ******************************************************************************/ 2607 2608 struct acpi_table_rasf { 2609 struct acpi_table_header header; /* Common ACPI table header */ 2610 u8 channel_id[12]; 2611 }; 2612 2613 /* RASF Platform Communication Channel Shared Memory Region */ 2614 2615 struct acpi_rasf_shared_memory { 2616 u32 signature; 2617 u16 command; 2618 u16 status; 2619 u16 version; 2620 u8 capabilities[16]; 2621 u8 set_capabilities[16]; 2622 u16 num_parameter_blocks; 2623 u32 set_capabilities_status; 2624 }; 2625 2626 /* RASF Parameter Block Structure Header */ 2627 2628 struct acpi_rasf_parameter_block { 2629 u16 type; 2630 u16 version; 2631 u16 length; 2632 }; 2633 2634 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2635 2636 struct acpi_rasf_patrol_scrub_parameter { 2637 struct acpi_rasf_parameter_block header; 2638 u16 patrol_scrub_command; 2639 u64 requested_address_range[2]; 2640 u64 actual_address_range[2]; 2641 u16 flags; 2642 u8 requested_speed; 2643 }; 2644 2645 /* Masks for Flags and Speed fields above */ 2646 2647 #define ACPI_RASF_SCRUBBER_RUNNING 1 2648 #define ACPI_RASF_SPEED (7<<1) 2649 #define ACPI_RASF_SPEED_SLOW (0<<1) 2650 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2651 #define ACPI_RASF_SPEED_FAST (7<<1) 2652 2653 /* Channel Commands */ 2654 2655 enum acpi_rasf_commands { 2656 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2657 }; 2658 2659 /* Platform RAS Capabilities */ 2660 2661 enum acpi_rasf_capabiliities { 2662 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2663 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2664 }; 2665 2666 /* Patrol Scrub Commands */ 2667 2668 enum acpi_rasf_patrol_scrub_commands { 2669 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2670 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2671 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2672 }; 2673 2674 /* Channel Command flags */ 2675 2676 #define ACPI_RASF_GENERATE_SCI (1<<15) 2677 2678 /* Status values */ 2679 2680 enum acpi_rasf_status { 2681 ACPI_RASF_SUCCESS = 0, 2682 ACPI_RASF_NOT_VALID = 1, 2683 ACPI_RASF_NOT_SUPPORTED = 2, 2684 ACPI_RASF_BUSY = 3, 2685 ACPI_RASF_FAILED = 4, 2686 ACPI_RASF_ABORTED = 5, 2687 ACPI_RASF_INVALID_DATA = 6 2688 }; 2689 2690 /* Status flags */ 2691 2692 #define ACPI_RASF_COMMAND_COMPLETE (1) 2693 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2694 #define ACPI_RASF_ERROR (1<<2) 2695 #define ACPI_RASF_STATUS (0x1F<<3) 2696 2697 /******************************************************************************* 2698 * 2699 * RGRT - Regulatory Graphics Resource Table 2700 * Version 1 2701 * 2702 * Conforms to "ACPI RGRT" available at: 2703 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2704 * 2705 ******************************************************************************/ 2706 2707 struct acpi_table_rgrt { 2708 struct acpi_table_header header; /* Common ACPI table header */ 2709 u16 version; 2710 u8 image_type; 2711 u8 reserved; 2712 u8 image[]; 2713 }; 2714 2715 /* image_type values */ 2716 2717 enum acpi_rgrt_image_type { 2718 ACPI_RGRT_TYPE_RESERVED0 = 0, 2719 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2720 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2721 }; 2722 2723 /******************************************************************************* 2724 * 2725 * SBST - Smart Battery Specification Table 2726 * Version 1 2727 * 2728 ******************************************************************************/ 2729 2730 struct acpi_table_sbst { 2731 struct acpi_table_header header; /* Common ACPI table header */ 2732 u32 warning_level; 2733 u32 low_level; 2734 u32 critical_level; 2735 }; 2736 2737 /******************************************************************************* 2738 * 2739 * SDEI - Software Delegated Exception Interface Descriptor Table 2740 * 2741 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2742 * May 8th, 2017. Copyright 2017 ARM Ltd. 2743 * 2744 ******************************************************************************/ 2745 2746 struct acpi_table_sdei { 2747 struct acpi_table_header header; /* Common ACPI table header */ 2748 }; 2749 2750 /******************************************************************************* 2751 * 2752 * SDEV - Secure Devices Table (ACPI 6.2) 2753 * Version 1 2754 * 2755 ******************************************************************************/ 2756 2757 struct acpi_table_sdev { 2758 struct acpi_table_header header; /* Common ACPI table header */ 2759 }; 2760 2761 struct acpi_sdev_header { 2762 u8 type; 2763 u8 flags; 2764 u16 length; 2765 }; 2766 2767 /* Values for subtable type above */ 2768 2769 enum acpi_sdev_type { 2770 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2771 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2772 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2773 }; 2774 2775 /* Values for flags above */ 2776 2777 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2778 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2779 2780 /* 2781 * SDEV subtables 2782 */ 2783 2784 /* 0: Namespace Device Based Secure Device Structure */ 2785 2786 struct acpi_sdev_namespace { 2787 struct acpi_sdev_header header; 2788 u16 device_id_offset; 2789 u16 device_id_length; 2790 u16 vendor_data_offset; 2791 u16 vendor_data_length; 2792 }; 2793 2794 struct acpi_sdev_secure_component { 2795 u16 secure_component_offset; 2796 u16 secure_component_length; 2797 }; 2798 2799 /* 2800 * SDEV sub-subtables ("Components") for above 2801 */ 2802 struct acpi_sdev_component { 2803 struct acpi_sdev_header header; 2804 }; 2805 2806 /* Values for sub-subtable type above */ 2807 2808 enum acpi_sac_type { 2809 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2810 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2811 }; 2812 2813 struct acpi_sdev_id_component { 2814 struct acpi_sdev_header header; 2815 u16 hardware_id_offset; 2816 u16 hardware_id_length; 2817 u16 subsystem_id_offset; 2818 u16 subsystem_id_length; 2819 u16 hardware_revision; 2820 u8 hardware_rev_present; 2821 u8 class_code_present; 2822 u8 pci_base_class; 2823 u8 pci_sub_class; 2824 u8 pci_programming_xface; 2825 }; 2826 2827 struct acpi_sdev_mem_component { 2828 struct acpi_sdev_header header; 2829 u32 reserved; 2830 u64 memory_base_address; 2831 u64 memory_length; 2832 }; 2833 2834 /* 1: PCIe Endpoint Device Based Device Structure */ 2835 2836 struct acpi_sdev_pcie { 2837 struct acpi_sdev_header header; 2838 u16 segment; 2839 u16 start_bus; 2840 u16 path_offset; 2841 u16 path_length; 2842 u16 vendor_data_offset; 2843 u16 vendor_data_length; 2844 }; 2845 2846 /* 1a: PCIe Endpoint path entry */ 2847 2848 struct acpi_sdev_pcie_path { 2849 u8 device; 2850 u8 function; 2851 }; 2852 2853 /******************************************************************************* 2854 * 2855 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2856 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2857 * Trust Domain Extensions (Intel TDX)". 2858 * Version 1 2859 * 2860 ******************************************************************************/ 2861 2862 struct acpi_table_svkl { 2863 struct acpi_table_header header; /* Common ACPI table header */ 2864 u32 count; 2865 }; 2866 2867 struct acpi_svkl_key { 2868 u16 type; 2869 u16 format; 2870 u32 size; 2871 u64 address; 2872 }; 2873 2874 enum acpi_svkl_type { 2875 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2876 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2877 }; 2878 2879 enum acpi_svkl_format { 2880 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2881 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2882 }; 2883 2884 /******************************************************************************* 2885 * 2886 * TDEL - TD-Event Log 2887 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2888 * Trust Domain Extensions (Intel TDX)". 2889 * September 2020 2890 * 2891 ******************************************************************************/ 2892 2893 struct acpi_table_tdel { 2894 struct acpi_table_header header; /* Common ACPI table header */ 2895 u32 reserved; 2896 u64 log_area_minimum_length; 2897 u64 log_area_start_address; 2898 }; 2899 2900 /* Reset to default packing */ 2901 2902 #pragma pack() 2903 2904 #endif /* __ACTBL2_H__ */ 2905