1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /* 8 * Copyright (C) 2000 - 2018, Intel Corp. 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions, and the following disclaimer, 16 * without modification. 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 18 * substantially similar to the "NO WARRANTY" disclaimer below 19 * ("Disclaimer") and any redistribution must be conditioned upon 20 * including a substantially similar Disclaimer requirement for further 21 * binary redistribution. 22 * 3. Neither the names of the above-listed copyright holders nor the names 23 * of any contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * Alternatively, this software may be distributed under the terms of the 27 * GNU General Public License ("GPL") version 2 as published by the Free 28 * Software Foundation. 29 * 30 * NO WARRANTY 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 41 * POSSIBILITY OF SUCH DAMAGES. 42 */ 43 44 #ifndef __ACTBL2_H__ 45 #define __ACTBL2_H__ 46 47 /******************************************************************************* 48 * 49 * Additional ACPI Tables (2) 50 * 51 * These tables are not consumed directly by the ACPICA subsystem, but are 52 * included here to support device drivers and the AML disassembler. 53 * 54 ******************************************************************************/ 55 56 /* 57 * Values for description table header signatures for tables defined in this 58 * file. Useful because they make it more difficult to inadvertently type in 59 * the wrong signature. 60 */ 61 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 62 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 63 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 64 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 65 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 66 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 67 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 68 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 69 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 70 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 71 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 72 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 73 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 74 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 75 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 76 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 77 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 78 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 79 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 80 81 /* 82 * All tables must be byte-packed to match the ACPI specification, since 83 * the tables are provided by the system BIOS. 84 */ 85 #pragma pack(1) 86 87 /* 88 * Note: C bitfields are not used for this reason: 89 * 90 * "Bitfields are great and easy to read, but unfortunately the C language 91 * does not specify the layout of bitfields in memory, which means they are 92 * essentially useless for dealing with packed data in on-disk formats or 93 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 94 * this decision was a design error in C. Ritchie could have picked an order 95 * and stuck with it." Norman Ramsey. 96 * See http://stackoverflow.com/a/1053662/41661 97 */ 98 99 /******************************************************************************* 100 * 101 * IORT - IO Remapping Table 102 * 103 * Conforms to "IO Remapping Table System Software on ARM Platforms", 104 * Document number: ARM DEN 0049C, May 2017 105 * 106 ******************************************************************************/ 107 108 struct acpi_table_iort { 109 struct acpi_table_header header; 110 u32 node_count; 111 u32 node_offset; 112 u32 reserved; 113 }; 114 115 /* 116 * IORT subtables 117 */ 118 struct acpi_iort_node { 119 u8 type; 120 u16 length; 121 u8 revision; 122 u32 reserved; 123 u32 mapping_count; 124 u32 mapping_offset; 125 char node_data[1]; 126 }; 127 128 /* Values for subtable Type above */ 129 130 enum acpi_iort_node_type { 131 ACPI_IORT_NODE_ITS_GROUP = 0x00, 132 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 133 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 134 ACPI_IORT_NODE_SMMU = 0x03, 135 ACPI_IORT_NODE_SMMU_V3 = 0x04 136 }; 137 138 struct acpi_iort_id_mapping { 139 u32 input_base; /* Lowest value in input range */ 140 u32 id_count; /* Number of IDs */ 141 u32 output_base; /* Lowest value in output range */ 142 u32 output_reference; /* A reference to the output node */ 143 u32 flags; 144 }; 145 146 /* Masks for Flags field above for IORT subtable */ 147 148 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 149 150 struct acpi_iort_memory_access { 151 u32 cache_coherency; 152 u8 hints; 153 u16 reserved; 154 u8 memory_flags; 155 }; 156 157 /* Values for cache_coherency field above */ 158 159 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 160 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 161 162 /* Masks for Hints field above */ 163 164 #define ACPI_IORT_HT_TRANSIENT (1) 165 #define ACPI_IORT_HT_WRITE (1<<1) 166 #define ACPI_IORT_HT_READ (1<<2) 167 #define ACPI_IORT_HT_OVERRIDE (1<<3) 168 169 /* Masks for memory_flags field above */ 170 171 #define ACPI_IORT_MF_COHERENCY (1) 172 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 173 174 /* 175 * IORT node specific subtables 176 */ 177 struct acpi_iort_its_group { 178 u32 its_count; 179 u32 identifiers[1]; /* GIC ITS identifier arrary */ 180 }; 181 182 struct acpi_iort_named_component { 183 u32 node_flags; 184 u64 memory_properties; /* Memory access properties */ 185 u8 memory_address_limit; /* Memory address size limit */ 186 char device_name[1]; /* Path of namespace object */ 187 }; 188 189 struct acpi_iort_root_complex { 190 u64 memory_properties; /* Memory access properties */ 191 u32 ats_attribute; 192 u32 pci_segment_number; 193 }; 194 195 /* Values for ats_attribute field above */ 196 197 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 198 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 199 200 struct acpi_iort_smmu { 201 u64 base_address; /* SMMU base address */ 202 u64 span; /* Length of memory range */ 203 u32 model; 204 u32 flags; 205 u32 global_interrupt_offset; 206 u32 context_interrupt_count; 207 u32 context_interrupt_offset; 208 u32 pmu_interrupt_count; 209 u32 pmu_interrupt_offset; 210 u64 interrupts[1]; /* Interrupt array */ 211 }; 212 213 /* Values for Model field above */ 214 215 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 216 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 217 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 218 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 219 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 220 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 221 222 /* Masks for Flags field above */ 223 224 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 225 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 226 227 /* Global interrupt format */ 228 229 struct acpi_iort_smmu_gsi { 230 u32 nsg_irpt; 231 u32 nsg_irpt_flags; 232 u32 nsg_cfg_irpt; 233 u32 nsg_cfg_irpt_flags; 234 }; 235 236 struct acpi_iort_smmu_v3 { 237 u64 base_address; /* SMMUv3 base address */ 238 u32 flags; 239 u32 reserved; 240 u64 vatos_address; 241 u32 model; 242 u32 event_gsiv; 243 u32 pri_gsiv; 244 u32 gerr_gsiv; 245 u32 sync_gsiv; 246 u8 pxm; 247 u8 reserved1; 248 u16 reserved2; 249 u32 id_mapping_index; 250 }; 251 252 /* Values for Model field above */ 253 254 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 255 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 256 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 257 258 /* Masks for Flags field above */ 259 260 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 261 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1) 262 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 263 264 /******************************************************************************* 265 * 266 * IVRS - I/O Virtualization Reporting Structure 267 * Version 1 268 * 269 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 270 * Revision 1.26, February 2009. 271 * 272 ******************************************************************************/ 273 274 struct acpi_table_ivrs { 275 struct acpi_table_header header; /* Common ACPI table header */ 276 u32 info; /* Common virtualization info */ 277 u64 reserved; 278 }; 279 280 /* Values for Info field above */ 281 282 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 283 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 284 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 285 286 /* IVRS subtable header */ 287 288 struct acpi_ivrs_header { 289 u8 type; /* Subtable type */ 290 u8 flags; 291 u16 length; /* Subtable length */ 292 u16 device_id; /* ID of IOMMU */ 293 }; 294 295 /* Values for subtable Type above */ 296 297 enum acpi_ivrs_type { 298 ACPI_IVRS_TYPE_HARDWARE = 0x10, 299 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 300 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 301 ACPI_IVRS_TYPE_MEMORY3 = 0x22 302 }; 303 304 /* Masks for Flags field above for IVHD subtable */ 305 306 #define ACPI_IVHD_TT_ENABLE (1) 307 #define ACPI_IVHD_PASS_PW (1<<1) 308 #define ACPI_IVHD_RES_PASS_PW (1<<2) 309 #define ACPI_IVHD_ISOC (1<<3) 310 #define ACPI_IVHD_IOTLB (1<<4) 311 312 /* Masks for Flags field above for IVMD subtable */ 313 314 #define ACPI_IVMD_UNITY (1) 315 #define ACPI_IVMD_READ (1<<1) 316 #define ACPI_IVMD_WRITE (1<<2) 317 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 318 319 /* 320 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 321 */ 322 323 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 324 325 struct acpi_ivrs_hardware { 326 struct acpi_ivrs_header header; 327 u16 capability_offset; /* Offset for IOMMU control fields */ 328 u64 base_address; /* IOMMU control registers */ 329 u16 pci_segment_group; 330 u16 info; /* MSI number and unit ID */ 331 u32 reserved; 332 }; 333 334 /* Masks for Info field above */ 335 336 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 337 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 338 339 /* 340 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 341 * Upper two bits of the Type field are the (encoded) length of the structure. 342 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 343 * are reserved for future use but not defined. 344 */ 345 struct acpi_ivrs_de_header { 346 u8 type; 347 u16 id; 348 u8 data_setting; 349 }; 350 351 /* Length of device entry is in the top two bits of Type field above */ 352 353 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 354 355 /* Values for device entry Type field above */ 356 357 enum acpi_ivrs_device_entry_type { 358 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 359 360 ACPI_IVRS_TYPE_PAD4 = 0, 361 ACPI_IVRS_TYPE_ALL = 1, 362 ACPI_IVRS_TYPE_SELECT = 2, 363 ACPI_IVRS_TYPE_START = 3, 364 ACPI_IVRS_TYPE_END = 4, 365 366 /* 8-byte device entries */ 367 368 ACPI_IVRS_TYPE_PAD8 = 64, 369 ACPI_IVRS_TYPE_NOT_USED = 65, 370 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 371 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 372 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 373 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 374 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */ 375 }; 376 377 /* Values for Data field above */ 378 379 #define ACPI_IVHD_INIT_PASS (1) 380 #define ACPI_IVHD_EINT_PASS (1<<1) 381 #define ACPI_IVHD_NMI_PASS (1<<2) 382 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 383 #define ACPI_IVHD_LINT0_PASS (1<<6) 384 #define ACPI_IVHD_LINT1_PASS (1<<7) 385 386 /* Types 0-4: 4-byte device entry */ 387 388 struct acpi_ivrs_device4 { 389 struct acpi_ivrs_de_header header; 390 }; 391 392 /* Types 66-67: 8-byte device entry */ 393 394 struct acpi_ivrs_device8a { 395 struct acpi_ivrs_de_header header; 396 u8 reserved1; 397 u16 used_id; 398 u8 reserved2; 399 }; 400 401 /* Types 70-71: 8-byte device entry */ 402 403 struct acpi_ivrs_device8b { 404 struct acpi_ivrs_de_header header; 405 u32 extended_data; 406 }; 407 408 /* Values for extended_data above */ 409 410 #define ACPI_IVHD_ATS_DISABLED (1<<31) 411 412 /* Type 72: 8-byte device entry */ 413 414 struct acpi_ivrs_device8c { 415 struct acpi_ivrs_de_header header; 416 u8 handle; 417 u16 used_id; 418 u8 variety; 419 }; 420 421 /* Values for Variety field above */ 422 423 #define ACPI_IVHD_IOAPIC 1 424 #define ACPI_IVHD_HPET 2 425 426 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 427 428 struct acpi_ivrs_memory { 429 struct acpi_ivrs_header header; 430 u16 aux_data; 431 u64 reserved; 432 u64 start_address; 433 u64 memory_length; 434 }; 435 436 /******************************************************************************* 437 * 438 * LPIT - Low Power Idle Table 439 * 440 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 441 * 442 ******************************************************************************/ 443 444 struct acpi_table_lpit { 445 struct acpi_table_header header; /* Common ACPI table header */ 446 }; 447 448 /* LPIT subtable header */ 449 450 struct acpi_lpit_header { 451 u32 type; /* Subtable type */ 452 u32 length; /* Subtable length */ 453 u16 unique_id; 454 u16 reserved; 455 u32 flags; 456 }; 457 458 /* Values for subtable Type above */ 459 460 enum acpi_lpit_type { 461 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 462 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 463 }; 464 465 /* Masks for Flags field above */ 466 467 #define ACPI_LPIT_STATE_DISABLED (1) 468 #define ACPI_LPIT_NO_COUNTER (1<<1) 469 470 /* 471 * LPIT subtables, correspond to Type in struct acpi_lpit_header 472 */ 473 474 /* 0x00: Native C-state instruction based LPI structure */ 475 476 struct acpi_lpit_native { 477 struct acpi_lpit_header header; 478 struct acpi_generic_address entry_trigger; 479 u32 residency; 480 u32 latency; 481 struct acpi_generic_address residency_counter; 482 u64 counter_frequency; 483 }; 484 485 /******************************************************************************* 486 * 487 * MADT - Multiple APIC Description Table 488 * Version 3 489 * 490 ******************************************************************************/ 491 492 struct acpi_table_madt { 493 struct acpi_table_header header; /* Common ACPI table header */ 494 u32 address; /* Physical address of local APIC */ 495 u32 flags; 496 }; 497 498 /* Masks for Flags field above */ 499 500 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 501 502 /* Values for PCATCompat flag */ 503 504 #define ACPI_MADT_DUAL_PIC 1 505 #define ACPI_MADT_MULTIPLE_APIC 0 506 507 /* Values for MADT subtable type in struct acpi_subtable_header */ 508 509 enum acpi_madt_type { 510 ACPI_MADT_TYPE_LOCAL_APIC = 0, 511 ACPI_MADT_TYPE_IO_APIC = 1, 512 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 513 ACPI_MADT_TYPE_NMI_SOURCE = 3, 514 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 515 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 516 ACPI_MADT_TYPE_IO_SAPIC = 6, 517 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 518 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 519 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 520 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 521 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 522 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 523 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 524 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 525 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 526 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 527 }; 528 529 /* 530 * MADT Subtables, correspond to Type in struct acpi_subtable_header 531 */ 532 533 /* 0: Processor Local APIC */ 534 535 struct acpi_madt_local_apic { 536 struct acpi_subtable_header header; 537 u8 processor_id; /* ACPI processor id */ 538 u8 id; /* Processor's local APIC id */ 539 u32 lapic_flags; 540 }; 541 542 /* 1: IO APIC */ 543 544 struct acpi_madt_io_apic { 545 struct acpi_subtable_header header; 546 u8 id; /* I/O APIC ID */ 547 u8 reserved; /* reserved - must be zero */ 548 u32 address; /* APIC physical address */ 549 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 550 }; 551 552 /* 2: Interrupt Override */ 553 554 struct acpi_madt_interrupt_override { 555 struct acpi_subtable_header header; 556 u8 bus; /* 0 - ISA */ 557 u8 source_irq; /* Interrupt source (IRQ) */ 558 u32 global_irq; /* Global system interrupt */ 559 u16 inti_flags; 560 }; 561 562 /* 3: NMI Source */ 563 564 struct acpi_madt_nmi_source { 565 struct acpi_subtable_header header; 566 u16 inti_flags; 567 u32 global_irq; /* Global system interrupt */ 568 }; 569 570 /* 4: Local APIC NMI */ 571 572 struct acpi_madt_local_apic_nmi { 573 struct acpi_subtable_header header; 574 u8 processor_id; /* ACPI processor id */ 575 u16 inti_flags; 576 u8 lint; /* LINTn to which NMI is connected */ 577 }; 578 579 /* 5: Address Override */ 580 581 struct acpi_madt_local_apic_override { 582 struct acpi_subtable_header header; 583 u16 reserved; /* Reserved, must be zero */ 584 u64 address; /* APIC physical address */ 585 }; 586 587 /* 6: I/O Sapic */ 588 589 struct acpi_madt_io_sapic { 590 struct acpi_subtable_header header; 591 u8 id; /* I/O SAPIC ID */ 592 u8 reserved; /* Reserved, must be zero */ 593 u32 global_irq_base; /* Global interrupt for SAPIC start */ 594 u64 address; /* SAPIC physical address */ 595 }; 596 597 /* 7: Local Sapic */ 598 599 struct acpi_madt_local_sapic { 600 struct acpi_subtable_header header; 601 u8 processor_id; /* ACPI processor id */ 602 u8 id; /* SAPIC ID */ 603 u8 eid; /* SAPIC EID */ 604 u8 reserved[3]; /* Reserved, must be zero */ 605 u32 lapic_flags; 606 u32 uid; /* Numeric UID - ACPI 3.0 */ 607 char uid_string[1]; /* String UID - ACPI 3.0 */ 608 }; 609 610 /* 8: Platform Interrupt Source */ 611 612 struct acpi_madt_interrupt_source { 613 struct acpi_subtable_header header; 614 u16 inti_flags; 615 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 616 u8 id; /* Processor ID */ 617 u8 eid; /* Processor EID */ 618 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 619 u32 global_irq; /* Global system interrupt */ 620 u32 flags; /* Interrupt Source Flags */ 621 }; 622 623 /* Masks for Flags field above */ 624 625 #define ACPI_MADT_CPEI_OVERRIDE (1) 626 627 /* 9: Processor Local X2APIC (ACPI 4.0) */ 628 629 struct acpi_madt_local_x2apic { 630 struct acpi_subtable_header header; 631 u16 reserved; /* reserved - must be zero */ 632 u32 local_apic_id; /* Processor x2APIC ID */ 633 u32 lapic_flags; 634 u32 uid; /* ACPI processor UID */ 635 }; 636 637 /* 10: Local X2APIC NMI (ACPI 4.0) */ 638 639 struct acpi_madt_local_x2apic_nmi { 640 struct acpi_subtable_header header; 641 u16 inti_flags; 642 u32 uid; /* ACPI processor UID */ 643 u8 lint; /* LINTn to which NMI is connected */ 644 u8 reserved[3]; /* reserved - must be zero */ 645 }; 646 647 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ 648 649 struct acpi_madt_generic_interrupt { 650 struct acpi_subtable_header header; 651 u16 reserved; /* reserved - must be zero */ 652 u32 cpu_interface_number; 653 u32 uid; 654 u32 flags; 655 u32 parking_version; 656 u32 performance_interrupt; 657 u64 parked_address; 658 u64 base_address; 659 u64 gicv_base_address; 660 u64 gich_base_address; 661 u32 vgic_interrupt; 662 u64 gicr_base_address; 663 u64 arm_mpidr; 664 u8 efficiency_class; 665 u8 reserved2[3]; 666 }; 667 668 /* Masks for Flags field above */ 669 670 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 671 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 672 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 673 674 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 675 676 struct acpi_madt_generic_distributor { 677 struct acpi_subtable_header header; 678 u16 reserved; /* reserved - must be zero */ 679 u32 gic_id; 680 u64 base_address; 681 u32 global_irq_base; 682 u8 version; 683 u8 reserved2[3]; /* reserved - must be zero */ 684 }; 685 686 /* Values for Version field above */ 687 688 enum acpi_madt_gic_version { 689 ACPI_MADT_GIC_VERSION_NONE = 0, 690 ACPI_MADT_GIC_VERSION_V1 = 1, 691 ACPI_MADT_GIC_VERSION_V2 = 2, 692 ACPI_MADT_GIC_VERSION_V3 = 3, 693 ACPI_MADT_GIC_VERSION_V4 = 4, 694 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 695 }; 696 697 /* 13: Generic MSI Frame (ACPI 5.1) */ 698 699 struct acpi_madt_generic_msi_frame { 700 struct acpi_subtable_header header; 701 u16 reserved; /* reserved - must be zero */ 702 u32 msi_frame_id; 703 u64 base_address; 704 u32 flags; 705 u16 spi_count; 706 u16 spi_base; 707 }; 708 709 /* Masks for Flags field above */ 710 711 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 712 713 /* 14: Generic Redistributor (ACPI 5.1) */ 714 715 struct acpi_madt_generic_redistributor { 716 struct acpi_subtable_header header; 717 u16 reserved; /* reserved - must be zero */ 718 u64 base_address; 719 u32 length; 720 }; 721 722 /* 15: Generic Translator (ACPI 6.0) */ 723 724 struct acpi_madt_generic_translator { 725 struct acpi_subtable_header header; 726 u16 reserved; /* reserved - must be zero */ 727 u32 translation_id; 728 u64 base_address; 729 u32 reserved2; 730 }; 731 732 /* 733 * Common flags fields for MADT subtables 734 */ 735 736 /* MADT Local APIC flags */ 737 738 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 739 740 /* MADT MPS INTI flags (inti_flags) */ 741 742 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 743 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 744 745 /* Values for MPS INTI flags */ 746 747 #define ACPI_MADT_POLARITY_CONFORMS 0 748 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 749 #define ACPI_MADT_POLARITY_RESERVED 2 750 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 751 752 #define ACPI_MADT_TRIGGER_CONFORMS (0) 753 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 754 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 755 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 756 757 /******************************************************************************* 758 * 759 * MCFG - PCI Memory Mapped Configuration table and subtable 760 * Version 1 761 * 762 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 763 * 764 ******************************************************************************/ 765 766 struct acpi_table_mcfg { 767 struct acpi_table_header header; /* Common ACPI table header */ 768 u8 reserved[8]; 769 }; 770 771 /* Subtable */ 772 773 struct acpi_mcfg_allocation { 774 u64 address; /* Base address, processor-relative */ 775 u16 pci_segment; /* PCI segment group number */ 776 u8 start_bus_number; /* Starting PCI Bus number */ 777 u8 end_bus_number; /* Final PCI Bus number */ 778 u32 reserved; 779 }; 780 781 /******************************************************************************* 782 * 783 * MCHI - Management Controller Host Interface Table 784 * Version 1 785 * 786 * Conforms to "Management Component Transport Protocol (MCTP) Host 787 * Interface Specification", Revision 1.0.0a, October 13, 2009 788 * 789 ******************************************************************************/ 790 791 struct acpi_table_mchi { 792 struct acpi_table_header header; /* Common ACPI table header */ 793 u8 interface_type; 794 u8 protocol; 795 u64 protocol_data; 796 u8 interrupt_type; 797 u8 gpe; 798 u8 pci_device_flag; 799 u32 global_interrupt; 800 struct acpi_generic_address control_register; 801 u8 pci_segment; 802 u8 pci_bus; 803 u8 pci_device; 804 u8 pci_function; 805 }; 806 807 /******************************************************************************* 808 * 809 * MPST - Memory Power State Table (ACPI 5.0) 810 * Version 1 811 * 812 ******************************************************************************/ 813 814 #define ACPI_MPST_CHANNEL_INFO \ 815 u8 channel_id; \ 816 u8 reserved1[3]; \ 817 u16 power_node_count; \ 818 u16 reserved2; 819 820 /* Main table */ 821 822 struct acpi_table_mpst { 823 struct acpi_table_header header; /* Common ACPI table header */ 824 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 825 }; 826 827 /* Memory Platform Communication Channel Info */ 828 829 struct acpi_mpst_channel { 830 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 831 }; 832 833 /* Memory Power Node Structure */ 834 835 struct acpi_mpst_power_node { 836 u8 flags; 837 u8 reserved1; 838 u16 node_id; 839 u32 length; 840 u64 range_address; 841 u64 range_length; 842 u32 num_power_states; 843 u32 num_physical_components; 844 }; 845 846 /* Values for Flags field above */ 847 848 #define ACPI_MPST_ENABLED 1 849 #define ACPI_MPST_POWER_MANAGED 2 850 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 851 852 /* Memory Power State Structure (follows POWER_NODE above) */ 853 854 struct acpi_mpst_power_state { 855 u8 power_state; 856 u8 info_index; 857 }; 858 859 /* Physical Component ID Structure (follows POWER_STATE above) */ 860 861 struct acpi_mpst_component { 862 u16 component_id; 863 }; 864 865 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 866 867 struct acpi_mpst_data_hdr { 868 u16 characteristics_count; 869 u16 reserved; 870 }; 871 872 struct acpi_mpst_power_data { 873 u8 structure_id; 874 u8 flags; 875 u16 reserved1; 876 u32 average_power; 877 u32 power_saving; 878 u64 exit_latency; 879 u64 reserved2; 880 }; 881 882 /* Values for Flags field above */ 883 884 #define ACPI_MPST_PRESERVE 1 885 #define ACPI_MPST_AUTOENTRY 2 886 #define ACPI_MPST_AUTOEXIT 4 887 888 /* Shared Memory Region (not part of an ACPI table) */ 889 890 struct acpi_mpst_shared { 891 u32 signature; 892 u16 pcc_command; 893 u16 pcc_status; 894 u32 command_register; 895 u32 status_register; 896 u32 power_state_id; 897 u32 power_node_id; 898 u64 energy_consumed; 899 u64 average_power; 900 }; 901 902 /******************************************************************************* 903 * 904 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 905 * Version 1 906 * 907 ******************************************************************************/ 908 909 struct acpi_table_msct { 910 struct acpi_table_header header; /* Common ACPI table header */ 911 u32 proximity_offset; /* Location of proximity info struct(s) */ 912 u32 max_proximity_domains; /* Max number of proximity domains */ 913 u32 max_clock_domains; /* Max number of clock domains */ 914 u64 max_address; /* Max physical address in system */ 915 }; 916 917 /* subtable - Maximum Proximity Domain Information. Version 1 */ 918 919 struct acpi_msct_proximity { 920 u8 revision; 921 u8 length; 922 u32 range_start; /* Start of domain range */ 923 u32 range_end; /* End of domain range */ 924 u32 processor_capacity; 925 u64 memory_capacity; /* In bytes */ 926 }; 927 928 /******************************************************************************* 929 * 930 * MSDM - Microsoft Data Management table 931 * 932 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 933 * November 29, 2011. Copyright 2011 Microsoft 934 * 935 ******************************************************************************/ 936 937 /* Basic MSDM table is only the common ACPI header */ 938 939 struct acpi_table_msdm { 940 struct acpi_table_header header; /* Common ACPI table header */ 941 }; 942 943 /******************************************************************************* 944 * 945 * MTMR - MID Timer Table 946 * Version 1 947 * 948 * Conforms to "Simple Firmware Interface Specification", 949 * Draft 0.8.2, Oct 19, 2010 950 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 951 * 952 ******************************************************************************/ 953 954 struct acpi_table_mtmr { 955 struct acpi_table_header header; /* Common ACPI table header */ 956 }; 957 958 /* MTMR entry */ 959 960 struct acpi_mtmr_entry { 961 struct acpi_generic_address physical_address; 962 u32 frequency; 963 u32 irq; 964 }; 965 966 /******************************************************************************* 967 * 968 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 969 * Version 1 970 * 971 ******************************************************************************/ 972 973 struct acpi_table_nfit { 974 struct acpi_table_header header; /* Common ACPI table header */ 975 u32 reserved; /* Reserved, must be zero */ 976 }; 977 978 /* Subtable header for NFIT */ 979 980 struct acpi_nfit_header { 981 u16 type; 982 u16 length; 983 }; 984 985 /* Values for subtable type in struct acpi_nfit_header */ 986 987 enum acpi_nfit_type { 988 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 989 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 990 ACPI_NFIT_TYPE_INTERLEAVE = 2, 991 ACPI_NFIT_TYPE_SMBIOS = 3, 992 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 993 ACPI_NFIT_TYPE_DATA_REGION = 5, 994 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 995 ACPI_NFIT_TYPE_CAPABILITIES = 7, 996 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 997 }; 998 999 /* 1000 * NFIT Subtables 1001 */ 1002 1003 /* 0: System Physical Address Range Structure */ 1004 1005 struct acpi_nfit_system_address { 1006 struct acpi_nfit_header header; 1007 u16 range_index; 1008 u16 flags; 1009 u32 reserved; /* Reserved, must be zero */ 1010 u32 proximity_domain; 1011 u8 range_guid[16]; 1012 u64 address; 1013 u64 length; 1014 u64 memory_mapping; 1015 }; 1016 1017 /* Flags */ 1018 1019 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1020 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1021 1022 /* Range Type GUIDs appear in the include/acuuid.h file */ 1023 1024 /* 1: Memory Device to System Address Range Map Structure */ 1025 1026 struct acpi_nfit_memory_map { 1027 struct acpi_nfit_header header; 1028 u32 device_handle; 1029 u16 physical_id; 1030 u16 region_id; 1031 u16 range_index; 1032 u16 region_index; 1033 u64 region_size; 1034 u64 region_offset; 1035 u64 address; 1036 u16 interleave_index; 1037 u16 interleave_ways; 1038 u16 flags; 1039 u16 reserved; /* Reserved, must be zero */ 1040 }; 1041 1042 /* Flags */ 1043 1044 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1045 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1046 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1047 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1048 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1049 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1050 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1051 1052 /* 2: Interleave Structure */ 1053 1054 struct acpi_nfit_interleave { 1055 struct acpi_nfit_header header; 1056 u16 interleave_index; 1057 u16 reserved; /* Reserved, must be zero */ 1058 u32 line_count; 1059 u32 line_size; 1060 u32 line_offset[1]; /* Variable length */ 1061 }; 1062 1063 /* 3: SMBIOS Management Information Structure */ 1064 1065 struct acpi_nfit_smbios { 1066 struct acpi_nfit_header header; 1067 u32 reserved; /* Reserved, must be zero */ 1068 u8 data[1]; /* Variable length */ 1069 }; 1070 1071 /* 4: NVDIMM Control Region Structure */ 1072 1073 struct acpi_nfit_control_region { 1074 struct acpi_nfit_header header; 1075 u16 region_index; 1076 u16 vendor_id; 1077 u16 device_id; 1078 u16 revision_id; 1079 u16 subsystem_vendor_id; 1080 u16 subsystem_device_id; 1081 u16 subsystem_revision_id; 1082 u8 valid_fields; 1083 u8 manufacturing_location; 1084 u16 manufacturing_date; 1085 u8 reserved[2]; /* Reserved, must be zero */ 1086 u32 serial_number; 1087 u16 code; 1088 u16 windows; 1089 u64 window_size; 1090 u64 command_offset; 1091 u64 command_size; 1092 u64 status_offset; 1093 u64 status_size; 1094 u16 flags; 1095 u8 reserved1[6]; /* Reserved, must be zero */ 1096 }; 1097 1098 /* Flags */ 1099 1100 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1101 1102 /* valid_fields bits */ 1103 1104 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1105 1106 /* 5: NVDIMM Block Data Window Region Structure */ 1107 1108 struct acpi_nfit_data_region { 1109 struct acpi_nfit_header header; 1110 u16 region_index; 1111 u16 windows; 1112 u64 offset; 1113 u64 size; 1114 u64 capacity; 1115 u64 start_address; 1116 }; 1117 1118 /* 6: Flush Hint Address Structure */ 1119 1120 struct acpi_nfit_flush_address { 1121 struct acpi_nfit_header header; 1122 u32 device_handle; 1123 u16 hint_count; 1124 u8 reserved[6]; /* Reserved, must be zero */ 1125 u64 hint_address[1]; /* Variable length */ 1126 }; 1127 1128 /* 7: Platform Capabilities Structure */ 1129 1130 struct acpi_nfit_capabilities { 1131 struct acpi_nfit_header header; 1132 u8 highest_capability; 1133 u8 reserved[3]; /* Reserved, must be zero */ 1134 u32 capabilities; 1135 u32 reserved2; 1136 }; 1137 1138 /* Capabilities Flags */ 1139 1140 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1141 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1142 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1143 1144 /* 1145 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1146 */ 1147 struct nfit_device_handle { 1148 u32 handle; 1149 }; 1150 1151 /* Device handle construction and extraction macros */ 1152 1153 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1154 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1155 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1156 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1157 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1158 1159 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1160 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1161 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1162 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1163 #define ACPI_NFIT_NODE_ID_OFFSET 16 1164 1165 /* Macro to construct a NFIT/NVDIMM device handle */ 1166 1167 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1168 ((dimm) | \ 1169 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1170 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1171 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1172 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1173 1174 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1175 1176 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1177 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1178 1179 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1180 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1181 1182 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1183 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1184 1185 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1186 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1187 1188 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1189 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1190 1191 /******************************************************************************* 1192 * 1193 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1194 * Version 2 (ACPI 6.2) 1195 * 1196 ******************************************************************************/ 1197 1198 struct acpi_table_pcct { 1199 struct acpi_table_header header; /* Common ACPI table header */ 1200 u32 flags; 1201 u64 reserved; 1202 }; 1203 1204 /* Values for Flags field above */ 1205 1206 #define ACPI_PCCT_DOORBELL 1 1207 1208 /* Values for subtable type in struct acpi_subtable_header */ 1209 1210 enum acpi_pcct_type { 1211 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1212 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1213 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1214 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1215 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1216 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1217 }; 1218 1219 /* 1220 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1221 */ 1222 1223 /* 0: Generic Communications Subspace */ 1224 1225 struct acpi_pcct_subspace { 1226 struct acpi_subtable_header header; 1227 u8 reserved[6]; 1228 u64 base_address; 1229 u64 length; 1230 struct acpi_generic_address doorbell_register; 1231 u64 preserve_mask; 1232 u64 write_mask; 1233 u32 latency; 1234 u32 max_access_rate; 1235 u16 min_turnaround_time; 1236 }; 1237 1238 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1239 1240 struct acpi_pcct_hw_reduced { 1241 struct acpi_subtable_header header; 1242 u32 platform_interrupt; 1243 u8 flags; 1244 u8 reserved; 1245 u64 base_address; 1246 u64 length; 1247 struct acpi_generic_address doorbell_register; 1248 u64 preserve_mask; 1249 u64 write_mask; 1250 u32 latency; 1251 u32 max_access_rate; 1252 u16 min_turnaround_time; 1253 }; 1254 1255 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1256 1257 struct acpi_pcct_hw_reduced_type2 { 1258 struct acpi_subtable_header header; 1259 u32 platform_interrupt; 1260 u8 flags; 1261 u8 reserved; 1262 u64 base_address; 1263 u64 length; 1264 struct acpi_generic_address doorbell_register; 1265 u64 preserve_mask; 1266 u64 write_mask; 1267 u32 latency; 1268 u32 max_access_rate; 1269 u16 min_turnaround_time; 1270 struct acpi_generic_address platform_ack_register; 1271 u64 ack_preserve_mask; 1272 u64 ack_write_mask; 1273 }; 1274 1275 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1276 1277 struct acpi_pcct_ext_pcc_master { 1278 struct acpi_subtable_header header; 1279 u32 platform_interrupt; 1280 u8 flags; 1281 u8 reserved1; 1282 u64 base_address; 1283 u32 length; 1284 struct acpi_generic_address doorbell_register; 1285 u64 preserve_mask; 1286 u64 write_mask; 1287 u32 latency; 1288 u32 max_access_rate; 1289 u32 min_turnaround_time; 1290 struct acpi_generic_address platform_ack_register; 1291 u64 ack_preserve_mask; 1292 u64 ack_set_mask; 1293 u64 reserved2; 1294 struct acpi_generic_address cmd_complete_register; 1295 u64 cmd_complete_mask; 1296 struct acpi_generic_address cmd_update_register; 1297 u64 cmd_update_preserve_mask; 1298 u64 cmd_update_set_mask; 1299 struct acpi_generic_address error_status_register; 1300 u64 error_status_mask; 1301 }; 1302 1303 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1304 1305 struct acpi_pcct_ext_pcc_slave { 1306 struct acpi_subtable_header header; 1307 u32 platform_interrupt; 1308 u8 flags; 1309 u8 reserved1; 1310 u64 base_address; 1311 u32 length; 1312 struct acpi_generic_address doorbell_register; 1313 u64 preserve_mask; 1314 u64 write_mask; 1315 u32 latency; 1316 u32 max_access_rate; 1317 u32 min_turnaround_time; 1318 struct acpi_generic_address platform_ack_register; 1319 u64 ack_preserve_mask; 1320 u64 ack_set_mask; 1321 u64 reserved2; 1322 struct acpi_generic_address cmd_complete_register; 1323 u64 cmd_complete_mask; 1324 struct acpi_generic_address cmd_update_register; 1325 u64 cmd_update_preserve_mask; 1326 u64 cmd_update_set_mask; 1327 struct acpi_generic_address error_status_register; 1328 u64 error_status_mask; 1329 }; 1330 1331 /* Values for doorbell flags above */ 1332 1333 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1334 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1335 1336 /* 1337 * PCC memory structures (not part of the ACPI table) 1338 */ 1339 1340 /* Shared Memory Region */ 1341 1342 struct acpi_pcct_shared_memory { 1343 u32 signature; 1344 u16 command; 1345 u16 status; 1346 }; 1347 1348 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1349 1350 struct acpi_pcct_ext_pcc_shared_memory { 1351 u32 signature; 1352 u32 flags; 1353 u32 length; 1354 u32 command; 1355 }; 1356 1357 /******************************************************************************* 1358 * 1359 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1360 * Version 0 1361 * 1362 ******************************************************************************/ 1363 1364 struct acpi_table_pdtt { 1365 struct acpi_table_header header; /* Common ACPI table header */ 1366 u8 trigger_count; 1367 u8 reserved[3]; 1368 u32 array_offset; 1369 }; 1370 1371 /* 1372 * PDTT Communication Channel Identifier Structure. 1373 * The number of these structures is defined by trigger_count above, 1374 * starting at array_offset. 1375 */ 1376 struct acpi_pdtt_channel { 1377 u8 subchannel_id; 1378 u8 flags; 1379 }; 1380 1381 /* Flags for above */ 1382 1383 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1384 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1385 1386 /******************************************************************************* 1387 * 1388 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1389 * Version 1 1390 * 1391 ******************************************************************************/ 1392 1393 struct acpi_table_pmtt { 1394 struct acpi_table_header header; /* Common ACPI table header */ 1395 u32 reserved; 1396 }; 1397 1398 /* Common header for PMTT subtables that follow main table */ 1399 1400 struct acpi_pmtt_header { 1401 u8 type; 1402 u8 reserved1; 1403 u16 length; 1404 u16 flags; 1405 u16 reserved2; 1406 }; 1407 1408 /* Values for Type field above */ 1409 1410 #define ACPI_PMTT_TYPE_SOCKET 0 1411 #define ACPI_PMTT_TYPE_CONTROLLER 1 1412 #define ACPI_PMTT_TYPE_DIMM 2 1413 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1414 1415 /* Values for Flags field above */ 1416 1417 #define ACPI_PMTT_TOP_LEVEL 0x0001 1418 #define ACPI_PMTT_PHYSICAL 0x0002 1419 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1420 1421 /* 1422 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 1423 */ 1424 1425 /* 0: Socket Structure */ 1426 1427 struct acpi_pmtt_socket { 1428 struct acpi_pmtt_header header; 1429 u16 socket_id; 1430 u16 reserved; 1431 }; 1432 1433 /* 1: Memory Controller subtable */ 1434 1435 struct acpi_pmtt_controller { 1436 struct acpi_pmtt_header header; 1437 u32 read_latency; 1438 u32 write_latency; 1439 u32 read_bandwidth; 1440 u32 write_bandwidth; 1441 u16 access_width; 1442 u16 alignment; 1443 u16 reserved; 1444 u16 domain_count; 1445 }; 1446 1447 /* 1a: Proximity Domain substructure */ 1448 1449 struct acpi_pmtt_domain { 1450 u32 proximity_domain; 1451 }; 1452 1453 /* 2: Physical Component Identifier (DIMM) */ 1454 1455 struct acpi_pmtt_physical_component { 1456 struct acpi_pmtt_header header; 1457 u16 component_id; 1458 u16 reserved; 1459 u32 memory_size; 1460 u32 bios_handle; 1461 }; 1462 1463 /******************************************************************************* 1464 * 1465 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1466 * Version 1 1467 * 1468 ******************************************************************************/ 1469 1470 struct acpi_table_pptt { 1471 struct acpi_table_header header; /* Common ACPI table header */ 1472 }; 1473 1474 /* Values for Type field above */ 1475 1476 enum acpi_pptt_type { 1477 ACPI_PPTT_TYPE_PROCESSOR = 0, 1478 ACPI_PPTT_TYPE_CACHE = 1, 1479 ACPI_PPTT_TYPE_ID = 2, 1480 ACPI_PPTT_TYPE_RESERVED = 3 1481 }; 1482 1483 /* 0: Processor Hierarchy Node Structure */ 1484 1485 struct acpi_pptt_processor { 1486 struct acpi_subtable_header header; 1487 u16 reserved; 1488 u32 flags; 1489 u32 parent; 1490 u32 acpi_processor_id; 1491 u32 number_of_priv_resources; 1492 }; 1493 1494 /* Flags */ 1495 1496 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */ 1497 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */ 1498 1499 /* 1: Cache Type Structure */ 1500 1501 struct acpi_pptt_cache { 1502 struct acpi_subtable_header header; 1503 u16 reserved; 1504 u32 flags; 1505 u32 next_level_of_cache; 1506 u32 size; 1507 u32 number_of_sets; 1508 u8 associativity; 1509 u8 attributes; 1510 u16 line_size; 1511 }; 1512 1513 /* Flags */ 1514 1515 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1516 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1517 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1518 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1519 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1520 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1521 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1522 1523 /* Masks for Attributes */ 1524 1525 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1526 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1527 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1528 1529 /* Attributes describing cache */ 1530 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1531 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1532 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1533 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1534 1535 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1536 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1537 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1538 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1539 1540 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1541 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1542 1543 /* 2: ID Structure */ 1544 1545 struct acpi_pptt_id { 1546 struct acpi_subtable_header header; 1547 u16 reserved; 1548 u32 vendor_id; 1549 u64 level1_id; 1550 u64 level2_id; 1551 u16 major_rev; 1552 u16 minor_rev; 1553 u16 spin_rev; 1554 }; 1555 1556 /******************************************************************************* 1557 * 1558 * RASF - RAS Feature Table (ACPI 5.0) 1559 * Version 1 1560 * 1561 ******************************************************************************/ 1562 1563 struct acpi_table_rasf { 1564 struct acpi_table_header header; /* Common ACPI table header */ 1565 u8 channel_id[12]; 1566 }; 1567 1568 /* RASF Platform Communication Channel Shared Memory Region */ 1569 1570 struct acpi_rasf_shared_memory { 1571 u32 signature; 1572 u16 command; 1573 u16 status; 1574 u16 version; 1575 u8 capabilities[16]; 1576 u8 set_capabilities[16]; 1577 u16 num_parameter_blocks; 1578 u32 set_capabilities_status; 1579 }; 1580 1581 /* RASF Parameter Block Structure Header */ 1582 1583 struct acpi_rasf_parameter_block { 1584 u16 type; 1585 u16 version; 1586 u16 length; 1587 }; 1588 1589 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1590 1591 struct acpi_rasf_patrol_scrub_parameter { 1592 struct acpi_rasf_parameter_block header; 1593 u16 patrol_scrub_command; 1594 u64 requested_address_range[2]; 1595 u64 actual_address_range[2]; 1596 u16 flags; 1597 u8 requested_speed; 1598 }; 1599 1600 /* Masks for Flags and Speed fields above */ 1601 1602 #define ACPI_RASF_SCRUBBER_RUNNING 1 1603 #define ACPI_RASF_SPEED (7<<1) 1604 #define ACPI_RASF_SPEED_SLOW (0<<1) 1605 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 1606 #define ACPI_RASF_SPEED_FAST (7<<1) 1607 1608 /* Channel Commands */ 1609 1610 enum acpi_rasf_commands { 1611 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1612 }; 1613 1614 /* Platform RAS Capabilities */ 1615 1616 enum acpi_rasf_capabiliities { 1617 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 1618 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 1619 }; 1620 1621 /* Patrol Scrub Commands */ 1622 1623 enum acpi_rasf_patrol_scrub_commands { 1624 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 1625 ACPI_RASF_START_PATROL_SCRUBBER = 2, 1626 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 1627 }; 1628 1629 /* Channel Command flags */ 1630 1631 #define ACPI_RASF_GENERATE_SCI (1<<15) 1632 1633 /* Status values */ 1634 1635 enum acpi_rasf_status { 1636 ACPI_RASF_SUCCESS = 0, 1637 ACPI_RASF_NOT_VALID = 1, 1638 ACPI_RASF_NOT_SUPPORTED = 2, 1639 ACPI_RASF_BUSY = 3, 1640 ACPI_RASF_FAILED = 4, 1641 ACPI_RASF_ABORTED = 5, 1642 ACPI_RASF_INVALID_DATA = 6 1643 }; 1644 1645 /* Status flags */ 1646 1647 #define ACPI_RASF_COMMAND_COMPLETE (1) 1648 #define ACPI_RASF_SCI_DOORBELL (1<<1) 1649 #define ACPI_RASF_ERROR (1<<2) 1650 #define ACPI_RASF_STATUS (0x1F<<3) 1651 1652 /******************************************************************************* 1653 * 1654 * SBST - Smart Battery Specification Table 1655 * Version 1 1656 * 1657 ******************************************************************************/ 1658 1659 struct acpi_table_sbst { 1660 struct acpi_table_header header; /* Common ACPI table header */ 1661 u32 warning_level; 1662 u32 low_level; 1663 u32 critical_level; 1664 }; 1665 1666 /******************************************************************************* 1667 * 1668 * SDEI - Software Delegated Exception Interface Descriptor Table 1669 * 1670 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 1671 * May 8th, 2017. Copyright 2017 ARM Ltd. 1672 * 1673 ******************************************************************************/ 1674 1675 struct acpi_table_sdei { 1676 struct acpi_table_header header; /* Common ACPI table header */ 1677 }; 1678 1679 /******************************************************************************* 1680 * 1681 * SDEV - Secure Devices Table (ACPI 6.2) 1682 * Version 1 1683 * 1684 ******************************************************************************/ 1685 1686 struct acpi_table_sdev { 1687 struct acpi_table_header header; /* Common ACPI table header */ 1688 }; 1689 1690 struct acpi_sdev_header { 1691 u8 type; 1692 u8 flags; 1693 u16 length; 1694 }; 1695 1696 /* Values for subtable type above */ 1697 1698 enum acpi_sdev_type { 1699 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 1700 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 1701 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1702 }; 1703 1704 /* Values for flags above */ 1705 1706 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 1707 1708 /* 1709 * SDEV subtables 1710 */ 1711 1712 /* 0: Namespace Device Based Secure Device Structure */ 1713 1714 struct acpi_sdev_namespace { 1715 struct acpi_sdev_header header; 1716 u16 device_id_offset; 1717 u16 device_id_length; 1718 u16 vendor_data_offset; 1719 u16 vendor_data_length; 1720 }; 1721 1722 /* 1: PCIe Endpoint Device Based Device Structure */ 1723 1724 struct acpi_sdev_pcie { 1725 struct acpi_sdev_header header; 1726 u16 segment; 1727 u16 start_bus; 1728 u16 path_offset; 1729 u16 path_length; 1730 u16 vendor_data_offset; 1731 u16 vendor_data_length; 1732 }; 1733 1734 /* 1a: PCIe Endpoint path entry */ 1735 1736 struct acpi_sdev_pcie_path { 1737 u8 device; 1738 u8 function; 1739 }; 1740 1741 /* Reset to default packing */ 1742 1743 #pragma pack() 1744 1745 #endif /* __ACTBL2_H__ */ 1746