1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 50 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 51 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 52 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 53 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 54 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 55 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 56 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 57 58 /* 59 * All tables must be byte-packed to match the ACPI specification, since 60 * the tables are provided by the system BIOS. 61 */ 62 #pragma pack(1) 63 64 /* 65 * Note: C bitfields are not used for this reason: 66 * 67 * "Bitfields are great and easy to read, but unfortunately the C language 68 * does not specify the layout of bitfields in memory, which means they are 69 * essentially useless for dealing with packed data in on-disk formats or 70 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 71 * this decision was a design error in C. Ritchie could have picked an order 72 * and stuck with it." Norman Ramsey. 73 * See http://stackoverflow.com/a/1053662/41661 74 */ 75 76 /******************************************************************************* 77 * 78 * AEST - Arm Error Source Table 79 * 80 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 81 * September 2020. 82 * 83 ******************************************************************************/ 84 85 struct acpi_table_aest { 86 struct acpi_table_header header; 87 }; 88 89 /* Common Subtable header - one per Node Structure (Subtable) */ 90 91 struct acpi_aest_hdr { 92 u8 type; 93 u16 length; 94 u8 reserved; 95 u32 node_specific_offset; 96 u32 node_interface_offset; 97 u32 node_interrupt_offset; 98 u32 node_interrupt_count; 99 u64 timestamp_rate; 100 u64 reserved1; 101 u64 error_injection_rate; 102 }; 103 104 /* Values for Type above */ 105 106 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 107 #define ACPI_AEST_MEMORY_ERROR_NODE 1 108 #define ACPI_AEST_SMMU_ERROR_NODE 2 109 #define ACPI_AEST_VENDOR_ERROR_NODE 3 110 #define ACPI_AEST_GIC_ERROR_NODE 4 111 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 112 113 /* 114 * AEST subtables (Error nodes) 115 */ 116 117 /* 0: Processor Error */ 118 119 typedef struct acpi_aest_processor { 120 u32 processor_id; 121 u8 resource_type; 122 u8 reserved; 123 u8 flags; 124 u8 revision; 125 u64 processor_affinity; 126 127 } acpi_aest_processor; 128 129 /* Values for resource_type above, related structs below */ 130 131 #define ACPI_AEST_CACHE_RESOURCE 0 132 #define ACPI_AEST_TLB_RESOURCE 1 133 #define ACPI_AEST_GENERIC_RESOURCE 2 134 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 135 136 /* 0R: Processor Cache Resource Substructure */ 137 138 typedef struct acpi_aest_processor_cache { 139 u32 cache_reference; 140 u32 reserved; 141 142 } acpi_aest_processor_cache; 143 144 /* Values for cache_type above */ 145 146 #define ACPI_AEST_CACHE_DATA 0 147 #define ACPI_AEST_CACHE_INSTRUCTION 1 148 #define ACPI_AEST_CACHE_UNIFIED 2 149 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 150 151 /* 1R: Processor TLB Resource Substructure */ 152 153 typedef struct acpi_aest_processor_tlb { 154 u32 tlb_level; 155 u32 reserved; 156 157 } acpi_aest_processor_tlb; 158 159 /* 2R: Processor Generic Resource Substructure */ 160 161 typedef struct acpi_aest_processor_generic { 162 u32 resource; 163 164 } acpi_aest_processor_generic; 165 166 /* 1: Memory Error */ 167 168 typedef struct acpi_aest_memory { 169 u32 srat_proximity_domain; 170 171 } acpi_aest_memory; 172 173 /* 2: Smmu Error */ 174 175 typedef struct acpi_aest_smmu { 176 u32 iort_node_reference; 177 u32 subcomponent_reference; 178 179 } acpi_aest_smmu; 180 181 /* 3: Vendor Defined */ 182 183 typedef struct acpi_aest_vendor { 184 u32 acpi_hid; 185 u32 acpi_uid; 186 u8 vendor_specific_data[16]; 187 188 } acpi_aest_vendor; 189 190 /* 4: Gic Error */ 191 192 typedef struct acpi_aest_gic { 193 u32 interface_type; 194 u32 instance_id; 195 196 } acpi_aest_gic; 197 198 /* Values for interface_type above */ 199 200 #define ACPI_AEST_GIC_CPU 0 201 #define ACPI_AEST_GIC_DISTRIBUTOR 1 202 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 203 #define ACPI_AEST_GIC_ITS 3 204 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 205 206 /* Node Interface Structure */ 207 208 typedef struct acpi_aest_node_interface { 209 u8 type; 210 u8 reserved[3]; 211 u32 flags; 212 u64 address; 213 u32 error_record_index; 214 u32 error_record_count; 215 u64 error_record_implemented; 216 u64 error_status_reporting; 217 u64 addressing_mode; 218 219 } acpi_aest_node_interface; 220 221 /* Values for Type field above */ 222 223 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 224 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 225 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 226 227 /* Node Interrupt Structure */ 228 229 typedef struct acpi_aest_node_interrupt { 230 u8 type; 231 u8 reserved[2]; 232 u8 flags; 233 u32 gsiv; 234 u8 iort_id; 235 u8 reserved1[3]; 236 237 } acpi_aest_node_interrupt; 238 239 /* Values for Type field above */ 240 241 #define ACPI_AEST_NODE_FAULT_HANDLING 0 242 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 243 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 244 245 /******************************************************************************* 246 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 247 * 248 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 249 * ARM DEN0093 v1.1 250 * 251 ******************************************************************************/ 252 struct acpi_table_agdi { 253 struct acpi_table_header header; /* Common ACPI table header */ 254 u8 flags; 255 u8 reserved[3]; 256 u32 sdei_event; 257 u32 gsiv; 258 }; 259 260 /* Mask for Flags field above */ 261 262 #define ACPI_AGDI_SIGNALING_MODE (1) 263 264 /******************************************************************************* 265 * 266 * APMT - ARM Performance Monitoring Unit Table 267 * 268 * Conforms to: 269 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 270 * ARM DEN0117 v1.0 November 25, 2021 271 * 272 ******************************************************************************/ 273 274 struct acpi_table_apmt { 275 struct acpi_table_header header; /* Common ACPI table header */ 276 }; 277 278 #define ACPI_APMT_NODE_ID_LENGTH 4 279 280 /* 281 * APMT subtables 282 */ 283 struct acpi_apmt_node { 284 u16 length; 285 u8 flags; 286 u8 type; 287 u32 id; 288 u64 inst_primary; 289 u32 inst_secondary; 290 u64 base_address0; 291 u64 base_address1; 292 u32 ovflw_irq; 293 u32 reserved; 294 u32 ovflw_irq_flags; 295 u32 proc_affinity; 296 u32 impl_id; 297 }; 298 299 /* Masks for Flags field above */ 300 301 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 302 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 303 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 304 305 /* Values for Flags dual page field above */ 306 307 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 308 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 309 310 /* Values for Flags processor affinity field above */ 311 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 312 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 313 314 /* Values for Flags 64-bit atomic field above */ 315 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 316 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 317 318 /* Values for Type field above */ 319 320 enum acpi_apmt_node_type { 321 ACPI_APMT_NODE_TYPE_MC = 0x00, 322 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 323 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 324 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 325 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 326 ACPI_APMT_NODE_TYPE_COUNT 327 }; 328 329 /* Masks for ovflw_irq_flags field above */ 330 331 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 332 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 333 334 /* Values for ovflw_irq_flags mode field above */ 335 336 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 337 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 338 339 /* Values for ovflw_irq_flags type field above */ 340 341 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 342 343 /******************************************************************************* 344 * 345 * BDAT - BIOS Data ACPI Table 346 * 347 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 348 * Nov 2020 349 * 350 ******************************************************************************/ 351 352 struct acpi_table_bdat { 353 struct acpi_table_header header; 354 struct acpi_generic_address gas; 355 }; 356 357 /******************************************************************************* 358 * 359 * CCEL - CC-Event Log 360 * From: "Guest-Host-Communication Interface (GHCI) for Intel 361 * Trust Domain Extensions (Intel TDX)". Feb 2022 362 * 363 ******************************************************************************/ 364 365 struct acpi_table_ccel { 366 struct acpi_table_header header; /* Common ACPI table header */ 367 u8 CCtype; 368 u8 Ccsub_type; 369 u16 reserved; 370 u64 log_area_minimum_length; 371 u64 log_area_start_address; 372 }; 373 374 /******************************************************************************* 375 * 376 * IORT - IO Remapping Table 377 * 378 * Conforms to "IO Remapping Table System Software on ARM Platforms", 379 * Document number: ARM DEN 0049E.e, Sep 2022 380 * 381 ******************************************************************************/ 382 383 struct acpi_table_iort { 384 struct acpi_table_header header; 385 u32 node_count; 386 u32 node_offset; 387 u32 reserved; 388 }; 389 390 /* 391 * IORT subtables 392 */ 393 struct acpi_iort_node { 394 u8 type; 395 u16 length; 396 u8 revision; 397 u32 identifier; 398 u32 mapping_count; 399 u32 mapping_offset; 400 char node_data[]; 401 }; 402 403 /* Values for subtable Type above */ 404 405 enum acpi_iort_node_type { 406 ACPI_IORT_NODE_ITS_GROUP = 0x00, 407 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 408 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 409 ACPI_IORT_NODE_SMMU = 0x03, 410 ACPI_IORT_NODE_SMMU_V3 = 0x04, 411 ACPI_IORT_NODE_PMCG = 0x05, 412 ACPI_IORT_NODE_RMR = 0x06, 413 }; 414 415 struct acpi_iort_id_mapping { 416 u32 input_base; /* Lowest value in input range */ 417 u32 id_count; /* Number of IDs */ 418 u32 output_base; /* Lowest value in output range */ 419 u32 output_reference; /* A reference to the output node */ 420 u32 flags; 421 }; 422 423 /* Masks for Flags field above for IORT subtable */ 424 425 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 426 427 struct acpi_iort_memory_access { 428 u32 cache_coherency; 429 u8 hints; 430 u16 reserved; 431 u8 memory_flags; 432 }; 433 434 /* Values for cache_coherency field above */ 435 436 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 437 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 438 439 /* Masks for Hints field above */ 440 441 #define ACPI_IORT_HT_TRANSIENT (1) 442 #define ACPI_IORT_HT_WRITE (1<<1) 443 #define ACPI_IORT_HT_READ (1<<2) 444 #define ACPI_IORT_HT_OVERRIDE (1<<3) 445 446 /* Masks for memory_flags field above */ 447 448 #define ACPI_IORT_MF_COHERENCY (1) 449 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 450 451 /* 452 * IORT node specific subtables 453 */ 454 struct acpi_iort_its_group { 455 u32 its_count; 456 u32 identifiers[]; /* GIC ITS identifier array */ 457 }; 458 459 struct acpi_iort_named_component { 460 u32 node_flags; 461 u64 memory_properties; /* Memory access properties */ 462 u8 memory_address_limit; /* Memory address size limit */ 463 char device_name[]; /* Path of namespace object */ 464 }; 465 466 /* Masks for Flags field above */ 467 468 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 469 #define ACPI_IORT_NC_PASID_BITS (31<<1) 470 471 struct acpi_iort_root_complex { 472 u64 memory_properties; /* Memory access properties */ 473 u32 ats_attribute; 474 u32 pci_segment_number; 475 u8 memory_address_limit; /* Memory address size limit */ 476 u16 pasid_capabilities; /* PASID Capabilities */ 477 u8 reserved[]; /* Reserved, must be zero */ 478 }; 479 480 /* Masks for ats_attribute field above */ 481 482 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 483 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 484 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 485 486 /* Masks for pasid_capabilities field above */ 487 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 488 489 struct acpi_iort_smmu { 490 u64 base_address; /* SMMU base address */ 491 u64 span; /* Length of memory range */ 492 u32 model; 493 u32 flags; 494 u32 global_interrupt_offset; 495 u32 context_interrupt_count; 496 u32 context_interrupt_offset; 497 u32 pmu_interrupt_count; 498 u32 pmu_interrupt_offset; 499 u64 interrupts[]; /* Interrupt array */ 500 }; 501 502 /* Values for Model field above */ 503 504 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 505 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 506 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 507 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 508 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 509 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 510 511 /* Masks for Flags field above */ 512 513 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 514 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 515 516 /* Global interrupt format */ 517 518 struct acpi_iort_smmu_gsi { 519 u32 nsg_irpt; 520 u32 nsg_irpt_flags; 521 u32 nsg_cfg_irpt; 522 u32 nsg_cfg_irpt_flags; 523 }; 524 525 struct acpi_iort_smmu_v3 { 526 u64 base_address; /* SMMUv3 base address */ 527 u32 flags; 528 u32 reserved; 529 u64 vatos_address; 530 u32 model; 531 u32 event_gsiv; 532 u32 pri_gsiv; 533 u32 gerr_gsiv; 534 u32 sync_gsiv; 535 u32 pxm; 536 u32 id_mapping_index; 537 }; 538 539 /* Values for Model field above */ 540 541 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 542 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 543 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 544 545 /* Masks for Flags field above */ 546 547 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 548 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 549 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 550 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 551 552 struct acpi_iort_pmcg { 553 u64 page0_base_address; 554 u32 overflow_gsiv; 555 u32 node_reference; 556 u64 page1_base_address; 557 }; 558 559 struct acpi_iort_rmr { 560 u32 flags; 561 u32 rmr_count; 562 u32 rmr_offset; 563 }; 564 565 /* Masks for Flags field above */ 566 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 567 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 568 569 /* 570 * Macro to access the Access Attributes in flags field above: 571 * Access Attributes is encoded in bits 9:2 572 */ 573 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 574 575 /* Values for above Access Attributes */ 576 577 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 578 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 579 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 580 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 581 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 582 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 583 584 struct acpi_iort_rmr_desc { 585 u64 base_address; 586 u64 length; 587 u32 reserved; 588 }; 589 590 /******************************************************************************* 591 * 592 * IVRS - I/O Virtualization Reporting Structure 593 * Version 1 594 * 595 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 596 * Revision 1.26, February 2009. 597 * 598 ******************************************************************************/ 599 600 struct acpi_table_ivrs { 601 struct acpi_table_header header; /* Common ACPI table header */ 602 u32 info; /* Common virtualization info */ 603 u64 reserved; 604 }; 605 606 /* Values for Info field above */ 607 608 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 609 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 610 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 611 612 /* IVRS subtable header */ 613 614 struct acpi_ivrs_header { 615 u8 type; /* Subtable type */ 616 u8 flags; 617 u16 length; /* Subtable length */ 618 u16 device_id; /* ID of IOMMU */ 619 }; 620 621 /* Values for subtable Type above */ 622 623 enum acpi_ivrs_type { 624 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 625 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 626 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 627 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 628 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 629 ACPI_IVRS_TYPE_MEMORY3 = 0x22 630 }; 631 632 /* Masks for Flags field above for IVHD subtable */ 633 634 #define ACPI_IVHD_TT_ENABLE (1) 635 #define ACPI_IVHD_PASS_PW (1<<1) 636 #define ACPI_IVHD_RES_PASS_PW (1<<2) 637 #define ACPI_IVHD_ISOC (1<<3) 638 #define ACPI_IVHD_IOTLB (1<<4) 639 640 /* Masks for Flags field above for IVMD subtable */ 641 642 #define ACPI_IVMD_UNITY (1) 643 #define ACPI_IVMD_READ (1<<1) 644 #define ACPI_IVMD_WRITE (1<<2) 645 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 646 647 /* 648 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 649 */ 650 651 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 652 653 struct acpi_ivrs_hardware_10 { 654 struct acpi_ivrs_header header; 655 u16 capability_offset; /* Offset for IOMMU control fields */ 656 u64 base_address; /* IOMMU control registers */ 657 u16 pci_segment_group; 658 u16 info; /* MSI number and unit ID */ 659 u32 feature_reporting; 660 }; 661 662 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 663 664 struct acpi_ivrs_hardware_11 { 665 struct acpi_ivrs_header header; 666 u16 capability_offset; /* Offset for IOMMU control fields */ 667 u64 base_address; /* IOMMU control registers */ 668 u16 pci_segment_group; 669 u16 info; /* MSI number and unit ID */ 670 u32 attributes; 671 u64 efr_register_image; 672 u64 reserved; 673 }; 674 675 /* Masks for Info field above */ 676 677 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 678 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 679 680 /* 681 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 682 * Upper two bits of the Type field are the (encoded) length of the structure. 683 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 684 * are reserved for future use but not defined. 685 */ 686 struct acpi_ivrs_de_header { 687 u8 type; 688 u16 id; 689 u8 data_setting; 690 }; 691 692 /* Length of device entry is in the top two bits of Type field above */ 693 694 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 695 696 /* Values for device entry Type field above */ 697 698 enum acpi_ivrs_device_entry_type { 699 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 700 701 ACPI_IVRS_TYPE_PAD4 = 0, 702 ACPI_IVRS_TYPE_ALL = 1, 703 ACPI_IVRS_TYPE_SELECT = 2, 704 ACPI_IVRS_TYPE_START = 3, 705 ACPI_IVRS_TYPE_END = 4, 706 707 /* 8-byte device entries */ 708 709 ACPI_IVRS_TYPE_PAD8 = 64, 710 ACPI_IVRS_TYPE_NOT_USED = 65, 711 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 712 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 713 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 714 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 715 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 716 717 /* Variable-length device entries */ 718 719 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 720 }; 721 722 /* Values for Data field above */ 723 724 #define ACPI_IVHD_INIT_PASS (1) 725 #define ACPI_IVHD_EINT_PASS (1<<1) 726 #define ACPI_IVHD_NMI_PASS (1<<2) 727 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 728 #define ACPI_IVHD_LINT0_PASS (1<<6) 729 #define ACPI_IVHD_LINT1_PASS (1<<7) 730 731 /* Types 0-4: 4-byte device entry */ 732 733 struct acpi_ivrs_device4 { 734 struct acpi_ivrs_de_header header; 735 }; 736 737 /* Types 66-67: 8-byte device entry */ 738 739 struct acpi_ivrs_device8a { 740 struct acpi_ivrs_de_header header; 741 u8 reserved1; 742 u16 used_id; 743 u8 reserved2; 744 }; 745 746 /* Types 70-71: 8-byte device entry */ 747 748 struct acpi_ivrs_device8b { 749 struct acpi_ivrs_de_header header; 750 u32 extended_data; 751 }; 752 753 /* Values for extended_data above */ 754 755 #define ACPI_IVHD_ATS_DISABLED (1<<31) 756 757 /* Type 72: 8-byte device entry */ 758 759 struct acpi_ivrs_device8c { 760 struct acpi_ivrs_de_header header; 761 u8 handle; 762 u16 used_id; 763 u8 variety; 764 }; 765 766 /* Values for Variety field above */ 767 768 #define ACPI_IVHD_IOAPIC 1 769 #define ACPI_IVHD_HPET 2 770 771 /* Type 240: variable-length device entry */ 772 773 struct acpi_ivrs_device_hid { 774 struct acpi_ivrs_de_header header; 775 u64 acpi_hid; 776 u64 acpi_cid; 777 u8 uid_type; 778 u8 uid_length; 779 }; 780 781 /* Values for uid_type above */ 782 783 #define ACPI_IVRS_UID_NOT_PRESENT 0 784 #define ACPI_IVRS_UID_IS_INTEGER 1 785 #define ACPI_IVRS_UID_IS_STRING 2 786 787 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 788 789 struct acpi_ivrs_memory { 790 struct acpi_ivrs_header header; 791 u16 aux_data; 792 u64 reserved; 793 u64 start_address; 794 u64 memory_length; 795 }; 796 797 /******************************************************************************* 798 * 799 * LPIT - Low Power Idle Table 800 * 801 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 802 * 803 ******************************************************************************/ 804 805 struct acpi_table_lpit { 806 struct acpi_table_header header; /* Common ACPI table header */ 807 }; 808 809 /* LPIT subtable header */ 810 811 struct acpi_lpit_header { 812 u32 type; /* Subtable type */ 813 u32 length; /* Subtable length */ 814 u16 unique_id; 815 u16 reserved; 816 u32 flags; 817 }; 818 819 /* Values for subtable Type above */ 820 821 enum acpi_lpit_type { 822 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 823 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 824 }; 825 826 /* Masks for Flags field above */ 827 828 #define ACPI_LPIT_STATE_DISABLED (1) 829 #define ACPI_LPIT_NO_COUNTER (1<<1) 830 831 /* 832 * LPIT subtables, correspond to Type in struct acpi_lpit_header 833 */ 834 835 /* 0x00: Native C-state instruction based LPI structure */ 836 837 struct acpi_lpit_native { 838 struct acpi_lpit_header header; 839 struct acpi_generic_address entry_trigger; 840 u32 residency; 841 u32 latency; 842 struct acpi_generic_address residency_counter; 843 u64 counter_frequency; 844 }; 845 846 /******************************************************************************* 847 * 848 * MADT - Multiple APIC Description Table 849 * Version 3 850 * 851 ******************************************************************************/ 852 853 struct acpi_table_madt { 854 struct acpi_table_header header; /* Common ACPI table header */ 855 u32 address; /* Physical address of local APIC */ 856 u32 flags; 857 }; 858 859 /* Masks for Flags field above */ 860 861 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 862 863 /* Values for PCATCompat flag */ 864 865 #define ACPI_MADT_DUAL_PIC 1 866 #define ACPI_MADT_MULTIPLE_APIC 0 867 868 /* Values for MADT subtable type in struct acpi_subtable_header */ 869 870 enum acpi_madt_type { 871 ACPI_MADT_TYPE_LOCAL_APIC = 0, 872 ACPI_MADT_TYPE_IO_APIC = 1, 873 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 874 ACPI_MADT_TYPE_NMI_SOURCE = 3, 875 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 876 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 877 ACPI_MADT_TYPE_IO_SAPIC = 6, 878 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 879 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 880 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 881 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 882 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 883 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 884 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 885 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 886 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 887 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 888 ACPI_MADT_TYPE_CORE_PIC = 17, 889 ACPI_MADT_TYPE_LIO_PIC = 18, 890 ACPI_MADT_TYPE_HT_PIC = 19, 891 ACPI_MADT_TYPE_EIO_PIC = 20, 892 ACPI_MADT_TYPE_MSI_PIC = 21, 893 ACPI_MADT_TYPE_BIO_PIC = 22, 894 ACPI_MADT_TYPE_LPC_PIC = 23, 895 ACPI_MADT_TYPE_RINTC = 24, 896 ACPI_MADT_TYPE_IMSIC = 25, 897 ACPI_MADT_TYPE_APLIC = 26, 898 ACPI_MADT_TYPE_PLIC = 27, 899 ACPI_MADT_TYPE_RESERVED = 28, /* 28 to 0x7F are reserved */ 900 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 901 }; 902 903 /* 904 * MADT Subtables, correspond to Type in struct acpi_subtable_header 905 */ 906 907 /* 0: Processor Local APIC */ 908 909 struct acpi_madt_local_apic { 910 struct acpi_subtable_header header; 911 u8 processor_id; /* ACPI processor id */ 912 u8 id; /* Processor's local APIC id */ 913 u32 lapic_flags; 914 }; 915 916 /* 1: IO APIC */ 917 918 struct acpi_madt_io_apic { 919 struct acpi_subtable_header header; 920 u8 id; /* I/O APIC ID */ 921 u8 reserved; /* reserved - must be zero */ 922 u32 address; /* APIC physical address */ 923 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 924 }; 925 926 /* 2: Interrupt Override */ 927 928 struct acpi_madt_interrupt_override { 929 struct acpi_subtable_header header; 930 u8 bus; /* 0 - ISA */ 931 u8 source_irq; /* Interrupt source (IRQ) */ 932 u32 global_irq; /* Global system interrupt */ 933 u16 inti_flags; 934 }; 935 936 /* 3: NMI Source */ 937 938 struct acpi_madt_nmi_source { 939 struct acpi_subtable_header header; 940 u16 inti_flags; 941 u32 global_irq; /* Global system interrupt */ 942 }; 943 944 /* 4: Local APIC NMI */ 945 946 struct acpi_madt_local_apic_nmi { 947 struct acpi_subtable_header header; 948 u8 processor_id; /* ACPI processor id */ 949 u16 inti_flags; 950 u8 lint; /* LINTn to which NMI is connected */ 951 }; 952 953 /* 5: Address Override */ 954 955 struct acpi_madt_local_apic_override { 956 struct acpi_subtable_header header; 957 u16 reserved; /* Reserved, must be zero */ 958 u64 address; /* APIC physical address */ 959 }; 960 961 /* 6: I/O Sapic */ 962 963 struct acpi_madt_io_sapic { 964 struct acpi_subtable_header header; 965 u8 id; /* I/O SAPIC ID */ 966 u8 reserved; /* Reserved, must be zero */ 967 u32 global_irq_base; /* Global interrupt for SAPIC start */ 968 u64 address; /* SAPIC physical address */ 969 }; 970 971 /* 7: Local Sapic */ 972 973 struct acpi_madt_local_sapic { 974 struct acpi_subtable_header header; 975 u8 processor_id; /* ACPI processor id */ 976 u8 id; /* SAPIC ID */ 977 u8 eid; /* SAPIC EID */ 978 u8 reserved[3]; /* Reserved, must be zero */ 979 u32 lapic_flags; 980 u32 uid; /* Numeric UID - ACPI 3.0 */ 981 char uid_string[]; /* String UID - ACPI 3.0 */ 982 }; 983 984 /* 8: Platform Interrupt Source */ 985 986 struct acpi_madt_interrupt_source { 987 struct acpi_subtable_header header; 988 u16 inti_flags; 989 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 990 u8 id; /* Processor ID */ 991 u8 eid; /* Processor EID */ 992 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 993 u32 global_irq; /* Global system interrupt */ 994 u32 flags; /* Interrupt Source Flags */ 995 }; 996 997 /* Masks for Flags field above */ 998 999 #define ACPI_MADT_CPEI_OVERRIDE (1) 1000 1001 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1002 1003 struct acpi_madt_local_x2apic { 1004 struct acpi_subtable_header header; 1005 u16 reserved; /* reserved - must be zero */ 1006 u32 local_apic_id; /* Processor x2APIC ID */ 1007 u32 lapic_flags; 1008 u32 uid; /* ACPI processor UID */ 1009 }; 1010 1011 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1012 1013 struct acpi_madt_local_x2apic_nmi { 1014 struct acpi_subtable_header header; 1015 u16 inti_flags; 1016 u32 uid; /* ACPI processor UID */ 1017 u8 lint; /* LINTn to which NMI is connected */ 1018 u8 reserved[3]; /* reserved - must be zero */ 1019 }; 1020 1021 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1022 1023 struct acpi_madt_generic_interrupt { 1024 struct acpi_subtable_header header; 1025 u16 reserved; /* reserved - must be zero */ 1026 u32 cpu_interface_number; 1027 u32 uid; 1028 u32 flags; 1029 u32 parking_version; 1030 u32 performance_interrupt; 1031 u64 parked_address; 1032 u64 base_address; 1033 u64 gicv_base_address; 1034 u64 gich_base_address; 1035 u32 vgic_interrupt; 1036 u64 gicr_base_address; 1037 u64 arm_mpidr; 1038 u8 efficiency_class; 1039 u8 reserved2[1]; 1040 u16 spe_interrupt; /* ACPI 6.3 */ 1041 u16 trbe_interrupt; /* ACPI 6.5 */ 1042 }; 1043 1044 /* Masks for Flags field above */ 1045 1046 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1047 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1048 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1049 1050 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1051 1052 struct acpi_madt_generic_distributor { 1053 struct acpi_subtable_header header; 1054 u16 reserved; /* reserved - must be zero */ 1055 u32 gic_id; 1056 u64 base_address; 1057 u32 global_irq_base; 1058 u8 version; 1059 u8 reserved2[3]; /* reserved - must be zero */ 1060 }; 1061 1062 /* Values for Version field above */ 1063 1064 enum acpi_madt_gic_version { 1065 ACPI_MADT_GIC_VERSION_NONE = 0, 1066 ACPI_MADT_GIC_VERSION_V1 = 1, 1067 ACPI_MADT_GIC_VERSION_V2 = 2, 1068 ACPI_MADT_GIC_VERSION_V3 = 3, 1069 ACPI_MADT_GIC_VERSION_V4 = 4, 1070 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1071 }; 1072 1073 /* 13: Generic MSI Frame (ACPI 5.1) */ 1074 1075 struct acpi_madt_generic_msi_frame { 1076 struct acpi_subtable_header header; 1077 u16 reserved; /* reserved - must be zero */ 1078 u32 msi_frame_id; 1079 u64 base_address; 1080 u32 flags; 1081 u16 spi_count; 1082 u16 spi_base; 1083 }; 1084 1085 /* Masks for Flags field above */ 1086 1087 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1088 1089 /* 14: Generic Redistributor (ACPI 5.1) */ 1090 1091 struct acpi_madt_generic_redistributor { 1092 struct acpi_subtable_header header; 1093 u16 reserved; /* reserved - must be zero */ 1094 u64 base_address; 1095 u32 length; 1096 }; 1097 1098 /* 15: Generic Translator (ACPI 6.0) */ 1099 1100 struct acpi_madt_generic_translator { 1101 struct acpi_subtable_header header; 1102 u16 reserved; /* reserved - must be zero */ 1103 u32 translation_id; 1104 u64 base_address; 1105 u32 reserved2; 1106 }; 1107 1108 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1109 1110 struct acpi_madt_multiproc_wakeup { 1111 struct acpi_subtable_header header; 1112 u16 mailbox_version; 1113 u32 reserved; /* reserved - must be zero */ 1114 u64 base_address; 1115 }; 1116 1117 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1118 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1119 1120 struct acpi_madt_multiproc_wakeup_mailbox { 1121 u16 command; 1122 u16 reserved; /* reserved - must be zero */ 1123 u32 apic_id; 1124 u64 wakeup_vector; 1125 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1126 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1127 }; 1128 1129 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1130 1131 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1132 1133 struct acpi_madt_core_pic { 1134 struct acpi_subtable_header header; 1135 u8 version; 1136 u32 processor_id; 1137 u32 core_id; 1138 u32 flags; 1139 }; 1140 1141 /* Values for Version field above */ 1142 1143 enum acpi_madt_core_pic_version { 1144 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1145 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1146 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1147 }; 1148 1149 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1150 1151 struct acpi_madt_lio_pic { 1152 struct acpi_subtable_header header; 1153 u8 version; 1154 u64 address; 1155 u16 size; 1156 u8 cascade[2]; 1157 u32 cascade_map[2]; 1158 }; 1159 1160 /* Values for Version field above */ 1161 1162 enum acpi_madt_lio_pic_version { 1163 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1164 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1165 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1166 }; 1167 1168 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1169 1170 struct acpi_madt_ht_pic { 1171 struct acpi_subtable_header header; 1172 u8 version; 1173 u64 address; 1174 u16 size; 1175 u8 cascade[8]; 1176 }; 1177 1178 /* Values for Version field above */ 1179 1180 enum acpi_madt_ht_pic_version { 1181 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1182 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1183 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1184 }; 1185 1186 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1187 1188 struct acpi_madt_eio_pic { 1189 struct acpi_subtable_header header; 1190 u8 version; 1191 u8 cascade; 1192 u8 node; 1193 u64 node_map; 1194 }; 1195 1196 /* Values for Version field above */ 1197 1198 enum acpi_madt_eio_pic_version { 1199 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1200 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1201 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1202 }; 1203 1204 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1205 1206 struct acpi_madt_msi_pic { 1207 struct acpi_subtable_header header; 1208 u8 version; 1209 u64 msg_address; 1210 u32 start; 1211 u32 count; 1212 }; 1213 1214 /* Values for Version field above */ 1215 1216 enum acpi_madt_msi_pic_version { 1217 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1218 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1219 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1220 }; 1221 1222 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1223 1224 struct acpi_madt_bio_pic { 1225 struct acpi_subtable_header header; 1226 u8 version; 1227 u64 address; 1228 u16 size; 1229 u16 id; 1230 u16 gsi_base; 1231 }; 1232 1233 /* Values for Version field above */ 1234 1235 enum acpi_madt_bio_pic_version { 1236 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1237 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1238 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1239 }; 1240 1241 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1242 1243 struct acpi_madt_lpc_pic { 1244 struct acpi_subtable_header header; 1245 u8 version; 1246 u64 address; 1247 u16 size; 1248 u8 cascade; 1249 }; 1250 1251 /* Values for Version field above */ 1252 1253 enum acpi_madt_lpc_pic_version { 1254 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1255 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1256 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1257 }; 1258 1259 /* 24: RISC-V INTC */ 1260 struct acpi_madt_rintc { 1261 struct acpi_subtable_header header; 1262 u8 version; 1263 u8 reserved; 1264 u32 flags; 1265 u64 hart_id; 1266 u32 uid; /* ACPI processor UID */ 1267 u32 ext_intc_id; /* External INTC Id */ 1268 u64 imsic_addr; /* IMSIC base address */ 1269 u32 imsic_size; /* IMSIC size */ 1270 }; 1271 1272 /* Values for RISC-V INTC Version field above */ 1273 1274 enum acpi_madt_rintc_version { 1275 ACPI_MADT_RINTC_VERSION_NONE = 0, 1276 ACPI_MADT_RINTC_VERSION_V1 = 1, 1277 ACPI_MADT_RINTC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1278 }; 1279 1280 /* 25: RISC-V IMSIC */ 1281 struct acpi_madt_imsic { 1282 struct acpi_subtable_header header; 1283 u8 version; 1284 u8 reserved; 1285 u32 flags; 1286 u16 num_ids; 1287 u16 num_guest_ids; 1288 u8 guest_index_bits; 1289 u8 hart_index_bits; 1290 u8 group_index_bits; 1291 u8 group_index_shift; 1292 }; 1293 1294 /* 26: RISC-V APLIC */ 1295 struct acpi_madt_aplic { 1296 struct acpi_subtable_header header; 1297 u8 version; 1298 u8 id; 1299 u32 flags; 1300 u8 hw_id[8]; 1301 u16 num_idcs; 1302 u16 num_sources; 1303 u32 gsi_base; 1304 u64 base_addr; 1305 u32 size; 1306 }; 1307 1308 /* 27: RISC-V PLIC */ 1309 struct acpi_madt_plic { 1310 struct acpi_subtable_header header; 1311 u8 version; 1312 u8 id; 1313 u8 hw_id[8]; 1314 u16 num_irqs; 1315 u16 max_prio; 1316 u32 flags; 1317 u32 size; 1318 u64 base_addr; 1319 u32 gsi_base; 1320 }; 1321 1322 /* 80: OEM data */ 1323 1324 struct acpi_madt_oem_data { 1325 ACPI_FLEX_ARRAY(u8, oem_data); 1326 }; 1327 1328 /* 1329 * Common flags fields for MADT subtables 1330 */ 1331 1332 /* MADT Local APIC flags */ 1333 1334 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1335 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1336 1337 /* MADT MPS INTI flags (inti_flags) */ 1338 1339 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1340 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1341 1342 /* Values for MPS INTI flags */ 1343 1344 #define ACPI_MADT_POLARITY_CONFORMS 0 1345 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1346 #define ACPI_MADT_POLARITY_RESERVED 2 1347 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1348 1349 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1350 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1351 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1352 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1353 1354 /******************************************************************************* 1355 * 1356 * MCFG - PCI Memory Mapped Configuration table and subtable 1357 * Version 1 1358 * 1359 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1360 * 1361 ******************************************************************************/ 1362 1363 struct acpi_table_mcfg { 1364 struct acpi_table_header header; /* Common ACPI table header */ 1365 u8 reserved[8]; 1366 }; 1367 1368 /* Subtable */ 1369 1370 struct acpi_mcfg_allocation { 1371 u64 address; /* Base address, processor-relative */ 1372 u16 pci_segment; /* PCI segment group number */ 1373 u8 start_bus_number; /* Starting PCI Bus number */ 1374 u8 end_bus_number; /* Final PCI Bus number */ 1375 u32 reserved; 1376 }; 1377 1378 /******************************************************************************* 1379 * 1380 * MCHI - Management Controller Host Interface Table 1381 * Version 1 1382 * 1383 * Conforms to "Management Component Transport Protocol (MCTP) Host 1384 * Interface Specification", Revision 1.0.0a, October 13, 2009 1385 * 1386 ******************************************************************************/ 1387 1388 struct acpi_table_mchi { 1389 struct acpi_table_header header; /* Common ACPI table header */ 1390 u8 interface_type; 1391 u8 protocol; 1392 u64 protocol_data; 1393 u8 interrupt_type; 1394 u8 gpe; 1395 u8 pci_device_flag; 1396 u32 global_interrupt; 1397 struct acpi_generic_address control_register; 1398 u8 pci_segment; 1399 u8 pci_bus; 1400 u8 pci_device; 1401 u8 pci_function; 1402 }; 1403 1404 /******************************************************************************* 1405 * 1406 * MPAM - Memory System Resource Partitioning and Monitoring 1407 * 1408 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1409 * Document number: ARM DEN 0065, December, 2022. 1410 * 1411 ******************************************************************************/ 1412 1413 /* MPAM RIS locator types. Table 11, Location types */ 1414 enum acpi_mpam_locator_type { 1415 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1416 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1417 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1418 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1419 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1420 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1421 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1422 }; 1423 1424 /* MPAM Functional dependency descriptor. Table 10 */ 1425 struct acpi_mpam_func_deps { 1426 u32 producer; 1427 u32 reserved; 1428 }; 1429 1430 /* MPAM Processor cache locator descriptor. Table 13 */ 1431 struct acpi_mpam_resource_cache_locator { 1432 u64 cache_reference; 1433 u32 reserved; 1434 }; 1435 1436 /* MPAM Memory locator descriptor. Table 14 */ 1437 struct acpi_mpam_resource_memory_locator { 1438 u64 proximity_domain; 1439 u32 reserved; 1440 }; 1441 1442 /* MPAM SMMU locator descriptor. Table 15 */ 1443 struct acpi_mpam_resource_smmu_locator { 1444 u64 smmu_interface; 1445 u32 reserved; 1446 }; 1447 1448 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1449 struct acpi_mpam_resource_memcache_locator { 1450 u8 reserved[7]; 1451 u8 level; 1452 u32 reference; 1453 }; 1454 1455 /* MPAM ACPI device locator descriptor. Table 17 */ 1456 struct acpi_mpam_resource_acpi_locator { 1457 u64 acpi_hw_id; 1458 u32 acpi_unique_id; 1459 }; 1460 1461 /* MPAM Interconnect locator descriptor. Table 18 */ 1462 struct acpi_mpam_resource_interconnect_locator { 1463 u64 inter_connect_desc_tbl_off; 1464 u32 reserved; 1465 }; 1466 1467 /* MPAM Locator structure. Table 12 */ 1468 struct acpi_mpam_resource_generic_locator { 1469 u64 descriptor1; 1470 u32 descriptor2; 1471 }; 1472 1473 union acpi_mpam_resource_locator { 1474 struct acpi_mpam_resource_cache_locator cache_locator; 1475 struct acpi_mpam_resource_memory_locator memory_locator; 1476 struct acpi_mpam_resource_smmu_locator smmu_locator; 1477 struct acpi_mpam_resource_memcache_locator mem_cache_locator; 1478 struct acpi_mpam_resource_acpi_locator acpi_locator; 1479 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator; 1480 struct acpi_mpam_resource_generic_locator generic_locator; 1481 }; 1482 1483 /* Memory System Component Resource Node Structure Table 9 */ 1484 struct acpi_mpam_resource_node { 1485 u32 identifier; 1486 u8 ris_index; 1487 u16 reserved1; 1488 u8 locator_type; 1489 union acpi_mpam_resource_locator locator; 1490 u32 num_functional_deps; 1491 }; 1492 1493 /* Memory System Component (MSC) Node Structure. Table 4 */ 1494 struct acpi_mpam_msc_node { 1495 u16 length; 1496 u8 interface_type; 1497 u8 reserved; 1498 u32 identifier; 1499 u64 base_address; 1500 u32 mmio_size; 1501 u32 overflow_interrupt; 1502 u32 overflow_interrupt_flags; 1503 u32 reserved1; 1504 u32 overflow_interrupt_affinity; 1505 u32 error_interrupt; 1506 u32 error_interrupt_flags; 1507 u32 reserved2; 1508 u32 error_interrupt_affinity; 1509 u32 max_nrdy_usec; 1510 u64 hardware_id_linked_device; 1511 u32 instance_id_linked_device; 1512 u32 num_resouce_nodes; 1513 }; 1514 1515 struct acpi_table_mpam { 1516 struct acpi_table_header header; /* Common ACPI table header */ 1517 }; 1518 1519 /******************************************************************************* 1520 * 1521 * MPST - Memory Power State Table (ACPI 5.0) 1522 * Version 1 1523 * 1524 ******************************************************************************/ 1525 1526 #define ACPI_MPST_CHANNEL_INFO \ 1527 u8 channel_id; \ 1528 u8 reserved1[3]; \ 1529 u16 power_node_count; \ 1530 u16 reserved2; 1531 1532 /* Main table */ 1533 1534 struct acpi_table_mpst { 1535 struct acpi_table_header header; /* Common ACPI table header */ 1536 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1537 }; 1538 1539 /* Memory Platform Communication Channel Info */ 1540 1541 struct acpi_mpst_channel { 1542 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1543 }; 1544 1545 /* Memory Power Node Structure */ 1546 1547 struct acpi_mpst_power_node { 1548 u8 flags; 1549 u8 reserved1; 1550 u16 node_id; 1551 u32 length; 1552 u64 range_address; 1553 u64 range_length; 1554 u32 num_power_states; 1555 u32 num_physical_components; 1556 }; 1557 1558 /* Values for Flags field above */ 1559 1560 #define ACPI_MPST_ENABLED 1 1561 #define ACPI_MPST_POWER_MANAGED 2 1562 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1563 1564 /* Memory Power State Structure (follows POWER_NODE above) */ 1565 1566 struct acpi_mpst_power_state { 1567 u8 power_state; 1568 u8 info_index; 1569 }; 1570 1571 /* Physical Component ID Structure (follows POWER_STATE above) */ 1572 1573 struct acpi_mpst_component { 1574 u16 component_id; 1575 }; 1576 1577 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1578 1579 struct acpi_mpst_data_hdr { 1580 u16 characteristics_count; 1581 u16 reserved; 1582 }; 1583 1584 struct acpi_mpst_power_data { 1585 u8 structure_id; 1586 u8 flags; 1587 u16 reserved1; 1588 u32 average_power; 1589 u32 power_saving; 1590 u64 exit_latency; 1591 u64 reserved2; 1592 }; 1593 1594 /* Values for Flags field above */ 1595 1596 #define ACPI_MPST_PRESERVE 1 1597 #define ACPI_MPST_AUTOENTRY 2 1598 #define ACPI_MPST_AUTOEXIT 4 1599 1600 /* Shared Memory Region (not part of an ACPI table) */ 1601 1602 struct acpi_mpst_shared { 1603 u32 signature; 1604 u16 pcc_command; 1605 u16 pcc_status; 1606 u32 command_register; 1607 u32 status_register; 1608 u32 power_state_id; 1609 u32 power_node_id; 1610 u64 energy_consumed; 1611 u64 average_power; 1612 }; 1613 1614 /******************************************************************************* 1615 * 1616 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1617 * Version 1 1618 * 1619 ******************************************************************************/ 1620 1621 struct acpi_table_msct { 1622 struct acpi_table_header header; /* Common ACPI table header */ 1623 u32 proximity_offset; /* Location of proximity info struct(s) */ 1624 u32 max_proximity_domains; /* Max number of proximity domains */ 1625 u32 max_clock_domains; /* Max number of clock domains */ 1626 u64 max_address; /* Max physical address in system */ 1627 }; 1628 1629 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1630 1631 struct acpi_msct_proximity { 1632 u8 revision; 1633 u8 length; 1634 u32 range_start; /* Start of domain range */ 1635 u32 range_end; /* End of domain range */ 1636 u32 processor_capacity; 1637 u64 memory_capacity; /* In bytes */ 1638 }; 1639 1640 /******************************************************************************* 1641 * 1642 * MSDM - Microsoft Data Management table 1643 * 1644 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1645 * November 29, 2011. Copyright 2011 Microsoft 1646 * 1647 ******************************************************************************/ 1648 1649 /* Basic MSDM table is only the common ACPI header */ 1650 1651 struct acpi_table_msdm { 1652 struct acpi_table_header header; /* Common ACPI table header */ 1653 }; 1654 1655 /******************************************************************************* 1656 * 1657 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1658 * Version 1 1659 * 1660 ******************************************************************************/ 1661 1662 struct acpi_table_nfit { 1663 struct acpi_table_header header; /* Common ACPI table header */ 1664 u32 reserved; /* Reserved, must be zero */ 1665 }; 1666 1667 /* Subtable header for NFIT */ 1668 1669 struct acpi_nfit_header { 1670 u16 type; 1671 u16 length; 1672 }; 1673 1674 /* Values for subtable type in struct acpi_nfit_header */ 1675 1676 enum acpi_nfit_type { 1677 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1678 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1679 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1680 ACPI_NFIT_TYPE_SMBIOS = 3, 1681 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1682 ACPI_NFIT_TYPE_DATA_REGION = 5, 1683 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1684 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1685 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1686 }; 1687 1688 /* 1689 * NFIT Subtables 1690 */ 1691 1692 /* 0: System Physical Address Range Structure */ 1693 1694 struct acpi_nfit_system_address { 1695 struct acpi_nfit_header header; 1696 u16 range_index; 1697 u16 flags; 1698 u32 reserved; /* Reserved, must be zero */ 1699 u32 proximity_domain; 1700 u8 range_guid[16]; 1701 u64 address; 1702 u64 length; 1703 u64 memory_mapping; 1704 u64 location_cookie; /* ACPI 6.4 */ 1705 }; 1706 1707 /* Flags */ 1708 1709 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1710 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1711 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1712 1713 /* Range Type GUIDs appear in the include/acuuid.h file */ 1714 1715 /* 1: Memory Device to System Address Range Map Structure */ 1716 1717 struct acpi_nfit_memory_map { 1718 struct acpi_nfit_header header; 1719 u32 device_handle; 1720 u16 physical_id; 1721 u16 region_id; 1722 u16 range_index; 1723 u16 region_index; 1724 u64 region_size; 1725 u64 region_offset; 1726 u64 address; 1727 u16 interleave_index; 1728 u16 interleave_ways; 1729 u16 flags; 1730 u16 reserved; /* Reserved, must be zero */ 1731 }; 1732 1733 /* Flags */ 1734 1735 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1736 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1737 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1738 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1739 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1740 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1741 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1742 1743 /* 2: Interleave Structure */ 1744 1745 struct acpi_nfit_interleave { 1746 struct acpi_nfit_header header; 1747 u16 interleave_index; 1748 u16 reserved; /* Reserved, must be zero */ 1749 u32 line_count; 1750 u32 line_size; 1751 u32 line_offset[]; /* Variable length */ 1752 }; 1753 1754 /* 3: SMBIOS Management Information Structure */ 1755 1756 struct acpi_nfit_smbios { 1757 struct acpi_nfit_header header; 1758 u32 reserved; /* Reserved, must be zero */ 1759 u8 data[]; /* Variable length */ 1760 }; 1761 1762 /* 4: NVDIMM Control Region Structure */ 1763 1764 struct acpi_nfit_control_region { 1765 struct acpi_nfit_header header; 1766 u16 region_index; 1767 u16 vendor_id; 1768 u16 device_id; 1769 u16 revision_id; 1770 u16 subsystem_vendor_id; 1771 u16 subsystem_device_id; 1772 u16 subsystem_revision_id; 1773 u8 valid_fields; 1774 u8 manufacturing_location; 1775 u16 manufacturing_date; 1776 u8 reserved[2]; /* Reserved, must be zero */ 1777 u32 serial_number; 1778 u16 code; 1779 u16 windows; 1780 u64 window_size; 1781 u64 command_offset; 1782 u64 command_size; 1783 u64 status_offset; 1784 u64 status_size; 1785 u16 flags; 1786 u8 reserved1[6]; /* Reserved, must be zero */ 1787 }; 1788 1789 /* Flags */ 1790 1791 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1792 1793 /* valid_fields bits */ 1794 1795 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1796 1797 /* 5: NVDIMM Block Data Window Region Structure */ 1798 1799 struct acpi_nfit_data_region { 1800 struct acpi_nfit_header header; 1801 u16 region_index; 1802 u16 windows; 1803 u64 offset; 1804 u64 size; 1805 u64 capacity; 1806 u64 start_address; 1807 }; 1808 1809 /* 6: Flush Hint Address Structure */ 1810 1811 struct acpi_nfit_flush_address { 1812 struct acpi_nfit_header header; 1813 u32 device_handle; 1814 u16 hint_count; 1815 u8 reserved[6]; /* Reserved, must be zero */ 1816 u64 hint_address[]; /* Variable length */ 1817 }; 1818 1819 /* 7: Platform Capabilities Structure */ 1820 1821 struct acpi_nfit_capabilities { 1822 struct acpi_nfit_header header; 1823 u8 highest_capability; 1824 u8 reserved[3]; /* Reserved, must be zero */ 1825 u32 capabilities; 1826 u32 reserved2; 1827 }; 1828 1829 /* Capabilities Flags */ 1830 1831 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1832 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1833 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1834 1835 /* 1836 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1837 */ 1838 struct nfit_device_handle { 1839 u32 handle; 1840 }; 1841 1842 /* Device handle construction and extraction macros */ 1843 1844 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1845 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1846 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1847 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1848 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1849 1850 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1851 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1852 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1853 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1854 #define ACPI_NFIT_NODE_ID_OFFSET 16 1855 1856 /* Macro to construct a NFIT/NVDIMM device handle */ 1857 1858 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1859 ((dimm) | \ 1860 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1861 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1862 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1863 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1864 1865 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1866 1867 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1868 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1869 1870 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1871 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1872 1873 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1874 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1875 1876 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1877 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1878 1879 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1880 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1881 1882 /******************************************************************************* 1883 * 1884 * NHLT - Non HD Audio Link Table 1885 * 1886 * Conforms to: Intel Smart Sound Technology NHLT Specification 1887 * Version 0.8.1, January 2020. 1888 * 1889 ******************************************************************************/ 1890 1891 /* Main table */ 1892 1893 struct acpi_table_nhlt { 1894 struct acpi_table_header header; /* Common ACPI table header */ 1895 u8 endpoint_count; 1896 }; 1897 1898 struct acpi_nhlt_endpoint { 1899 u32 descriptor_length; 1900 u8 link_type; 1901 u8 instance_id; 1902 u16 vendor_id; 1903 u16 device_id; 1904 u16 revision_id; 1905 u32 subsystem_id; 1906 u8 device_type; 1907 u8 direction; 1908 u8 virtual_bus_id; 1909 }; 1910 1911 /* Types for link_type field above */ 1912 1913 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1914 #define ACPI_NHLT_RESERVED_DSP 1 1915 #define ACPI_NHLT_PDM 2 1916 #define ACPI_NHLT_SSP 3 1917 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1918 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1919 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1920 1921 /* All other values above are reserved */ 1922 1923 /* Values for device_id field above */ 1924 1925 #define ACPI_NHLT_PDM_DMIC 0xAE20 1926 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1927 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1928 1929 /* Values for device_type field above */ 1930 1931 /* SSP Link */ 1932 1933 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1934 #define ACPI_NHLT_LINK_FM 1 1935 #define ACPI_NHLT_LINK_MODEM 2 1936 /* 3 is reserved */ 1937 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1938 1939 /* PDM Link */ 1940 1941 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1942 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1943 1944 /* Values for Direction field above */ 1945 1946 #define ACPI_NHLT_DIR_RENDER 0 1947 #define ACPI_NHLT_DIR_CAPTURE 1 1948 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1949 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1950 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1951 1952 struct acpi_nhlt_device_specific_config { 1953 u32 capabilities_size; 1954 u8 virtual_slot; 1955 u8 config_type; 1956 }; 1957 1958 struct acpi_nhlt_device_specific_config_a { 1959 u32 capabilities_size; 1960 u8 virtual_slot; 1961 u8 config_type; 1962 u8 array_type; 1963 }; 1964 1965 /* Values for Config Type above */ 1966 1967 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1968 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1969 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1970 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1971 1972 struct acpi_nhlt_device_specific_config_b { 1973 u32 capabilities_size; 1974 }; 1975 1976 struct acpi_nhlt_device_specific_config_c { 1977 u32 capabilities_size; 1978 u8 virtual_slot; 1979 }; 1980 1981 struct acpi_nhlt_render_device_specific_config { 1982 u32 capabilities_size; 1983 u8 virtual_slot; 1984 }; 1985 1986 struct acpi_nhlt_wave_extensible { 1987 u16 format_tag; 1988 u16 channel_count; 1989 u32 samples_per_sec; 1990 u32 avg_bytes_per_sec; 1991 u16 block_align; 1992 u16 bits_per_sample; 1993 u16 extra_format_size; 1994 u16 valid_bits_per_sample; 1995 u32 channel_mask; 1996 u8 sub_format_guid[16]; 1997 }; 1998 1999 /* Values for channel_mask above */ 2000 2001 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 2002 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 2003 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 2004 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 2005 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 2006 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 2007 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 2008 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 2009 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 2010 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 2011 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 2012 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 2013 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 2014 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 2015 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 2016 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 2017 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 2018 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 2019 2020 struct acpi_nhlt_format_config { 2021 struct acpi_nhlt_wave_extensible format; 2022 u32 capability_size; 2023 u8 capabilities[]; 2024 }; 2025 2026 struct acpi_nhlt_formats_config { 2027 u8 formats_count; 2028 }; 2029 2030 struct acpi_nhlt_device_specific_hdr { 2031 u8 virtual_slot; 2032 u8 config_type; 2033 }; 2034 2035 /* Types for config_type above */ 2036 2037 #define ACPI_NHLT_GENERIC 0 2038 #define ACPI_NHLT_MIC 1 2039 #define ACPI_NHLT_RENDER 3 2040 2041 struct acpi_nhlt_mic_device_specific_config { 2042 struct acpi_nhlt_device_specific_hdr device_config; 2043 u8 array_type_ext; 2044 }; 2045 2046 /* Values for array_type_ext above */ 2047 2048 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 2049 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 2050 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 2051 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 2052 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 2053 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 2054 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 2055 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 2056 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 2057 2058 #define ACPI_NHLT_NO_EXTENSION 0x0 2059 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 2060 2061 struct acpi_nhlt_vendor_mic_count { 2062 u8 microphone_count; 2063 }; 2064 2065 struct acpi_nhlt_vendor_mic_config { 2066 u8 type; 2067 u8 panel; 2068 u16 speaker_position_distance; /* mm */ 2069 u16 horizontal_offset; /* mm */ 2070 u16 vertical_offset; /* mm */ 2071 u8 frequency_low_band; /* 5*Hz */ 2072 u8 frequency_high_band; /* 500*Hz */ 2073 u16 direction_angle; /* -180 - + 180 */ 2074 u16 elevation_angle; /* -180 - + 180 */ 2075 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */ 2076 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */ 2077 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */ 2078 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */ 2079 }; 2080 2081 /* Values for Type field above */ 2082 2083 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2084 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2085 #define ACPI_NHLT_MIC_CARDIOID 2 2086 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2087 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2088 #define ACPI_NHLT_MIC_8_SHAPED 5 2089 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2090 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2091 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2092 2093 /* Values for Panel field above */ 2094 2095 #define ACPI_NHLT_MIC_POSITION_TOP 0 2096 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2097 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2098 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2099 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2100 #define ACPI_NHLT_MIC_POSITION_BACK 5 2101 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2102 2103 struct acpi_nhlt_vendor_mic_device_specific_config { 2104 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 2105 u8 number_of_microphones; 2106 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */ 2107 }; 2108 2109 /* Microphone SNR and Sensitivity extension */ 2110 2111 struct acpi_nhlt_mic_snr_sensitivity_extension { 2112 u32 SNR; 2113 u32 sensitivity; 2114 }; 2115 2116 /* Render device with feedback */ 2117 2118 struct acpi_nhlt_render_feedback_device_specific_config { 2119 u8 feedback_virtual_slot; /* Render slot in case of capture */ 2120 u16 feedback_channels; /* Informative only */ 2121 u16 feedback_valid_bits_per_sample; 2122 }; 2123 2124 /* Non documented structures */ 2125 2126 struct acpi_nhlt_device_info_count { 2127 u8 structure_count; 2128 }; 2129 2130 struct acpi_nhlt_device_info { 2131 u8 device_id[16]; 2132 u8 device_instance_id; 2133 u8 device_port_id; 2134 }; 2135 2136 /******************************************************************************* 2137 * 2138 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2139 * Version 2 (ACPI 6.2) 2140 * 2141 ******************************************************************************/ 2142 2143 struct acpi_table_pcct { 2144 struct acpi_table_header header; /* Common ACPI table header */ 2145 u32 flags; 2146 u64 reserved; 2147 }; 2148 2149 /* Values for Flags field above */ 2150 2151 #define ACPI_PCCT_DOORBELL 1 2152 2153 /* Values for subtable type in struct acpi_subtable_header */ 2154 2155 enum acpi_pcct_type { 2156 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2157 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2158 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2159 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2160 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2161 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2162 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2163 }; 2164 2165 /* 2166 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 2167 */ 2168 2169 /* 0: Generic Communications Subspace */ 2170 2171 struct acpi_pcct_subspace { 2172 struct acpi_subtable_header header; 2173 u8 reserved[6]; 2174 u64 base_address; 2175 u64 length; 2176 struct acpi_generic_address doorbell_register; 2177 u64 preserve_mask; 2178 u64 write_mask; 2179 u32 latency; 2180 u32 max_access_rate; 2181 u16 min_turnaround_time; 2182 }; 2183 2184 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2185 2186 struct acpi_pcct_hw_reduced { 2187 struct acpi_subtable_header header; 2188 u32 platform_interrupt; 2189 u8 flags; 2190 u8 reserved; 2191 u64 base_address; 2192 u64 length; 2193 struct acpi_generic_address doorbell_register; 2194 u64 preserve_mask; 2195 u64 write_mask; 2196 u32 latency; 2197 u32 max_access_rate; 2198 u16 min_turnaround_time; 2199 }; 2200 2201 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2202 2203 struct acpi_pcct_hw_reduced_type2 { 2204 struct acpi_subtable_header header; 2205 u32 platform_interrupt; 2206 u8 flags; 2207 u8 reserved; 2208 u64 base_address; 2209 u64 length; 2210 struct acpi_generic_address doorbell_register; 2211 u64 preserve_mask; 2212 u64 write_mask; 2213 u32 latency; 2214 u32 max_access_rate; 2215 u16 min_turnaround_time; 2216 struct acpi_generic_address platform_ack_register; 2217 u64 ack_preserve_mask; 2218 u64 ack_write_mask; 2219 }; 2220 2221 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2222 2223 struct acpi_pcct_ext_pcc_master { 2224 struct acpi_subtable_header header; 2225 u32 platform_interrupt; 2226 u8 flags; 2227 u8 reserved1; 2228 u64 base_address; 2229 u32 length; 2230 struct acpi_generic_address doorbell_register; 2231 u64 preserve_mask; 2232 u64 write_mask; 2233 u32 latency; 2234 u32 max_access_rate; 2235 u32 min_turnaround_time; 2236 struct acpi_generic_address platform_ack_register; 2237 u64 ack_preserve_mask; 2238 u64 ack_set_mask; 2239 u64 reserved2; 2240 struct acpi_generic_address cmd_complete_register; 2241 u64 cmd_complete_mask; 2242 struct acpi_generic_address cmd_update_register; 2243 u64 cmd_update_preserve_mask; 2244 u64 cmd_update_set_mask; 2245 struct acpi_generic_address error_status_register; 2246 u64 error_status_mask; 2247 }; 2248 2249 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2250 2251 struct acpi_pcct_ext_pcc_slave { 2252 struct acpi_subtable_header header; 2253 u32 platform_interrupt; 2254 u8 flags; 2255 u8 reserved1; 2256 u64 base_address; 2257 u32 length; 2258 struct acpi_generic_address doorbell_register; 2259 u64 preserve_mask; 2260 u64 write_mask; 2261 u32 latency; 2262 u32 max_access_rate; 2263 u32 min_turnaround_time; 2264 struct acpi_generic_address platform_ack_register; 2265 u64 ack_preserve_mask; 2266 u64 ack_set_mask; 2267 u64 reserved2; 2268 struct acpi_generic_address cmd_complete_register; 2269 u64 cmd_complete_mask; 2270 struct acpi_generic_address cmd_update_register; 2271 u64 cmd_update_preserve_mask; 2272 u64 cmd_update_set_mask; 2273 struct acpi_generic_address error_status_register; 2274 u64 error_status_mask; 2275 }; 2276 2277 /* 5: HW Registers based Communications Subspace */ 2278 2279 struct acpi_pcct_hw_reg { 2280 struct acpi_subtable_header header; 2281 u16 version; 2282 u64 base_address; 2283 u64 length; 2284 struct acpi_generic_address doorbell_register; 2285 u64 doorbell_preserve; 2286 u64 doorbell_write; 2287 struct acpi_generic_address cmd_complete_register; 2288 u64 cmd_complete_mask; 2289 struct acpi_generic_address error_status_register; 2290 u64 error_status_mask; 2291 u32 nominal_latency; 2292 u32 min_turnaround_time; 2293 }; 2294 2295 /* Values for doorbell flags above */ 2296 2297 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2298 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2299 2300 /* 2301 * PCC memory structures (not part of the ACPI table) 2302 */ 2303 2304 /* Shared Memory Region */ 2305 2306 struct acpi_pcct_shared_memory { 2307 u32 signature; 2308 u16 command; 2309 u16 status; 2310 }; 2311 2312 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2313 2314 struct acpi_pcct_ext_pcc_shared_memory { 2315 u32 signature; 2316 u32 flags; 2317 u32 length; 2318 u32 command; 2319 }; 2320 2321 /******************************************************************************* 2322 * 2323 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2324 * Version 0 2325 * 2326 ******************************************************************************/ 2327 2328 struct acpi_table_pdtt { 2329 struct acpi_table_header header; /* Common ACPI table header */ 2330 u8 trigger_count; 2331 u8 reserved[3]; 2332 u32 array_offset; 2333 }; 2334 2335 /* 2336 * PDTT Communication Channel Identifier Structure. 2337 * The number of these structures is defined by trigger_count above, 2338 * starting at array_offset. 2339 */ 2340 struct acpi_pdtt_channel { 2341 u8 subchannel_id; 2342 u8 flags; 2343 }; 2344 2345 /* Flags for above */ 2346 2347 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2348 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2349 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2350 2351 /******************************************************************************* 2352 * 2353 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2354 * Version 1 2355 * 2356 ******************************************************************************/ 2357 2358 struct acpi_table_phat { 2359 struct acpi_table_header header; /* Common ACPI table header */ 2360 }; 2361 2362 /* Common header for PHAT subtables that follow main table */ 2363 2364 struct acpi_phat_header { 2365 u16 type; 2366 u16 length; 2367 u8 revision; 2368 }; 2369 2370 /* Values for Type field above */ 2371 2372 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2373 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2374 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2375 2376 /* 2377 * PHAT subtables, correspond to Type in struct acpi_phat_header 2378 */ 2379 2380 /* 0: Firmware Version Data Record */ 2381 2382 struct acpi_phat_version_data { 2383 struct acpi_phat_header header; 2384 u8 reserved[3]; 2385 u32 element_count; 2386 }; 2387 2388 struct acpi_phat_version_element { 2389 u8 guid[16]; 2390 u64 version_value; 2391 u32 producer_id; 2392 }; 2393 2394 /* 1: Firmware Health Data Record */ 2395 2396 struct acpi_phat_health_data { 2397 struct acpi_phat_header header; 2398 u8 reserved[2]; 2399 u8 health; 2400 u8 device_guid[16]; 2401 u32 device_specific_offset; /* Zero if no Device-specific data */ 2402 }; 2403 2404 /* Values for Health field above */ 2405 2406 #define ACPI_PHAT_ERRORS_FOUND 0 2407 #define ACPI_PHAT_NO_ERRORS 1 2408 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2409 #define ACPI_PHAT_ADVISORY 3 2410 2411 /******************************************************************************* 2412 * 2413 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2414 * Version 1 2415 * 2416 ******************************************************************************/ 2417 2418 struct acpi_table_pmtt { 2419 struct acpi_table_header header; /* Common ACPI table header */ 2420 u32 memory_device_count; 2421 /* 2422 * Immediately followed by: 2423 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2424 */ 2425 }; 2426 2427 /* Common header for PMTT subtables that follow main table */ 2428 2429 struct acpi_pmtt_header { 2430 u8 type; 2431 u8 reserved1; 2432 u16 length; 2433 u16 flags; 2434 u16 reserved2; 2435 u32 memory_device_count; /* Zero means no memory device structs follow */ 2436 /* 2437 * Immediately followed by: 2438 * u8 type_specific_data[] 2439 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2440 */ 2441 }; 2442 2443 /* Values for Type field above */ 2444 2445 #define ACPI_PMTT_TYPE_SOCKET 0 2446 #define ACPI_PMTT_TYPE_CONTROLLER 1 2447 #define ACPI_PMTT_TYPE_DIMM 2 2448 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2449 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2450 2451 /* Values for Flags field above */ 2452 2453 #define ACPI_PMTT_TOP_LEVEL 0x0001 2454 #define ACPI_PMTT_PHYSICAL 0x0002 2455 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2456 2457 /* 2458 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2459 */ 2460 2461 /* 0: Socket Structure */ 2462 2463 struct acpi_pmtt_socket { 2464 struct acpi_pmtt_header header; 2465 u16 socket_id; 2466 u16 reserved; 2467 }; 2468 /* 2469 * Immediately followed by: 2470 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2471 */ 2472 2473 /* 1: Memory Controller subtable */ 2474 2475 struct acpi_pmtt_controller { 2476 struct acpi_pmtt_header header; 2477 u16 controller_id; 2478 u16 reserved; 2479 }; 2480 /* 2481 * Immediately followed by: 2482 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2483 */ 2484 2485 /* 2: Physical Component Identifier (DIMM) */ 2486 2487 struct acpi_pmtt_physical_component { 2488 struct acpi_pmtt_header header; 2489 u32 bios_handle; 2490 }; 2491 2492 /* 0xFF: Vendor Specific Data */ 2493 2494 struct acpi_pmtt_vendor_specific { 2495 struct acpi_pmtt_header header; 2496 u8 type_uuid[16]; 2497 u8 specific[]; 2498 /* 2499 * Immediately followed by: 2500 * u8 vendor_specific_data[]; 2501 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2502 */ 2503 }; 2504 2505 /******************************************************************************* 2506 * 2507 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2508 * Version 1 2509 * 2510 ******************************************************************************/ 2511 2512 struct acpi_table_pptt { 2513 struct acpi_table_header header; /* Common ACPI table header */ 2514 }; 2515 2516 /* Values for Type field above */ 2517 2518 enum acpi_pptt_type { 2519 ACPI_PPTT_TYPE_PROCESSOR = 0, 2520 ACPI_PPTT_TYPE_CACHE = 1, 2521 ACPI_PPTT_TYPE_ID = 2, 2522 ACPI_PPTT_TYPE_RESERVED = 3 2523 }; 2524 2525 /* 0: Processor Hierarchy Node Structure */ 2526 2527 struct acpi_pptt_processor { 2528 struct acpi_subtable_header header; 2529 u16 reserved; 2530 u32 flags; 2531 u32 parent; 2532 u32 acpi_processor_id; 2533 u32 number_of_priv_resources; 2534 }; 2535 2536 /* Flags */ 2537 2538 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2539 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2540 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2541 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2542 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2543 2544 /* 1: Cache Type Structure */ 2545 2546 struct acpi_pptt_cache { 2547 struct acpi_subtable_header header; 2548 u16 reserved; 2549 u32 flags; 2550 u32 next_level_of_cache; 2551 u32 size; 2552 u32 number_of_sets; 2553 u8 associativity; 2554 u8 attributes; 2555 u16 line_size; 2556 }; 2557 2558 /* 1: Cache Type Structure for PPTT version 3 */ 2559 2560 struct acpi_pptt_cache_v1 { 2561 u32 cache_id; 2562 }; 2563 2564 /* Flags */ 2565 2566 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2567 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2568 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2569 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2570 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2571 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2572 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2573 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2574 2575 /* Masks for Attributes */ 2576 2577 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2578 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2579 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2580 2581 /* Attributes describing cache */ 2582 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2583 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2584 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2585 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2586 2587 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2588 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2589 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2590 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2591 2592 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2593 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2594 2595 /* 2: ID Structure */ 2596 2597 struct acpi_pptt_id { 2598 struct acpi_subtable_header header; 2599 u16 reserved; 2600 u32 vendor_id; 2601 u64 level1_id; 2602 u64 level2_id; 2603 u16 major_rev; 2604 u16 minor_rev; 2605 u16 spin_rev; 2606 }; 2607 2608 /******************************************************************************* 2609 * 2610 * PRMT - Platform Runtime Mechanism Table 2611 * Version 1 2612 * 2613 ******************************************************************************/ 2614 2615 struct acpi_table_prmt { 2616 struct acpi_table_header header; /* Common ACPI table header */ 2617 }; 2618 2619 struct acpi_table_prmt_header { 2620 u8 platform_guid[16]; 2621 u32 module_info_offset; 2622 u32 module_info_count; 2623 }; 2624 2625 struct acpi_prmt_module_header { 2626 u16 revision; 2627 u16 length; 2628 }; 2629 2630 struct acpi_prmt_module_info { 2631 u16 revision; 2632 u16 length; 2633 u8 module_guid[16]; 2634 u16 major_rev; 2635 u16 minor_rev; 2636 u16 handler_info_count; 2637 u32 handler_info_offset; 2638 u64 mmio_list_pointer; 2639 }; 2640 2641 struct acpi_prmt_handler_info { 2642 u16 revision; 2643 u16 length; 2644 u8 handler_guid[16]; 2645 u64 handler_address; 2646 u64 static_data_buffer_address; 2647 u64 acpi_param_buffer_address; 2648 }; 2649 2650 /******************************************************************************* 2651 * 2652 * RASF - RAS Feature Table (ACPI 5.0) 2653 * Version 1 2654 * 2655 ******************************************************************************/ 2656 2657 struct acpi_table_rasf { 2658 struct acpi_table_header header; /* Common ACPI table header */ 2659 u8 channel_id[12]; 2660 }; 2661 2662 /* RASF Platform Communication Channel Shared Memory Region */ 2663 2664 struct acpi_rasf_shared_memory { 2665 u32 signature; 2666 u16 command; 2667 u16 status; 2668 u16 version; 2669 u8 capabilities[16]; 2670 u8 set_capabilities[16]; 2671 u16 num_parameter_blocks; 2672 u32 set_capabilities_status; 2673 }; 2674 2675 /* RASF Parameter Block Structure Header */ 2676 2677 struct acpi_rasf_parameter_block { 2678 u16 type; 2679 u16 version; 2680 u16 length; 2681 }; 2682 2683 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2684 2685 struct acpi_rasf_patrol_scrub_parameter { 2686 struct acpi_rasf_parameter_block header; 2687 u16 patrol_scrub_command; 2688 u64 requested_address_range[2]; 2689 u64 actual_address_range[2]; 2690 u16 flags; 2691 u8 requested_speed; 2692 }; 2693 2694 /* Masks for Flags and Speed fields above */ 2695 2696 #define ACPI_RASF_SCRUBBER_RUNNING 1 2697 #define ACPI_RASF_SPEED (7<<1) 2698 #define ACPI_RASF_SPEED_SLOW (0<<1) 2699 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2700 #define ACPI_RASF_SPEED_FAST (7<<1) 2701 2702 /* Channel Commands */ 2703 2704 enum acpi_rasf_commands { 2705 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2706 }; 2707 2708 /* Platform RAS Capabilities */ 2709 2710 enum acpi_rasf_capabiliities { 2711 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2712 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2713 }; 2714 2715 /* Patrol Scrub Commands */ 2716 2717 enum acpi_rasf_patrol_scrub_commands { 2718 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2719 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2720 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2721 }; 2722 2723 /* Channel Command flags */ 2724 2725 #define ACPI_RASF_GENERATE_SCI (1<<15) 2726 2727 /* Status values */ 2728 2729 enum acpi_rasf_status { 2730 ACPI_RASF_SUCCESS = 0, 2731 ACPI_RASF_NOT_VALID = 1, 2732 ACPI_RASF_NOT_SUPPORTED = 2, 2733 ACPI_RASF_BUSY = 3, 2734 ACPI_RASF_FAILED = 4, 2735 ACPI_RASF_ABORTED = 5, 2736 ACPI_RASF_INVALID_DATA = 6 2737 }; 2738 2739 /* Status flags */ 2740 2741 #define ACPI_RASF_COMMAND_COMPLETE (1) 2742 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2743 #define ACPI_RASF_ERROR (1<<2) 2744 #define ACPI_RASF_STATUS (0x1F<<3) 2745 2746 /******************************************************************************* 2747 * 2748 * RGRT - Regulatory Graphics Resource Table 2749 * Version 1 2750 * 2751 * Conforms to "ACPI RGRT" available at: 2752 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2753 * 2754 ******************************************************************************/ 2755 2756 struct acpi_table_rgrt { 2757 struct acpi_table_header header; /* Common ACPI table header */ 2758 u16 version; 2759 u8 image_type; 2760 u8 reserved; 2761 u8 image[]; 2762 }; 2763 2764 /* image_type values */ 2765 2766 enum acpi_rgrt_image_type { 2767 ACPI_RGRT_TYPE_RESERVED0 = 0, 2768 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2769 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2770 }; 2771 2772 /******************************************************************************* 2773 * 2774 * RHCT - RISC-V Hart Capabilities Table 2775 * Version 1 2776 * 2777 ******************************************************************************/ 2778 2779 struct acpi_table_rhct { 2780 struct acpi_table_header header; /* Common ACPI table header */ 2781 u32 flags; /* RHCT flags */ 2782 u64 time_base_freq; 2783 u32 node_count; 2784 u32 node_offset; 2785 }; 2786 2787 /* RHCT Flags */ 2788 2789 #define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU (1) 2790 /* 2791 * RHCT subtables 2792 */ 2793 struct acpi_rhct_node_header { 2794 u16 type; 2795 u16 length; 2796 u16 revision; 2797 }; 2798 2799 /* Values for RHCT subtable Type above */ 2800 2801 enum acpi_rhct_node_type { 2802 ACPI_RHCT_NODE_TYPE_ISA_STRING = 0x0000, 2803 ACPI_RHCT_NODE_TYPE_CMO = 0x0001, 2804 ACPI_RHCT_NODE_TYPE_MMU = 0x0002, 2805 ACPI_RHCT_NODE_TYPE_RESERVED = 0x0003, 2806 ACPI_RHCT_NODE_TYPE_HART_INFO = 0xFFFF, 2807 }; 2808 2809 /* 2810 * RHCT node specific subtables 2811 */ 2812 2813 /* ISA string node structure */ 2814 struct acpi_rhct_isa_string { 2815 u16 isa_length; 2816 char isa[]; 2817 }; 2818 2819 struct acpi_rhct_cmo_node { 2820 u8 reserved; /* Must be zero */ 2821 u8 cbom_size; /* CBOM size in powerof 2 */ 2822 u8 cbop_size; /* CBOP size in powerof 2 */ 2823 u8 cboz_size; /* CBOZ size in powerof 2 */ 2824 }; 2825 2826 struct acpi_rhct_mmu_node { 2827 u8 reserved; /* Must be zero */ 2828 u8 mmu_type; /* Virtual Address Scheme */ 2829 }; 2830 2831 enum acpi_rhct_mmu_type { 2832 ACPI_RHCT_MMU_TYPE_SV39 = 0, 2833 ACPI_RHCT_MMU_TYPE_SV48 = 1, 2834 ACPI_RHCT_MMU_TYPE_SV57 = 2 2835 }; 2836 2837 /* Hart Info node structure */ 2838 struct acpi_rhct_hart_info { 2839 u16 num_offsets; 2840 u32 uid; /* ACPI processor UID */ 2841 }; 2842 2843 /******************************************************************************* 2844 * 2845 * SBST - Smart Battery Specification Table 2846 * Version 1 2847 * 2848 ******************************************************************************/ 2849 2850 struct acpi_table_sbst { 2851 struct acpi_table_header header; /* Common ACPI table header */ 2852 u32 warning_level; 2853 u32 low_level; 2854 u32 critical_level; 2855 }; 2856 2857 /******************************************************************************* 2858 * 2859 * SDEI - Software Delegated Exception Interface Descriptor Table 2860 * 2861 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2862 * May 8th, 2017. Copyright 2017 ARM Ltd. 2863 * 2864 ******************************************************************************/ 2865 2866 struct acpi_table_sdei { 2867 struct acpi_table_header header; /* Common ACPI table header */ 2868 }; 2869 2870 /******************************************************************************* 2871 * 2872 * SDEV - Secure Devices Table (ACPI 6.2) 2873 * Version 1 2874 * 2875 ******************************************************************************/ 2876 2877 struct acpi_table_sdev { 2878 struct acpi_table_header header; /* Common ACPI table header */ 2879 }; 2880 2881 struct acpi_sdev_header { 2882 u8 type; 2883 u8 flags; 2884 u16 length; 2885 }; 2886 2887 /* Values for subtable type above */ 2888 2889 enum acpi_sdev_type { 2890 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2891 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2892 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2893 }; 2894 2895 /* Values for flags above */ 2896 2897 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2898 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2899 2900 /* 2901 * SDEV subtables 2902 */ 2903 2904 /* 0: Namespace Device Based Secure Device Structure */ 2905 2906 struct acpi_sdev_namespace { 2907 struct acpi_sdev_header header; 2908 u16 device_id_offset; 2909 u16 device_id_length; 2910 u16 vendor_data_offset; 2911 u16 vendor_data_length; 2912 }; 2913 2914 struct acpi_sdev_secure_component { 2915 u16 secure_component_offset; 2916 u16 secure_component_length; 2917 }; 2918 2919 /* 2920 * SDEV sub-subtables ("Components") for above 2921 */ 2922 struct acpi_sdev_component { 2923 struct acpi_sdev_header header; 2924 }; 2925 2926 /* Values for sub-subtable type above */ 2927 2928 enum acpi_sac_type { 2929 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2930 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2931 }; 2932 2933 struct acpi_sdev_id_component { 2934 struct acpi_sdev_header header; 2935 u16 hardware_id_offset; 2936 u16 hardware_id_length; 2937 u16 subsystem_id_offset; 2938 u16 subsystem_id_length; 2939 u16 hardware_revision; 2940 u8 hardware_rev_present; 2941 u8 class_code_present; 2942 u8 pci_base_class; 2943 u8 pci_sub_class; 2944 u8 pci_programming_xface; 2945 }; 2946 2947 struct acpi_sdev_mem_component { 2948 struct acpi_sdev_header header; 2949 u32 reserved; 2950 u64 memory_base_address; 2951 u64 memory_length; 2952 }; 2953 2954 /* 1: PCIe Endpoint Device Based Device Structure */ 2955 2956 struct acpi_sdev_pcie { 2957 struct acpi_sdev_header header; 2958 u16 segment; 2959 u16 start_bus; 2960 u16 path_offset; 2961 u16 path_length; 2962 u16 vendor_data_offset; 2963 u16 vendor_data_length; 2964 }; 2965 2966 /* 1a: PCIe Endpoint path entry */ 2967 2968 struct acpi_sdev_pcie_path { 2969 u8 device; 2970 u8 function; 2971 }; 2972 2973 /******************************************************************************* 2974 * 2975 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2976 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2977 * Trust Domain Extensions (Intel TDX)". 2978 * Version 1 2979 * 2980 ******************************************************************************/ 2981 2982 struct acpi_table_svkl { 2983 struct acpi_table_header header; /* Common ACPI table header */ 2984 u32 count; 2985 }; 2986 2987 struct acpi_svkl_key { 2988 u16 type; 2989 u16 format; 2990 u32 size; 2991 u64 address; 2992 }; 2993 2994 enum acpi_svkl_type { 2995 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2996 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2997 }; 2998 2999 enum acpi_svkl_format { 3000 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 3001 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 3002 }; 3003 3004 /******************************************************************************* 3005 * 3006 * TDEL - TD-Event Log 3007 * From: "Guest-Host-Communication Interface (GHCI) for Intel 3008 * Trust Domain Extensions (Intel TDX)". 3009 * September 2020 3010 * 3011 ******************************************************************************/ 3012 3013 struct acpi_table_tdel { 3014 struct acpi_table_header header; /* Common ACPI table header */ 3015 u32 reserved; 3016 u64 log_area_minimum_length; 3017 u64 log_area_start_address; 3018 }; 3019 3020 /* Reset to default packing */ 3021 3022 #pragma pack() 3023 3024 #endif /* __ACTBL2_H__ */ 3025