1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2022, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 31 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 32 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 33 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 34 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 35 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 36 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 37 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 38 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 39 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 40 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 41 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 42 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 43 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 44 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 45 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 46 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 47 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 48 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 49 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 50 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 51 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 52 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 53 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 54 55 /* 56 * All tables must be byte-packed to match the ACPI specification, since 57 * the tables are provided by the system BIOS. 58 */ 59 #pragma pack(1) 60 61 /* 62 * Note: C bitfields are not used for this reason: 63 * 64 * "Bitfields are great and easy to read, but unfortunately the C language 65 * does not specify the layout of bitfields in memory, which means they are 66 * essentially useless for dealing with packed data in on-disk formats or 67 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 68 * this decision was a design error in C. Ritchie could have picked an order 69 * and stuck with it." Norman Ramsey. 70 * See http://stackoverflow.com/a/1053662/41661 71 */ 72 73 /******************************************************************************* 74 * 75 * AEST - Arm Error Source Table 76 * 77 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 78 * September 2020. 79 * 80 ******************************************************************************/ 81 82 struct acpi_table_aest { 83 struct acpi_table_header header; 84 void *node_array[]; 85 }; 86 87 /* Common Subtable header - one per Node Structure (Subtable) */ 88 89 struct acpi_aest_hdr { 90 u8 type; 91 u16 length; 92 u8 reserved; 93 u32 node_specific_offset; 94 u32 node_interface_offset; 95 u32 node_interrupt_offset; 96 u32 node_interrupt_count; 97 u64 timestamp_rate; 98 u64 reserved1; 99 u64 error_injection_rate; 100 }; 101 102 /* Values for Type above */ 103 104 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 105 #define ACPI_AEST_MEMORY_ERROR_NODE 1 106 #define ACPI_AEST_SMMU_ERROR_NODE 2 107 #define ACPI_AEST_VENDOR_ERROR_NODE 3 108 #define ACPI_AEST_GIC_ERROR_NODE 4 109 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 110 111 /* 112 * AEST subtables (Error nodes) 113 */ 114 115 /* 0: Processor Error */ 116 117 typedef struct acpi_aest_processor { 118 u32 processor_id; 119 u8 resource_type; 120 u8 reserved; 121 u8 flags; 122 u8 revision; 123 u64 processor_affinity; 124 125 } acpi_aest_processor; 126 127 /* Values for resource_type above, related structs below */ 128 129 #define ACPI_AEST_CACHE_RESOURCE 0 130 #define ACPI_AEST_TLB_RESOURCE 1 131 #define ACPI_AEST_GENERIC_RESOURCE 2 132 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 133 134 /* 0R: Processor Cache Resource Substructure */ 135 136 typedef struct acpi_aest_processor_cache { 137 u32 cache_reference; 138 u32 reserved; 139 140 } acpi_aest_processor_cache; 141 142 /* Values for cache_type above */ 143 144 #define ACPI_AEST_CACHE_DATA 0 145 #define ACPI_AEST_CACHE_INSTRUCTION 1 146 #define ACPI_AEST_CACHE_UNIFIED 2 147 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 148 149 /* 1R: Processor TLB Resource Substructure */ 150 151 typedef struct acpi_aest_processor_tlb { 152 u32 tlb_level; 153 u32 reserved; 154 155 } acpi_aest_processor_tlb; 156 157 /* 2R: Processor Generic Resource Substructure */ 158 159 typedef struct acpi_aest_processor_generic { 160 u32 resource; 161 162 } acpi_aest_processor_generic; 163 164 /* 1: Memory Error */ 165 166 typedef struct acpi_aest_memory { 167 u32 srat_proximity_domain; 168 169 } acpi_aest_memory; 170 171 /* 2: Smmu Error */ 172 173 typedef struct acpi_aest_smmu { 174 u32 iort_node_reference; 175 u32 subcomponent_reference; 176 177 } acpi_aest_smmu; 178 179 /* 3: Vendor Defined */ 180 181 typedef struct acpi_aest_vendor { 182 u32 acpi_hid; 183 u32 acpi_uid; 184 u8 vendor_specific_data[16]; 185 186 } acpi_aest_vendor; 187 188 /* 4: Gic Error */ 189 190 typedef struct acpi_aest_gic { 191 u32 interface_type; 192 u32 instance_id; 193 194 } acpi_aest_gic; 195 196 /* Values for interface_type above */ 197 198 #define ACPI_AEST_GIC_CPU 0 199 #define ACPI_AEST_GIC_DISTRIBUTOR 1 200 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 201 #define ACPI_AEST_GIC_ITS 3 202 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 203 204 /* Node Interface Structure */ 205 206 typedef struct acpi_aest_node_interface { 207 u8 type; 208 u8 reserved[3]; 209 u32 flags; 210 u64 address; 211 u32 error_record_index; 212 u32 error_record_count; 213 u64 error_record_implemented; 214 u64 error_status_reporting; 215 u64 addressing_mode; 216 217 } acpi_aest_node_interface; 218 219 /* Values for Type field above */ 220 221 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 222 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 223 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 224 225 /* Node Interrupt Structure */ 226 227 typedef struct acpi_aest_node_interrupt { 228 u8 type; 229 u8 reserved[2]; 230 u8 flags; 231 u32 gsiv; 232 u8 iort_id; 233 u8 reserved1[3]; 234 235 } acpi_aest_node_interrupt; 236 237 /* Values for Type field above */ 238 239 #define ACPI_AEST_NODE_FAULT_HANDLING 0 240 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 241 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 242 243 /******************************************************************************* 244 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 245 * 246 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 247 * ARM DEN0093 v1.1 248 * 249 ******************************************************************************/ 250 struct acpi_table_agdi { 251 struct acpi_table_header header; /* Common ACPI table header */ 252 u8 flags; 253 u8 reserved[3]; 254 u32 sdei_event; 255 u32 gsiv; 256 }; 257 258 /* Mask for Flags field above */ 259 260 #define ACPI_AGDI_SIGNALING_MODE (1) 261 262 /******************************************************************************* 263 * 264 * APMT - ARM Performance Monitoring Unit Table 265 * 266 * Conforms to: 267 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 268 * ARM DEN0117 v1.0 November 25, 2021 269 * 270 ******************************************************************************/ 271 272 struct acpi_table_apmt { 273 struct acpi_table_header header; /* Common ACPI table header */ 274 }; 275 276 #define ACPI_APMT_NODE_ID_LENGTH 4 277 278 /* 279 * APMT subtables 280 */ 281 struct acpi_apmt_node { 282 u16 length; 283 u8 flags; 284 u8 type; 285 u32 id; 286 u64 inst_primary; 287 u32 inst_secondary; 288 u64 base_address0; 289 u64 base_address1; 290 u32 ovflw_irq; 291 u32 reserved; 292 u32 ovflw_irq_flags; 293 u32 proc_affinity; 294 u32 impl_id; 295 }; 296 297 /* Masks for Flags field above */ 298 299 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 300 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 301 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 302 303 /* Values for Flags dual page field above */ 304 305 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 306 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 307 308 /* Values for Flags processor affinity field above */ 309 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 310 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 311 312 /* Values for Flags 64-bit atomic field above */ 313 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 314 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 315 316 /* Values for Type field above */ 317 318 enum acpi_apmt_node_type { 319 ACPI_APMT_NODE_TYPE_MC = 0x00, 320 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 321 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 322 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 323 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 324 ACPI_APMT_NODE_TYPE_COUNT 325 }; 326 327 /* Masks for ovflw_irq_flags field above */ 328 329 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 330 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 331 332 /* Values for ovflw_irq_flags mode field above */ 333 334 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 335 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 336 337 /* Values for ovflw_irq_flags type field above */ 338 339 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 340 341 /******************************************************************************* 342 * 343 * BDAT - BIOS Data ACPI Table 344 * 345 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 346 * Nov 2020 347 * 348 ******************************************************************************/ 349 350 struct acpi_table_bdat { 351 struct acpi_table_header header; 352 struct acpi_generic_address gas; 353 }; 354 355 /******************************************************************************* 356 * 357 * IORT - IO Remapping Table 358 * 359 * Conforms to "IO Remapping Table System Software on ARM Platforms", 360 * Document number: ARM DEN 0049E.b, Feb 2021 361 * 362 ******************************************************************************/ 363 364 struct acpi_table_iort { 365 struct acpi_table_header header; 366 u32 node_count; 367 u32 node_offset; 368 u32 reserved; 369 }; 370 371 /* 372 * IORT subtables 373 */ 374 struct acpi_iort_node { 375 u8 type; 376 u16 length; 377 u8 revision; 378 u32 identifier; 379 u32 mapping_count; 380 u32 mapping_offset; 381 char node_data[1]; 382 }; 383 384 /* Values for subtable Type above */ 385 386 enum acpi_iort_node_type { 387 ACPI_IORT_NODE_ITS_GROUP = 0x00, 388 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 389 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 390 ACPI_IORT_NODE_SMMU = 0x03, 391 ACPI_IORT_NODE_SMMU_V3 = 0x04, 392 ACPI_IORT_NODE_PMCG = 0x05, 393 ACPI_IORT_NODE_RMR = 0x06, 394 }; 395 396 struct acpi_iort_id_mapping { 397 u32 input_base; /* Lowest value in input range */ 398 u32 id_count; /* Number of IDs */ 399 u32 output_base; /* Lowest value in output range */ 400 u32 output_reference; /* A reference to the output node */ 401 u32 flags; 402 }; 403 404 /* Masks for Flags field above for IORT subtable */ 405 406 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 407 408 struct acpi_iort_memory_access { 409 u32 cache_coherency; 410 u8 hints; 411 u16 reserved; 412 u8 memory_flags; 413 }; 414 415 /* Values for cache_coherency field above */ 416 417 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 418 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 419 420 /* Masks for Hints field above */ 421 422 #define ACPI_IORT_HT_TRANSIENT (1) 423 #define ACPI_IORT_HT_WRITE (1<<1) 424 #define ACPI_IORT_HT_READ (1<<2) 425 #define ACPI_IORT_HT_OVERRIDE (1<<3) 426 427 /* Masks for memory_flags field above */ 428 429 #define ACPI_IORT_MF_COHERENCY (1) 430 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 431 432 /* 433 * IORT node specific subtables 434 */ 435 struct acpi_iort_its_group { 436 u32 its_count; 437 u32 identifiers[1]; /* GIC ITS identifier array */ 438 }; 439 440 struct acpi_iort_named_component { 441 u32 node_flags; 442 u64 memory_properties; /* Memory access properties */ 443 u8 memory_address_limit; /* Memory address size limit */ 444 char device_name[1]; /* Path of namespace object */ 445 }; 446 447 /* Masks for Flags field above */ 448 449 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 450 #define ACPI_IORT_NC_PASID_BITS (31<<1) 451 452 struct acpi_iort_root_complex { 453 u64 memory_properties; /* Memory access properties */ 454 u32 ats_attribute; 455 u32 pci_segment_number; 456 u8 memory_address_limit; /* Memory address size limit */ 457 u8 reserved[3]; /* Reserved, must be zero */ 458 }; 459 460 /* Masks for ats_attribute field above */ 461 462 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 463 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 464 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 465 466 struct acpi_iort_smmu { 467 u64 base_address; /* SMMU base address */ 468 u64 span; /* Length of memory range */ 469 u32 model; 470 u32 flags; 471 u32 global_interrupt_offset; 472 u32 context_interrupt_count; 473 u32 context_interrupt_offset; 474 u32 pmu_interrupt_count; 475 u32 pmu_interrupt_offset; 476 u64 interrupts[1]; /* Interrupt array */ 477 }; 478 479 /* Values for Model field above */ 480 481 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 482 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 483 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 484 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 485 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 486 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 487 488 /* Masks for Flags field above */ 489 490 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 491 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 492 493 /* Global interrupt format */ 494 495 struct acpi_iort_smmu_gsi { 496 u32 nsg_irpt; 497 u32 nsg_irpt_flags; 498 u32 nsg_cfg_irpt; 499 u32 nsg_cfg_irpt_flags; 500 }; 501 502 struct acpi_iort_smmu_v3 { 503 u64 base_address; /* SMMUv3 base address */ 504 u32 flags; 505 u32 reserved; 506 u64 vatos_address; 507 u32 model; 508 u32 event_gsiv; 509 u32 pri_gsiv; 510 u32 gerr_gsiv; 511 u32 sync_gsiv; 512 u32 pxm; 513 u32 id_mapping_index; 514 }; 515 516 /* Values for Model field above */ 517 518 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 519 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 520 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 521 522 /* Masks for Flags field above */ 523 524 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 525 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 526 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 527 528 struct acpi_iort_pmcg { 529 u64 page0_base_address; 530 u32 overflow_gsiv; 531 u32 node_reference; 532 u64 page1_base_address; 533 }; 534 535 struct acpi_iort_rmr { 536 u32 flags; 537 u32 rmr_count; 538 u32 rmr_offset; 539 }; 540 541 struct acpi_iort_rmr_desc { 542 u64 base_address; 543 u64 length; 544 u32 reserved; 545 }; 546 547 /******************************************************************************* 548 * 549 * IVRS - I/O Virtualization Reporting Structure 550 * Version 1 551 * 552 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 553 * Revision 1.26, February 2009. 554 * 555 ******************************************************************************/ 556 557 struct acpi_table_ivrs { 558 struct acpi_table_header header; /* Common ACPI table header */ 559 u32 info; /* Common virtualization info */ 560 u64 reserved; 561 }; 562 563 /* Values for Info field above */ 564 565 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 566 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 567 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 568 569 /* IVRS subtable header */ 570 571 struct acpi_ivrs_header { 572 u8 type; /* Subtable type */ 573 u8 flags; 574 u16 length; /* Subtable length */ 575 u16 device_id; /* ID of IOMMU */ 576 }; 577 578 /* Values for subtable Type above */ 579 580 enum acpi_ivrs_type { 581 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 582 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 583 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 584 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 585 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 586 ACPI_IVRS_TYPE_MEMORY3 = 0x22 587 }; 588 589 /* Masks for Flags field above for IVHD subtable */ 590 591 #define ACPI_IVHD_TT_ENABLE (1) 592 #define ACPI_IVHD_PASS_PW (1<<1) 593 #define ACPI_IVHD_RES_PASS_PW (1<<2) 594 #define ACPI_IVHD_ISOC (1<<3) 595 #define ACPI_IVHD_IOTLB (1<<4) 596 597 /* Masks for Flags field above for IVMD subtable */ 598 599 #define ACPI_IVMD_UNITY (1) 600 #define ACPI_IVMD_READ (1<<1) 601 #define ACPI_IVMD_WRITE (1<<2) 602 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 603 604 /* 605 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 606 */ 607 608 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 609 610 struct acpi_ivrs_hardware_10 { 611 struct acpi_ivrs_header header; 612 u16 capability_offset; /* Offset for IOMMU control fields */ 613 u64 base_address; /* IOMMU control registers */ 614 u16 pci_segment_group; 615 u16 info; /* MSI number and unit ID */ 616 u32 feature_reporting; 617 }; 618 619 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 620 621 struct acpi_ivrs_hardware_11 { 622 struct acpi_ivrs_header header; 623 u16 capability_offset; /* Offset for IOMMU control fields */ 624 u64 base_address; /* IOMMU control registers */ 625 u16 pci_segment_group; 626 u16 info; /* MSI number and unit ID */ 627 u32 attributes; 628 u64 efr_register_image; 629 u64 reserved; 630 }; 631 632 /* Masks for Info field above */ 633 634 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 635 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 636 637 /* 638 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 639 * Upper two bits of the Type field are the (encoded) length of the structure. 640 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 641 * are reserved for future use but not defined. 642 */ 643 struct acpi_ivrs_de_header { 644 u8 type; 645 u16 id; 646 u8 data_setting; 647 }; 648 649 /* Length of device entry is in the top two bits of Type field above */ 650 651 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 652 653 /* Values for device entry Type field above */ 654 655 enum acpi_ivrs_device_entry_type { 656 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 657 658 ACPI_IVRS_TYPE_PAD4 = 0, 659 ACPI_IVRS_TYPE_ALL = 1, 660 ACPI_IVRS_TYPE_SELECT = 2, 661 ACPI_IVRS_TYPE_START = 3, 662 ACPI_IVRS_TYPE_END = 4, 663 664 /* 8-byte device entries */ 665 666 ACPI_IVRS_TYPE_PAD8 = 64, 667 ACPI_IVRS_TYPE_NOT_USED = 65, 668 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 669 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 670 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 671 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 672 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 673 674 /* Variable-length device entries */ 675 676 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 677 }; 678 679 /* Values for Data field above */ 680 681 #define ACPI_IVHD_INIT_PASS (1) 682 #define ACPI_IVHD_EINT_PASS (1<<1) 683 #define ACPI_IVHD_NMI_PASS (1<<2) 684 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 685 #define ACPI_IVHD_LINT0_PASS (1<<6) 686 #define ACPI_IVHD_LINT1_PASS (1<<7) 687 688 /* Types 0-4: 4-byte device entry */ 689 690 struct acpi_ivrs_device4 { 691 struct acpi_ivrs_de_header header; 692 }; 693 694 /* Types 66-67: 8-byte device entry */ 695 696 struct acpi_ivrs_device8a { 697 struct acpi_ivrs_de_header header; 698 u8 reserved1; 699 u16 used_id; 700 u8 reserved2; 701 }; 702 703 /* Types 70-71: 8-byte device entry */ 704 705 struct acpi_ivrs_device8b { 706 struct acpi_ivrs_de_header header; 707 u32 extended_data; 708 }; 709 710 /* Values for extended_data above */ 711 712 #define ACPI_IVHD_ATS_DISABLED (1<<31) 713 714 /* Type 72: 8-byte device entry */ 715 716 struct acpi_ivrs_device8c { 717 struct acpi_ivrs_de_header header; 718 u8 handle; 719 u16 used_id; 720 u8 variety; 721 }; 722 723 /* Values for Variety field above */ 724 725 #define ACPI_IVHD_IOAPIC 1 726 #define ACPI_IVHD_HPET 2 727 728 /* Type 240: variable-length device entry */ 729 730 struct acpi_ivrs_device_hid { 731 struct acpi_ivrs_de_header header; 732 u64 acpi_hid; 733 u64 acpi_cid; 734 u8 uid_type; 735 u8 uid_length; 736 }; 737 738 /* Values for uid_type above */ 739 740 #define ACPI_IVRS_UID_NOT_PRESENT 0 741 #define ACPI_IVRS_UID_IS_INTEGER 1 742 #define ACPI_IVRS_UID_IS_STRING 2 743 744 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 745 746 struct acpi_ivrs_memory { 747 struct acpi_ivrs_header header; 748 u16 aux_data; 749 u64 reserved; 750 u64 start_address; 751 u64 memory_length; 752 }; 753 754 /******************************************************************************* 755 * 756 * LPIT - Low Power Idle Table 757 * 758 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 759 * 760 ******************************************************************************/ 761 762 struct acpi_table_lpit { 763 struct acpi_table_header header; /* Common ACPI table header */ 764 }; 765 766 /* LPIT subtable header */ 767 768 struct acpi_lpit_header { 769 u32 type; /* Subtable type */ 770 u32 length; /* Subtable length */ 771 u16 unique_id; 772 u16 reserved; 773 u32 flags; 774 }; 775 776 /* Values for subtable Type above */ 777 778 enum acpi_lpit_type { 779 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 780 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 781 }; 782 783 /* Masks for Flags field above */ 784 785 #define ACPI_LPIT_STATE_DISABLED (1) 786 #define ACPI_LPIT_NO_COUNTER (1<<1) 787 788 /* 789 * LPIT subtables, correspond to Type in struct acpi_lpit_header 790 */ 791 792 /* 0x00: Native C-state instruction based LPI structure */ 793 794 struct acpi_lpit_native { 795 struct acpi_lpit_header header; 796 struct acpi_generic_address entry_trigger; 797 u32 residency; 798 u32 latency; 799 struct acpi_generic_address residency_counter; 800 u64 counter_frequency; 801 }; 802 803 /******************************************************************************* 804 * 805 * MADT - Multiple APIC Description Table 806 * Version 3 807 * 808 ******************************************************************************/ 809 810 struct acpi_table_madt { 811 struct acpi_table_header header; /* Common ACPI table header */ 812 u32 address; /* Physical address of local APIC */ 813 u32 flags; 814 }; 815 816 /* Masks for Flags field above */ 817 818 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 819 820 /* Values for PCATCompat flag */ 821 822 #define ACPI_MADT_DUAL_PIC 1 823 #define ACPI_MADT_MULTIPLE_APIC 0 824 825 /* Values for MADT subtable type in struct acpi_subtable_header */ 826 827 enum acpi_madt_type { 828 ACPI_MADT_TYPE_LOCAL_APIC = 0, 829 ACPI_MADT_TYPE_IO_APIC = 1, 830 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 831 ACPI_MADT_TYPE_NMI_SOURCE = 3, 832 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 833 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 834 ACPI_MADT_TYPE_IO_SAPIC = 6, 835 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 836 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 837 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 838 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 839 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 840 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 841 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 842 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 843 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 844 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 845 ACPI_MADT_TYPE_RESERVED = 17, /* 17 to 0x7F are reserved */ 846 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 847 }; 848 849 /* 850 * MADT Subtables, correspond to Type in struct acpi_subtable_header 851 */ 852 853 /* 0: Processor Local APIC */ 854 855 struct acpi_madt_local_apic { 856 struct acpi_subtable_header header; 857 u8 processor_id; /* ACPI processor id */ 858 u8 id; /* Processor's local APIC id */ 859 u32 lapic_flags; 860 }; 861 862 /* 1: IO APIC */ 863 864 struct acpi_madt_io_apic { 865 struct acpi_subtable_header header; 866 u8 id; /* I/O APIC ID */ 867 u8 reserved; /* reserved - must be zero */ 868 u32 address; /* APIC physical address */ 869 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 870 }; 871 872 /* 2: Interrupt Override */ 873 874 struct acpi_madt_interrupt_override { 875 struct acpi_subtable_header header; 876 u8 bus; /* 0 - ISA */ 877 u8 source_irq; /* Interrupt source (IRQ) */ 878 u32 global_irq; /* Global system interrupt */ 879 u16 inti_flags; 880 }; 881 882 /* 3: NMI Source */ 883 884 struct acpi_madt_nmi_source { 885 struct acpi_subtable_header header; 886 u16 inti_flags; 887 u32 global_irq; /* Global system interrupt */ 888 }; 889 890 /* 4: Local APIC NMI */ 891 892 struct acpi_madt_local_apic_nmi { 893 struct acpi_subtable_header header; 894 u8 processor_id; /* ACPI processor id */ 895 u16 inti_flags; 896 u8 lint; /* LINTn to which NMI is connected */ 897 }; 898 899 /* 5: Address Override */ 900 901 struct acpi_madt_local_apic_override { 902 struct acpi_subtable_header header; 903 u16 reserved; /* Reserved, must be zero */ 904 u64 address; /* APIC physical address */ 905 }; 906 907 /* 6: I/O Sapic */ 908 909 struct acpi_madt_io_sapic { 910 struct acpi_subtable_header header; 911 u8 id; /* I/O SAPIC ID */ 912 u8 reserved; /* Reserved, must be zero */ 913 u32 global_irq_base; /* Global interrupt for SAPIC start */ 914 u64 address; /* SAPIC physical address */ 915 }; 916 917 /* 7: Local Sapic */ 918 919 struct acpi_madt_local_sapic { 920 struct acpi_subtable_header header; 921 u8 processor_id; /* ACPI processor id */ 922 u8 id; /* SAPIC ID */ 923 u8 eid; /* SAPIC EID */ 924 u8 reserved[3]; /* Reserved, must be zero */ 925 u32 lapic_flags; 926 u32 uid; /* Numeric UID - ACPI 3.0 */ 927 char uid_string[1]; /* String UID - ACPI 3.0 */ 928 }; 929 930 /* 8: Platform Interrupt Source */ 931 932 struct acpi_madt_interrupt_source { 933 struct acpi_subtable_header header; 934 u16 inti_flags; 935 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 936 u8 id; /* Processor ID */ 937 u8 eid; /* Processor EID */ 938 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 939 u32 global_irq; /* Global system interrupt */ 940 u32 flags; /* Interrupt Source Flags */ 941 }; 942 943 /* Masks for Flags field above */ 944 945 #define ACPI_MADT_CPEI_OVERRIDE (1) 946 947 /* 9: Processor Local X2APIC (ACPI 4.0) */ 948 949 struct acpi_madt_local_x2apic { 950 struct acpi_subtable_header header; 951 u16 reserved; /* reserved - must be zero */ 952 u32 local_apic_id; /* Processor x2APIC ID */ 953 u32 lapic_flags; 954 u32 uid; /* ACPI processor UID */ 955 }; 956 957 /* 10: Local X2APIC NMI (ACPI 4.0) */ 958 959 struct acpi_madt_local_x2apic_nmi { 960 struct acpi_subtable_header header; 961 u16 inti_flags; 962 u32 uid; /* ACPI processor UID */ 963 u8 lint; /* LINTn to which NMI is connected */ 964 u8 reserved[3]; /* reserved - must be zero */ 965 }; 966 967 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 968 969 struct acpi_madt_generic_interrupt { 970 struct acpi_subtable_header header; 971 u16 reserved; /* reserved - must be zero */ 972 u32 cpu_interface_number; 973 u32 uid; 974 u32 flags; 975 u32 parking_version; 976 u32 performance_interrupt; 977 u64 parked_address; 978 u64 base_address; 979 u64 gicv_base_address; 980 u64 gich_base_address; 981 u32 vgic_interrupt; 982 u64 gicr_base_address; 983 u64 arm_mpidr; 984 u8 efficiency_class; 985 u8 reserved2[1]; 986 u16 spe_interrupt; /* ACPI 6.3 */ 987 }; 988 989 /* Masks for Flags field above */ 990 991 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 992 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 993 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 994 995 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 996 997 struct acpi_madt_generic_distributor { 998 struct acpi_subtable_header header; 999 u16 reserved; /* reserved - must be zero */ 1000 u32 gic_id; 1001 u64 base_address; 1002 u32 global_irq_base; 1003 u8 version; 1004 u8 reserved2[3]; /* reserved - must be zero */ 1005 }; 1006 1007 /* Values for Version field above */ 1008 1009 enum acpi_madt_gic_version { 1010 ACPI_MADT_GIC_VERSION_NONE = 0, 1011 ACPI_MADT_GIC_VERSION_V1 = 1, 1012 ACPI_MADT_GIC_VERSION_V2 = 2, 1013 ACPI_MADT_GIC_VERSION_V3 = 3, 1014 ACPI_MADT_GIC_VERSION_V4 = 4, 1015 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1016 }; 1017 1018 /* 13: Generic MSI Frame (ACPI 5.1) */ 1019 1020 struct acpi_madt_generic_msi_frame { 1021 struct acpi_subtable_header header; 1022 u16 reserved; /* reserved - must be zero */ 1023 u32 msi_frame_id; 1024 u64 base_address; 1025 u32 flags; 1026 u16 spi_count; 1027 u16 spi_base; 1028 }; 1029 1030 /* Masks for Flags field above */ 1031 1032 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1033 1034 /* 14: Generic Redistributor (ACPI 5.1) */ 1035 1036 struct acpi_madt_generic_redistributor { 1037 struct acpi_subtable_header header; 1038 u16 reserved; /* reserved - must be zero */ 1039 u64 base_address; 1040 u32 length; 1041 }; 1042 1043 /* 15: Generic Translator (ACPI 6.0) */ 1044 1045 struct acpi_madt_generic_translator { 1046 struct acpi_subtable_header header; 1047 u16 reserved; /* reserved - must be zero */ 1048 u32 translation_id; 1049 u64 base_address; 1050 u32 reserved2; 1051 }; 1052 1053 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1054 1055 struct acpi_madt_multiproc_wakeup { 1056 struct acpi_subtable_header header; 1057 u16 mailbox_version; 1058 u32 reserved; /* reserved - must be zero */ 1059 u64 base_address; 1060 }; 1061 1062 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1063 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1064 1065 struct acpi_madt_multiproc_wakeup_mailbox { 1066 u16 command; 1067 u16 reserved; /* reserved - must be zero */ 1068 u32 apic_id; 1069 u64 wakeup_vector; 1070 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1071 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1072 }; 1073 1074 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1075 1076 /* 17: OEM data */ 1077 1078 struct acpi_madt_oem_data { 1079 u8 oem_data[0]; 1080 }; 1081 1082 /* 1083 * Common flags fields for MADT subtables 1084 */ 1085 1086 /* MADT Local APIC flags */ 1087 1088 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1089 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1090 1091 /* MADT MPS INTI flags (inti_flags) */ 1092 1093 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1094 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1095 1096 /* Values for MPS INTI flags */ 1097 1098 #define ACPI_MADT_POLARITY_CONFORMS 0 1099 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1100 #define ACPI_MADT_POLARITY_RESERVED 2 1101 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1102 1103 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1104 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1105 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1106 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1107 1108 /******************************************************************************* 1109 * 1110 * MCFG - PCI Memory Mapped Configuration table and subtable 1111 * Version 1 1112 * 1113 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1114 * 1115 ******************************************************************************/ 1116 1117 struct acpi_table_mcfg { 1118 struct acpi_table_header header; /* Common ACPI table header */ 1119 u8 reserved[8]; 1120 }; 1121 1122 /* Subtable */ 1123 1124 struct acpi_mcfg_allocation { 1125 u64 address; /* Base address, processor-relative */ 1126 u16 pci_segment; /* PCI segment group number */ 1127 u8 start_bus_number; /* Starting PCI Bus number */ 1128 u8 end_bus_number; /* Final PCI Bus number */ 1129 u32 reserved; 1130 }; 1131 1132 /******************************************************************************* 1133 * 1134 * MCHI - Management Controller Host Interface Table 1135 * Version 1 1136 * 1137 * Conforms to "Management Component Transport Protocol (MCTP) Host 1138 * Interface Specification", Revision 1.0.0a, October 13, 2009 1139 * 1140 ******************************************************************************/ 1141 1142 struct acpi_table_mchi { 1143 struct acpi_table_header header; /* Common ACPI table header */ 1144 u8 interface_type; 1145 u8 protocol; 1146 u64 protocol_data; 1147 u8 interrupt_type; 1148 u8 gpe; 1149 u8 pci_device_flag; 1150 u32 global_interrupt; 1151 struct acpi_generic_address control_register; 1152 u8 pci_segment; 1153 u8 pci_bus; 1154 u8 pci_device; 1155 u8 pci_function; 1156 }; 1157 1158 /******************************************************************************* 1159 * 1160 * MPST - Memory Power State Table (ACPI 5.0) 1161 * Version 1 1162 * 1163 ******************************************************************************/ 1164 1165 #define ACPI_MPST_CHANNEL_INFO \ 1166 u8 channel_id; \ 1167 u8 reserved1[3]; \ 1168 u16 power_node_count; \ 1169 u16 reserved2; 1170 1171 /* Main table */ 1172 1173 struct acpi_table_mpst { 1174 struct acpi_table_header header; /* Common ACPI table header */ 1175 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1176 }; 1177 1178 /* Memory Platform Communication Channel Info */ 1179 1180 struct acpi_mpst_channel { 1181 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1182 }; 1183 1184 /* Memory Power Node Structure */ 1185 1186 struct acpi_mpst_power_node { 1187 u8 flags; 1188 u8 reserved1; 1189 u16 node_id; 1190 u32 length; 1191 u64 range_address; 1192 u64 range_length; 1193 u32 num_power_states; 1194 u32 num_physical_components; 1195 }; 1196 1197 /* Values for Flags field above */ 1198 1199 #define ACPI_MPST_ENABLED 1 1200 #define ACPI_MPST_POWER_MANAGED 2 1201 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1202 1203 /* Memory Power State Structure (follows POWER_NODE above) */ 1204 1205 struct acpi_mpst_power_state { 1206 u8 power_state; 1207 u8 info_index; 1208 }; 1209 1210 /* Physical Component ID Structure (follows POWER_STATE above) */ 1211 1212 struct acpi_mpst_component { 1213 u16 component_id; 1214 }; 1215 1216 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1217 1218 struct acpi_mpst_data_hdr { 1219 u16 characteristics_count; 1220 u16 reserved; 1221 }; 1222 1223 struct acpi_mpst_power_data { 1224 u8 structure_id; 1225 u8 flags; 1226 u16 reserved1; 1227 u32 average_power; 1228 u32 power_saving; 1229 u64 exit_latency; 1230 u64 reserved2; 1231 }; 1232 1233 /* Values for Flags field above */ 1234 1235 #define ACPI_MPST_PRESERVE 1 1236 #define ACPI_MPST_AUTOENTRY 2 1237 #define ACPI_MPST_AUTOEXIT 4 1238 1239 /* Shared Memory Region (not part of an ACPI table) */ 1240 1241 struct acpi_mpst_shared { 1242 u32 signature; 1243 u16 pcc_command; 1244 u16 pcc_status; 1245 u32 command_register; 1246 u32 status_register; 1247 u32 power_state_id; 1248 u32 power_node_id; 1249 u64 energy_consumed; 1250 u64 average_power; 1251 }; 1252 1253 /******************************************************************************* 1254 * 1255 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1256 * Version 1 1257 * 1258 ******************************************************************************/ 1259 1260 struct acpi_table_msct { 1261 struct acpi_table_header header; /* Common ACPI table header */ 1262 u32 proximity_offset; /* Location of proximity info struct(s) */ 1263 u32 max_proximity_domains; /* Max number of proximity domains */ 1264 u32 max_clock_domains; /* Max number of clock domains */ 1265 u64 max_address; /* Max physical address in system */ 1266 }; 1267 1268 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1269 1270 struct acpi_msct_proximity { 1271 u8 revision; 1272 u8 length; 1273 u32 range_start; /* Start of domain range */ 1274 u32 range_end; /* End of domain range */ 1275 u32 processor_capacity; 1276 u64 memory_capacity; /* In bytes */ 1277 }; 1278 1279 /******************************************************************************* 1280 * 1281 * MSDM - Microsoft Data Management table 1282 * 1283 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1284 * November 29, 2011. Copyright 2011 Microsoft 1285 * 1286 ******************************************************************************/ 1287 1288 /* Basic MSDM table is only the common ACPI header */ 1289 1290 struct acpi_table_msdm { 1291 struct acpi_table_header header; /* Common ACPI table header */ 1292 }; 1293 1294 /******************************************************************************* 1295 * 1296 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1297 * Version 1 1298 * 1299 ******************************************************************************/ 1300 1301 struct acpi_table_nfit { 1302 struct acpi_table_header header; /* Common ACPI table header */ 1303 u32 reserved; /* Reserved, must be zero */ 1304 }; 1305 1306 /* Subtable header for NFIT */ 1307 1308 struct acpi_nfit_header { 1309 u16 type; 1310 u16 length; 1311 }; 1312 1313 /* Values for subtable type in struct acpi_nfit_header */ 1314 1315 enum acpi_nfit_type { 1316 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1317 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1318 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1319 ACPI_NFIT_TYPE_SMBIOS = 3, 1320 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1321 ACPI_NFIT_TYPE_DATA_REGION = 5, 1322 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1323 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1324 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1325 }; 1326 1327 /* 1328 * NFIT Subtables 1329 */ 1330 1331 /* 0: System Physical Address Range Structure */ 1332 1333 struct acpi_nfit_system_address { 1334 struct acpi_nfit_header header; 1335 u16 range_index; 1336 u16 flags; 1337 u32 reserved; /* Reserved, must be zero */ 1338 u32 proximity_domain; 1339 u8 range_guid[16]; 1340 u64 address; 1341 u64 length; 1342 u64 memory_mapping; 1343 u64 location_cookie; /* ACPI 6.4 */ 1344 }; 1345 1346 /* Flags */ 1347 1348 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1349 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1350 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1351 1352 /* Range Type GUIDs appear in the include/acuuid.h file */ 1353 1354 /* 1: Memory Device to System Address Range Map Structure */ 1355 1356 struct acpi_nfit_memory_map { 1357 struct acpi_nfit_header header; 1358 u32 device_handle; 1359 u16 physical_id; 1360 u16 region_id; 1361 u16 range_index; 1362 u16 region_index; 1363 u64 region_size; 1364 u64 region_offset; 1365 u64 address; 1366 u16 interleave_index; 1367 u16 interleave_ways; 1368 u16 flags; 1369 u16 reserved; /* Reserved, must be zero */ 1370 }; 1371 1372 /* Flags */ 1373 1374 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1375 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1376 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1377 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1378 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1379 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1380 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1381 1382 /* 2: Interleave Structure */ 1383 1384 struct acpi_nfit_interleave { 1385 struct acpi_nfit_header header; 1386 u16 interleave_index; 1387 u16 reserved; /* Reserved, must be zero */ 1388 u32 line_count; 1389 u32 line_size; 1390 u32 line_offset[1]; /* Variable length */ 1391 }; 1392 1393 /* 3: SMBIOS Management Information Structure */ 1394 1395 struct acpi_nfit_smbios { 1396 struct acpi_nfit_header header; 1397 u32 reserved; /* Reserved, must be zero */ 1398 u8 data[1]; /* Variable length */ 1399 }; 1400 1401 /* 4: NVDIMM Control Region Structure */ 1402 1403 struct acpi_nfit_control_region { 1404 struct acpi_nfit_header header; 1405 u16 region_index; 1406 u16 vendor_id; 1407 u16 device_id; 1408 u16 revision_id; 1409 u16 subsystem_vendor_id; 1410 u16 subsystem_device_id; 1411 u16 subsystem_revision_id; 1412 u8 valid_fields; 1413 u8 manufacturing_location; 1414 u16 manufacturing_date; 1415 u8 reserved[2]; /* Reserved, must be zero */ 1416 u32 serial_number; 1417 u16 code; 1418 u16 windows; 1419 u64 window_size; 1420 u64 command_offset; 1421 u64 command_size; 1422 u64 status_offset; 1423 u64 status_size; 1424 u16 flags; 1425 u8 reserved1[6]; /* Reserved, must be zero */ 1426 }; 1427 1428 /* Flags */ 1429 1430 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1431 1432 /* valid_fields bits */ 1433 1434 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1435 1436 /* 5: NVDIMM Block Data Window Region Structure */ 1437 1438 struct acpi_nfit_data_region { 1439 struct acpi_nfit_header header; 1440 u16 region_index; 1441 u16 windows; 1442 u64 offset; 1443 u64 size; 1444 u64 capacity; 1445 u64 start_address; 1446 }; 1447 1448 /* 6: Flush Hint Address Structure */ 1449 1450 struct acpi_nfit_flush_address { 1451 struct acpi_nfit_header header; 1452 u32 device_handle; 1453 u16 hint_count; 1454 u8 reserved[6]; /* Reserved, must be zero */ 1455 u64 hint_address[1]; /* Variable length */ 1456 }; 1457 1458 /* 7: Platform Capabilities Structure */ 1459 1460 struct acpi_nfit_capabilities { 1461 struct acpi_nfit_header header; 1462 u8 highest_capability; 1463 u8 reserved[3]; /* Reserved, must be zero */ 1464 u32 capabilities; 1465 u32 reserved2; 1466 }; 1467 1468 /* Capabilities Flags */ 1469 1470 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1471 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1472 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1473 1474 /* 1475 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1476 */ 1477 struct nfit_device_handle { 1478 u32 handle; 1479 }; 1480 1481 /* Device handle construction and extraction macros */ 1482 1483 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1484 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1485 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1486 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1487 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1488 1489 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1490 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1491 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1492 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1493 #define ACPI_NFIT_NODE_ID_OFFSET 16 1494 1495 /* Macro to construct a NFIT/NVDIMM device handle */ 1496 1497 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1498 ((dimm) | \ 1499 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1500 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1501 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1502 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1503 1504 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1505 1506 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1507 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1508 1509 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1510 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1511 1512 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1513 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1514 1515 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1516 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1517 1518 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1519 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1520 1521 /******************************************************************************* 1522 * 1523 * NHLT - Non HD Audio Link Table 1524 * 1525 * Conforms to: Intel Smart Sound Technology NHLT Specification 1526 * Version 0.8.1, January 2020. 1527 * 1528 ******************************************************************************/ 1529 1530 /* Main table */ 1531 1532 struct acpi_table_nhlt { 1533 struct acpi_table_header header; /* Common ACPI table header */ 1534 u8 endpoint_count; 1535 }; 1536 1537 struct acpi_nhlt_endpoint { 1538 u32 descriptor_length; 1539 u8 link_type; 1540 u8 instance_id; 1541 u16 vendor_id; 1542 u16 device_id; 1543 u16 revision_id; 1544 u32 subsystem_id; 1545 u8 device_type; 1546 u8 direction; 1547 u8 virtual_bus_id; 1548 }; 1549 1550 /* Types for link_type field above */ 1551 1552 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1553 #define ACPI_NHLT_RESERVED_DSP 1 1554 #define ACPI_NHLT_PDM 2 1555 #define ACPI_NHLT_SSP 3 1556 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1557 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1558 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1559 1560 /* All other values above are reserved */ 1561 1562 /* Values for device_id field above */ 1563 1564 #define ACPI_NHLT_PDM_DMIC 0xAE20 1565 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1566 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1567 1568 /* Values for device_type field above */ 1569 1570 /* SSP Link */ 1571 1572 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1573 #define ACPI_NHLT_LINK_FM 1 1574 #define ACPI_NHLT_LINK_MODEM 2 1575 /* 3 is reserved */ 1576 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1577 1578 /* PDM Link */ 1579 1580 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1581 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1582 1583 /* Values for Direction field above */ 1584 1585 #define ACPI_NHLT_DIR_RENDER 0 1586 #define ACPI_NHLT_DIR_CAPTURE 1 1587 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1588 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1589 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1590 1591 struct acpi_nhlt_device_specific_config { 1592 u32 capabilities_size; 1593 u8 virtual_slot; 1594 u8 config_type; 1595 }; 1596 1597 struct acpi_nhlt_device_specific_config_a { 1598 u32 capabilities_size; 1599 u8 virtual_slot; 1600 u8 config_type; 1601 u8 array_type; 1602 }; 1603 1604 /* Values for Config Type above */ 1605 1606 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1607 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1608 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1609 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1610 1611 struct acpi_nhlt_device_specific_config_b { 1612 u32 capabilities_size; 1613 }; 1614 1615 struct acpi_nhlt_device_specific_config_c { 1616 u32 capabilities_size; 1617 u8 virtual_slot; 1618 }; 1619 1620 struct acpi_nhlt_render_device_specific_config { 1621 u32 capabilities_size; 1622 u8 virtual_slot; 1623 }; 1624 1625 struct acpi_nhlt_wave_extensible { 1626 u16 format_tag; 1627 u16 channel_count; 1628 u32 samples_per_sec; 1629 u32 avg_bytes_per_sec; 1630 u16 block_align; 1631 u16 bits_per_sample; 1632 u16 extra_format_size; 1633 u16 valid_bits_per_sample; 1634 u32 channel_mask; 1635 u8 sub_format_guid[16]; 1636 }; 1637 1638 /* Values for channel_mask above */ 1639 1640 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1641 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1642 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1643 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1644 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1645 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1646 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1647 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1648 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1649 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1650 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1651 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1652 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1653 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1654 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1655 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1656 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1657 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1658 1659 struct acpi_nhlt_format_config { 1660 struct acpi_nhlt_wave_extensible format; 1661 u32 capability_size; 1662 u8 capabilities[]; 1663 }; 1664 1665 struct acpi_nhlt_formats_config { 1666 u8 formats_count; 1667 }; 1668 1669 struct acpi_nhlt_device_specific_hdr { 1670 u8 virtual_slot; 1671 u8 config_type; 1672 }; 1673 1674 /* Types for config_type above */ 1675 1676 #define ACPI_NHLT_GENERIC 0 1677 #define ACPI_NHLT_MIC 1 1678 #define ACPI_NHLT_RENDER 3 1679 1680 struct acpi_nhlt_mic_device_specific_config { 1681 struct acpi_nhlt_device_specific_hdr device_config; 1682 u8 array_type_ext; 1683 }; 1684 1685 /* Values for array_type_ext above */ 1686 1687 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 1688 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 1689 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 1690 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1691 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 1692 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1693 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 1694 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 1695 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 1696 1697 #define ACPI_NHLT_NO_EXTENSION 0x0 1698 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 1699 1700 struct acpi_nhlt_vendor_mic_count { 1701 u8 microphone_count; 1702 }; 1703 1704 struct acpi_nhlt_vendor_mic_config { 1705 u8 type; 1706 u8 panel; 1707 u16 speaker_position_distance; /* mm */ 1708 u16 horizontal_offset; /* mm */ 1709 u16 vertical_offset; /* mm */ 1710 u8 frequency_low_band; /* 5*Hz */ 1711 u8 frequency_high_band; /* 500*Hz */ 1712 u16 direction_angle; /* -180 - + 180 */ 1713 u16 elevation_angle; /* -180 - + 180 */ 1714 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */ 1715 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */ 1716 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */ 1717 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */ 1718 }; 1719 1720 /* Values for Type field above */ 1721 1722 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 1723 #define ACPI_NHLT_MIC_SUBCARDIOID 1 1724 #define ACPI_NHLT_MIC_CARDIOID 2 1725 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 1726 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 1727 #define ACPI_NHLT_MIC_8_SHAPED 5 1728 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 1729 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 1730 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 1731 1732 /* Values for Panel field above */ 1733 1734 #define ACPI_NHLT_MIC_POSITION_TOP 0 1735 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 1736 #define ACPI_NHLT_MIC_POSITION_LEFT 2 1737 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 1738 #define ACPI_NHLT_MIC_POSITION_FRONT 4 1739 #define ACPI_NHLT_MIC_POSITION_BACK 5 1740 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 1741 1742 struct acpi_nhlt_vendor_mic_device_specific_config { 1743 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 1744 u8 number_of_microphones; 1745 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */ 1746 }; 1747 1748 /* Microphone SNR and Sensitivity extension */ 1749 1750 struct acpi_nhlt_mic_snr_sensitivity_extension { 1751 u32 SNR; 1752 u32 sensitivity; 1753 }; 1754 1755 /* Render device with feedback */ 1756 1757 struct acpi_nhlt_render_feedback_device_specific_config { 1758 u8 feedback_virtual_slot; /* Render slot in case of capture */ 1759 u16 feedback_channels; /* Informative only */ 1760 u16 feedback_valid_bits_per_sample; 1761 }; 1762 1763 /* Non documented structures */ 1764 1765 struct acpi_nhlt_device_info_count { 1766 u8 structure_count; 1767 }; 1768 1769 struct acpi_nhlt_device_info { 1770 u8 device_id[16]; 1771 u8 device_instance_id; 1772 u8 device_port_id; 1773 }; 1774 1775 /******************************************************************************* 1776 * 1777 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1778 * Version 2 (ACPI 6.2) 1779 * 1780 ******************************************************************************/ 1781 1782 struct acpi_table_pcct { 1783 struct acpi_table_header header; /* Common ACPI table header */ 1784 u32 flags; 1785 u64 reserved; 1786 }; 1787 1788 /* Values for Flags field above */ 1789 1790 #define ACPI_PCCT_DOORBELL 1 1791 1792 /* Values for subtable type in struct acpi_subtable_header */ 1793 1794 enum acpi_pcct_type { 1795 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1796 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1797 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1798 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1799 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1800 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1801 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1802 }; 1803 1804 /* 1805 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1806 */ 1807 1808 /* 0: Generic Communications Subspace */ 1809 1810 struct acpi_pcct_subspace { 1811 struct acpi_subtable_header header; 1812 u8 reserved[6]; 1813 u64 base_address; 1814 u64 length; 1815 struct acpi_generic_address doorbell_register; 1816 u64 preserve_mask; 1817 u64 write_mask; 1818 u32 latency; 1819 u32 max_access_rate; 1820 u16 min_turnaround_time; 1821 }; 1822 1823 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1824 1825 struct acpi_pcct_hw_reduced { 1826 struct acpi_subtable_header header; 1827 u32 platform_interrupt; 1828 u8 flags; 1829 u8 reserved; 1830 u64 base_address; 1831 u64 length; 1832 struct acpi_generic_address doorbell_register; 1833 u64 preserve_mask; 1834 u64 write_mask; 1835 u32 latency; 1836 u32 max_access_rate; 1837 u16 min_turnaround_time; 1838 }; 1839 1840 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1841 1842 struct acpi_pcct_hw_reduced_type2 { 1843 struct acpi_subtable_header header; 1844 u32 platform_interrupt; 1845 u8 flags; 1846 u8 reserved; 1847 u64 base_address; 1848 u64 length; 1849 struct acpi_generic_address doorbell_register; 1850 u64 preserve_mask; 1851 u64 write_mask; 1852 u32 latency; 1853 u32 max_access_rate; 1854 u16 min_turnaround_time; 1855 struct acpi_generic_address platform_ack_register; 1856 u64 ack_preserve_mask; 1857 u64 ack_write_mask; 1858 }; 1859 1860 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1861 1862 struct acpi_pcct_ext_pcc_master { 1863 struct acpi_subtable_header header; 1864 u32 platform_interrupt; 1865 u8 flags; 1866 u8 reserved1; 1867 u64 base_address; 1868 u32 length; 1869 struct acpi_generic_address doorbell_register; 1870 u64 preserve_mask; 1871 u64 write_mask; 1872 u32 latency; 1873 u32 max_access_rate; 1874 u32 min_turnaround_time; 1875 struct acpi_generic_address platform_ack_register; 1876 u64 ack_preserve_mask; 1877 u64 ack_set_mask; 1878 u64 reserved2; 1879 struct acpi_generic_address cmd_complete_register; 1880 u64 cmd_complete_mask; 1881 struct acpi_generic_address cmd_update_register; 1882 u64 cmd_update_preserve_mask; 1883 u64 cmd_update_set_mask; 1884 struct acpi_generic_address error_status_register; 1885 u64 error_status_mask; 1886 }; 1887 1888 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1889 1890 struct acpi_pcct_ext_pcc_slave { 1891 struct acpi_subtable_header header; 1892 u32 platform_interrupt; 1893 u8 flags; 1894 u8 reserved1; 1895 u64 base_address; 1896 u32 length; 1897 struct acpi_generic_address doorbell_register; 1898 u64 preserve_mask; 1899 u64 write_mask; 1900 u32 latency; 1901 u32 max_access_rate; 1902 u32 min_turnaround_time; 1903 struct acpi_generic_address platform_ack_register; 1904 u64 ack_preserve_mask; 1905 u64 ack_set_mask; 1906 u64 reserved2; 1907 struct acpi_generic_address cmd_complete_register; 1908 u64 cmd_complete_mask; 1909 struct acpi_generic_address cmd_update_register; 1910 u64 cmd_update_preserve_mask; 1911 u64 cmd_update_set_mask; 1912 struct acpi_generic_address error_status_register; 1913 u64 error_status_mask; 1914 }; 1915 1916 /* 5: HW Registers based Communications Subspace */ 1917 1918 struct acpi_pcct_hw_reg { 1919 struct acpi_subtable_header header; 1920 u16 version; 1921 u64 base_address; 1922 u64 length; 1923 struct acpi_generic_address doorbell_register; 1924 u64 doorbell_preserve; 1925 u64 doorbell_write; 1926 struct acpi_generic_address cmd_complete_register; 1927 u64 cmd_complete_mask; 1928 struct acpi_generic_address error_status_register; 1929 u64 error_status_mask; 1930 u32 nominal_latency; 1931 u32 min_turnaround_time; 1932 }; 1933 1934 /* Values for doorbell flags above */ 1935 1936 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1937 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1938 1939 /* 1940 * PCC memory structures (not part of the ACPI table) 1941 */ 1942 1943 /* Shared Memory Region */ 1944 1945 struct acpi_pcct_shared_memory { 1946 u32 signature; 1947 u16 command; 1948 u16 status; 1949 }; 1950 1951 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1952 1953 struct acpi_pcct_ext_pcc_shared_memory { 1954 u32 signature; 1955 u32 flags; 1956 u32 length; 1957 u32 command; 1958 }; 1959 1960 /******************************************************************************* 1961 * 1962 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1963 * Version 0 1964 * 1965 ******************************************************************************/ 1966 1967 struct acpi_table_pdtt { 1968 struct acpi_table_header header; /* Common ACPI table header */ 1969 u8 trigger_count; 1970 u8 reserved[3]; 1971 u32 array_offset; 1972 }; 1973 1974 /* 1975 * PDTT Communication Channel Identifier Structure. 1976 * The number of these structures is defined by trigger_count above, 1977 * starting at array_offset. 1978 */ 1979 struct acpi_pdtt_channel { 1980 u8 subchannel_id; 1981 u8 flags; 1982 }; 1983 1984 /* Flags for above */ 1985 1986 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1987 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1988 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1989 1990 /******************************************************************************* 1991 * 1992 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1993 * Version 1 1994 * 1995 ******************************************************************************/ 1996 1997 struct acpi_table_phat { 1998 struct acpi_table_header header; /* Common ACPI table header */ 1999 }; 2000 2001 /* Common header for PHAT subtables that follow main table */ 2002 2003 struct acpi_phat_header { 2004 u16 type; 2005 u16 length; 2006 u8 revision; 2007 }; 2008 2009 /* Values for Type field above */ 2010 2011 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2012 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2013 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2014 2015 /* 2016 * PHAT subtables, correspond to Type in struct acpi_phat_header 2017 */ 2018 2019 /* 0: Firmware Version Data Record */ 2020 2021 struct acpi_phat_version_data { 2022 struct acpi_phat_header header; 2023 u8 reserved[3]; 2024 u32 element_count; 2025 }; 2026 2027 struct acpi_phat_version_element { 2028 u8 guid[16]; 2029 u64 version_value; 2030 u32 producer_id; 2031 }; 2032 2033 /* 1: Firmware Health Data Record */ 2034 2035 struct acpi_phat_health_data { 2036 struct acpi_phat_header header; 2037 u8 reserved[2]; 2038 u8 health; 2039 u8 device_guid[16]; 2040 u32 device_specific_offset; /* Zero if no Device-specific data */ 2041 }; 2042 2043 /* Values for Health field above */ 2044 2045 #define ACPI_PHAT_ERRORS_FOUND 0 2046 #define ACPI_PHAT_NO_ERRORS 1 2047 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2048 #define ACPI_PHAT_ADVISORY 3 2049 2050 /******************************************************************************* 2051 * 2052 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2053 * Version 1 2054 * 2055 ******************************************************************************/ 2056 2057 struct acpi_table_pmtt { 2058 struct acpi_table_header header; /* Common ACPI table header */ 2059 u32 memory_device_count; 2060 /* 2061 * Immediately followed by: 2062 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2063 */ 2064 }; 2065 2066 /* Common header for PMTT subtables that follow main table */ 2067 2068 struct acpi_pmtt_header { 2069 u8 type; 2070 u8 reserved1; 2071 u16 length; 2072 u16 flags; 2073 u16 reserved2; 2074 u32 memory_device_count; /* Zero means no memory device structs follow */ 2075 /* 2076 * Immediately followed by: 2077 * u8 type_specific_data[] 2078 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2079 */ 2080 }; 2081 2082 /* Values for Type field above */ 2083 2084 #define ACPI_PMTT_TYPE_SOCKET 0 2085 #define ACPI_PMTT_TYPE_CONTROLLER 1 2086 #define ACPI_PMTT_TYPE_DIMM 2 2087 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2088 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2089 2090 /* Values for Flags field above */ 2091 2092 #define ACPI_PMTT_TOP_LEVEL 0x0001 2093 #define ACPI_PMTT_PHYSICAL 0x0002 2094 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2095 2096 /* 2097 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2098 */ 2099 2100 /* 0: Socket Structure */ 2101 2102 struct acpi_pmtt_socket { 2103 struct acpi_pmtt_header header; 2104 u16 socket_id; 2105 u16 reserved; 2106 }; 2107 /* 2108 * Immediately followed by: 2109 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2110 */ 2111 2112 /* 1: Memory Controller subtable */ 2113 2114 struct acpi_pmtt_controller { 2115 struct acpi_pmtt_header header; 2116 u16 controller_id; 2117 u16 reserved; 2118 }; 2119 /* 2120 * Immediately followed by: 2121 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2122 */ 2123 2124 /* 2: Physical Component Identifier (DIMM) */ 2125 2126 struct acpi_pmtt_physical_component { 2127 struct acpi_pmtt_header header; 2128 u32 bios_handle; 2129 }; 2130 2131 /* 0xFF: Vendor Specific Data */ 2132 2133 struct acpi_pmtt_vendor_specific { 2134 struct acpi_pmtt_header header; 2135 u8 type_uuid[16]; 2136 u8 specific[]; 2137 /* 2138 * Immediately followed by: 2139 * u8 vendor_specific_data[]; 2140 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2141 */ 2142 }; 2143 2144 /******************************************************************************* 2145 * 2146 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2147 * Version 1 2148 * 2149 ******************************************************************************/ 2150 2151 struct acpi_table_pptt { 2152 struct acpi_table_header header; /* Common ACPI table header */ 2153 }; 2154 2155 /* Values for Type field above */ 2156 2157 enum acpi_pptt_type { 2158 ACPI_PPTT_TYPE_PROCESSOR = 0, 2159 ACPI_PPTT_TYPE_CACHE = 1, 2160 ACPI_PPTT_TYPE_ID = 2, 2161 ACPI_PPTT_TYPE_RESERVED = 3 2162 }; 2163 2164 /* 0: Processor Hierarchy Node Structure */ 2165 2166 struct acpi_pptt_processor { 2167 struct acpi_subtable_header header; 2168 u16 reserved; 2169 u32 flags; 2170 u32 parent; 2171 u32 acpi_processor_id; 2172 u32 number_of_priv_resources; 2173 }; 2174 2175 /* Flags */ 2176 2177 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2178 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2179 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2180 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2181 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2182 2183 /* 1: Cache Type Structure */ 2184 2185 struct acpi_pptt_cache { 2186 struct acpi_subtable_header header; 2187 u16 reserved; 2188 u32 flags; 2189 u32 next_level_of_cache; 2190 u32 size; 2191 u32 number_of_sets; 2192 u8 associativity; 2193 u8 attributes; 2194 u16 line_size; 2195 }; 2196 2197 /* 1: Cache Type Structure for PPTT version 3 */ 2198 2199 struct acpi_pptt_cache_v1 { 2200 u32 cache_id; 2201 }; 2202 2203 /* Flags */ 2204 2205 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2206 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2207 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2208 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2209 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2210 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2211 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2212 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2213 2214 /* Masks for Attributes */ 2215 2216 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2217 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2218 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2219 2220 /* Attributes describing cache */ 2221 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2222 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2223 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2224 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2225 2226 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2227 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2228 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2229 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2230 2231 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2232 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2233 2234 /* 2: ID Structure */ 2235 2236 struct acpi_pptt_id { 2237 struct acpi_subtable_header header; 2238 u16 reserved; 2239 u32 vendor_id; 2240 u64 level1_id; 2241 u64 level2_id; 2242 u16 major_rev; 2243 u16 minor_rev; 2244 u16 spin_rev; 2245 }; 2246 2247 /******************************************************************************* 2248 * 2249 * PRMT - Platform Runtime Mechanism Table 2250 * Version 1 2251 * 2252 ******************************************************************************/ 2253 2254 struct acpi_table_prmt { 2255 struct acpi_table_header header; /* Common ACPI table header */ 2256 }; 2257 2258 struct acpi_table_prmt_header { 2259 u8 platform_guid[16]; 2260 u32 module_info_offset; 2261 u32 module_info_count; 2262 }; 2263 2264 struct acpi_prmt_module_header { 2265 u16 revision; 2266 u16 length; 2267 }; 2268 2269 struct acpi_prmt_module_info { 2270 u16 revision; 2271 u16 length; 2272 u8 module_guid[16]; 2273 u16 major_rev; 2274 u16 minor_rev; 2275 u16 handler_info_count; 2276 u32 handler_info_offset; 2277 u64 mmio_list_pointer; 2278 }; 2279 2280 struct acpi_prmt_handler_info { 2281 u16 revision; 2282 u16 length; 2283 u8 handler_guid[16]; 2284 u64 handler_address; 2285 u64 static_data_buffer_address; 2286 u64 acpi_param_buffer_address; 2287 }; 2288 2289 /******************************************************************************* 2290 * 2291 * RASF - RAS Feature Table (ACPI 5.0) 2292 * Version 1 2293 * 2294 ******************************************************************************/ 2295 2296 struct acpi_table_rasf { 2297 struct acpi_table_header header; /* Common ACPI table header */ 2298 u8 channel_id[12]; 2299 }; 2300 2301 /* RASF Platform Communication Channel Shared Memory Region */ 2302 2303 struct acpi_rasf_shared_memory { 2304 u32 signature; 2305 u16 command; 2306 u16 status; 2307 u16 version; 2308 u8 capabilities[16]; 2309 u8 set_capabilities[16]; 2310 u16 num_parameter_blocks; 2311 u32 set_capabilities_status; 2312 }; 2313 2314 /* RASF Parameter Block Structure Header */ 2315 2316 struct acpi_rasf_parameter_block { 2317 u16 type; 2318 u16 version; 2319 u16 length; 2320 }; 2321 2322 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2323 2324 struct acpi_rasf_patrol_scrub_parameter { 2325 struct acpi_rasf_parameter_block header; 2326 u16 patrol_scrub_command; 2327 u64 requested_address_range[2]; 2328 u64 actual_address_range[2]; 2329 u16 flags; 2330 u8 requested_speed; 2331 }; 2332 2333 /* Masks for Flags and Speed fields above */ 2334 2335 #define ACPI_RASF_SCRUBBER_RUNNING 1 2336 #define ACPI_RASF_SPEED (7<<1) 2337 #define ACPI_RASF_SPEED_SLOW (0<<1) 2338 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2339 #define ACPI_RASF_SPEED_FAST (7<<1) 2340 2341 /* Channel Commands */ 2342 2343 enum acpi_rasf_commands { 2344 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2345 }; 2346 2347 /* Platform RAS Capabilities */ 2348 2349 enum acpi_rasf_capabiliities { 2350 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2351 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2352 }; 2353 2354 /* Patrol Scrub Commands */ 2355 2356 enum acpi_rasf_patrol_scrub_commands { 2357 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2358 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2359 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2360 }; 2361 2362 /* Channel Command flags */ 2363 2364 #define ACPI_RASF_GENERATE_SCI (1<<15) 2365 2366 /* Status values */ 2367 2368 enum acpi_rasf_status { 2369 ACPI_RASF_SUCCESS = 0, 2370 ACPI_RASF_NOT_VALID = 1, 2371 ACPI_RASF_NOT_SUPPORTED = 2, 2372 ACPI_RASF_BUSY = 3, 2373 ACPI_RASF_FAILED = 4, 2374 ACPI_RASF_ABORTED = 5, 2375 ACPI_RASF_INVALID_DATA = 6 2376 }; 2377 2378 /* Status flags */ 2379 2380 #define ACPI_RASF_COMMAND_COMPLETE (1) 2381 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2382 #define ACPI_RASF_ERROR (1<<2) 2383 #define ACPI_RASF_STATUS (0x1F<<3) 2384 2385 /******************************************************************************* 2386 * 2387 * RGRT - Regulatory Graphics Resource Table 2388 * Version 1 2389 * 2390 * Conforms to "ACPI RGRT" available at: 2391 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2392 * 2393 ******************************************************************************/ 2394 2395 struct acpi_table_rgrt { 2396 struct acpi_table_header header; /* Common ACPI table header */ 2397 u16 version; 2398 u8 image_type; 2399 u8 reserved; 2400 u8 image[]; 2401 }; 2402 2403 /* image_type values */ 2404 2405 enum acpi_rgrt_image_type { 2406 ACPI_RGRT_TYPE_RESERVED0 = 0, 2407 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2408 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2409 }; 2410 2411 /******************************************************************************* 2412 * 2413 * SBST - Smart Battery Specification Table 2414 * Version 1 2415 * 2416 ******************************************************************************/ 2417 2418 struct acpi_table_sbst { 2419 struct acpi_table_header header; /* Common ACPI table header */ 2420 u32 warning_level; 2421 u32 low_level; 2422 u32 critical_level; 2423 }; 2424 2425 /******************************************************************************* 2426 * 2427 * SDEI - Software Delegated Exception Interface Descriptor Table 2428 * 2429 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2430 * May 8th, 2017. Copyright 2017 ARM Ltd. 2431 * 2432 ******************************************************************************/ 2433 2434 struct acpi_table_sdei { 2435 struct acpi_table_header header; /* Common ACPI table header */ 2436 }; 2437 2438 /******************************************************************************* 2439 * 2440 * SDEV - Secure Devices Table (ACPI 6.2) 2441 * Version 1 2442 * 2443 ******************************************************************************/ 2444 2445 struct acpi_table_sdev { 2446 struct acpi_table_header header; /* Common ACPI table header */ 2447 }; 2448 2449 struct acpi_sdev_header { 2450 u8 type; 2451 u8 flags; 2452 u16 length; 2453 }; 2454 2455 /* Values for subtable type above */ 2456 2457 enum acpi_sdev_type { 2458 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2459 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2460 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2461 }; 2462 2463 /* Values for flags above */ 2464 2465 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2466 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2467 2468 /* 2469 * SDEV subtables 2470 */ 2471 2472 /* 0: Namespace Device Based Secure Device Structure */ 2473 2474 struct acpi_sdev_namespace { 2475 struct acpi_sdev_header header; 2476 u16 device_id_offset; 2477 u16 device_id_length; 2478 u16 vendor_data_offset; 2479 u16 vendor_data_length; 2480 }; 2481 2482 struct acpi_sdev_secure_component { 2483 u16 secure_component_offset; 2484 u16 secure_component_length; 2485 }; 2486 2487 /* 2488 * SDEV sub-subtables ("Components") for above 2489 */ 2490 struct acpi_sdev_component { 2491 struct acpi_sdev_header header; 2492 }; 2493 2494 /* Values for sub-subtable type above */ 2495 2496 enum acpi_sac_type { 2497 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2498 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2499 }; 2500 2501 struct acpi_sdev_id_component { 2502 struct acpi_sdev_header header; 2503 u16 hardware_id_offset; 2504 u16 hardware_id_length; 2505 u16 subsystem_id_offset; 2506 u16 subsystem_id_length; 2507 u16 hardware_revision; 2508 u8 hardware_rev_present; 2509 u8 class_code_present; 2510 u8 pci_base_class; 2511 u8 pci_sub_class; 2512 u8 pci_programming_xface; 2513 }; 2514 2515 struct acpi_sdev_mem_component { 2516 struct acpi_sdev_header header; 2517 u32 reserved; 2518 u64 memory_base_address; 2519 u64 memory_length; 2520 }; 2521 2522 /* 1: PCIe Endpoint Device Based Device Structure */ 2523 2524 struct acpi_sdev_pcie { 2525 struct acpi_sdev_header header; 2526 u16 segment; 2527 u16 start_bus; 2528 u16 path_offset; 2529 u16 path_length; 2530 u16 vendor_data_offset; 2531 u16 vendor_data_length; 2532 }; 2533 2534 /* 1a: PCIe Endpoint path entry */ 2535 2536 struct acpi_sdev_pcie_path { 2537 u8 device; 2538 u8 function; 2539 }; 2540 2541 /******************************************************************************* 2542 * 2543 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2544 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2545 * Trust Domain Extensions (Intel TDX)". 2546 * Version 1 2547 * 2548 ******************************************************************************/ 2549 2550 struct acpi_table_svkl { 2551 struct acpi_table_header header; /* Common ACPI table header */ 2552 u32 count; 2553 }; 2554 2555 struct acpi_svkl_key { 2556 u16 type; 2557 u16 format; 2558 u32 size; 2559 u64 address; 2560 }; 2561 2562 enum acpi_svkl_type { 2563 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2564 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2565 }; 2566 2567 enum acpi_svkl_format { 2568 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2569 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2570 }; 2571 2572 /******************************************************************************* 2573 * 2574 * TDEL - TD-Event Log 2575 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2576 * Trust Domain Extensions (Intel TDX)". 2577 * September 2020 2578 * 2579 ******************************************************************************/ 2580 2581 struct acpi_table_tdel { 2582 struct acpi_table_header header; /* Common ACPI table header */ 2583 u32 reserved; 2584 u64 log_area_minimum_length; 2585 u64 log_area_start_address; 2586 }; 2587 2588 /* Reset to default packing */ 2589 2590 #pragma pack() 2591 2592 #endif /* __ACTBL2_H__ */ 2593