1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2018, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 28 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 29 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 30 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 31 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 32 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 33 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 34 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 35 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 36 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 37 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 38 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 39 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 40 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 41 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 42 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 43 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 44 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 45 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 46 47 /* 48 * All tables must be byte-packed to match the ACPI specification, since 49 * the tables are provided by the system BIOS. 50 */ 51 #pragma pack(1) 52 53 /* 54 * Note: C bitfields are not used for this reason: 55 * 56 * "Bitfields are great and easy to read, but unfortunately the C language 57 * does not specify the layout of bitfields in memory, which means they are 58 * essentially useless for dealing with packed data in on-disk formats or 59 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 60 * this decision was a design error in C. Ritchie could have picked an order 61 * and stuck with it." Norman Ramsey. 62 * See http://stackoverflow.com/a/1053662/41661 63 */ 64 65 /******************************************************************************* 66 * 67 * IORT - IO Remapping Table 68 * 69 * Conforms to "IO Remapping Table System Software on ARM Platforms", 70 * Document number: ARM DEN 0049C, May 2017 71 * 72 ******************************************************************************/ 73 74 struct acpi_table_iort { 75 struct acpi_table_header header; 76 u32 node_count; 77 u32 node_offset; 78 u32 reserved; 79 }; 80 81 /* 82 * IORT subtables 83 */ 84 struct acpi_iort_node { 85 u8 type; 86 u16 length; 87 u8 revision; 88 u32 reserved; 89 u32 mapping_count; 90 u32 mapping_offset; 91 char node_data[1]; 92 }; 93 94 /* Values for subtable Type above */ 95 96 enum acpi_iort_node_type { 97 ACPI_IORT_NODE_ITS_GROUP = 0x00, 98 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 99 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 100 ACPI_IORT_NODE_SMMU = 0x03, 101 ACPI_IORT_NODE_SMMU_V3 = 0x04 102 }; 103 104 struct acpi_iort_id_mapping { 105 u32 input_base; /* Lowest value in input range */ 106 u32 id_count; /* Number of IDs */ 107 u32 output_base; /* Lowest value in output range */ 108 u32 output_reference; /* A reference to the output node */ 109 u32 flags; 110 }; 111 112 /* Masks for Flags field above for IORT subtable */ 113 114 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 115 116 struct acpi_iort_memory_access { 117 u32 cache_coherency; 118 u8 hints; 119 u16 reserved; 120 u8 memory_flags; 121 }; 122 123 /* Values for cache_coherency field above */ 124 125 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 126 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 127 128 /* Masks for Hints field above */ 129 130 #define ACPI_IORT_HT_TRANSIENT (1) 131 #define ACPI_IORT_HT_WRITE (1<<1) 132 #define ACPI_IORT_HT_READ (1<<2) 133 #define ACPI_IORT_HT_OVERRIDE (1<<3) 134 135 /* Masks for memory_flags field above */ 136 137 #define ACPI_IORT_MF_COHERENCY (1) 138 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 139 140 /* 141 * IORT node specific subtables 142 */ 143 struct acpi_iort_its_group { 144 u32 its_count; 145 u32 identifiers[1]; /* GIC ITS identifier arrary */ 146 }; 147 148 struct acpi_iort_named_component { 149 u32 node_flags; 150 u64 memory_properties; /* Memory access properties */ 151 u8 memory_address_limit; /* Memory address size limit */ 152 char device_name[1]; /* Path of namespace object */ 153 }; 154 155 struct acpi_iort_root_complex { 156 u64 memory_properties; /* Memory access properties */ 157 u32 ats_attribute; 158 u32 pci_segment_number; 159 }; 160 161 /* Values for ats_attribute field above */ 162 163 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 164 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 165 166 struct acpi_iort_smmu { 167 u64 base_address; /* SMMU base address */ 168 u64 span; /* Length of memory range */ 169 u32 model; 170 u32 flags; 171 u32 global_interrupt_offset; 172 u32 context_interrupt_count; 173 u32 context_interrupt_offset; 174 u32 pmu_interrupt_count; 175 u32 pmu_interrupt_offset; 176 u64 interrupts[1]; /* Interrupt array */ 177 }; 178 179 /* Values for Model field above */ 180 181 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 182 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 183 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 184 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 185 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 186 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 187 188 /* Masks for Flags field above */ 189 190 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 191 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 192 193 /* Global interrupt format */ 194 195 struct acpi_iort_smmu_gsi { 196 u32 nsg_irpt; 197 u32 nsg_irpt_flags; 198 u32 nsg_cfg_irpt; 199 u32 nsg_cfg_irpt_flags; 200 }; 201 202 struct acpi_iort_smmu_v3 { 203 u64 base_address; /* SMMUv3 base address */ 204 u32 flags; 205 u32 reserved; 206 u64 vatos_address; 207 u32 model; 208 u32 event_gsiv; 209 u32 pri_gsiv; 210 u32 gerr_gsiv; 211 u32 sync_gsiv; 212 u8 pxm; 213 u8 reserved1; 214 u16 reserved2; 215 u32 id_mapping_index; 216 }; 217 218 /* Values for Model field above */ 219 220 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 221 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 222 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 223 224 /* Masks for Flags field above */ 225 226 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 227 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1) 228 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 229 230 /******************************************************************************* 231 * 232 * IVRS - I/O Virtualization Reporting Structure 233 * Version 1 234 * 235 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 236 * Revision 1.26, February 2009. 237 * 238 ******************************************************************************/ 239 240 struct acpi_table_ivrs { 241 struct acpi_table_header header; /* Common ACPI table header */ 242 u32 info; /* Common virtualization info */ 243 u64 reserved; 244 }; 245 246 /* Values for Info field above */ 247 248 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 249 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 250 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 251 252 /* IVRS subtable header */ 253 254 struct acpi_ivrs_header { 255 u8 type; /* Subtable type */ 256 u8 flags; 257 u16 length; /* Subtable length */ 258 u16 device_id; /* ID of IOMMU */ 259 }; 260 261 /* Values for subtable Type above */ 262 263 enum acpi_ivrs_type { 264 ACPI_IVRS_TYPE_HARDWARE = 0x10, 265 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 266 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 267 ACPI_IVRS_TYPE_MEMORY3 = 0x22 268 }; 269 270 /* Masks for Flags field above for IVHD subtable */ 271 272 #define ACPI_IVHD_TT_ENABLE (1) 273 #define ACPI_IVHD_PASS_PW (1<<1) 274 #define ACPI_IVHD_RES_PASS_PW (1<<2) 275 #define ACPI_IVHD_ISOC (1<<3) 276 #define ACPI_IVHD_IOTLB (1<<4) 277 278 /* Masks for Flags field above for IVMD subtable */ 279 280 #define ACPI_IVMD_UNITY (1) 281 #define ACPI_IVMD_READ (1<<1) 282 #define ACPI_IVMD_WRITE (1<<2) 283 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 284 285 /* 286 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 287 */ 288 289 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 290 291 struct acpi_ivrs_hardware { 292 struct acpi_ivrs_header header; 293 u16 capability_offset; /* Offset for IOMMU control fields */ 294 u64 base_address; /* IOMMU control registers */ 295 u16 pci_segment_group; 296 u16 info; /* MSI number and unit ID */ 297 u32 reserved; 298 }; 299 300 /* Masks for Info field above */ 301 302 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 303 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 304 305 /* 306 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 307 * Upper two bits of the Type field are the (encoded) length of the structure. 308 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 309 * are reserved for future use but not defined. 310 */ 311 struct acpi_ivrs_de_header { 312 u8 type; 313 u16 id; 314 u8 data_setting; 315 }; 316 317 /* Length of device entry is in the top two bits of Type field above */ 318 319 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 320 321 /* Values for device entry Type field above */ 322 323 enum acpi_ivrs_device_entry_type { 324 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 325 326 ACPI_IVRS_TYPE_PAD4 = 0, 327 ACPI_IVRS_TYPE_ALL = 1, 328 ACPI_IVRS_TYPE_SELECT = 2, 329 ACPI_IVRS_TYPE_START = 3, 330 ACPI_IVRS_TYPE_END = 4, 331 332 /* 8-byte device entries */ 333 334 ACPI_IVRS_TYPE_PAD8 = 64, 335 ACPI_IVRS_TYPE_NOT_USED = 65, 336 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 337 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 338 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 339 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 340 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */ 341 }; 342 343 /* Values for Data field above */ 344 345 #define ACPI_IVHD_INIT_PASS (1) 346 #define ACPI_IVHD_EINT_PASS (1<<1) 347 #define ACPI_IVHD_NMI_PASS (1<<2) 348 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 349 #define ACPI_IVHD_LINT0_PASS (1<<6) 350 #define ACPI_IVHD_LINT1_PASS (1<<7) 351 352 /* Types 0-4: 4-byte device entry */ 353 354 struct acpi_ivrs_device4 { 355 struct acpi_ivrs_de_header header; 356 }; 357 358 /* Types 66-67: 8-byte device entry */ 359 360 struct acpi_ivrs_device8a { 361 struct acpi_ivrs_de_header header; 362 u8 reserved1; 363 u16 used_id; 364 u8 reserved2; 365 }; 366 367 /* Types 70-71: 8-byte device entry */ 368 369 struct acpi_ivrs_device8b { 370 struct acpi_ivrs_de_header header; 371 u32 extended_data; 372 }; 373 374 /* Values for extended_data above */ 375 376 #define ACPI_IVHD_ATS_DISABLED (1<<31) 377 378 /* Type 72: 8-byte device entry */ 379 380 struct acpi_ivrs_device8c { 381 struct acpi_ivrs_de_header header; 382 u8 handle; 383 u16 used_id; 384 u8 variety; 385 }; 386 387 /* Values for Variety field above */ 388 389 #define ACPI_IVHD_IOAPIC 1 390 #define ACPI_IVHD_HPET 2 391 392 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 393 394 struct acpi_ivrs_memory { 395 struct acpi_ivrs_header header; 396 u16 aux_data; 397 u64 reserved; 398 u64 start_address; 399 u64 memory_length; 400 }; 401 402 /******************************************************************************* 403 * 404 * LPIT - Low Power Idle Table 405 * 406 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 407 * 408 ******************************************************************************/ 409 410 struct acpi_table_lpit { 411 struct acpi_table_header header; /* Common ACPI table header */ 412 }; 413 414 /* LPIT subtable header */ 415 416 struct acpi_lpit_header { 417 u32 type; /* Subtable type */ 418 u32 length; /* Subtable length */ 419 u16 unique_id; 420 u16 reserved; 421 u32 flags; 422 }; 423 424 /* Values for subtable Type above */ 425 426 enum acpi_lpit_type { 427 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 428 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 429 }; 430 431 /* Masks for Flags field above */ 432 433 #define ACPI_LPIT_STATE_DISABLED (1) 434 #define ACPI_LPIT_NO_COUNTER (1<<1) 435 436 /* 437 * LPIT subtables, correspond to Type in struct acpi_lpit_header 438 */ 439 440 /* 0x00: Native C-state instruction based LPI structure */ 441 442 struct acpi_lpit_native { 443 struct acpi_lpit_header header; 444 struct acpi_generic_address entry_trigger; 445 u32 residency; 446 u32 latency; 447 struct acpi_generic_address residency_counter; 448 u64 counter_frequency; 449 }; 450 451 /******************************************************************************* 452 * 453 * MADT - Multiple APIC Description Table 454 * Version 3 455 * 456 ******************************************************************************/ 457 458 struct acpi_table_madt { 459 struct acpi_table_header header; /* Common ACPI table header */ 460 u32 address; /* Physical address of local APIC */ 461 u32 flags; 462 }; 463 464 /* Masks for Flags field above */ 465 466 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 467 468 /* Values for PCATCompat flag */ 469 470 #define ACPI_MADT_DUAL_PIC 1 471 #define ACPI_MADT_MULTIPLE_APIC 0 472 473 /* Values for MADT subtable type in struct acpi_subtable_header */ 474 475 enum acpi_madt_type { 476 ACPI_MADT_TYPE_LOCAL_APIC = 0, 477 ACPI_MADT_TYPE_IO_APIC = 1, 478 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 479 ACPI_MADT_TYPE_NMI_SOURCE = 3, 480 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 481 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 482 ACPI_MADT_TYPE_IO_SAPIC = 6, 483 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 484 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 485 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 486 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 487 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 488 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 489 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 490 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 491 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 492 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 493 }; 494 495 /* 496 * MADT Subtables, correspond to Type in struct acpi_subtable_header 497 */ 498 499 /* 0: Processor Local APIC */ 500 501 struct acpi_madt_local_apic { 502 struct acpi_subtable_header header; 503 u8 processor_id; /* ACPI processor id */ 504 u8 id; /* Processor's local APIC id */ 505 u32 lapic_flags; 506 }; 507 508 /* 1: IO APIC */ 509 510 struct acpi_madt_io_apic { 511 struct acpi_subtable_header header; 512 u8 id; /* I/O APIC ID */ 513 u8 reserved; /* reserved - must be zero */ 514 u32 address; /* APIC physical address */ 515 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 516 }; 517 518 /* 2: Interrupt Override */ 519 520 struct acpi_madt_interrupt_override { 521 struct acpi_subtable_header header; 522 u8 bus; /* 0 - ISA */ 523 u8 source_irq; /* Interrupt source (IRQ) */ 524 u32 global_irq; /* Global system interrupt */ 525 u16 inti_flags; 526 }; 527 528 /* 3: NMI Source */ 529 530 struct acpi_madt_nmi_source { 531 struct acpi_subtable_header header; 532 u16 inti_flags; 533 u32 global_irq; /* Global system interrupt */ 534 }; 535 536 /* 4: Local APIC NMI */ 537 538 struct acpi_madt_local_apic_nmi { 539 struct acpi_subtable_header header; 540 u8 processor_id; /* ACPI processor id */ 541 u16 inti_flags; 542 u8 lint; /* LINTn to which NMI is connected */ 543 }; 544 545 /* 5: Address Override */ 546 547 struct acpi_madt_local_apic_override { 548 struct acpi_subtable_header header; 549 u16 reserved; /* Reserved, must be zero */ 550 u64 address; /* APIC physical address */ 551 }; 552 553 /* 6: I/O Sapic */ 554 555 struct acpi_madt_io_sapic { 556 struct acpi_subtable_header header; 557 u8 id; /* I/O SAPIC ID */ 558 u8 reserved; /* Reserved, must be zero */ 559 u32 global_irq_base; /* Global interrupt for SAPIC start */ 560 u64 address; /* SAPIC physical address */ 561 }; 562 563 /* 7: Local Sapic */ 564 565 struct acpi_madt_local_sapic { 566 struct acpi_subtable_header header; 567 u8 processor_id; /* ACPI processor id */ 568 u8 id; /* SAPIC ID */ 569 u8 eid; /* SAPIC EID */ 570 u8 reserved[3]; /* Reserved, must be zero */ 571 u32 lapic_flags; 572 u32 uid; /* Numeric UID - ACPI 3.0 */ 573 char uid_string[1]; /* String UID - ACPI 3.0 */ 574 }; 575 576 /* 8: Platform Interrupt Source */ 577 578 struct acpi_madt_interrupt_source { 579 struct acpi_subtable_header header; 580 u16 inti_flags; 581 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 582 u8 id; /* Processor ID */ 583 u8 eid; /* Processor EID */ 584 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 585 u32 global_irq; /* Global system interrupt */ 586 u32 flags; /* Interrupt Source Flags */ 587 }; 588 589 /* Masks for Flags field above */ 590 591 #define ACPI_MADT_CPEI_OVERRIDE (1) 592 593 /* 9: Processor Local X2APIC (ACPI 4.0) */ 594 595 struct acpi_madt_local_x2apic { 596 struct acpi_subtable_header header; 597 u16 reserved; /* reserved - must be zero */ 598 u32 local_apic_id; /* Processor x2APIC ID */ 599 u32 lapic_flags; 600 u32 uid; /* ACPI processor UID */ 601 }; 602 603 /* 10: Local X2APIC NMI (ACPI 4.0) */ 604 605 struct acpi_madt_local_x2apic_nmi { 606 struct acpi_subtable_header header; 607 u16 inti_flags; 608 u32 uid; /* ACPI processor UID */ 609 u8 lint; /* LINTn to which NMI is connected */ 610 u8 reserved[3]; /* reserved - must be zero */ 611 }; 612 613 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ 614 615 struct acpi_madt_generic_interrupt { 616 struct acpi_subtable_header header; 617 u16 reserved; /* reserved - must be zero */ 618 u32 cpu_interface_number; 619 u32 uid; 620 u32 flags; 621 u32 parking_version; 622 u32 performance_interrupt; 623 u64 parked_address; 624 u64 base_address; 625 u64 gicv_base_address; 626 u64 gich_base_address; 627 u32 vgic_interrupt; 628 u64 gicr_base_address; 629 u64 arm_mpidr; 630 u8 efficiency_class; 631 u8 reserved2[3]; 632 }; 633 634 /* Masks for Flags field above */ 635 636 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 637 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 638 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 639 640 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 641 642 struct acpi_madt_generic_distributor { 643 struct acpi_subtable_header header; 644 u16 reserved; /* reserved - must be zero */ 645 u32 gic_id; 646 u64 base_address; 647 u32 global_irq_base; 648 u8 version; 649 u8 reserved2[3]; /* reserved - must be zero */ 650 }; 651 652 /* Values for Version field above */ 653 654 enum acpi_madt_gic_version { 655 ACPI_MADT_GIC_VERSION_NONE = 0, 656 ACPI_MADT_GIC_VERSION_V1 = 1, 657 ACPI_MADT_GIC_VERSION_V2 = 2, 658 ACPI_MADT_GIC_VERSION_V3 = 3, 659 ACPI_MADT_GIC_VERSION_V4 = 4, 660 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 661 }; 662 663 /* 13: Generic MSI Frame (ACPI 5.1) */ 664 665 struct acpi_madt_generic_msi_frame { 666 struct acpi_subtable_header header; 667 u16 reserved; /* reserved - must be zero */ 668 u32 msi_frame_id; 669 u64 base_address; 670 u32 flags; 671 u16 spi_count; 672 u16 spi_base; 673 }; 674 675 /* Masks for Flags field above */ 676 677 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 678 679 /* 14: Generic Redistributor (ACPI 5.1) */ 680 681 struct acpi_madt_generic_redistributor { 682 struct acpi_subtable_header header; 683 u16 reserved; /* reserved - must be zero */ 684 u64 base_address; 685 u32 length; 686 }; 687 688 /* 15: Generic Translator (ACPI 6.0) */ 689 690 struct acpi_madt_generic_translator { 691 struct acpi_subtable_header header; 692 u16 reserved; /* reserved - must be zero */ 693 u32 translation_id; 694 u64 base_address; 695 u32 reserved2; 696 }; 697 698 /* 699 * Common flags fields for MADT subtables 700 */ 701 702 /* MADT Local APIC flags */ 703 704 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 705 706 /* MADT MPS INTI flags (inti_flags) */ 707 708 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 709 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 710 711 /* Values for MPS INTI flags */ 712 713 #define ACPI_MADT_POLARITY_CONFORMS 0 714 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 715 #define ACPI_MADT_POLARITY_RESERVED 2 716 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 717 718 #define ACPI_MADT_TRIGGER_CONFORMS (0) 719 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 720 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 721 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 722 723 /******************************************************************************* 724 * 725 * MCFG - PCI Memory Mapped Configuration table and subtable 726 * Version 1 727 * 728 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 729 * 730 ******************************************************************************/ 731 732 struct acpi_table_mcfg { 733 struct acpi_table_header header; /* Common ACPI table header */ 734 u8 reserved[8]; 735 }; 736 737 /* Subtable */ 738 739 struct acpi_mcfg_allocation { 740 u64 address; /* Base address, processor-relative */ 741 u16 pci_segment; /* PCI segment group number */ 742 u8 start_bus_number; /* Starting PCI Bus number */ 743 u8 end_bus_number; /* Final PCI Bus number */ 744 u32 reserved; 745 }; 746 747 /******************************************************************************* 748 * 749 * MCHI - Management Controller Host Interface Table 750 * Version 1 751 * 752 * Conforms to "Management Component Transport Protocol (MCTP) Host 753 * Interface Specification", Revision 1.0.0a, October 13, 2009 754 * 755 ******************************************************************************/ 756 757 struct acpi_table_mchi { 758 struct acpi_table_header header; /* Common ACPI table header */ 759 u8 interface_type; 760 u8 protocol; 761 u64 protocol_data; 762 u8 interrupt_type; 763 u8 gpe; 764 u8 pci_device_flag; 765 u32 global_interrupt; 766 struct acpi_generic_address control_register; 767 u8 pci_segment; 768 u8 pci_bus; 769 u8 pci_device; 770 u8 pci_function; 771 }; 772 773 /******************************************************************************* 774 * 775 * MPST - Memory Power State Table (ACPI 5.0) 776 * Version 1 777 * 778 ******************************************************************************/ 779 780 #define ACPI_MPST_CHANNEL_INFO \ 781 u8 channel_id; \ 782 u8 reserved1[3]; \ 783 u16 power_node_count; \ 784 u16 reserved2; 785 786 /* Main table */ 787 788 struct acpi_table_mpst { 789 struct acpi_table_header header; /* Common ACPI table header */ 790 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 791 }; 792 793 /* Memory Platform Communication Channel Info */ 794 795 struct acpi_mpst_channel { 796 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 797 }; 798 799 /* Memory Power Node Structure */ 800 801 struct acpi_mpst_power_node { 802 u8 flags; 803 u8 reserved1; 804 u16 node_id; 805 u32 length; 806 u64 range_address; 807 u64 range_length; 808 u32 num_power_states; 809 u32 num_physical_components; 810 }; 811 812 /* Values for Flags field above */ 813 814 #define ACPI_MPST_ENABLED 1 815 #define ACPI_MPST_POWER_MANAGED 2 816 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 817 818 /* Memory Power State Structure (follows POWER_NODE above) */ 819 820 struct acpi_mpst_power_state { 821 u8 power_state; 822 u8 info_index; 823 }; 824 825 /* Physical Component ID Structure (follows POWER_STATE above) */ 826 827 struct acpi_mpst_component { 828 u16 component_id; 829 }; 830 831 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 832 833 struct acpi_mpst_data_hdr { 834 u16 characteristics_count; 835 u16 reserved; 836 }; 837 838 struct acpi_mpst_power_data { 839 u8 structure_id; 840 u8 flags; 841 u16 reserved1; 842 u32 average_power; 843 u32 power_saving; 844 u64 exit_latency; 845 u64 reserved2; 846 }; 847 848 /* Values for Flags field above */ 849 850 #define ACPI_MPST_PRESERVE 1 851 #define ACPI_MPST_AUTOENTRY 2 852 #define ACPI_MPST_AUTOEXIT 4 853 854 /* Shared Memory Region (not part of an ACPI table) */ 855 856 struct acpi_mpst_shared { 857 u32 signature; 858 u16 pcc_command; 859 u16 pcc_status; 860 u32 command_register; 861 u32 status_register; 862 u32 power_state_id; 863 u32 power_node_id; 864 u64 energy_consumed; 865 u64 average_power; 866 }; 867 868 /******************************************************************************* 869 * 870 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 871 * Version 1 872 * 873 ******************************************************************************/ 874 875 struct acpi_table_msct { 876 struct acpi_table_header header; /* Common ACPI table header */ 877 u32 proximity_offset; /* Location of proximity info struct(s) */ 878 u32 max_proximity_domains; /* Max number of proximity domains */ 879 u32 max_clock_domains; /* Max number of clock domains */ 880 u64 max_address; /* Max physical address in system */ 881 }; 882 883 /* subtable - Maximum Proximity Domain Information. Version 1 */ 884 885 struct acpi_msct_proximity { 886 u8 revision; 887 u8 length; 888 u32 range_start; /* Start of domain range */ 889 u32 range_end; /* End of domain range */ 890 u32 processor_capacity; 891 u64 memory_capacity; /* In bytes */ 892 }; 893 894 /******************************************************************************* 895 * 896 * MSDM - Microsoft Data Management table 897 * 898 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 899 * November 29, 2011. Copyright 2011 Microsoft 900 * 901 ******************************************************************************/ 902 903 /* Basic MSDM table is only the common ACPI header */ 904 905 struct acpi_table_msdm { 906 struct acpi_table_header header; /* Common ACPI table header */ 907 }; 908 909 /******************************************************************************* 910 * 911 * MTMR - MID Timer Table 912 * Version 1 913 * 914 * Conforms to "Simple Firmware Interface Specification", 915 * Draft 0.8.2, Oct 19, 2010 916 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 917 * 918 ******************************************************************************/ 919 920 struct acpi_table_mtmr { 921 struct acpi_table_header header; /* Common ACPI table header */ 922 }; 923 924 /* MTMR entry */ 925 926 struct acpi_mtmr_entry { 927 struct acpi_generic_address physical_address; 928 u32 frequency; 929 u32 irq; 930 }; 931 932 /******************************************************************************* 933 * 934 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 935 * Version 1 936 * 937 ******************************************************************************/ 938 939 struct acpi_table_nfit { 940 struct acpi_table_header header; /* Common ACPI table header */ 941 u32 reserved; /* Reserved, must be zero */ 942 }; 943 944 /* Subtable header for NFIT */ 945 946 struct acpi_nfit_header { 947 u16 type; 948 u16 length; 949 }; 950 951 /* Values for subtable type in struct acpi_nfit_header */ 952 953 enum acpi_nfit_type { 954 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 955 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 956 ACPI_NFIT_TYPE_INTERLEAVE = 2, 957 ACPI_NFIT_TYPE_SMBIOS = 3, 958 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 959 ACPI_NFIT_TYPE_DATA_REGION = 5, 960 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 961 ACPI_NFIT_TYPE_CAPABILITIES = 7, 962 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 963 }; 964 965 /* 966 * NFIT Subtables 967 */ 968 969 /* 0: System Physical Address Range Structure */ 970 971 struct acpi_nfit_system_address { 972 struct acpi_nfit_header header; 973 u16 range_index; 974 u16 flags; 975 u32 reserved; /* Reserved, must be zero */ 976 u32 proximity_domain; 977 u8 range_guid[16]; 978 u64 address; 979 u64 length; 980 u64 memory_mapping; 981 }; 982 983 /* Flags */ 984 985 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 986 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 987 988 /* Range Type GUIDs appear in the include/acuuid.h file */ 989 990 /* 1: Memory Device to System Address Range Map Structure */ 991 992 struct acpi_nfit_memory_map { 993 struct acpi_nfit_header header; 994 u32 device_handle; 995 u16 physical_id; 996 u16 region_id; 997 u16 range_index; 998 u16 region_index; 999 u64 region_size; 1000 u64 region_offset; 1001 u64 address; 1002 u16 interleave_index; 1003 u16 interleave_ways; 1004 u16 flags; 1005 u16 reserved; /* Reserved, must be zero */ 1006 }; 1007 1008 /* Flags */ 1009 1010 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1011 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1012 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1013 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1014 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1015 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1016 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1017 1018 /* 2: Interleave Structure */ 1019 1020 struct acpi_nfit_interleave { 1021 struct acpi_nfit_header header; 1022 u16 interleave_index; 1023 u16 reserved; /* Reserved, must be zero */ 1024 u32 line_count; 1025 u32 line_size; 1026 u32 line_offset[1]; /* Variable length */ 1027 }; 1028 1029 /* 3: SMBIOS Management Information Structure */ 1030 1031 struct acpi_nfit_smbios { 1032 struct acpi_nfit_header header; 1033 u32 reserved; /* Reserved, must be zero */ 1034 u8 data[1]; /* Variable length */ 1035 }; 1036 1037 /* 4: NVDIMM Control Region Structure */ 1038 1039 struct acpi_nfit_control_region { 1040 struct acpi_nfit_header header; 1041 u16 region_index; 1042 u16 vendor_id; 1043 u16 device_id; 1044 u16 revision_id; 1045 u16 subsystem_vendor_id; 1046 u16 subsystem_device_id; 1047 u16 subsystem_revision_id; 1048 u8 valid_fields; 1049 u8 manufacturing_location; 1050 u16 manufacturing_date; 1051 u8 reserved[2]; /* Reserved, must be zero */ 1052 u32 serial_number; 1053 u16 code; 1054 u16 windows; 1055 u64 window_size; 1056 u64 command_offset; 1057 u64 command_size; 1058 u64 status_offset; 1059 u64 status_size; 1060 u16 flags; 1061 u8 reserved1[6]; /* Reserved, must be zero */ 1062 }; 1063 1064 /* Flags */ 1065 1066 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1067 1068 /* valid_fields bits */ 1069 1070 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1071 1072 /* 5: NVDIMM Block Data Window Region Structure */ 1073 1074 struct acpi_nfit_data_region { 1075 struct acpi_nfit_header header; 1076 u16 region_index; 1077 u16 windows; 1078 u64 offset; 1079 u64 size; 1080 u64 capacity; 1081 u64 start_address; 1082 }; 1083 1084 /* 6: Flush Hint Address Structure */ 1085 1086 struct acpi_nfit_flush_address { 1087 struct acpi_nfit_header header; 1088 u32 device_handle; 1089 u16 hint_count; 1090 u8 reserved[6]; /* Reserved, must be zero */ 1091 u64 hint_address[1]; /* Variable length */ 1092 }; 1093 1094 /* 7: Platform Capabilities Structure */ 1095 1096 struct acpi_nfit_capabilities { 1097 struct acpi_nfit_header header; 1098 u8 highest_capability; 1099 u8 reserved[3]; /* Reserved, must be zero */ 1100 u32 capabilities; 1101 u32 reserved2; 1102 }; 1103 1104 /* Capabilities Flags */ 1105 1106 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1107 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1108 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1109 1110 /* 1111 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1112 */ 1113 struct nfit_device_handle { 1114 u32 handle; 1115 }; 1116 1117 /* Device handle construction and extraction macros */ 1118 1119 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1120 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1121 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1122 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1123 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1124 1125 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1126 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1127 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1128 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1129 #define ACPI_NFIT_NODE_ID_OFFSET 16 1130 1131 /* Macro to construct a NFIT/NVDIMM device handle */ 1132 1133 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1134 ((dimm) | \ 1135 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1136 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1137 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1138 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1139 1140 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1141 1142 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1143 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1144 1145 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1146 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1147 1148 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1149 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1150 1151 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1152 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1153 1154 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1155 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1156 1157 /******************************************************************************* 1158 * 1159 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1160 * Version 2 (ACPI 6.2) 1161 * 1162 ******************************************************************************/ 1163 1164 struct acpi_table_pcct { 1165 struct acpi_table_header header; /* Common ACPI table header */ 1166 u32 flags; 1167 u64 reserved; 1168 }; 1169 1170 /* Values for Flags field above */ 1171 1172 #define ACPI_PCCT_DOORBELL 1 1173 1174 /* Values for subtable type in struct acpi_subtable_header */ 1175 1176 enum acpi_pcct_type { 1177 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1178 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1179 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1180 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1181 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1182 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1183 }; 1184 1185 /* 1186 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1187 */ 1188 1189 /* 0: Generic Communications Subspace */ 1190 1191 struct acpi_pcct_subspace { 1192 struct acpi_subtable_header header; 1193 u8 reserved[6]; 1194 u64 base_address; 1195 u64 length; 1196 struct acpi_generic_address doorbell_register; 1197 u64 preserve_mask; 1198 u64 write_mask; 1199 u32 latency; 1200 u32 max_access_rate; 1201 u16 min_turnaround_time; 1202 }; 1203 1204 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1205 1206 struct acpi_pcct_hw_reduced { 1207 struct acpi_subtable_header header; 1208 u32 platform_interrupt; 1209 u8 flags; 1210 u8 reserved; 1211 u64 base_address; 1212 u64 length; 1213 struct acpi_generic_address doorbell_register; 1214 u64 preserve_mask; 1215 u64 write_mask; 1216 u32 latency; 1217 u32 max_access_rate; 1218 u16 min_turnaround_time; 1219 }; 1220 1221 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1222 1223 struct acpi_pcct_hw_reduced_type2 { 1224 struct acpi_subtable_header header; 1225 u32 platform_interrupt; 1226 u8 flags; 1227 u8 reserved; 1228 u64 base_address; 1229 u64 length; 1230 struct acpi_generic_address doorbell_register; 1231 u64 preserve_mask; 1232 u64 write_mask; 1233 u32 latency; 1234 u32 max_access_rate; 1235 u16 min_turnaround_time; 1236 struct acpi_generic_address platform_ack_register; 1237 u64 ack_preserve_mask; 1238 u64 ack_write_mask; 1239 }; 1240 1241 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1242 1243 struct acpi_pcct_ext_pcc_master { 1244 struct acpi_subtable_header header; 1245 u32 platform_interrupt; 1246 u8 flags; 1247 u8 reserved1; 1248 u64 base_address; 1249 u32 length; 1250 struct acpi_generic_address doorbell_register; 1251 u64 preserve_mask; 1252 u64 write_mask; 1253 u32 latency; 1254 u32 max_access_rate; 1255 u32 min_turnaround_time; 1256 struct acpi_generic_address platform_ack_register; 1257 u64 ack_preserve_mask; 1258 u64 ack_set_mask; 1259 u64 reserved2; 1260 struct acpi_generic_address cmd_complete_register; 1261 u64 cmd_complete_mask; 1262 struct acpi_generic_address cmd_update_register; 1263 u64 cmd_update_preserve_mask; 1264 u64 cmd_update_set_mask; 1265 struct acpi_generic_address error_status_register; 1266 u64 error_status_mask; 1267 }; 1268 1269 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1270 1271 struct acpi_pcct_ext_pcc_slave { 1272 struct acpi_subtable_header header; 1273 u32 platform_interrupt; 1274 u8 flags; 1275 u8 reserved1; 1276 u64 base_address; 1277 u32 length; 1278 struct acpi_generic_address doorbell_register; 1279 u64 preserve_mask; 1280 u64 write_mask; 1281 u32 latency; 1282 u32 max_access_rate; 1283 u32 min_turnaround_time; 1284 struct acpi_generic_address platform_ack_register; 1285 u64 ack_preserve_mask; 1286 u64 ack_set_mask; 1287 u64 reserved2; 1288 struct acpi_generic_address cmd_complete_register; 1289 u64 cmd_complete_mask; 1290 struct acpi_generic_address cmd_update_register; 1291 u64 cmd_update_preserve_mask; 1292 u64 cmd_update_set_mask; 1293 struct acpi_generic_address error_status_register; 1294 u64 error_status_mask; 1295 }; 1296 1297 /* Values for doorbell flags above */ 1298 1299 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1300 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1301 1302 /* 1303 * PCC memory structures (not part of the ACPI table) 1304 */ 1305 1306 /* Shared Memory Region */ 1307 1308 struct acpi_pcct_shared_memory { 1309 u32 signature; 1310 u16 command; 1311 u16 status; 1312 }; 1313 1314 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1315 1316 struct acpi_pcct_ext_pcc_shared_memory { 1317 u32 signature; 1318 u32 flags; 1319 u32 length; 1320 u32 command; 1321 }; 1322 1323 /******************************************************************************* 1324 * 1325 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1326 * Version 0 1327 * 1328 ******************************************************************************/ 1329 1330 struct acpi_table_pdtt { 1331 struct acpi_table_header header; /* Common ACPI table header */ 1332 u8 trigger_count; 1333 u8 reserved[3]; 1334 u32 array_offset; 1335 }; 1336 1337 /* 1338 * PDTT Communication Channel Identifier Structure. 1339 * The number of these structures is defined by trigger_count above, 1340 * starting at array_offset. 1341 */ 1342 struct acpi_pdtt_channel { 1343 u8 subchannel_id; 1344 u8 flags; 1345 }; 1346 1347 /* Flags for above */ 1348 1349 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1350 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1351 1352 /******************************************************************************* 1353 * 1354 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1355 * Version 1 1356 * 1357 ******************************************************************************/ 1358 1359 struct acpi_table_pmtt { 1360 struct acpi_table_header header; /* Common ACPI table header */ 1361 u32 reserved; 1362 }; 1363 1364 /* Common header for PMTT subtables that follow main table */ 1365 1366 struct acpi_pmtt_header { 1367 u8 type; 1368 u8 reserved1; 1369 u16 length; 1370 u16 flags; 1371 u16 reserved2; 1372 }; 1373 1374 /* Values for Type field above */ 1375 1376 #define ACPI_PMTT_TYPE_SOCKET 0 1377 #define ACPI_PMTT_TYPE_CONTROLLER 1 1378 #define ACPI_PMTT_TYPE_DIMM 2 1379 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1380 1381 /* Values for Flags field above */ 1382 1383 #define ACPI_PMTT_TOP_LEVEL 0x0001 1384 #define ACPI_PMTT_PHYSICAL 0x0002 1385 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1386 1387 /* 1388 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 1389 */ 1390 1391 /* 0: Socket Structure */ 1392 1393 struct acpi_pmtt_socket { 1394 struct acpi_pmtt_header header; 1395 u16 socket_id; 1396 u16 reserved; 1397 }; 1398 1399 /* 1: Memory Controller subtable */ 1400 1401 struct acpi_pmtt_controller { 1402 struct acpi_pmtt_header header; 1403 u32 read_latency; 1404 u32 write_latency; 1405 u32 read_bandwidth; 1406 u32 write_bandwidth; 1407 u16 access_width; 1408 u16 alignment; 1409 u16 reserved; 1410 u16 domain_count; 1411 }; 1412 1413 /* 1a: Proximity Domain substructure */ 1414 1415 struct acpi_pmtt_domain { 1416 u32 proximity_domain; 1417 }; 1418 1419 /* 2: Physical Component Identifier (DIMM) */ 1420 1421 struct acpi_pmtt_physical_component { 1422 struct acpi_pmtt_header header; 1423 u16 component_id; 1424 u16 reserved; 1425 u32 memory_size; 1426 u32 bios_handle; 1427 }; 1428 1429 /******************************************************************************* 1430 * 1431 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1432 * Version 1 1433 * 1434 ******************************************************************************/ 1435 1436 struct acpi_table_pptt { 1437 struct acpi_table_header header; /* Common ACPI table header */ 1438 }; 1439 1440 /* Values for Type field above */ 1441 1442 enum acpi_pptt_type { 1443 ACPI_PPTT_TYPE_PROCESSOR = 0, 1444 ACPI_PPTT_TYPE_CACHE = 1, 1445 ACPI_PPTT_TYPE_ID = 2, 1446 ACPI_PPTT_TYPE_RESERVED = 3 1447 }; 1448 1449 /* 0: Processor Hierarchy Node Structure */ 1450 1451 struct acpi_pptt_processor { 1452 struct acpi_subtable_header header; 1453 u16 reserved; 1454 u32 flags; 1455 u32 parent; 1456 u32 acpi_processor_id; 1457 u32 number_of_priv_resources; 1458 }; 1459 1460 /* Flags */ 1461 1462 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */ 1463 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */ 1464 1465 /* 1: Cache Type Structure */ 1466 1467 struct acpi_pptt_cache { 1468 struct acpi_subtable_header header; 1469 u16 reserved; 1470 u32 flags; 1471 u32 next_level_of_cache; 1472 u32 size; 1473 u32 number_of_sets; 1474 u8 associativity; 1475 u8 attributes; 1476 u16 line_size; 1477 }; 1478 1479 /* Flags */ 1480 1481 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1482 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1483 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1484 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1485 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1486 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1487 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1488 1489 /* Masks for Attributes */ 1490 1491 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1492 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1493 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1494 1495 /* Attributes describing cache */ 1496 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1497 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1498 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1499 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1500 1501 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1502 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1503 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1504 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1505 1506 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1507 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1508 1509 /* 2: ID Structure */ 1510 1511 struct acpi_pptt_id { 1512 struct acpi_subtable_header header; 1513 u16 reserved; 1514 u32 vendor_id; 1515 u64 level1_id; 1516 u64 level2_id; 1517 u16 major_rev; 1518 u16 minor_rev; 1519 u16 spin_rev; 1520 }; 1521 1522 /******************************************************************************* 1523 * 1524 * RASF - RAS Feature Table (ACPI 5.0) 1525 * Version 1 1526 * 1527 ******************************************************************************/ 1528 1529 struct acpi_table_rasf { 1530 struct acpi_table_header header; /* Common ACPI table header */ 1531 u8 channel_id[12]; 1532 }; 1533 1534 /* RASF Platform Communication Channel Shared Memory Region */ 1535 1536 struct acpi_rasf_shared_memory { 1537 u32 signature; 1538 u16 command; 1539 u16 status; 1540 u16 version; 1541 u8 capabilities[16]; 1542 u8 set_capabilities[16]; 1543 u16 num_parameter_blocks; 1544 u32 set_capabilities_status; 1545 }; 1546 1547 /* RASF Parameter Block Structure Header */ 1548 1549 struct acpi_rasf_parameter_block { 1550 u16 type; 1551 u16 version; 1552 u16 length; 1553 }; 1554 1555 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1556 1557 struct acpi_rasf_patrol_scrub_parameter { 1558 struct acpi_rasf_parameter_block header; 1559 u16 patrol_scrub_command; 1560 u64 requested_address_range[2]; 1561 u64 actual_address_range[2]; 1562 u16 flags; 1563 u8 requested_speed; 1564 }; 1565 1566 /* Masks for Flags and Speed fields above */ 1567 1568 #define ACPI_RASF_SCRUBBER_RUNNING 1 1569 #define ACPI_RASF_SPEED (7<<1) 1570 #define ACPI_RASF_SPEED_SLOW (0<<1) 1571 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 1572 #define ACPI_RASF_SPEED_FAST (7<<1) 1573 1574 /* Channel Commands */ 1575 1576 enum acpi_rasf_commands { 1577 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1578 }; 1579 1580 /* Platform RAS Capabilities */ 1581 1582 enum acpi_rasf_capabiliities { 1583 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 1584 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 1585 }; 1586 1587 /* Patrol Scrub Commands */ 1588 1589 enum acpi_rasf_patrol_scrub_commands { 1590 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 1591 ACPI_RASF_START_PATROL_SCRUBBER = 2, 1592 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 1593 }; 1594 1595 /* Channel Command flags */ 1596 1597 #define ACPI_RASF_GENERATE_SCI (1<<15) 1598 1599 /* Status values */ 1600 1601 enum acpi_rasf_status { 1602 ACPI_RASF_SUCCESS = 0, 1603 ACPI_RASF_NOT_VALID = 1, 1604 ACPI_RASF_NOT_SUPPORTED = 2, 1605 ACPI_RASF_BUSY = 3, 1606 ACPI_RASF_FAILED = 4, 1607 ACPI_RASF_ABORTED = 5, 1608 ACPI_RASF_INVALID_DATA = 6 1609 }; 1610 1611 /* Status flags */ 1612 1613 #define ACPI_RASF_COMMAND_COMPLETE (1) 1614 #define ACPI_RASF_SCI_DOORBELL (1<<1) 1615 #define ACPI_RASF_ERROR (1<<2) 1616 #define ACPI_RASF_STATUS (0x1F<<3) 1617 1618 /******************************************************************************* 1619 * 1620 * SBST - Smart Battery Specification Table 1621 * Version 1 1622 * 1623 ******************************************************************************/ 1624 1625 struct acpi_table_sbst { 1626 struct acpi_table_header header; /* Common ACPI table header */ 1627 u32 warning_level; 1628 u32 low_level; 1629 u32 critical_level; 1630 }; 1631 1632 /******************************************************************************* 1633 * 1634 * SDEI - Software Delegated Exception Interface Descriptor Table 1635 * 1636 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 1637 * May 8th, 2017. Copyright 2017 ARM Ltd. 1638 * 1639 ******************************************************************************/ 1640 1641 struct acpi_table_sdei { 1642 struct acpi_table_header header; /* Common ACPI table header */ 1643 }; 1644 1645 /******************************************************************************* 1646 * 1647 * SDEV - Secure Devices Table (ACPI 6.2) 1648 * Version 1 1649 * 1650 ******************************************************************************/ 1651 1652 struct acpi_table_sdev { 1653 struct acpi_table_header header; /* Common ACPI table header */ 1654 }; 1655 1656 struct acpi_sdev_header { 1657 u8 type; 1658 u8 flags; 1659 u16 length; 1660 }; 1661 1662 /* Values for subtable type above */ 1663 1664 enum acpi_sdev_type { 1665 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 1666 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 1667 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1668 }; 1669 1670 /* Values for flags above */ 1671 1672 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 1673 1674 /* 1675 * SDEV subtables 1676 */ 1677 1678 /* 0: Namespace Device Based Secure Device Structure */ 1679 1680 struct acpi_sdev_namespace { 1681 struct acpi_sdev_header header; 1682 u16 device_id_offset; 1683 u16 device_id_length; 1684 u16 vendor_data_offset; 1685 u16 vendor_data_length; 1686 }; 1687 1688 /* 1: PCIe Endpoint Device Based Device Structure */ 1689 1690 struct acpi_sdev_pcie { 1691 struct acpi_sdev_header header; 1692 u16 segment; 1693 u16 start_bus; 1694 u16 path_offset; 1695 u16 path_length; 1696 u16 vendor_data_offset; 1697 u16 vendor_data_length; 1698 }; 1699 1700 /* 1a: PCIe Endpoint path entry */ 1701 1702 struct acpi_sdev_pcie_path { 1703 u8 device; 1704 u8 function; 1705 }; 1706 1707 /* Reset to default packing */ 1708 1709 #pragma pack() 1710 1711 #endif /* __ACTBL2_H__ */ 1712