1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2022, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 31 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 32 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 33 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 34 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 35 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 36 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 37 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 38 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 39 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 40 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 41 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 42 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 43 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 44 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 45 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 46 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 47 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 48 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 49 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 50 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 51 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 52 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 53 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 54 55 /* 56 * All tables must be byte-packed to match the ACPI specification, since 57 * the tables are provided by the system BIOS. 58 */ 59 #pragma pack(1) 60 61 /* 62 * Note: C bitfields are not used for this reason: 63 * 64 * "Bitfields are great and easy to read, but unfortunately the C language 65 * does not specify the layout of bitfields in memory, which means they are 66 * essentially useless for dealing with packed data in on-disk formats or 67 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 68 * this decision was a design error in C. Ritchie could have picked an order 69 * and stuck with it." Norman Ramsey. 70 * See http://stackoverflow.com/a/1053662/41661 71 */ 72 73 /******************************************************************************* 74 * 75 * AEST - Arm Error Source Table 76 * 77 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 78 * September 2020. 79 * 80 ******************************************************************************/ 81 82 struct acpi_table_aest { 83 struct acpi_table_header header; 84 void *node_array[]; 85 }; 86 87 /* Common Subtable header - one per Node Structure (Subtable) */ 88 89 struct acpi_aest_hdr { 90 u8 type; 91 u16 length; 92 u8 reserved; 93 u32 node_specific_offset; 94 u32 node_interface_offset; 95 u32 node_interrupt_offset; 96 u32 node_interrupt_count; 97 u64 timestamp_rate; 98 u64 reserved1; 99 u64 error_injection_rate; 100 }; 101 102 /* Values for Type above */ 103 104 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 105 #define ACPI_AEST_MEMORY_ERROR_NODE 1 106 #define ACPI_AEST_SMMU_ERROR_NODE 2 107 #define ACPI_AEST_VENDOR_ERROR_NODE 3 108 #define ACPI_AEST_GIC_ERROR_NODE 4 109 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 110 111 /* 112 * AEST subtables (Error nodes) 113 */ 114 115 /* 0: Processor Error */ 116 117 typedef struct acpi_aest_processor { 118 u32 processor_id; 119 u8 resource_type; 120 u8 reserved; 121 u8 flags; 122 u8 revision; 123 u64 processor_affinity; 124 125 } acpi_aest_processor; 126 127 /* Values for resource_type above, related structs below */ 128 129 #define ACPI_AEST_CACHE_RESOURCE 0 130 #define ACPI_AEST_TLB_RESOURCE 1 131 #define ACPI_AEST_GENERIC_RESOURCE 2 132 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 133 134 /* 0R: Processor Cache Resource Substructure */ 135 136 typedef struct acpi_aest_processor_cache { 137 u32 cache_reference; 138 u32 reserved; 139 140 } acpi_aest_processor_cache; 141 142 /* Values for cache_type above */ 143 144 #define ACPI_AEST_CACHE_DATA 0 145 #define ACPI_AEST_CACHE_INSTRUCTION 1 146 #define ACPI_AEST_CACHE_UNIFIED 2 147 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 148 149 /* 1R: Processor TLB Resource Substructure */ 150 151 typedef struct acpi_aest_processor_tlb { 152 u32 tlb_level; 153 u32 reserved; 154 155 } acpi_aest_processor_tlb; 156 157 /* 2R: Processor Generic Resource Substructure */ 158 159 typedef struct acpi_aest_processor_generic { 160 u32 resource; 161 162 } acpi_aest_processor_generic; 163 164 /* 1: Memory Error */ 165 166 typedef struct acpi_aest_memory { 167 u32 srat_proximity_domain; 168 169 } acpi_aest_memory; 170 171 /* 2: Smmu Error */ 172 173 typedef struct acpi_aest_smmu { 174 u32 iort_node_reference; 175 u32 subcomponent_reference; 176 177 } acpi_aest_smmu; 178 179 /* 3: Vendor Defined */ 180 181 typedef struct acpi_aest_vendor { 182 u32 acpi_hid; 183 u32 acpi_uid; 184 u8 vendor_specific_data[16]; 185 186 } acpi_aest_vendor; 187 188 /* 4: Gic Error */ 189 190 typedef struct acpi_aest_gic { 191 u32 interface_type; 192 u32 instance_id; 193 194 } acpi_aest_gic; 195 196 /* Values for interface_type above */ 197 198 #define ACPI_AEST_GIC_CPU 0 199 #define ACPI_AEST_GIC_DISTRIBUTOR 1 200 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 201 #define ACPI_AEST_GIC_ITS 3 202 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 203 204 /* Node Interface Structure */ 205 206 typedef struct acpi_aest_node_interface { 207 u8 type; 208 u8 reserved[3]; 209 u32 flags; 210 u64 address; 211 u32 error_record_index; 212 u32 error_record_count; 213 u64 error_record_implemented; 214 u64 error_status_reporting; 215 u64 addressing_mode; 216 217 } acpi_aest_node_interface; 218 219 /* Values for Type field above */ 220 221 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 222 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 223 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 224 225 /* Node Interrupt Structure */ 226 227 typedef struct acpi_aest_node_interrupt { 228 u8 type; 229 u8 reserved[2]; 230 u8 flags; 231 u32 gsiv; 232 u8 iort_id; 233 u8 reserved1[3]; 234 235 } acpi_aest_node_interrupt; 236 237 /* Values for Type field above */ 238 239 #define ACPI_AEST_NODE_FAULT_HANDLING 0 240 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 241 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 242 243 /******************************************************************************* 244 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 245 * 246 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 247 * ARM DEN0093 v1.1 248 * 249 ******************************************************************************/ 250 struct acpi_table_agdi { 251 struct acpi_table_header header; /* Common ACPI table header */ 252 u8 flags; 253 u8 reserved[3]; 254 u32 sdei_event; 255 u32 gsiv; 256 }; 257 258 /* Mask for Flags field above */ 259 260 #define ACPI_AGDI_SIGNALING_MODE (1) 261 262 /******************************************************************************* 263 * 264 * APMT - ARM Performance Monitoring Unit Table 265 * 266 * Conforms to: 267 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 268 * ARM DEN0117 v1.0 November 25, 2021 269 * 270 ******************************************************************************/ 271 272 struct acpi_table_apmt { 273 struct acpi_table_header header; /* Common ACPI table header */ 274 }; 275 276 #define ACPI_APMT_NODE_ID_LENGTH 4 277 278 /* 279 * APMT subtables 280 */ 281 struct acpi_apmt_node { 282 u16 length; 283 u8 flags; 284 u8 type; 285 u32 id; 286 u64 inst_primary; 287 u32 inst_secondary; 288 u64 base_address0; 289 u64 base_address1; 290 u32 ovflw_irq; 291 u32 reserved; 292 u32 ovflw_irq_flags; 293 u32 proc_affinity; 294 u32 impl_id; 295 }; 296 297 /* Masks for Flags field above */ 298 299 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 300 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 301 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 302 303 /* Values for Flags dual page field above */ 304 305 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 306 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 307 308 /* Values for Flags processor affinity field above */ 309 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 310 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 311 312 /* Values for Flags 64-bit atomic field above */ 313 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 314 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 315 316 /* Values for Type field above */ 317 318 enum acpi_apmt_node_type { 319 ACPI_APMT_NODE_TYPE_MC = 0x00, 320 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 321 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 322 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 323 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 324 ACPI_APMT_NODE_TYPE_COUNT 325 }; 326 327 /* Masks for ovflw_irq_flags field above */ 328 329 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 330 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 331 332 /* Values for ovflw_irq_flags mode field above */ 333 334 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 335 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 336 337 /* Values for ovflw_irq_flags type field above */ 338 339 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 340 341 /******************************************************************************* 342 * 343 * BDAT - BIOS Data ACPI Table 344 * 345 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 346 * Nov 2020 347 * 348 ******************************************************************************/ 349 350 struct acpi_table_bdat { 351 struct acpi_table_header header; 352 struct acpi_generic_address gas; 353 }; 354 355 /******************************************************************************* 356 * 357 * IORT - IO Remapping Table 358 * 359 * Conforms to "IO Remapping Table System Software on ARM Platforms", 360 * Document number: ARM DEN 0049E.d, Feb 2022 361 * 362 ******************************************************************************/ 363 364 struct acpi_table_iort { 365 struct acpi_table_header header; 366 u32 node_count; 367 u32 node_offset; 368 u32 reserved; 369 }; 370 371 /* 372 * IORT subtables 373 */ 374 struct acpi_iort_node { 375 u8 type; 376 u16 length; 377 u8 revision; 378 u32 identifier; 379 u32 mapping_count; 380 u32 mapping_offset; 381 char node_data[1]; 382 }; 383 384 /* Values for subtable Type above */ 385 386 enum acpi_iort_node_type { 387 ACPI_IORT_NODE_ITS_GROUP = 0x00, 388 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 389 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 390 ACPI_IORT_NODE_SMMU = 0x03, 391 ACPI_IORT_NODE_SMMU_V3 = 0x04, 392 ACPI_IORT_NODE_PMCG = 0x05, 393 ACPI_IORT_NODE_RMR = 0x06, 394 }; 395 396 struct acpi_iort_id_mapping { 397 u32 input_base; /* Lowest value in input range */ 398 u32 id_count; /* Number of IDs */ 399 u32 output_base; /* Lowest value in output range */ 400 u32 output_reference; /* A reference to the output node */ 401 u32 flags; 402 }; 403 404 /* Masks for Flags field above for IORT subtable */ 405 406 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 407 408 struct acpi_iort_memory_access { 409 u32 cache_coherency; 410 u8 hints; 411 u16 reserved; 412 u8 memory_flags; 413 }; 414 415 /* Values for cache_coherency field above */ 416 417 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 418 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 419 420 /* Masks for Hints field above */ 421 422 #define ACPI_IORT_HT_TRANSIENT (1) 423 #define ACPI_IORT_HT_WRITE (1<<1) 424 #define ACPI_IORT_HT_READ (1<<2) 425 #define ACPI_IORT_HT_OVERRIDE (1<<3) 426 427 /* Masks for memory_flags field above */ 428 429 #define ACPI_IORT_MF_COHERENCY (1) 430 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 431 432 /* 433 * IORT node specific subtables 434 */ 435 struct acpi_iort_its_group { 436 u32 its_count; 437 u32 identifiers[1]; /* GIC ITS identifier array */ 438 }; 439 440 struct acpi_iort_named_component { 441 u32 node_flags; 442 u64 memory_properties; /* Memory access properties */ 443 u8 memory_address_limit; /* Memory address size limit */ 444 char device_name[1]; /* Path of namespace object */ 445 }; 446 447 /* Masks for Flags field above */ 448 449 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 450 #define ACPI_IORT_NC_PASID_BITS (31<<1) 451 452 struct acpi_iort_root_complex { 453 u64 memory_properties; /* Memory access properties */ 454 u32 ats_attribute; 455 u32 pci_segment_number; 456 u8 memory_address_limit; /* Memory address size limit */ 457 u16 pasid_capabilities; /* PASID Capabilities */ 458 u8 reserved[1]; /* Reserved, must be zero */ 459 }; 460 461 /* Masks for ats_attribute field above */ 462 463 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 464 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 465 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 466 467 /* Masks for pasid_capabilities field above */ 468 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 469 470 struct acpi_iort_smmu { 471 u64 base_address; /* SMMU base address */ 472 u64 span; /* Length of memory range */ 473 u32 model; 474 u32 flags; 475 u32 global_interrupt_offset; 476 u32 context_interrupt_count; 477 u32 context_interrupt_offset; 478 u32 pmu_interrupt_count; 479 u32 pmu_interrupt_offset; 480 u64 interrupts[1]; /* Interrupt array */ 481 }; 482 483 /* Values for Model field above */ 484 485 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 486 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 487 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 488 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 489 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 490 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 491 492 /* Masks for Flags field above */ 493 494 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 495 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 496 497 /* Global interrupt format */ 498 499 struct acpi_iort_smmu_gsi { 500 u32 nsg_irpt; 501 u32 nsg_irpt_flags; 502 u32 nsg_cfg_irpt; 503 u32 nsg_cfg_irpt_flags; 504 }; 505 506 struct acpi_iort_smmu_v3 { 507 u64 base_address; /* SMMUv3 base address */ 508 u32 flags; 509 u32 reserved; 510 u64 vatos_address; 511 u32 model; 512 u32 event_gsiv; 513 u32 pri_gsiv; 514 u32 gerr_gsiv; 515 u32 sync_gsiv; 516 u32 pxm; 517 u32 id_mapping_index; 518 }; 519 520 /* Values for Model field above */ 521 522 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 523 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 524 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 525 526 /* Masks for Flags field above */ 527 528 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 529 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 530 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 531 532 struct acpi_iort_pmcg { 533 u64 page0_base_address; 534 u32 overflow_gsiv; 535 u32 node_reference; 536 u64 page1_base_address; 537 }; 538 539 struct acpi_iort_rmr { 540 u32 flags; 541 u32 rmr_count; 542 u32 rmr_offset; 543 }; 544 545 /* Masks for Flags field above */ 546 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 547 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 548 549 /* 550 * Macro to access the Access Attributes in flags field above: 551 * Access Attributes is encoded in bits 9:2 552 */ 553 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 554 555 /* Values for above Access Attributes */ 556 557 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 558 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 559 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 560 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 561 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 562 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 563 564 struct acpi_iort_rmr_desc { 565 u64 base_address; 566 u64 length; 567 u32 reserved; 568 }; 569 570 /******************************************************************************* 571 * 572 * IVRS - I/O Virtualization Reporting Structure 573 * Version 1 574 * 575 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 576 * Revision 1.26, February 2009. 577 * 578 ******************************************************************************/ 579 580 struct acpi_table_ivrs { 581 struct acpi_table_header header; /* Common ACPI table header */ 582 u32 info; /* Common virtualization info */ 583 u64 reserved; 584 }; 585 586 /* Values for Info field above */ 587 588 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 589 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 590 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 591 592 /* IVRS subtable header */ 593 594 struct acpi_ivrs_header { 595 u8 type; /* Subtable type */ 596 u8 flags; 597 u16 length; /* Subtable length */ 598 u16 device_id; /* ID of IOMMU */ 599 }; 600 601 /* Values for subtable Type above */ 602 603 enum acpi_ivrs_type { 604 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 605 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 606 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 607 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 608 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 609 ACPI_IVRS_TYPE_MEMORY3 = 0x22 610 }; 611 612 /* Masks for Flags field above for IVHD subtable */ 613 614 #define ACPI_IVHD_TT_ENABLE (1) 615 #define ACPI_IVHD_PASS_PW (1<<1) 616 #define ACPI_IVHD_RES_PASS_PW (1<<2) 617 #define ACPI_IVHD_ISOC (1<<3) 618 #define ACPI_IVHD_IOTLB (1<<4) 619 620 /* Masks for Flags field above for IVMD subtable */ 621 622 #define ACPI_IVMD_UNITY (1) 623 #define ACPI_IVMD_READ (1<<1) 624 #define ACPI_IVMD_WRITE (1<<2) 625 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 626 627 /* 628 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 629 */ 630 631 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 632 633 struct acpi_ivrs_hardware_10 { 634 struct acpi_ivrs_header header; 635 u16 capability_offset; /* Offset for IOMMU control fields */ 636 u64 base_address; /* IOMMU control registers */ 637 u16 pci_segment_group; 638 u16 info; /* MSI number and unit ID */ 639 u32 feature_reporting; 640 }; 641 642 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 643 644 struct acpi_ivrs_hardware_11 { 645 struct acpi_ivrs_header header; 646 u16 capability_offset; /* Offset for IOMMU control fields */ 647 u64 base_address; /* IOMMU control registers */ 648 u16 pci_segment_group; 649 u16 info; /* MSI number and unit ID */ 650 u32 attributes; 651 u64 efr_register_image; 652 u64 reserved; 653 }; 654 655 /* Masks for Info field above */ 656 657 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 658 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 659 660 /* 661 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 662 * Upper two bits of the Type field are the (encoded) length of the structure. 663 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 664 * are reserved for future use but not defined. 665 */ 666 struct acpi_ivrs_de_header { 667 u8 type; 668 u16 id; 669 u8 data_setting; 670 }; 671 672 /* Length of device entry is in the top two bits of Type field above */ 673 674 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 675 676 /* Values for device entry Type field above */ 677 678 enum acpi_ivrs_device_entry_type { 679 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 680 681 ACPI_IVRS_TYPE_PAD4 = 0, 682 ACPI_IVRS_TYPE_ALL = 1, 683 ACPI_IVRS_TYPE_SELECT = 2, 684 ACPI_IVRS_TYPE_START = 3, 685 ACPI_IVRS_TYPE_END = 4, 686 687 /* 8-byte device entries */ 688 689 ACPI_IVRS_TYPE_PAD8 = 64, 690 ACPI_IVRS_TYPE_NOT_USED = 65, 691 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 692 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 693 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 694 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 695 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 696 697 /* Variable-length device entries */ 698 699 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 700 }; 701 702 /* Values for Data field above */ 703 704 #define ACPI_IVHD_INIT_PASS (1) 705 #define ACPI_IVHD_EINT_PASS (1<<1) 706 #define ACPI_IVHD_NMI_PASS (1<<2) 707 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 708 #define ACPI_IVHD_LINT0_PASS (1<<6) 709 #define ACPI_IVHD_LINT1_PASS (1<<7) 710 711 /* Types 0-4: 4-byte device entry */ 712 713 struct acpi_ivrs_device4 { 714 struct acpi_ivrs_de_header header; 715 }; 716 717 /* Types 66-67: 8-byte device entry */ 718 719 struct acpi_ivrs_device8a { 720 struct acpi_ivrs_de_header header; 721 u8 reserved1; 722 u16 used_id; 723 u8 reserved2; 724 }; 725 726 /* Types 70-71: 8-byte device entry */ 727 728 struct acpi_ivrs_device8b { 729 struct acpi_ivrs_de_header header; 730 u32 extended_data; 731 }; 732 733 /* Values for extended_data above */ 734 735 #define ACPI_IVHD_ATS_DISABLED (1<<31) 736 737 /* Type 72: 8-byte device entry */ 738 739 struct acpi_ivrs_device8c { 740 struct acpi_ivrs_de_header header; 741 u8 handle; 742 u16 used_id; 743 u8 variety; 744 }; 745 746 /* Values for Variety field above */ 747 748 #define ACPI_IVHD_IOAPIC 1 749 #define ACPI_IVHD_HPET 2 750 751 /* Type 240: variable-length device entry */ 752 753 struct acpi_ivrs_device_hid { 754 struct acpi_ivrs_de_header header; 755 u64 acpi_hid; 756 u64 acpi_cid; 757 u8 uid_type; 758 u8 uid_length; 759 }; 760 761 /* Values for uid_type above */ 762 763 #define ACPI_IVRS_UID_NOT_PRESENT 0 764 #define ACPI_IVRS_UID_IS_INTEGER 1 765 #define ACPI_IVRS_UID_IS_STRING 2 766 767 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 768 769 struct acpi_ivrs_memory { 770 struct acpi_ivrs_header header; 771 u16 aux_data; 772 u64 reserved; 773 u64 start_address; 774 u64 memory_length; 775 }; 776 777 /******************************************************************************* 778 * 779 * LPIT - Low Power Idle Table 780 * 781 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 782 * 783 ******************************************************************************/ 784 785 struct acpi_table_lpit { 786 struct acpi_table_header header; /* Common ACPI table header */ 787 }; 788 789 /* LPIT subtable header */ 790 791 struct acpi_lpit_header { 792 u32 type; /* Subtable type */ 793 u32 length; /* Subtable length */ 794 u16 unique_id; 795 u16 reserved; 796 u32 flags; 797 }; 798 799 /* Values for subtable Type above */ 800 801 enum acpi_lpit_type { 802 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 803 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 804 }; 805 806 /* Masks for Flags field above */ 807 808 #define ACPI_LPIT_STATE_DISABLED (1) 809 #define ACPI_LPIT_NO_COUNTER (1<<1) 810 811 /* 812 * LPIT subtables, correspond to Type in struct acpi_lpit_header 813 */ 814 815 /* 0x00: Native C-state instruction based LPI structure */ 816 817 struct acpi_lpit_native { 818 struct acpi_lpit_header header; 819 struct acpi_generic_address entry_trigger; 820 u32 residency; 821 u32 latency; 822 struct acpi_generic_address residency_counter; 823 u64 counter_frequency; 824 }; 825 826 /******************************************************************************* 827 * 828 * MADT - Multiple APIC Description Table 829 * Version 3 830 * 831 ******************************************************************************/ 832 833 struct acpi_table_madt { 834 struct acpi_table_header header; /* Common ACPI table header */ 835 u32 address; /* Physical address of local APIC */ 836 u32 flags; 837 }; 838 839 /* Masks for Flags field above */ 840 841 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 842 843 /* Values for PCATCompat flag */ 844 845 #define ACPI_MADT_DUAL_PIC 1 846 #define ACPI_MADT_MULTIPLE_APIC 0 847 848 /* Values for MADT subtable type in struct acpi_subtable_header */ 849 850 enum acpi_madt_type { 851 ACPI_MADT_TYPE_LOCAL_APIC = 0, 852 ACPI_MADT_TYPE_IO_APIC = 1, 853 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 854 ACPI_MADT_TYPE_NMI_SOURCE = 3, 855 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 856 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 857 ACPI_MADT_TYPE_IO_SAPIC = 6, 858 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 859 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 860 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 861 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 862 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 863 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 864 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 865 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 866 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 867 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 868 ACPI_MADT_TYPE_RESERVED = 17, /* 17 to 0x7F are reserved */ 869 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 870 }; 871 872 /* 873 * MADT Subtables, correspond to Type in struct acpi_subtable_header 874 */ 875 876 /* 0: Processor Local APIC */ 877 878 struct acpi_madt_local_apic { 879 struct acpi_subtable_header header; 880 u8 processor_id; /* ACPI processor id */ 881 u8 id; /* Processor's local APIC id */ 882 u32 lapic_flags; 883 }; 884 885 /* 1: IO APIC */ 886 887 struct acpi_madt_io_apic { 888 struct acpi_subtable_header header; 889 u8 id; /* I/O APIC ID */ 890 u8 reserved; /* reserved - must be zero */ 891 u32 address; /* APIC physical address */ 892 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 893 }; 894 895 /* 2: Interrupt Override */ 896 897 struct acpi_madt_interrupt_override { 898 struct acpi_subtable_header header; 899 u8 bus; /* 0 - ISA */ 900 u8 source_irq; /* Interrupt source (IRQ) */ 901 u32 global_irq; /* Global system interrupt */ 902 u16 inti_flags; 903 }; 904 905 /* 3: NMI Source */ 906 907 struct acpi_madt_nmi_source { 908 struct acpi_subtable_header header; 909 u16 inti_flags; 910 u32 global_irq; /* Global system interrupt */ 911 }; 912 913 /* 4: Local APIC NMI */ 914 915 struct acpi_madt_local_apic_nmi { 916 struct acpi_subtable_header header; 917 u8 processor_id; /* ACPI processor id */ 918 u16 inti_flags; 919 u8 lint; /* LINTn to which NMI is connected */ 920 }; 921 922 /* 5: Address Override */ 923 924 struct acpi_madt_local_apic_override { 925 struct acpi_subtable_header header; 926 u16 reserved; /* Reserved, must be zero */ 927 u64 address; /* APIC physical address */ 928 }; 929 930 /* 6: I/O Sapic */ 931 932 struct acpi_madt_io_sapic { 933 struct acpi_subtable_header header; 934 u8 id; /* I/O SAPIC ID */ 935 u8 reserved; /* Reserved, must be zero */ 936 u32 global_irq_base; /* Global interrupt for SAPIC start */ 937 u64 address; /* SAPIC physical address */ 938 }; 939 940 /* 7: Local Sapic */ 941 942 struct acpi_madt_local_sapic { 943 struct acpi_subtable_header header; 944 u8 processor_id; /* ACPI processor id */ 945 u8 id; /* SAPIC ID */ 946 u8 eid; /* SAPIC EID */ 947 u8 reserved[3]; /* Reserved, must be zero */ 948 u32 lapic_flags; 949 u32 uid; /* Numeric UID - ACPI 3.0 */ 950 char uid_string[1]; /* String UID - ACPI 3.0 */ 951 }; 952 953 /* 8: Platform Interrupt Source */ 954 955 struct acpi_madt_interrupt_source { 956 struct acpi_subtable_header header; 957 u16 inti_flags; 958 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 959 u8 id; /* Processor ID */ 960 u8 eid; /* Processor EID */ 961 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 962 u32 global_irq; /* Global system interrupt */ 963 u32 flags; /* Interrupt Source Flags */ 964 }; 965 966 /* Masks for Flags field above */ 967 968 #define ACPI_MADT_CPEI_OVERRIDE (1) 969 970 /* 9: Processor Local X2APIC (ACPI 4.0) */ 971 972 struct acpi_madt_local_x2apic { 973 struct acpi_subtable_header header; 974 u16 reserved; /* reserved - must be zero */ 975 u32 local_apic_id; /* Processor x2APIC ID */ 976 u32 lapic_flags; 977 u32 uid; /* ACPI processor UID */ 978 }; 979 980 /* 10: Local X2APIC NMI (ACPI 4.0) */ 981 982 struct acpi_madt_local_x2apic_nmi { 983 struct acpi_subtable_header header; 984 u16 inti_flags; 985 u32 uid; /* ACPI processor UID */ 986 u8 lint; /* LINTn to which NMI is connected */ 987 u8 reserved[3]; /* reserved - must be zero */ 988 }; 989 990 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 991 992 struct acpi_madt_generic_interrupt { 993 struct acpi_subtable_header header; 994 u16 reserved; /* reserved - must be zero */ 995 u32 cpu_interface_number; 996 u32 uid; 997 u32 flags; 998 u32 parking_version; 999 u32 performance_interrupt; 1000 u64 parked_address; 1001 u64 base_address; 1002 u64 gicv_base_address; 1003 u64 gich_base_address; 1004 u32 vgic_interrupt; 1005 u64 gicr_base_address; 1006 u64 arm_mpidr; 1007 u8 efficiency_class; 1008 u8 reserved2[1]; 1009 u16 spe_interrupt; /* ACPI 6.3 */ 1010 }; 1011 1012 /* Masks for Flags field above */ 1013 1014 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1015 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1016 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1017 1018 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1019 1020 struct acpi_madt_generic_distributor { 1021 struct acpi_subtable_header header; 1022 u16 reserved; /* reserved - must be zero */ 1023 u32 gic_id; 1024 u64 base_address; 1025 u32 global_irq_base; 1026 u8 version; 1027 u8 reserved2[3]; /* reserved - must be zero */ 1028 }; 1029 1030 /* Values for Version field above */ 1031 1032 enum acpi_madt_gic_version { 1033 ACPI_MADT_GIC_VERSION_NONE = 0, 1034 ACPI_MADT_GIC_VERSION_V1 = 1, 1035 ACPI_MADT_GIC_VERSION_V2 = 2, 1036 ACPI_MADT_GIC_VERSION_V3 = 3, 1037 ACPI_MADT_GIC_VERSION_V4 = 4, 1038 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1039 }; 1040 1041 /* 13: Generic MSI Frame (ACPI 5.1) */ 1042 1043 struct acpi_madt_generic_msi_frame { 1044 struct acpi_subtable_header header; 1045 u16 reserved; /* reserved - must be zero */ 1046 u32 msi_frame_id; 1047 u64 base_address; 1048 u32 flags; 1049 u16 spi_count; 1050 u16 spi_base; 1051 }; 1052 1053 /* Masks for Flags field above */ 1054 1055 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1056 1057 /* 14: Generic Redistributor (ACPI 5.1) */ 1058 1059 struct acpi_madt_generic_redistributor { 1060 struct acpi_subtable_header header; 1061 u16 reserved; /* reserved - must be zero */ 1062 u64 base_address; 1063 u32 length; 1064 }; 1065 1066 /* 15: Generic Translator (ACPI 6.0) */ 1067 1068 struct acpi_madt_generic_translator { 1069 struct acpi_subtable_header header; 1070 u16 reserved; /* reserved - must be zero */ 1071 u32 translation_id; 1072 u64 base_address; 1073 u32 reserved2; 1074 }; 1075 1076 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1077 1078 struct acpi_madt_multiproc_wakeup { 1079 struct acpi_subtable_header header; 1080 u16 mailbox_version; 1081 u32 reserved; /* reserved - must be zero */ 1082 u64 base_address; 1083 }; 1084 1085 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1086 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1087 1088 struct acpi_madt_multiproc_wakeup_mailbox { 1089 u16 command; 1090 u16 reserved; /* reserved - must be zero */ 1091 u32 apic_id; 1092 u64 wakeup_vector; 1093 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1094 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1095 }; 1096 1097 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1098 1099 /* 17: OEM data */ 1100 1101 struct acpi_madt_oem_data { 1102 u8 oem_data[0]; 1103 }; 1104 1105 /* 1106 * Common flags fields for MADT subtables 1107 */ 1108 1109 /* MADT Local APIC flags */ 1110 1111 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1112 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1113 1114 /* MADT MPS INTI flags (inti_flags) */ 1115 1116 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1117 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1118 1119 /* Values for MPS INTI flags */ 1120 1121 #define ACPI_MADT_POLARITY_CONFORMS 0 1122 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1123 #define ACPI_MADT_POLARITY_RESERVED 2 1124 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1125 1126 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1127 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1128 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1129 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1130 1131 /******************************************************************************* 1132 * 1133 * MCFG - PCI Memory Mapped Configuration table and subtable 1134 * Version 1 1135 * 1136 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1137 * 1138 ******************************************************************************/ 1139 1140 struct acpi_table_mcfg { 1141 struct acpi_table_header header; /* Common ACPI table header */ 1142 u8 reserved[8]; 1143 }; 1144 1145 /* Subtable */ 1146 1147 struct acpi_mcfg_allocation { 1148 u64 address; /* Base address, processor-relative */ 1149 u16 pci_segment; /* PCI segment group number */ 1150 u8 start_bus_number; /* Starting PCI Bus number */ 1151 u8 end_bus_number; /* Final PCI Bus number */ 1152 u32 reserved; 1153 }; 1154 1155 /******************************************************************************* 1156 * 1157 * MCHI - Management Controller Host Interface Table 1158 * Version 1 1159 * 1160 * Conforms to "Management Component Transport Protocol (MCTP) Host 1161 * Interface Specification", Revision 1.0.0a, October 13, 2009 1162 * 1163 ******************************************************************************/ 1164 1165 struct acpi_table_mchi { 1166 struct acpi_table_header header; /* Common ACPI table header */ 1167 u8 interface_type; 1168 u8 protocol; 1169 u64 protocol_data; 1170 u8 interrupt_type; 1171 u8 gpe; 1172 u8 pci_device_flag; 1173 u32 global_interrupt; 1174 struct acpi_generic_address control_register; 1175 u8 pci_segment; 1176 u8 pci_bus; 1177 u8 pci_device; 1178 u8 pci_function; 1179 }; 1180 1181 /******************************************************************************* 1182 * 1183 * MPST - Memory Power State Table (ACPI 5.0) 1184 * Version 1 1185 * 1186 ******************************************************************************/ 1187 1188 #define ACPI_MPST_CHANNEL_INFO \ 1189 u8 channel_id; \ 1190 u8 reserved1[3]; \ 1191 u16 power_node_count; \ 1192 u16 reserved2; 1193 1194 /* Main table */ 1195 1196 struct acpi_table_mpst { 1197 struct acpi_table_header header; /* Common ACPI table header */ 1198 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1199 }; 1200 1201 /* Memory Platform Communication Channel Info */ 1202 1203 struct acpi_mpst_channel { 1204 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1205 }; 1206 1207 /* Memory Power Node Structure */ 1208 1209 struct acpi_mpst_power_node { 1210 u8 flags; 1211 u8 reserved1; 1212 u16 node_id; 1213 u32 length; 1214 u64 range_address; 1215 u64 range_length; 1216 u32 num_power_states; 1217 u32 num_physical_components; 1218 }; 1219 1220 /* Values for Flags field above */ 1221 1222 #define ACPI_MPST_ENABLED 1 1223 #define ACPI_MPST_POWER_MANAGED 2 1224 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1225 1226 /* Memory Power State Structure (follows POWER_NODE above) */ 1227 1228 struct acpi_mpst_power_state { 1229 u8 power_state; 1230 u8 info_index; 1231 }; 1232 1233 /* Physical Component ID Structure (follows POWER_STATE above) */ 1234 1235 struct acpi_mpst_component { 1236 u16 component_id; 1237 }; 1238 1239 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1240 1241 struct acpi_mpst_data_hdr { 1242 u16 characteristics_count; 1243 u16 reserved; 1244 }; 1245 1246 struct acpi_mpst_power_data { 1247 u8 structure_id; 1248 u8 flags; 1249 u16 reserved1; 1250 u32 average_power; 1251 u32 power_saving; 1252 u64 exit_latency; 1253 u64 reserved2; 1254 }; 1255 1256 /* Values for Flags field above */ 1257 1258 #define ACPI_MPST_PRESERVE 1 1259 #define ACPI_MPST_AUTOENTRY 2 1260 #define ACPI_MPST_AUTOEXIT 4 1261 1262 /* Shared Memory Region (not part of an ACPI table) */ 1263 1264 struct acpi_mpst_shared { 1265 u32 signature; 1266 u16 pcc_command; 1267 u16 pcc_status; 1268 u32 command_register; 1269 u32 status_register; 1270 u32 power_state_id; 1271 u32 power_node_id; 1272 u64 energy_consumed; 1273 u64 average_power; 1274 }; 1275 1276 /******************************************************************************* 1277 * 1278 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1279 * Version 1 1280 * 1281 ******************************************************************************/ 1282 1283 struct acpi_table_msct { 1284 struct acpi_table_header header; /* Common ACPI table header */ 1285 u32 proximity_offset; /* Location of proximity info struct(s) */ 1286 u32 max_proximity_domains; /* Max number of proximity domains */ 1287 u32 max_clock_domains; /* Max number of clock domains */ 1288 u64 max_address; /* Max physical address in system */ 1289 }; 1290 1291 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1292 1293 struct acpi_msct_proximity { 1294 u8 revision; 1295 u8 length; 1296 u32 range_start; /* Start of domain range */ 1297 u32 range_end; /* End of domain range */ 1298 u32 processor_capacity; 1299 u64 memory_capacity; /* In bytes */ 1300 }; 1301 1302 /******************************************************************************* 1303 * 1304 * MSDM - Microsoft Data Management table 1305 * 1306 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1307 * November 29, 2011. Copyright 2011 Microsoft 1308 * 1309 ******************************************************************************/ 1310 1311 /* Basic MSDM table is only the common ACPI header */ 1312 1313 struct acpi_table_msdm { 1314 struct acpi_table_header header; /* Common ACPI table header */ 1315 }; 1316 1317 /******************************************************************************* 1318 * 1319 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1320 * Version 1 1321 * 1322 ******************************************************************************/ 1323 1324 struct acpi_table_nfit { 1325 struct acpi_table_header header; /* Common ACPI table header */ 1326 u32 reserved; /* Reserved, must be zero */ 1327 }; 1328 1329 /* Subtable header for NFIT */ 1330 1331 struct acpi_nfit_header { 1332 u16 type; 1333 u16 length; 1334 }; 1335 1336 /* Values for subtable type in struct acpi_nfit_header */ 1337 1338 enum acpi_nfit_type { 1339 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1340 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1341 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1342 ACPI_NFIT_TYPE_SMBIOS = 3, 1343 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1344 ACPI_NFIT_TYPE_DATA_REGION = 5, 1345 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1346 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1347 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1348 }; 1349 1350 /* 1351 * NFIT Subtables 1352 */ 1353 1354 /* 0: System Physical Address Range Structure */ 1355 1356 struct acpi_nfit_system_address { 1357 struct acpi_nfit_header header; 1358 u16 range_index; 1359 u16 flags; 1360 u32 reserved; /* Reserved, must be zero */ 1361 u32 proximity_domain; 1362 u8 range_guid[16]; 1363 u64 address; 1364 u64 length; 1365 u64 memory_mapping; 1366 u64 location_cookie; /* ACPI 6.4 */ 1367 }; 1368 1369 /* Flags */ 1370 1371 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1372 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1373 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1374 1375 /* Range Type GUIDs appear in the include/acuuid.h file */ 1376 1377 /* 1: Memory Device to System Address Range Map Structure */ 1378 1379 struct acpi_nfit_memory_map { 1380 struct acpi_nfit_header header; 1381 u32 device_handle; 1382 u16 physical_id; 1383 u16 region_id; 1384 u16 range_index; 1385 u16 region_index; 1386 u64 region_size; 1387 u64 region_offset; 1388 u64 address; 1389 u16 interleave_index; 1390 u16 interleave_ways; 1391 u16 flags; 1392 u16 reserved; /* Reserved, must be zero */ 1393 }; 1394 1395 /* Flags */ 1396 1397 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1398 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1399 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1400 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1401 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1402 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1403 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1404 1405 /* 2: Interleave Structure */ 1406 1407 struct acpi_nfit_interleave { 1408 struct acpi_nfit_header header; 1409 u16 interleave_index; 1410 u16 reserved; /* Reserved, must be zero */ 1411 u32 line_count; 1412 u32 line_size; 1413 u32 line_offset[1]; /* Variable length */ 1414 }; 1415 1416 /* 3: SMBIOS Management Information Structure */ 1417 1418 struct acpi_nfit_smbios { 1419 struct acpi_nfit_header header; 1420 u32 reserved; /* Reserved, must be zero */ 1421 u8 data[1]; /* Variable length */ 1422 }; 1423 1424 /* 4: NVDIMM Control Region Structure */ 1425 1426 struct acpi_nfit_control_region { 1427 struct acpi_nfit_header header; 1428 u16 region_index; 1429 u16 vendor_id; 1430 u16 device_id; 1431 u16 revision_id; 1432 u16 subsystem_vendor_id; 1433 u16 subsystem_device_id; 1434 u16 subsystem_revision_id; 1435 u8 valid_fields; 1436 u8 manufacturing_location; 1437 u16 manufacturing_date; 1438 u8 reserved[2]; /* Reserved, must be zero */ 1439 u32 serial_number; 1440 u16 code; 1441 u16 windows; 1442 u64 window_size; 1443 u64 command_offset; 1444 u64 command_size; 1445 u64 status_offset; 1446 u64 status_size; 1447 u16 flags; 1448 u8 reserved1[6]; /* Reserved, must be zero */ 1449 }; 1450 1451 /* Flags */ 1452 1453 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1454 1455 /* valid_fields bits */ 1456 1457 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1458 1459 /* 5: NVDIMM Block Data Window Region Structure */ 1460 1461 struct acpi_nfit_data_region { 1462 struct acpi_nfit_header header; 1463 u16 region_index; 1464 u16 windows; 1465 u64 offset; 1466 u64 size; 1467 u64 capacity; 1468 u64 start_address; 1469 }; 1470 1471 /* 6: Flush Hint Address Structure */ 1472 1473 struct acpi_nfit_flush_address { 1474 struct acpi_nfit_header header; 1475 u32 device_handle; 1476 u16 hint_count; 1477 u8 reserved[6]; /* Reserved, must be zero */ 1478 u64 hint_address[1]; /* Variable length */ 1479 }; 1480 1481 /* 7: Platform Capabilities Structure */ 1482 1483 struct acpi_nfit_capabilities { 1484 struct acpi_nfit_header header; 1485 u8 highest_capability; 1486 u8 reserved[3]; /* Reserved, must be zero */ 1487 u32 capabilities; 1488 u32 reserved2; 1489 }; 1490 1491 /* Capabilities Flags */ 1492 1493 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1494 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1495 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1496 1497 /* 1498 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1499 */ 1500 struct nfit_device_handle { 1501 u32 handle; 1502 }; 1503 1504 /* Device handle construction and extraction macros */ 1505 1506 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1507 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1508 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1509 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1510 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1511 1512 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1513 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1514 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1515 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1516 #define ACPI_NFIT_NODE_ID_OFFSET 16 1517 1518 /* Macro to construct a NFIT/NVDIMM device handle */ 1519 1520 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1521 ((dimm) | \ 1522 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1523 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1524 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1525 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1526 1527 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1528 1529 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1530 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1531 1532 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1533 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1534 1535 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1536 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1537 1538 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1539 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1540 1541 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1542 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1543 1544 /******************************************************************************* 1545 * 1546 * NHLT - Non HD Audio Link Table 1547 * 1548 * Conforms to: Intel Smart Sound Technology NHLT Specification 1549 * Version 0.8.1, January 2020. 1550 * 1551 ******************************************************************************/ 1552 1553 /* Main table */ 1554 1555 struct acpi_table_nhlt { 1556 struct acpi_table_header header; /* Common ACPI table header */ 1557 u8 endpoint_count; 1558 }; 1559 1560 struct acpi_nhlt_endpoint { 1561 u32 descriptor_length; 1562 u8 link_type; 1563 u8 instance_id; 1564 u16 vendor_id; 1565 u16 device_id; 1566 u16 revision_id; 1567 u32 subsystem_id; 1568 u8 device_type; 1569 u8 direction; 1570 u8 virtual_bus_id; 1571 }; 1572 1573 /* Types for link_type field above */ 1574 1575 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1576 #define ACPI_NHLT_RESERVED_DSP 1 1577 #define ACPI_NHLT_PDM 2 1578 #define ACPI_NHLT_SSP 3 1579 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1580 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1581 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1582 1583 /* All other values above are reserved */ 1584 1585 /* Values for device_id field above */ 1586 1587 #define ACPI_NHLT_PDM_DMIC 0xAE20 1588 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1589 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1590 1591 /* Values for device_type field above */ 1592 1593 /* SSP Link */ 1594 1595 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1596 #define ACPI_NHLT_LINK_FM 1 1597 #define ACPI_NHLT_LINK_MODEM 2 1598 /* 3 is reserved */ 1599 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1600 1601 /* PDM Link */ 1602 1603 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1604 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1605 1606 /* Values for Direction field above */ 1607 1608 #define ACPI_NHLT_DIR_RENDER 0 1609 #define ACPI_NHLT_DIR_CAPTURE 1 1610 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1611 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1612 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1613 1614 struct acpi_nhlt_device_specific_config { 1615 u32 capabilities_size; 1616 u8 virtual_slot; 1617 u8 config_type; 1618 }; 1619 1620 struct acpi_nhlt_device_specific_config_a { 1621 u32 capabilities_size; 1622 u8 virtual_slot; 1623 u8 config_type; 1624 u8 array_type; 1625 }; 1626 1627 /* Values for Config Type above */ 1628 1629 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1630 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1631 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1632 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1633 1634 struct acpi_nhlt_device_specific_config_b { 1635 u32 capabilities_size; 1636 }; 1637 1638 struct acpi_nhlt_device_specific_config_c { 1639 u32 capabilities_size; 1640 u8 virtual_slot; 1641 }; 1642 1643 struct acpi_nhlt_render_device_specific_config { 1644 u32 capabilities_size; 1645 u8 virtual_slot; 1646 }; 1647 1648 struct acpi_nhlt_wave_extensible { 1649 u16 format_tag; 1650 u16 channel_count; 1651 u32 samples_per_sec; 1652 u32 avg_bytes_per_sec; 1653 u16 block_align; 1654 u16 bits_per_sample; 1655 u16 extra_format_size; 1656 u16 valid_bits_per_sample; 1657 u32 channel_mask; 1658 u8 sub_format_guid[16]; 1659 }; 1660 1661 /* Values for channel_mask above */ 1662 1663 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1664 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1665 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1666 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1667 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1668 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1669 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1670 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1671 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1672 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1673 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1674 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1675 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1676 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1677 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1678 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1679 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1680 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1681 1682 struct acpi_nhlt_format_config { 1683 struct acpi_nhlt_wave_extensible format; 1684 u32 capability_size; 1685 u8 capabilities[]; 1686 }; 1687 1688 struct acpi_nhlt_formats_config { 1689 u8 formats_count; 1690 }; 1691 1692 struct acpi_nhlt_device_specific_hdr { 1693 u8 virtual_slot; 1694 u8 config_type; 1695 }; 1696 1697 /* Types for config_type above */ 1698 1699 #define ACPI_NHLT_GENERIC 0 1700 #define ACPI_NHLT_MIC 1 1701 #define ACPI_NHLT_RENDER 3 1702 1703 struct acpi_nhlt_mic_device_specific_config { 1704 struct acpi_nhlt_device_specific_hdr device_config; 1705 u8 array_type_ext; 1706 }; 1707 1708 /* Values for array_type_ext above */ 1709 1710 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 1711 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 1712 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 1713 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1714 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 1715 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1716 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 1717 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 1718 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 1719 1720 #define ACPI_NHLT_NO_EXTENSION 0x0 1721 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 1722 1723 struct acpi_nhlt_vendor_mic_count { 1724 u8 microphone_count; 1725 }; 1726 1727 struct acpi_nhlt_vendor_mic_config { 1728 u8 type; 1729 u8 panel; 1730 u16 speaker_position_distance; /* mm */ 1731 u16 horizontal_offset; /* mm */ 1732 u16 vertical_offset; /* mm */ 1733 u8 frequency_low_band; /* 5*Hz */ 1734 u8 frequency_high_band; /* 500*Hz */ 1735 u16 direction_angle; /* -180 - + 180 */ 1736 u16 elevation_angle; /* -180 - + 180 */ 1737 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */ 1738 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */ 1739 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */ 1740 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */ 1741 }; 1742 1743 /* Values for Type field above */ 1744 1745 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 1746 #define ACPI_NHLT_MIC_SUBCARDIOID 1 1747 #define ACPI_NHLT_MIC_CARDIOID 2 1748 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 1749 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 1750 #define ACPI_NHLT_MIC_8_SHAPED 5 1751 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 1752 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 1753 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 1754 1755 /* Values for Panel field above */ 1756 1757 #define ACPI_NHLT_MIC_POSITION_TOP 0 1758 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 1759 #define ACPI_NHLT_MIC_POSITION_LEFT 2 1760 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 1761 #define ACPI_NHLT_MIC_POSITION_FRONT 4 1762 #define ACPI_NHLT_MIC_POSITION_BACK 5 1763 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 1764 1765 struct acpi_nhlt_vendor_mic_device_specific_config { 1766 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 1767 u8 number_of_microphones; 1768 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */ 1769 }; 1770 1771 /* Microphone SNR and Sensitivity extension */ 1772 1773 struct acpi_nhlt_mic_snr_sensitivity_extension { 1774 u32 SNR; 1775 u32 sensitivity; 1776 }; 1777 1778 /* Render device with feedback */ 1779 1780 struct acpi_nhlt_render_feedback_device_specific_config { 1781 u8 feedback_virtual_slot; /* Render slot in case of capture */ 1782 u16 feedback_channels; /* Informative only */ 1783 u16 feedback_valid_bits_per_sample; 1784 }; 1785 1786 /* Non documented structures */ 1787 1788 struct acpi_nhlt_device_info_count { 1789 u8 structure_count; 1790 }; 1791 1792 struct acpi_nhlt_device_info { 1793 u8 device_id[16]; 1794 u8 device_instance_id; 1795 u8 device_port_id; 1796 }; 1797 1798 /******************************************************************************* 1799 * 1800 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1801 * Version 2 (ACPI 6.2) 1802 * 1803 ******************************************************************************/ 1804 1805 struct acpi_table_pcct { 1806 struct acpi_table_header header; /* Common ACPI table header */ 1807 u32 flags; 1808 u64 reserved; 1809 }; 1810 1811 /* Values for Flags field above */ 1812 1813 #define ACPI_PCCT_DOORBELL 1 1814 1815 /* Values for subtable type in struct acpi_subtable_header */ 1816 1817 enum acpi_pcct_type { 1818 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1819 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1820 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1821 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1822 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1823 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1824 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1825 }; 1826 1827 /* 1828 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1829 */ 1830 1831 /* 0: Generic Communications Subspace */ 1832 1833 struct acpi_pcct_subspace { 1834 struct acpi_subtable_header header; 1835 u8 reserved[6]; 1836 u64 base_address; 1837 u64 length; 1838 struct acpi_generic_address doorbell_register; 1839 u64 preserve_mask; 1840 u64 write_mask; 1841 u32 latency; 1842 u32 max_access_rate; 1843 u16 min_turnaround_time; 1844 }; 1845 1846 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1847 1848 struct acpi_pcct_hw_reduced { 1849 struct acpi_subtable_header header; 1850 u32 platform_interrupt; 1851 u8 flags; 1852 u8 reserved; 1853 u64 base_address; 1854 u64 length; 1855 struct acpi_generic_address doorbell_register; 1856 u64 preserve_mask; 1857 u64 write_mask; 1858 u32 latency; 1859 u32 max_access_rate; 1860 u16 min_turnaround_time; 1861 }; 1862 1863 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1864 1865 struct acpi_pcct_hw_reduced_type2 { 1866 struct acpi_subtable_header header; 1867 u32 platform_interrupt; 1868 u8 flags; 1869 u8 reserved; 1870 u64 base_address; 1871 u64 length; 1872 struct acpi_generic_address doorbell_register; 1873 u64 preserve_mask; 1874 u64 write_mask; 1875 u32 latency; 1876 u32 max_access_rate; 1877 u16 min_turnaround_time; 1878 struct acpi_generic_address platform_ack_register; 1879 u64 ack_preserve_mask; 1880 u64 ack_write_mask; 1881 }; 1882 1883 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1884 1885 struct acpi_pcct_ext_pcc_master { 1886 struct acpi_subtable_header header; 1887 u32 platform_interrupt; 1888 u8 flags; 1889 u8 reserved1; 1890 u64 base_address; 1891 u32 length; 1892 struct acpi_generic_address doorbell_register; 1893 u64 preserve_mask; 1894 u64 write_mask; 1895 u32 latency; 1896 u32 max_access_rate; 1897 u32 min_turnaround_time; 1898 struct acpi_generic_address platform_ack_register; 1899 u64 ack_preserve_mask; 1900 u64 ack_set_mask; 1901 u64 reserved2; 1902 struct acpi_generic_address cmd_complete_register; 1903 u64 cmd_complete_mask; 1904 struct acpi_generic_address cmd_update_register; 1905 u64 cmd_update_preserve_mask; 1906 u64 cmd_update_set_mask; 1907 struct acpi_generic_address error_status_register; 1908 u64 error_status_mask; 1909 }; 1910 1911 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1912 1913 struct acpi_pcct_ext_pcc_slave { 1914 struct acpi_subtable_header header; 1915 u32 platform_interrupt; 1916 u8 flags; 1917 u8 reserved1; 1918 u64 base_address; 1919 u32 length; 1920 struct acpi_generic_address doorbell_register; 1921 u64 preserve_mask; 1922 u64 write_mask; 1923 u32 latency; 1924 u32 max_access_rate; 1925 u32 min_turnaround_time; 1926 struct acpi_generic_address platform_ack_register; 1927 u64 ack_preserve_mask; 1928 u64 ack_set_mask; 1929 u64 reserved2; 1930 struct acpi_generic_address cmd_complete_register; 1931 u64 cmd_complete_mask; 1932 struct acpi_generic_address cmd_update_register; 1933 u64 cmd_update_preserve_mask; 1934 u64 cmd_update_set_mask; 1935 struct acpi_generic_address error_status_register; 1936 u64 error_status_mask; 1937 }; 1938 1939 /* 5: HW Registers based Communications Subspace */ 1940 1941 struct acpi_pcct_hw_reg { 1942 struct acpi_subtable_header header; 1943 u16 version; 1944 u64 base_address; 1945 u64 length; 1946 struct acpi_generic_address doorbell_register; 1947 u64 doorbell_preserve; 1948 u64 doorbell_write; 1949 struct acpi_generic_address cmd_complete_register; 1950 u64 cmd_complete_mask; 1951 struct acpi_generic_address error_status_register; 1952 u64 error_status_mask; 1953 u32 nominal_latency; 1954 u32 min_turnaround_time; 1955 }; 1956 1957 /* Values for doorbell flags above */ 1958 1959 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1960 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1961 1962 /* 1963 * PCC memory structures (not part of the ACPI table) 1964 */ 1965 1966 /* Shared Memory Region */ 1967 1968 struct acpi_pcct_shared_memory { 1969 u32 signature; 1970 u16 command; 1971 u16 status; 1972 }; 1973 1974 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1975 1976 struct acpi_pcct_ext_pcc_shared_memory { 1977 u32 signature; 1978 u32 flags; 1979 u32 length; 1980 u32 command; 1981 }; 1982 1983 /******************************************************************************* 1984 * 1985 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1986 * Version 0 1987 * 1988 ******************************************************************************/ 1989 1990 struct acpi_table_pdtt { 1991 struct acpi_table_header header; /* Common ACPI table header */ 1992 u8 trigger_count; 1993 u8 reserved[3]; 1994 u32 array_offset; 1995 }; 1996 1997 /* 1998 * PDTT Communication Channel Identifier Structure. 1999 * The number of these structures is defined by trigger_count above, 2000 * starting at array_offset. 2001 */ 2002 struct acpi_pdtt_channel { 2003 u8 subchannel_id; 2004 u8 flags; 2005 }; 2006 2007 /* Flags for above */ 2008 2009 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2010 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2011 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2012 2013 /******************************************************************************* 2014 * 2015 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2016 * Version 1 2017 * 2018 ******************************************************************************/ 2019 2020 struct acpi_table_phat { 2021 struct acpi_table_header header; /* Common ACPI table header */ 2022 }; 2023 2024 /* Common header for PHAT subtables that follow main table */ 2025 2026 struct acpi_phat_header { 2027 u16 type; 2028 u16 length; 2029 u8 revision; 2030 }; 2031 2032 /* Values for Type field above */ 2033 2034 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2035 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2036 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2037 2038 /* 2039 * PHAT subtables, correspond to Type in struct acpi_phat_header 2040 */ 2041 2042 /* 0: Firmware Version Data Record */ 2043 2044 struct acpi_phat_version_data { 2045 struct acpi_phat_header header; 2046 u8 reserved[3]; 2047 u32 element_count; 2048 }; 2049 2050 struct acpi_phat_version_element { 2051 u8 guid[16]; 2052 u64 version_value; 2053 u32 producer_id; 2054 }; 2055 2056 /* 1: Firmware Health Data Record */ 2057 2058 struct acpi_phat_health_data { 2059 struct acpi_phat_header header; 2060 u8 reserved[2]; 2061 u8 health; 2062 u8 device_guid[16]; 2063 u32 device_specific_offset; /* Zero if no Device-specific data */ 2064 }; 2065 2066 /* Values for Health field above */ 2067 2068 #define ACPI_PHAT_ERRORS_FOUND 0 2069 #define ACPI_PHAT_NO_ERRORS 1 2070 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2071 #define ACPI_PHAT_ADVISORY 3 2072 2073 /******************************************************************************* 2074 * 2075 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2076 * Version 1 2077 * 2078 ******************************************************************************/ 2079 2080 struct acpi_table_pmtt { 2081 struct acpi_table_header header; /* Common ACPI table header */ 2082 u32 memory_device_count; 2083 /* 2084 * Immediately followed by: 2085 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2086 */ 2087 }; 2088 2089 /* Common header for PMTT subtables that follow main table */ 2090 2091 struct acpi_pmtt_header { 2092 u8 type; 2093 u8 reserved1; 2094 u16 length; 2095 u16 flags; 2096 u16 reserved2; 2097 u32 memory_device_count; /* Zero means no memory device structs follow */ 2098 /* 2099 * Immediately followed by: 2100 * u8 type_specific_data[] 2101 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2102 */ 2103 }; 2104 2105 /* Values for Type field above */ 2106 2107 #define ACPI_PMTT_TYPE_SOCKET 0 2108 #define ACPI_PMTT_TYPE_CONTROLLER 1 2109 #define ACPI_PMTT_TYPE_DIMM 2 2110 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2111 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2112 2113 /* Values for Flags field above */ 2114 2115 #define ACPI_PMTT_TOP_LEVEL 0x0001 2116 #define ACPI_PMTT_PHYSICAL 0x0002 2117 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2118 2119 /* 2120 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2121 */ 2122 2123 /* 0: Socket Structure */ 2124 2125 struct acpi_pmtt_socket { 2126 struct acpi_pmtt_header header; 2127 u16 socket_id; 2128 u16 reserved; 2129 }; 2130 /* 2131 * Immediately followed by: 2132 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2133 */ 2134 2135 /* 1: Memory Controller subtable */ 2136 2137 struct acpi_pmtt_controller { 2138 struct acpi_pmtt_header header; 2139 u16 controller_id; 2140 u16 reserved; 2141 }; 2142 /* 2143 * Immediately followed by: 2144 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2145 */ 2146 2147 /* 2: Physical Component Identifier (DIMM) */ 2148 2149 struct acpi_pmtt_physical_component { 2150 struct acpi_pmtt_header header; 2151 u32 bios_handle; 2152 }; 2153 2154 /* 0xFF: Vendor Specific Data */ 2155 2156 struct acpi_pmtt_vendor_specific { 2157 struct acpi_pmtt_header header; 2158 u8 type_uuid[16]; 2159 u8 specific[]; 2160 /* 2161 * Immediately followed by: 2162 * u8 vendor_specific_data[]; 2163 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2164 */ 2165 }; 2166 2167 /******************************************************************************* 2168 * 2169 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2170 * Version 1 2171 * 2172 ******************************************************************************/ 2173 2174 struct acpi_table_pptt { 2175 struct acpi_table_header header; /* Common ACPI table header */ 2176 }; 2177 2178 /* Values for Type field above */ 2179 2180 enum acpi_pptt_type { 2181 ACPI_PPTT_TYPE_PROCESSOR = 0, 2182 ACPI_PPTT_TYPE_CACHE = 1, 2183 ACPI_PPTT_TYPE_ID = 2, 2184 ACPI_PPTT_TYPE_RESERVED = 3 2185 }; 2186 2187 /* 0: Processor Hierarchy Node Structure */ 2188 2189 struct acpi_pptt_processor { 2190 struct acpi_subtable_header header; 2191 u16 reserved; 2192 u32 flags; 2193 u32 parent; 2194 u32 acpi_processor_id; 2195 u32 number_of_priv_resources; 2196 }; 2197 2198 /* Flags */ 2199 2200 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2201 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2202 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2203 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2204 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2205 2206 /* 1: Cache Type Structure */ 2207 2208 struct acpi_pptt_cache { 2209 struct acpi_subtable_header header; 2210 u16 reserved; 2211 u32 flags; 2212 u32 next_level_of_cache; 2213 u32 size; 2214 u32 number_of_sets; 2215 u8 associativity; 2216 u8 attributes; 2217 u16 line_size; 2218 }; 2219 2220 /* 1: Cache Type Structure for PPTT version 3 */ 2221 2222 struct acpi_pptt_cache_v1 { 2223 u32 cache_id; 2224 }; 2225 2226 /* Flags */ 2227 2228 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2229 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2230 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2231 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2232 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2233 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2234 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2235 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2236 2237 /* Masks for Attributes */ 2238 2239 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2240 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2241 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2242 2243 /* Attributes describing cache */ 2244 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2245 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2246 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2247 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2248 2249 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2250 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2251 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2252 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2253 2254 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2255 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2256 2257 /* 2: ID Structure */ 2258 2259 struct acpi_pptt_id { 2260 struct acpi_subtable_header header; 2261 u16 reserved; 2262 u32 vendor_id; 2263 u64 level1_id; 2264 u64 level2_id; 2265 u16 major_rev; 2266 u16 minor_rev; 2267 u16 spin_rev; 2268 }; 2269 2270 /******************************************************************************* 2271 * 2272 * PRMT - Platform Runtime Mechanism Table 2273 * Version 1 2274 * 2275 ******************************************************************************/ 2276 2277 struct acpi_table_prmt { 2278 struct acpi_table_header header; /* Common ACPI table header */ 2279 }; 2280 2281 struct acpi_table_prmt_header { 2282 u8 platform_guid[16]; 2283 u32 module_info_offset; 2284 u32 module_info_count; 2285 }; 2286 2287 struct acpi_prmt_module_header { 2288 u16 revision; 2289 u16 length; 2290 }; 2291 2292 struct acpi_prmt_module_info { 2293 u16 revision; 2294 u16 length; 2295 u8 module_guid[16]; 2296 u16 major_rev; 2297 u16 minor_rev; 2298 u16 handler_info_count; 2299 u32 handler_info_offset; 2300 u64 mmio_list_pointer; 2301 }; 2302 2303 struct acpi_prmt_handler_info { 2304 u16 revision; 2305 u16 length; 2306 u8 handler_guid[16]; 2307 u64 handler_address; 2308 u64 static_data_buffer_address; 2309 u64 acpi_param_buffer_address; 2310 }; 2311 2312 /******************************************************************************* 2313 * 2314 * RASF - RAS Feature Table (ACPI 5.0) 2315 * Version 1 2316 * 2317 ******************************************************************************/ 2318 2319 struct acpi_table_rasf { 2320 struct acpi_table_header header; /* Common ACPI table header */ 2321 u8 channel_id[12]; 2322 }; 2323 2324 /* RASF Platform Communication Channel Shared Memory Region */ 2325 2326 struct acpi_rasf_shared_memory { 2327 u32 signature; 2328 u16 command; 2329 u16 status; 2330 u16 version; 2331 u8 capabilities[16]; 2332 u8 set_capabilities[16]; 2333 u16 num_parameter_blocks; 2334 u32 set_capabilities_status; 2335 }; 2336 2337 /* RASF Parameter Block Structure Header */ 2338 2339 struct acpi_rasf_parameter_block { 2340 u16 type; 2341 u16 version; 2342 u16 length; 2343 }; 2344 2345 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2346 2347 struct acpi_rasf_patrol_scrub_parameter { 2348 struct acpi_rasf_parameter_block header; 2349 u16 patrol_scrub_command; 2350 u64 requested_address_range[2]; 2351 u64 actual_address_range[2]; 2352 u16 flags; 2353 u8 requested_speed; 2354 }; 2355 2356 /* Masks for Flags and Speed fields above */ 2357 2358 #define ACPI_RASF_SCRUBBER_RUNNING 1 2359 #define ACPI_RASF_SPEED (7<<1) 2360 #define ACPI_RASF_SPEED_SLOW (0<<1) 2361 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2362 #define ACPI_RASF_SPEED_FAST (7<<1) 2363 2364 /* Channel Commands */ 2365 2366 enum acpi_rasf_commands { 2367 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2368 }; 2369 2370 /* Platform RAS Capabilities */ 2371 2372 enum acpi_rasf_capabiliities { 2373 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2374 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2375 }; 2376 2377 /* Patrol Scrub Commands */ 2378 2379 enum acpi_rasf_patrol_scrub_commands { 2380 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2381 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2382 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2383 }; 2384 2385 /* Channel Command flags */ 2386 2387 #define ACPI_RASF_GENERATE_SCI (1<<15) 2388 2389 /* Status values */ 2390 2391 enum acpi_rasf_status { 2392 ACPI_RASF_SUCCESS = 0, 2393 ACPI_RASF_NOT_VALID = 1, 2394 ACPI_RASF_NOT_SUPPORTED = 2, 2395 ACPI_RASF_BUSY = 3, 2396 ACPI_RASF_FAILED = 4, 2397 ACPI_RASF_ABORTED = 5, 2398 ACPI_RASF_INVALID_DATA = 6 2399 }; 2400 2401 /* Status flags */ 2402 2403 #define ACPI_RASF_COMMAND_COMPLETE (1) 2404 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2405 #define ACPI_RASF_ERROR (1<<2) 2406 #define ACPI_RASF_STATUS (0x1F<<3) 2407 2408 /******************************************************************************* 2409 * 2410 * RGRT - Regulatory Graphics Resource Table 2411 * Version 1 2412 * 2413 * Conforms to "ACPI RGRT" available at: 2414 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2415 * 2416 ******************************************************************************/ 2417 2418 struct acpi_table_rgrt { 2419 struct acpi_table_header header; /* Common ACPI table header */ 2420 u16 version; 2421 u8 image_type; 2422 u8 reserved; 2423 u8 image[]; 2424 }; 2425 2426 /* image_type values */ 2427 2428 enum acpi_rgrt_image_type { 2429 ACPI_RGRT_TYPE_RESERVED0 = 0, 2430 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2431 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2432 }; 2433 2434 /******************************************************************************* 2435 * 2436 * SBST - Smart Battery Specification Table 2437 * Version 1 2438 * 2439 ******************************************************************************/ 2440 2441 struct acpi_table_sbst { 2442 struct acpi_table_header header; /* Common ACPI table header */ 2443 u32 warning_level; 2444 u32 low_level; 2445 u32 critical_level; 2446 }; 2447 2448 /******************************************************************************* 2449 * 2450 * SDEI - Software Delegated Exception Interface Descriptor Table 2451 * 2452 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2453 * May 8th, 2017. Copyright 2017 ARM Ltd. 2454 * 2455 ******************************************************************************/ 2456 2457 struct acpi_table_sdei { 2458 struct acpi_table_header header; /* Common ACPI table header */ 2459 }; 2460 2461 /******************************************************************************* 2462 * 2463 * SDEV - Secure Devices Table (ACPI 6.2) 2464 * Version 1 2465 * 2466 ******************************************************************************/ 2467 2468 struct acpi_table_sdev { 2469 struct acpi_table_header header; /* Common ACPI table header */ 2470 }; 2471 2472 struct acpi_sdev_header { 2473 u8 type; 2474 u8 flags; 2475 u16 length; 2476 }; 2477 2478 /* Values for subtable type above */ 2479 2480 enum acpi_sdev_type { 2481 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2482 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2483 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2484 }; 2485 2486 /* Values for flags above */ 2487 2488 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2489 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2490 2491 /* 2492 * SDEV subtables 2493 */ 2494 2495 /* 0: Namespace Device Based Secure Device Structure */ 2496 2497 struct acpi_sdev_namespace { 2498 struct acpi_sdev_header header; 2499 u16 device_id_offset; 2500 u16 device_id_length; 2501 u16 vendor_data_offset; 2502 u16 vendor_data_length; 2503 }; 2504 2505 struct acpi_sdev_secure_component { 2506 u16 secure_component_offset; 2507 u16 secure_component_length; 2508 }; 2509 2510 /* 2511 * SDEV sub-subtables ("Components") for above 2512 */ 2513 struct acpi_sdev_component { 2514 struct acpi_sdev_header header; 2515 }; 2516 2517 /* Values for sub-subtable type above */ 2518 2519 enum acpi_sac_type { 2520 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2521 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2522 }; 2523 2524 struct acpi_sdev_id_component { 2525 struct acpi_sdev_header header; 2526 u16 hardware_id_offset; 2527 u16 hardware_id_length; 2528 u16 subsystem_id_offset; 2529 u16 subsystem_id_length; 2530 u16 hardware_revision; 2531 u8 hardware_rev_present; 2532 u8 class_code_present; 2533 u8 pci_base_class; 2534 u8 pci_sub_class; 2535 u8 pci_programming_xface; 2536 }; 2537 2538 struct acpi_sdev_mem_component { 2539 struct acpi_sdev_header header; 2540 u32 reserved; 2541 u64 memory_base_address; 2542 u64 memory_length; 2543 }; 2544 2545 /* 1: PCIe Endpoint Device Based Device Structure */ 2546 2547 struct acpi_sdev_pcie { 2548 struct acpi_sdev_header header; 2549 u16 segment; 2550 u16 start_bus; 2551 u16 path_offset; 2552 u16 path_length; 2553 u16 vendor_data_offset; 2554 u16 vendor_data_length; 2555 }; 2556 2557 /* 1a: PCIe Endpoint path entry */ 2558 2559 struct acpi_sdev_pcie_path { 2560 u8 device; 2561 u8 function; 2562 }; 2563 2564 /******************************************************************************* 2565 * 2566 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2567 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2568 * Trust Domain Extensions (Intel TDX)". 2569 * Version 1 2570 * 2571 ******************************************************************************/ 2572 2573 struct acpi_table_svkl { 2574 struct acpi_table_header header; /* Common ACPI table header */ 2575 u32 count; 2576 }; 2577 2578 struct acpi_svkl_key { 2579 u16 type; 2580 u16 format; 2581 u32 size; 2582 u64 address; 2583 }; 2584 2585 enum acpi_svkl_type { 2586 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2587 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2588 }; 2589 2590 enum acpi_svkl_format { 2591 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2592 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2593 }; 2594 2595 /******************************************************************************* 2596 * 2597 * TDEL - TD-Event Log 2598 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2599 * Trust Domain Extensions (Intel TDX)". 2600 * September 2020 2601 * 2602 ******************************************************************************/ 2603 2604 struct acpi_table_tdel { 2605 struct acpi_table_header header; /* Common ACPI table header */ 2606 u32 reserved; 2607 u64 log_area_minimum_length; 2608 u64 log_area_start_address; 2609 }; 2610 2611 /* Reset to default packing */ 2612 2613 #pragma pack() 2614 2615 #endif /* __ACTBL2_H__ */ 2616