1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2021, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 28 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 29 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 30 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 31 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 32 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 33 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 34 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 35 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 36 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 37 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 38 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 39 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 40 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 41 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 42 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 43 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 44 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 45 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 46 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 47 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 48 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 49 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 50 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 51 52 /* 53 * All tables must be byte-packed to match the ACPI specification, since 54 * the tables are provided by the system BIOS. 55 */ 56 #pragma pack(1) 57 58 /* 59 * Note: C bitfields are not used for this reason: 60 * 61 * "Bitfields are great and easy to read, but unfortunately the C language 62 * does not specify the layout of bitfields in memory, which means they are 63 * essentially useless for dealing with packed data in on-disk formats or 64 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 65 * this decision was a design error in C. Ritchie could have picked an order 66 * and stuck with it." Norman Ramsey. 67 * See http://stackoverflow.com/a/1053662/41661 68 */ 69 70 /******************************************************************************* 71 * 72 * AEST - Arm Error Source Table 73 * 74 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 75 * September 2020. 76 * 77 ******************************************************************************/ 78 79 struct acpi_table_aest { 80 struct acpi_table_header header; 81 void *node_array[]; 82 }; 83 84 /* Common Subtable header - one per Node Structure (Subtable) */ 85 86 struct acpi_aest_hdr { 87 u8 type; 88 u16 length; 89 u8 reserved; 90 u32 node_specific_offset; 91 u32 node_interface_offset; 92 u32 node_interrupt_offset; 93 u32 node_interrupt_count; 94 u64 timestamp_rate; 95 u64 reserved1; 96 u64 error_injection_rate; 97 }; 98 99 /* Values for Type above */ 100 101 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 102 #define ACPI_AEST_MEMORY_ERROR_NODE 1 103 #define ACPI_AEST_SMMU_ERROR_NODE 2 104 #define ACPI_AEST_VENDOR_ERROR_NODE 3 105 #define ACPI_AEST_GIC_ERROR_NODE 4 106 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 107 108 /* 109 * AEST subtables (Error nodes) 110 */ 111 112 /* 0: Processor Error */ 113 114 typedef struct acpi_aest_processor { 115 u32 processor_id; 116 u8 resource_type; 117 u8 reserved; 118 u8 flags; 119 u8 revision; 120 u64 processor_affinity; 121 122 } acpi_aest_processor; 123 124 /* Values for resource_type above, related structs below */ 125 126 #define ACPI_AEST_CACHE_RESOURCE 0 127 #define ACPI_AEST_TLB_RESOURCE 1 128 #define ACPI_AEST_GENERIC_RESOURCE 2 129 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 130 131 /* 0R: Processor Cache Resource Substructure */ 132 133 typedef struct acpi_aest_processor_cache { 134 u32 cache_reference; 135 u32 reserved; 136 137 } acpi_aest_processor_cache; 138 139 /* Values for cache_type above */ 140 141 #define ACPI_AEST_CACHE_DATA 0 142 #define ACPI_AEST_CACHE_INSTRUCTION 1 143 #define ACPI_AEST_CACHE_UNIFIED 2 144 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 145 146 /* 1R: Processor TLB Resource Substructure */ 147 148 typedef struct acpi_aest_processor_tlb { 149 u32 tlb_level; 150 u32 reserved; 151 152 } acpi_aest_processor_tlb; 153 154 /* 2R: Processor Generic Resource Substructure */ 155 156 typedef struct acpi_aest_processor_generic { 157 u8 *resource; 158 159 } acpi_aest_processor_generic; 160 161 /* 1: Memory Error */ 162 163 typedef struct acpi_aest_memory { 164 u32 srat_proximity_domain; 165 166 } acpi_aest_memory; 167 168 /* 2: Smmu Error */ 169 170 typedef struct acpi_aest_smmu { 171 u32 iort_node_reference; 172 u32 subcomponent_reference; 173 174 } acpi_aest_smmu; 175 176 /* 3: Vendor Defined */ 177 178 typedef struct acpi_aest_vendor { 179 u32 acpi_hid; 180 u32 acpi_uid; 181 u8 vendor_specific_data[16]; 182 183 } acpi_aest_vendor; 184 185 /* 4: Gic Error */ 186 187 typedef struct acpi_aest_gic { 188 u32 interface_type; 189 u32 instance_id; 190 191 } acpi_aest_gic; 192 193 /* Values for interface_type above */ 194 195 #define ACPI_AEST_GIC_CPU 0 196 #define ACPI_AEST_GIC_DISTRIBUTOR 1 197 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 198 #define ACPI_AEST_GIC_ITS 3 199 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 200 201 /* Node Interface Structure */ 202 203 typedef struct acpi_aest_node_interface { 204 u8 type; 205 u8 reserved[3]; 206 u32 flags; 207 u64 address; 208 u32 error_record_index; 209 u32 error_record_count; 210 u64 error_record_implemented; 211 u64 error_status_reporting; 212 u64 addressing_mode; 213 214 } acpi_aest_node_interface; 215 216 /* Values for Type field above */ 217 218 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 219 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 220 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 221 222 /* Node Interrupt Structure */ 223 224 typedef struct acpi_aest_node_interrupt { 225 u8 type; 226 u8 reserved[2]; 227 u8 flags; 228 u32 gsiv; 229 u8 iort_id; 230 u8 reserved1[3]; 231 232 } acpi_aest_node_interrupt; 233 234 /* Values for Type field above */ 235 236 #define ACPI_AEST_NODE_FAULT_HANDLING 0 237 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 238 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 239 240 /******************************************************************************* 241 * 242 * BDAT - BIOS Data ACPI Table 243 * 244 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 245 * Nov 2020 246 * 247 ******************************************************************************/ 248 249 struct acpi_table_bdat { 250 struct acpi_table_header header; 251 struct acpi_generic_address gas; 252 }; 253 254 /******************************************************************************* 255 * 256 * IORT - IO Remapping Table 257 * 258 * Conforms to "IO Remapping Table System Software on ARM Platforms", 259 * Document number: ARM DEN 0049E.b, Feb 2021 260 * 261 ******************************************************************************/ 262 263 struct acpi_table_iort { 264 struct acpi_table_header header; 265 u32 node_count; 266 u32 node_offset; 267 u32 reserved; 268 }; 269 270 /* 271 * IORT subtables 272 */ 273 struct acpi_iort_node { 274 u8 type; 275 u16 length; 276 u8 revision; 277 u32 identifier; 278 u32 mapping_count; 279 u32 mapping_offset; 280 char node_data[1]; 281 }; 282 283 /* Values for subtable Type above */ 284 285 enum acpi_iort_node_type { 286 ACPI_IORT_NODE_ITS_GROUP = 0x00, 287 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 288 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 289 ACPI_IORT_NODE_SMMU = 0x03, 290 ACPI_IORT_NODE_SMMU_V3 = 0x04, 291 ACPI_IORT_NODE_PMCG = 0x05, 292 ACPI_IORT_NODE_RMR = 0x06, 293 }; 294 295 struct acpi_iort_id_mapping { 296 u32 input_base; /* Lowest value in input range */ 297 u32 id_count; /* Number of IDs */ 298 u32 output_base; /* Lowest value in output range */ 299 u32 output_reference; /* A reference to the output node */ 300 u32 flags; 301 }; 302 303 /* Masks for Flags field above for IORT subtable */ 304 305 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 306 307 struct acpi_iort_memory_access { 308 u32 cache_coherency; 309 u8 hints; 310 u16 reserved; 311 u8 memory_flags; 312 }; 313 314 /* Values for cache_coherency field above */ 315 316 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 317 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 318 319 /* Masks for Hints field above */ 320 321 #define ACPI_IORT_HT_TRANSIENT (1) 322 #define ACPI_IORT_HT_WRITE (1<<1) 323 #define ACPI_IORT_HT_READ (1<<2) 324 #define ACPI_IORT_HT_OVERRIDE (1<<3) 325 326 /* Masks for memory_flags field above */ 327 328 #define ACPI_IORT_MF_COHERENCY (1) 329 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 330 331 /* 332 * IORT node specific subtables 333 */ 334 struct acpi_iort_its_group { 335 u32 its_count; 336 u32 identifiers[1]; /* GIC ITS identifier array */ 337 }; 338 339 struct acpi_iort_named_component { 340 u32 node_flags; 341 u64 memory_properties; /* Memory access properties */ 342 u8 memory_address_limit; /* Memory address size limit */ 343 char device_name[1]; /* Path of namespace object */ 344 }; 345 346 /* Masks for Flags field above */ 347 348 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 349 #define ACPI_IORT_NC_PASID_BITS (31<<1) 350 351 struct acpi_iort_root_complex { 352 u64 memory_properties; /* Memory access properties */ 353 u32 ats_attribute; 354 u32 pci_segment_number; 355 u8 memory_address_limit; /* Memory address size limit */ 356 u8 reserved[3]; /* Reserved, must be zero */ 357 }; 358 359 /* Masks for ats_attribute field above */ 360 361 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 362 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 363 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 364 365 struct acpi_iort_smmu { 366 u64 base_address; /* SMMU base address */ 367 u64 span; /* Length of memory range */ 368 u32 model; 369 u32 flags; 370 u32 global_interrupt_offset; 371 u32 context_interrupt_count; 372 u32 context_interrupt_offset; 373 u32 pmu_interrupt_count; 374 u32 pmu_interrupt_offset; 375 u64 interrupts[1]; /* Interrupt array */ 376 }; 377 378 /* Values for Model field above */ 379 380 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 381 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 382 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 383 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 384 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 385 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 386 387 /* Masks for Flags field above */ 388 389 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 390 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 391 392 /* Global interrupt format */ 393 394 struct acpi_iort_smmu_gsi { 395 u32 nsg_irpt; 396 u32 nsg_irpt_flags; 397 u32 nsg_cfg_irpt; 398 u32 nsg_cfg_irpt_flags; 399 }; 400 401 struct acpi_iort_smmu_v3 { 402 u64 base_address; /* SMMUv3 base address */ 403 u32 flags; 404 u32 reserved; 405 u64 vatos_address; 406 u32 model; 407 u32 event_gsiv; 408 u32 pri_gsiv; 409 u32 gerr_gsiv; 410 u32 sync_gsiv; 411 u32 pxm; 412 u32 id_mapping_index; 413 }; 414 415 /* Values for Model field above */ 416 417 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 418 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 419 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 420 421 /* Masks for Flags field above */ 422 423 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 424 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 425 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 426 427 struct acpi_iort_pmcg { 428 u64 page0_base_address; 429 u32 overflow_gsiv; 430 u32 node_reference; 431 u64 page1_base_address; 432 }; 433 434 struct acpi_iort_rmr { 435 u32 flags; 436 u32 rmr_count; 437 u32 rmr_offset; 438 }; 439 440 struct acpi_iort_rmr_desc { 441 u64 base_address; 442 u64 length; 443 u32 reserved; 444 }; 445 446 /******************************************************************************* 447 * 448 * IVRS - I/O Virtualization Reporting Structure 449 * Version 1 450 * 451 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 452 * Revision 1.26, February 2009. 453 * 454 ******************************************************************************/ 455 456 struct acpi_table_ivrs { 457 struct acpi_table_header header; /* Common ACPI table header */ 458 u32 info; /* Common virtualization info */ 459 u64 reserved; 460 }; 461 462 /* Values for Info field above */ 463 464 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 465 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 466 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 467 468 /* IVRS subtable header */ 469 470 struct acpi_ivrs_header { 471 u8 type; /* Subtable type */ 472 u8 flags; 473 u16 length; /* Subtable length */ 474 u16 device_id; /* ID of IOMMU */ 475 }; 476 477 /* Values for subtable Type above */ 478 479 enum acpi_ivrs_type { 480 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 481 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 482 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 483 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 484 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 485 ACPI_IVRS_TYPE_MEMORY3 = 0x22 486 }; 487 488 /* Masks for Flags field above for IVHD subtable */ 489 490 #define ACPI_IVHD_TT_ENABLE (1) 491 #define ACPI_IVHD_PASS_PW (1<<1) 492 #define ACPI_IVHD_RES_PASS_PW (1<<2) 493 #define ACPI_IVHD_ISOC (1<<3) 494 #define ACPI_IVHD_IOTLB (1<<4) 495 496 /* Masks for Flags field above for IVMD subtable */ 497 498 #define ACPI_IVMD_UNITY (1) 499 #define ACPI_IVMD_READ (1<<1) 500 #define ACPI_IVMD_WRITE (1<<2) 501 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 502 503 /* 504 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 505 */ 506 507 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 508 509 struct acpi_ivrs_hardware_10 { 510 struct acpi_ivrs_header header; 511 u16 capability_offset; /* Offset for IOMMU control fields */ 512 u64 base_address; /* IOMMU control registers */ 513 u16 pci_segment_group; 514 u16 info; /* MSI number and unit ID */ 515 u32 feature_reporting; 516 }; 517 518 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 519 520 struct acpi_ivrs_hardware_11 { 521 struct acpi_ivrs_header header; 522 u16 capability_offset; /* Offset for IOMMU control fields */ 523 u64 base_address; /* IOMMU control registers */ 524 u16 pci_segment_group; 525 u16 info; /* MSI number and unit ID */ 526 u32 attributes; 527 u64 efr_register_image; 528 u64 reserved; 529 }; 530 531 /* Masks for Info field above */ 532 533 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 534 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 535 536 /* 537 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 538 * Upper two bits of the Type field are the (encoded) length of the structure. 539 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 540 * are reserved for future use but not defined. 541 */ 542 struct acpi_ivrs_de_header { 543 u8 type; 544 u16 id; 545 u8 data_setting; 546 }; 547 548 /* Length of device entry is in the top two bits of Type field above */ 549 550 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 551 552 /* Values for device entry Type field above */ 553 554 enum acpi_ivrs_device_entry_type { 555 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 556 557 ACPI_IVRS_TYPE_PAD4 = 0, 558 ACPI_IVRS_TYPE_ALL = 1, 559 ACPI_IVRS_TYPE_SELECT = 2, 560 ACPI_IVRS_TYPE_START = 3, 561 ACPI_IVRS_TYPE_END = 4, 562 563 /* 8-byte device entries */ 564 565 ACPI_IVRS_TYPE_PAD8 = 64, 566 ACPI_IVRS_TYPE_NOT_USED = 65, 567 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 568 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 569 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 570 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 571 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 572 573 /* Variable-length device entries */ 574 575 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 576 }; 577 578 /* Values for Data field above */ 579 580 #define ACPI_IVHD_INIT_PASS (1) 581 #define ACPI_IVHD_EINT_PASS (1<<1) 582 #define ACPI_IVHD_NMI_PASS (1<<2) 583 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 584 #define ACPI_IVHD_LINT0_PASS (1<<6) 585 #define ACPI_IVHD_LINT1_PASS (1<<7) 586 587 /* Types 0-4: 4-byte device entry */ 588 589 struct acpi_ivrs_device4 { 590 struct acpi_ivrs_de_header header; 591 }; 592 593 /* Types 66-67: 8-byte device entry */ 594 595 struct acpi_ivrs_device8a { 596 struct acpi_ivrs_de_header header; 597 u8 reserved1; 598 u16 used_id; 599 u8 reserved2; 600 }; 601 602 /* Types 70-71: 8-byte device entry */ 603 604 struct acpi_ivrs_device8b { 605 struct acpi_ivrs_de_header header; 606 u32 extended_data; 607 }; 608 609 /* Values for extended_data above */ 610 611 #define ACPI_IVHD_ATS_DISABLED (1<<31) 612 613 /* Type 72: 8-byte device entry */ 614 615 struct acpi_ivrs_device8c { 616 struct acpi_ivrs_de_header header; 617 u8 handle; 618 u16 used_id; 619 u8 variety; 620 }; 621 622 /* Values for Variety field above */ 623 624 #define ACPI_IVHD_IOAPIC 1 625 #define ACPI_IVHD_HPET 2 626 627 /* Type 240: variable-length device entry */ 628 629 struct acpi_ivrs_device_hid { 630 struct acpi_ivrs_de_header header; 631 u64 acpi_hid; 632 u64 acpi_cid; 633 u8 uid_type; 634 u8 uid_length; 635 }; 636 637 /* Values for uid_type above */ 638 639 #define ACPI_IVRS_UID_NOT_PRESENT 0 640 #define ACPI_IVRS_UID_IS_INTEGER 1 641 #define ACPI_IVRS_UID_IS_STRING 2 642 643 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 644 645 struct acpi_ivrs_memory { 646 struct acpi_ivrs_header header; 647 u16 aux_data; 648 u64 reserved; 649 u64 start_address; 650 u64 memory_length; 651 }; 652 653 /******************************************************************************* 654 * 655 * LPIT - Low Power Idle Table 656 * 657 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 658 * 659 ******************************************************************************/ 660 661 struct acpi_table_lpit { 662 struct acpi_table_header header; /* Common ACPI table header */ 663 }; 664 665 /* LPIT subtable header */ 666 667 struct acpi_lpit_header { 668 u32 type; /* Subtable type */ 669 u32 length; /* Subtable length */ 670 u16 unique_id; 671 u16 reserved; 672 u32 flags; 673 }; 674 675 /* Values for subtable Type above */ 676 677 enum acpi_lpit_type { 678 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 679 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 680 }; 681 682 /* Masks for Flags field above */ 683 684 #define ACPI_LPIT_STATE_DISABLED (1) 685 #define ACPI_LPIT_NO_COUNTER (1<<1) 686 687 /* 688 * LPIT subtables, correspond to Type in struct acpi_lpit_header 689 */ 690 691 /* 0x00: Native C-state instruction based LPI structure */ 692 693 struct acpi_lpit_native { 694 struct acpi_lpit_header header; 695 struct acpi_generic_address entry_trigger; 696 u32 residency; 697 u32 latency; 698 struct acpi_generic_address residency_counter; 699 u64 counter_frequency; 700 }; 701 702 /******************************************************************************* 703 * 704 * MADT - Multiple APIC Description Table 705 * Version 3 706 * 707 ******************************************************************************/ 708 709 struct acpi_table_madt { 710 struct acpi_table_header header; /* Common ACPI table header */ 711 u32 address; /* Physical address of local APIC */ 712 u32 flags; 713 }; 714 715 /* Masks for Flags field above */ 716 717 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 718 719 /* Values for PCATCompat flag */ 720 721 #define ACPI_MADT_DUAL_PIC 1 722 #define ACPI_MADT_MULTIPLE_APIC 0 723 724 /* Values for MADT subtable type in struct acpi_subtable_header */ 725 726 enum acpi_madt_type { 727 ACPI_MADT_TYPE_LOCAL_APIC = 0, 728 ACPI_MADT_TYPE_IO_APIC = 1, 729 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 730 ACPI_MADT_TYPE_NMI_SOURCE = 3, 731 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 732 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 733 ACPI_MADT_TYPE_IO_SAPIC = 6, 734 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 735 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 736 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 737 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 738 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 739 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 740 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 741 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 742 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 743 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 744 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 745 }; 746 747 /* 748 * MADT Subtables, correspond to Type in struct acpi_subtable_header 749 */ 750 751 /* 0: Processor Local APIC */ 752 753 struct acpi_madt_local_apic { 754 struct acpi_subtable_header header; 755 u8 processor_id; /* ACPI processor id */ 756 u8 id; /* Processor's local APIC id */ 757 u32 lapic_flags; 758 }; 759 760 /* 1: IO APIC */ 761 762 struct acpi_madt_io_apic { 763 struct acpi_subtable_header header; 764 u8 id; /* I/O APIC ID */ 765 u8 reserved; /* reserved - must be zero */ 766 u32 address; /* APIC physical address */ 767 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 768 }; 769 770 /* 2: Interrupt Override */ 771 772 struct acpi_madt_interrupt_override { 773 struct acpi_subtable_header header; 774 u8 bus; /* 0 - ISA */ 775 u8 source_irq; /* Interrupt source (IRQ) */ 776 u32 global_irq; /* Global system interrupt */ 777 u16 inti_flags; 778 }; 779 780 /* 3: NMI Source */ 781 782 struct acpi_madt_nmi_source { 783 struct acpi_subtable_header header; 784 u16 inti_flags; 785 u32 global_irq; /* Global system interrupt */ 786 }; 787 788 /* 4: Local APIC NMI */ 789 790 struct acpi_madt_local_apic_nmi { 791 struct acpi_subtable_header header; 792 u8 processor_id; /* ACPI processor id */ 793 u16 inti_flags; 794 u8 lint; /* LINTn to which NMI is connected */ 795 }; 796 797 /* 5: Address Override */ 798 799 struct acpi_madt_local_apic_override { 800 struct acpi_subtable_header header; 801 u16 reserved; /* Reserved, must be zero */ 802 u64 address; /* APIC physical address */ 803 }; 804 805 /* 6: I/O Sapic */ 806 807 struct acpi_madt_io_sapic { 808 struct acpi_subtable_header header; 809 u8 id; /* I/O SAPIC ID */ 810 u8 reserved; /* Reserved, must be zero */ 811 u32 global_irq_base; /* Global interrupt for SAPIC start */ 812 u64 address; /* SAPIC physical address */ 813 }; 814 815 /* 7: Local Sapic */ 816 817 struct acpi_madt_local_sapic { 818 struct acpi_subtable_header header; 819 u8 processor_id; /* ACPI processor id */ 820 u8 id; /* SAPIC ID */ 821 u8 eid; /* SAPIC EID */ 822 u8 reserved[3]; /* Reserved, must be zero */ 823 u32 lapic_flags; 824 u32 uid; /* Numeric UID - ACPI 3.0 */ 825 char uid_string[1]; /* String UID - ACPI 3.0 */ 826 }; 827 828 /* 8: Platform Interrupt Source */ 829 830 struct acpi_madt_interrupt_source { 831 struct acpi_subtable_header header; 832 u16 inti_flags; 833 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 834 u8 id; /* Processor ID */ 835 u8 eid; /* Processor EID */ 836 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 837 u32 global_irq; /* Global system interrupt */ 838 u32 flags; /* Interrupt Source Flags */ 839 }; 840 841 /* Masks for Flags field above */ 842 843 #define ACPI_MADT_CPEI_OVERRIDE (1) 844 845 /* 9: Processor Local X2APIC (ACPI 4.0) */ 846 847 struct acpi_madt_local_x2apic { 848 struct acpi_subtable_header header; 849 u16 reserved; /* reserved - must be zero */ 850 u32 local_apic_id; /* Processor x2APIC ID */ 851 u32 lapic_flags; 852 u32 uid; /* ACPI processor UID */ 853 }; 854 855 /* 10: Local X2APIC NMI (ACPI 4.0) */ 856 857 struct acpi_madt_local_x2apic_nmi { 858 struct acpi_subtable_header header; 859 u16 inti_flags; 860 u32 uid; /* ACPI processor UID */ 861 u8 lint; /* LINTn to which NMI is connected */ 862 u8 reserved[3]; /* reserved - must be zero */ 863 }; 864 865 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 866 867 struct acpi_madt_generic_interrupt { 868 struct acpi_subtable_header header; 869 u16 reserved; /* reserved - must be zero */ 870 u32 cpu_interface_number; 871 u32 uid; 872 u32 flags; 873 u32 parking_version; 874 u32 performance_interrupt; 875 u64 parked_address; 876 u64 base_address; 877 u64 gicv_base_address; 878 u64 gich_base_address; 879 u32 vgic_interrupt; 880 u64 gicr_base_address; 881 u64 arm_mpidr; 882 u8 efficiency_class; 883 u8 reserved2[1]; 884 u16 spe_interrupt; /* ACPI 6.3 */ 885 }; 886 887 /* Masks for Flags field above */ 888 889 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 890 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 891 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 892 893 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 894 895 struct acpi_madt_generic_distributor { 896 struct acpi_subtable_header header; 897 u16 reserved; /* reserved - must be zero */ 898 u32 gic_id; 899 u64 base_address; 900 u32 global_irq_base; 901 u8 version; 902 u8 reserved2[3]; /* reserved - must be zero */ 903 }; 904 905 /* Values for Version field above */ 906 907 enum acpi_madt_gic_version { 908 ACPI_MADT_GIC_VERSION_NONE = 0, 909 ACPI_MADT_GIC_VERSION_V1 = 1, 910 ACPI_MADT_GIC_VERSION_V2 = 2, 911 ACPI_MADT_GIC_VERSION_V3 = 3, 912 ACPI_MADT_GIC_VERSION_V4 = 4, 913 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 914 }; 915 916 /* 13: Generic MSI Frame (ACPI 5.1) */ 917 918 struct acpi_madt_generic_msi_frame { 919 struct acpi_subtable_header header; 920 u16 reserved; /* reserved - must be zero */ 921 u32 msi_frame_id; 922 u64 base_address; 923 u32 flags; 924 u16 spi_count; 925 u16 spi_base; 926 }; 927 928 /* Masks for Flags field above */ 929 930 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 931 932 /* 14: Generic Redistributor (ACPI 5.1) */ 933 934 struct acpi_madt_generic_redistributor { 935 struct acpi_subtable_header header; 936 u16 reserved; /* reserved - must be zero */ 937 u64 base_address; 938 u32 length; 939 }; 940 941 /* 15: Generic Translator (ACPI 6.0) */ 942 943 struct acpi_madt_generic_translator { 944 struct acpi_subtable_header header; 945 u16 reserved; /* reserved - must be zero */ 946 u32 translation_id; 947 u64 base_address; 948 u32 reserved2; 949 }; 950 951 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 952 953 struct acpi_madt_multiproc_wakeup { 954 struct acpi_subtable_header header; 955 u16 mailbox_version; 956 u32 reserved; /* reserved - must be zero */ 957 u64 base_address; 958 }; 959 960 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 961 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 962 963 struct acpi_madt_multiproc_wakeup_mailbox { 964 u16 command; 965 u16 reserved; /* reserved - must be zero */ 966 u32 apic_id; 967 u64 wakeup_vector; 968 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 969 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 970 }; 971 972 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 973 974 /* 975 * Common flags fields for MADT subtables 976 */ 977 978 /* MADT Local APIC flags */ 979 980 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 981 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 982 983 /* MADT MPS INTI flags (inti_flags) */ 984 985 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 986 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 987 988 /* Values for MPS INTI flags */ 989 990 #define ACPI_MADT_POLARITY_CONFORMS 0 991 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 992 #define ACPI_MADT_POLARITY_RESERVED 2 993 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 994 995 #define ACPI_MADT_TRIGGER_CONFORMS (0) 996 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 997 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 998 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 999 1000 /******************************************************************************* 1001 * 1002 * MCFG - PCI Memory Mapped Configuration table and subtable 1003 * Version 1 1004 * 1005 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1006 * 1007 ******************************************************************************/ 1008 1009 struct acpi_table_mcfg { 1010 struct acpi_table_header header; /* Common ACPI table header */ 1011 u8 reserved[8]; 1012 }; 1013 1014 /* Subtable */ 1015 1016 struct acpi_mcfg_allocation { 1017 u64 address; /* Base address, processor-relative */ 1018 u16 pci_segment; /* PCI segment group number */ 1019 u8 start_bus_number; /* Starting PCI Bus number */ 1020 u8 end_bus_number; /* Final PCI Bus number */ 1021 u32 reserved; 1022 }; 1023 1024 /******************************************************************************* 1025 * 1026 * MCHI - Management Controller Host Interface Table 1027 * Version 1 1028 * 1029 * Conforms to "Management Component Transport Protocol (MCTP) Host 1030 * Interface Specification", Revision 1.0.0a, October 13, 2009 1031 * 1032 ******************************************************************************/ 1033 1034 struct acpi_table_mchi { 1035 struct acpi_table_header header; /* Common ACPI table header */ 1036 u8 interface_type; 1037 u8 protocol; 1038 u64 protocol_data; 1039 u8 interrupt_type; 1040 u8 gpe; 1041 u8 pci_device_flag; 1042 u32 global_interrupt; 1043 struct acpi_generic_address control_register; 1044 u8 pci_segment; 1045 u8 pci_bus; 1046 u8 pci_device; 1047 u8 pci_function; 1048 }; 1049 1050 /******************************************************************************* 1051 * 1052 * MPST - Memory Power State Table (ACPI 5.0) 1053 * Version 1 1054 * 1055 ******************************************************************************/ 1056 1057 #define ACPI_MPST_CHANNEL_INFO \ 1058 u8 channel_id; \ 1059 u8 reserved1[3]; \ 1060 u16 power_node_count; \ 1061 u16 reserved2; 1062 1063 /* Main table */ 1064 1065 struct acpi_table_mpst { 1066 struct acpi_table_header header; /* Common ACPI table header */ 1067 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1068 }; 1069 1070 /* Memory Platform Communication Channel Info */ 1071 1072 struct acpi_mpst_channel { 1073 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1074 }; 1075 1076 /* Memory Power Node Structure */ 1077 1078 struct acpi_mpst_power_node { 1079 u8 flags; 1080 u8 reserved1; 1081 u16 node_id; 1082 u32 length; 1083 u64 range_address; 1084 u64 range_length; 1085 u32 num_power_states; 1086 u32 num_physical_components; 1087 }; 1088 1089 /* Values for Flags field above */ 1090 1091 #define ACPI_MPST_ENABLED 1 1092 #define ACPI_MPST_POWER_MANAGED 2 1093 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1094 1095 /* Memory Power State Structure (follows POWER_NODE above) */ 1096 1097 struct acpi_mpst_power_state { 1098 u8 power_state; 1099 u8 info_index; 1100 }; 1101 1102 /* Physical Component ID Structure (follows POWER_STATE above) */ 1103 1104 struct acpi_mpst_component { 1105 u16 component_id; 1106 }; 1107 1108 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1109 1110 struct acpi_mpst_data_hdr { 1111 u16 characteristics_count; 1112 u16 reserved; 1113 }; 1114 1115 struct acpi_mpst_power_data { 1116 u8 structure_id; 1117 u8 flags; 1118 u16 reserved1; 1119 u32 average_power; 1120 u32 power_saving; 1121 u64 exit_latency; 1122 u64 reserved2; 1123 }; 1124 1125 /* Values for Flags field above */ 1126 1127 #define ACPI_MPST_PRESERVE 1 1128 #define ACPI_MPST_AUTOENTRY 2 1129 #define ACPI_MPST_AUTOEXIT 4 1130 1131 /* Shared Memory Region (not part of an ACPI table) */ 1132 1133 struct acpi_mpst_shared { 1134 u32 signature; 1135 u16 pcc_command; 1136 u16 pcc_status; 1137 u32 command_register; 1138 u32 status_register; 1139 u32 power_state_id; 1140 u32 power_node_id; 1141 u64 energy_consumed; 1142 u64 average_power; 1143 }; 1144 1145 /******************************************************************************* 1146 * 1147 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1148 * Version 1 1149 * 1150 ******************************************************************************/ 1151 1152 struct acpi_table_msct { 1153 struct acpi_table_header header; /* Common ACPI table header */ 1154 u32 proximity_offset; /* Location of proximity info struct(s) */ 1155 u32 max_proximity_domains; /* Max number of proximity domains */ 1156 u32 max_clock_domains; /* Max number of clock domains */ 1157 u64 max_address; /* Max physical address in system */ 1158 }; 1159 1160 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1161 1162 struct acpi_msct_proximity { 1163 u8 revision; 1164 u8 length; 1165 u32 range_start; /* Start of domain range */ 1166 u32 range_end; /* End of domain range */ 1167 u32 processor_capacity; 1168 u64 memory_capacity; /* In bytes */ 1169 }; 1170 1171 /******************************************************************************* 1172 * 1173 * MSDM - Microsoft Data Management table 1174 * 1175 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1176 * November 29, 2011. Copyright 2011 Microsoft 1177 * 1178 ******************************************************************************/ 1179 1180 /* Basic MSDM table is only the common ACPI header */ 1181 1182 struct acpi_table_msdm { 1183 struct acpi_table_header header; /* Common ACPI table header */ 1184 }; 1185 1186 /******************************************************************************* 1187 * 1188 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1189 * Version 1 1190 * 1191 ******************************************************************************/ 1192 1193 struct acpi_table_nfit { 1194 struct acpi_table_header header; /* Common ACPI table header */ 1195 u32 reserved; /* Reserved, must be zero */ 1196 }; 1197 1198 /* Subtable header for NFIT */ 1199 1200 struct acpi_nfit_header { 1201 u16 type; 1202 u16 length; 1203 }; 1204 1205 /* Values for subtable type in struct acpi_nfit_header */ 1206 1207 enum acpi_nfit_type { 1208 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1209 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1210 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1211 ACPI_NFIT_TYPE_SMBIOS = 3, 1212 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1213 ACPI_NFIT_TYPE_DATA_REGION = 5, 1214 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1215 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1216 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1217 }; 1218 1219 /* 1220 * NFIT Subtables 1221 */ 1222 1223 /* 0: System Physical Address Range Structure */ 1224 1225 struct acpi_nfit_system_address { 1226 struct acpi_nfit_header header; 1227 u16 range_index; 1228 u16 flags; 1229 u32 reserved; /* Reserved, must be zero */ 1230 u32 proximity_domain; 1231 u8 range_guid[16]; 1232 u64 address; 1233 u64 length; 1234 u64 memory_mapping; 1235 u64 location_cookie; /* ACPI 6.4 */ 1236 }; 1237 1238 /* Flags */ 1239 1240 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1241 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1242 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1243 1244 /* Range Type GUIDs appear in the include/acuuid.h file */ 1245 1246 /* 1: Memory Device to System Address Range Map Structure */ 1247 1248 struct acpi_nfit_memory_map { 1249 struct acpi_nfit_header header; 1250 u32 device_handle; 1251 u16 physical_id; 1252 u16 region_id; 1253 u16 range_index; 1254 u16 region_index; 1255 u64 region_size; 1256 u64 region_offset; 1257 u64 address; 1258 u16 interleave_index; 1259 u16 interleave_ways; 1260 u16 flags; 1261 u16 reserved; /* Reserved, must be zero */ 1262 }; 1263 1264 /* Flags */ 1265 1266 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1267 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1268 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1269 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1270 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1271 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1272 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1273 1274 /* 2: Interleave Structure */ 1275 1276 struct acpi_nfit_interleave { 1277 struct acpi_nfit_header header; 1278 u16 interleave_index; 1279 u16 reserved; /* Reserved, must be zero */ 1280 u32 line_count; 1281 u32 line_size; 1282 u32 line_offset[1]; /* Variable length */ 1283 }; 1284 1285 /* 3: SMBIOS Management Information Structure */ 1286 1287 struct acpi_nfit_smbios { 1288 struct acpi_nfit_header header; 1289 u32 reserved; /* Reserved, must be zero */ 1290 u8 data[1]; /* Variable length */ 1291 }; 1292 1293 /* 4: NVDIMM Control Region Structure */ 1294 1295 struct acpi_nfit_control_region { 1296 struct acpi_nfit_header header; 1297 u16 region_index; 1298 u16 vendor_id; 1299 u16 device_id; 1300 u16 revision_id; 1301 u16 subsystem_vendor_id; 1302 u16 subsystem_device_id; 1303 u16 subsystem_revision_id; 1304 u8 valid_fields; 1305 u8 manufacturing_location; 1306 u16 manufacturing_date; 1307 u8 reserved[2]; /* Reserved, must be zero */ 1308 u32 serial_number; 1309 u16 code; 1310 u16 windows; 1311 u64 window_size; 1312 u64 command_offset; 1313 u64 command_size; 1314 u64 status_offset; 1315 u64 status_size; 1316 u16 flags; 1317 u8 reserved1[6]; /* Reserved, must be zero */ 1318 }; 1319 1320 /* Flags */ 1321 1322 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1323 1324 /* valid_fields bits */ 1325 1326 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1327 1328 /* 5: NVDIMM Block Data Window Region Structure */ 1329 1330 struct acpi_nfit_data_region { 1331 struct acpi_nfit_header header; 1332 u16 region_index; 1333 u16 windows; 1334 u64 offset; 1335 u64 size; 1336 u64 capacity; 1337 u64 start_address; 1338 }; 1339 1340 /* 6: Flush Hint Address Structure */ 1341 1342 struct acpi_nfit_flush_address { 1343 struct acpi_nfit_header header; 1344 u32 device_handle; 1345 u16 hint_count; 1346 u8 reserved[6]; /* Reserved, must be zero */ 1347 u64 hint_address[1]; /* Variable length */ 1348 }; 1349 1350 /* 7: Platform Capabilities Structure */ 1351 1352 struct acpi_nfit_capabilities { 1353 struct acpi_nfit_header header; 1354 u8 highest_capability; 1355 u8 reserved[3]; /* Reserved, must be zero */ 1356 u32 capabilities; 1357 u32 reserved2; 1358 }; 1359 1360 /* Capabilities Flags */ 1361 1362 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1363 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1364 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1365 1366 /* 1367 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1368 */ 1369 struct nfit_device_handle { 1370 u32 handle; 1371 }; 1372 1373 /* Device handle construction and extraction macros */ 1374 1375 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1376 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1377 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1378 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1379 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1380 1381 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1382 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1383 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1384 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1385 #define ACPI_NFIT_NODE_ID_OFFSET 16 1386 1387 /* Macro to construct a NFIT/NVDIMM device handle */ 1388 1389 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1390 ((dimm) | \ 1391 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1392 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1393 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1394 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1395 1396 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1397 1398 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1399 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1400 1401 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1402 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1403 1404 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1405 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1406 1407 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1408 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1409 1410 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1411 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1412 1413 /******************************************************************************* 1414 * 1415 * NHLT - Non HD Audio Link Table 1416 * 1417 * Conforms to: Intel Smart Sound Technology NHLT Specification 1418 * Version 0.8.1, January 2020. 1419 * 1420 ******************************************************************************/ 1421 1422 /* Main table */ 1423 1424 struct acpi_table_nhlt { 1425 struct acpi_table_header header; /* Common ACPI table header */ 1426 u8 endpoint_count; 1427 }; 1428 1429 struct acpi_nhlt_endpoint { 1430 u32 descriptor_length; 1431 u8 link_type; 1432 u8 instance_id; 1433 u16 vendor_id; 1434 u16 device_id; 1435 u16 revision_id; 1436 u32 subsystem_id; 1437 u8 device_type; 1438 u8 direction; 1439 u8 virtual_bus_id; 1440 }; 1441 1442 /* Types for link_type field above */ 1443 1444 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1445 #define ACPI_NHLT_RESERVED_DSP 1 1446 #define ACPI_NHLT_PDM 2 1447 #define ACPI_NHLT_SSP 3 1448 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1449 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1450 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1451 1452 /* All other values above are reserved */ 1453 1454 /* Values for device_id field above */ 1455 1456 #define ACPI_NHLT_PDM_DMIC 0xAE20 1457 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1458 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1459 1460 /* Values for device_type field above */ 1461 1462 /* SSP Link */ 1463 1464 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1465 #define ACPI_NHLT_LINK_FM 1 1466 #define ACPI_NHLT_LINK_MODEM 2 1467 /* 3 is reserved */ 1468 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1469 1470 /* PDM Link */ 1471 1472 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1473 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1474 1475 /* Values for Direction field above */ 1476 1477 #define ACPI_NHLT_DIR_RENDER 0 1478 #define ACPI_NHLT_DIR_CAPTURE 1 1479 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1480 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1481 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1482 1483 struct acpi_nhlt_device_specific_config { 1484 u32 capabilities_size; 1485 u8 virtual_slot; 1486 u8 config_type; 1487 }; 1488 1489 struct acpi_nhlt_device_specific_config_a { 1490 u32 capabilities_size; 1491 u8 virtual_slot; 1492 u8 config_type; 1493 u8 array_type; 1494 }; 1495 1496 /* Values for Config Type above */ 1497 1498 #define ACPI_NHLT_TYPE_MIC_ARRAY 0x01 1499 #define ACPI_NHLT_TYPE_GENERIC 0x00 1500 1501 /* Mask for Extension field of array_type */ 1502 1503 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x10 1504 1505 struct acpi_nhlt_device_specific_config_b { 1506 u32 capabilities_size; 1507 }; 1508 1509 struct acpi_nhlt_device_specific_config_c { 1510 u32 capabilities_size; 1511 u8 virtual_slot; 1512 }; 1513 1514 struct acpi_nhlt_wave_extensible { 1515 u16 format_tag; 1516 u16 channel_count; 1517 u32 samples_per_sec; 1518 u32 avg_bytes_per_sec; 1519 u16 block_align; 1520 u16 bits_per_sample; 1521 u16 extra_format_size; 1522 u16 valid_bits_per_sample; 1523 u32 channel_mask; 1524 u8 sub_format_guid[16]; 1525 }; 1526 1527 /* Values for channel_mask above */ 1528 1529 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1530 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1531 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1532 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1533 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1534 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1535 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1536 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1537 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1538 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1539 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1540 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1541 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1542 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1543 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1544 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1545 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1546 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1547 1548 struct acpi_nhlt_format_config { 1549 struct acpi_nhlt_wave_extensible format; 1550 u32 capability_size; 1551 u8 capabilities[]; 1552 }; 1553 1554 struct acpi_nhlt_formats_config { 1555 u8 formats_count; 1556 }; 1557 1558 struct acpi_nhlt_device_specific_hdr { 1559 u8 virtual_slot; 1560 u8 config_type; 1561 }; 1562 1563 /* Types for config_type above */ 1564 1565 #define ACPI_NHLT_GENERIC 0 1566 #define ACPI_NHLT_MIC 1 1567 #define ACPI_NHLT_RENDER 3 1568 1569 struct acpi_nhlt_mic_device_specific_config { 1570 struct acpi_nhlt_device_specific_hdr device_config; 1571 u8 array_type_ext; 1572 }; 1573 1574 /* Values for array_type_ext above */ 1575 1576 #define SMALL_LINEAR_2ELEMENT 0x0A 1577 #define BIG_LINEAR_2ELEMENT 0x0B 1578 #define FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1579 #define PLANAR_LSHAPED_4ELEMENT 0x0D 1580 #define SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1581 #define VENDOR_DEFINED 0x0F 1582 #define ARRAY_TYPE_MASK 0x0F 1583 #define ARRAY_TYPE_EXT_MASK 0x10 1584 1585 #define NO_EXTENSION 0x0 1586 #define MIC_SNR_SENSITIVITY_EXT 0x1 1587 1588 struct acpi_nhlt_vendor_mic_config { 1589 u8 type; 1590 u8 panel; 1591 u16 speaker_position_distance; // mm 1592 u16 horizontal_offset; // mm 1593 u16 vertical_offset; // mm 1594 u8 frequency_low_band; // 5*hz 1595 u8 frequency_high_band; // 500*hz 1596 u16 direction_angle; // -180 - + 180 1597 u16 elevation_angle; // -180 - + 180 1598 u16 work_vertical_angle_begin; // -180 - + 180 with 2 deg step 1599 u16 work_vertical_angle_end; // -180 - + 180 with 2 deg step 1600 u16 work_horizontal_angle_begin; // -180 - + 180 with 2 deg step 1601 u16 work_horizontal_angle_end; // -180 - + 180 with 2 deg step 1602 }; 1603 1604 /* Values for Type field above */ 1605 1606 #define MIC_OMNIDIRECTIONAL 0 1607 #define MIC_SUBCARDIOID 1 1608 #define MIC_CARDIOID 2 1609 #define MIC_SUPER_CARDIOID 3 1610 #define MIC_HYPER_CARDIOID 4 1611 #define MIC_8_SHAPED 5 1612 #define MIC_VENDOR_DEFINED 7 1613 1614 /* Values for Panel field above */ 1615 1616 #define MIC_TOP 0 1617 #define MIC_BOTTOM 1 1618 #define MIC_LEFT 2 1619 #define MIC_RIGHT 3 1620 #define MIC_FRONT 4 1621 #define MIC_REAR 5 1622 1623 struct acpi_nhlt_vendor_mic_device_specific_config { 1624 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 1625 u8 number_of_microphones; 1626 struct acpi_nhlt_vendor_mic_config mic_config[]; // indexed by number_of_microphones 1627 }; 1628 1629 /* Microphone SNR and Sensitivity extension */ 1630 1631 struct acpi_nhlt_mic_snr_sensitivity_extension { 1632 u32 SNR; 1633 u32 sensitivity; 1634 }; 1635 1636 struct acpi_nhlt_render_feedback_device_specific_config { 1637 struct acpi_nhlt_device_specific_config device_config; 1638 u8 feedback_virtual_slot; // render slot in case of capture 1639 u16 feedback_channels; // informative only 1640 u16 feedback_valid_bits_per_sample; 1641 }; 1642 1643 /* Linux-specific structures */ 1644 1645 struct acpi_nhlt_linux_specific_count { 1646 u8 structure_count; 1647 }; 1648 1649 struct acpi_nhlt_linux_specific_data { 1650 u8 device_id[16]; 1651 u8 device_instance_id; 1652 u8 device_port_id; 1653 u8 filler[18]; 1654 }; 1655 1656 struct acpi_nhlt_table_terminator { 1657 u32 terminator_value; 1658 u32 terminator_signature; 1659 }; 1660 1661 /******************************************************************************* 1662 * 1663 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1664 * Version 2 (ACPI 6.2) 1665 * 1666 ******************************************************************************/ 1667 1668 struct acpi_table_pcct { 1669 struct acpi_table_header header; /* Common ACPI table header */ 1670 u32 flags; 1671 u64 reserved; 1672 }; 1673 1674 /* Values for Flags field above */ 1675 1676 #define ACPI_PCCT_DOORBELL 1 1677 1678 /* Values for subtable type in struct acpi_subtable_header */ 1679 1680 enum acpi_pcct_type { 1681 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1682 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1683 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1684 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1685 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1686 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1687 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1688 }; 1689 1690 /* 1691 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1692 */ 1693 1694 /* 0: Generic Communications Subspace */ 1695 1696 struct acpi_pcct_subspace { 1697 struct acpi_subtable_header header; 1698 u8 reserved[6]; 1699 u64 base_address; 1700 u64 length; 1701 struct acpi_generic_address doorbell_register; 1702 u64 preserve_mask; 1703 u64 write_mask; 1704 u32 latency; 1705 u32 max_access_rate; 1706 u16 min_turnaround_time; 1707 }; 1708 1709 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1710 1711 struct acpi_pcct_hw_reduced { 1712 struct acpi_subtable_header header; 1713 u32 platform_interrupt; 1714 u8 flags; 1715 u8 reserved; 1716 u64 base_address; 1717 u64 length; 1718 struct acpi_generic_address doorbell_register; 1719 u64 preserve_mask; 1720 u64 write_mask; 1721 u32 latency; 1722 u32 max_access_rate; 1723 u16 min_turnaround_time; 1724 }; 1725 1726 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1727 1728 struct acpi_pcct_hw_reduced_type2 { 1729 struct acpi_subtable_header header; 1730 u32 platform_interrupt; 1731 u8 flags; 1732 u8 reserved; 1733 u64 base_address; 1734 u64 length; 1735 struct acpi_generic_address doorbell_register; 1736 u64 preserve_mask; 1737 u64 write_mask; 1738 u32 latency; 1739 u32 max_access_rate; 1740 u16 min_turnaround_time; 1741 struct acpi_generic_address platform_ack_register; 1742 u64 ack_preserve_mask; 1743 u64 ack_write_mask; 1744 }; 1745 1746 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1747 1748 struct acpi_pcct_ext_pcc_master { 1749 struct acpi_subtable_header header; 1750 u32 platform_interrupt; 1751 u8 flags; 1752 u8 reserved1; 1753 u64 base_address; 1754 u32 length; 1755 struct acpi_generic_address doorbell_register; 1756 u64 preserve_mask; 1757 u64 write_mask; 1758 u32 latency; 1759 u32 max_access_rate; 1760 u32 min_turnaround_time; 1761 struct acpi_generic_address platform_ack_register; 1762 u64 ack_preserve_mask; 1763 u64 ack_set_mask; 1764 u64 reserved2; 1765 struct acpi_generic_address cmd_complete_register; 1766 u64 cmd_complete_mask; 1767 struct acpi_generic_address cmd_update_register; 1768 u64 cmd_update_preserve_mask; 1769 u64 cmd_update_set_mask; 1770 struct acpi_generic_address error_status_register; 1771 u64 error_status_mask; 1772 }; 1773 1774 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1775 1776 struct acpi_pcct_ext_pcc_slave { 1777 struct acpi_subtable_header header; 1778 u32 platform_interrupt; 1779 u8 flags; 1780 u8 reserved1; 1781 u64 base_address; 1782 u32 length; 1783 struct acpi_generic_address doorbell_register; 1784 u64 preserve_mask; 1785 u64 write_mask; 1786 u32 latency; 1787 u32 max_access_rate; 1788 u32 min_turnaround_time; 1789 struct acpi_generic_address platform_ack_register; 1790 u64 ack_preserve_mask; 1791 u64 ack_set_mask; 1792 u64 reserved2; 1793 struct acpi_generic_address cmd_complete_register; 1794 u64 cmd_complete_mask; 1795 struct acpi_generic_address cmd_update_register; 1796 u64 cmd_update_preserve_mask; 1797 u64 cmd_update_set_mask; 1798 struct acpi_generic_address error_status_register; 1799 u64 error_status_mask; 1800 }; 1801 1802 /* 5: HW Registers based Communications Subspace */ 1803 1804 struct acpi_pcct_hw_reg { 1805 struct acpi_subtable_header header; 1806 u16 version; 1807 u64 base_address; 1808 u64 length; 1809 struct acpi_generic_address doorbell_register; 1810 u64 doorbell_preserve; 1811 u64 doorbell_write; 1812 struct acpi_generic_address cmd_complete_register; 1813 u64 cmd_complete_mask; 1814 struct acpi_generic_address error_status_register; 1815 u64 error_status_mask; 1816 u32 nominal_latency; 1817 u32 min_turnaround_time; 1818 }; 1819 1820 /* Values for doorbell flags above */ 1821 1822 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1823 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1824 1825 /* 1826 * PCC memory structures (not part of the ACPI table) 1827 */ 1828 1829 /* Shared Memory Region */ 1830 1831 struct acpi_pcct_shared_memory { 1832 u32 signature; 1833 u16 command; 1834 u16 status; 1835 }; 1836 1837 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1838 1839 struct acpi_pcct_ext_pcc_shared_memory { 1840 u32 signature; 1841 u32 flags; 1842 u32 length; 1843 u32 command; 1844 }; 1845 1846 /******************************************************************************* 1847 * 1848 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1849 * Version 0 1850 * 1851 ******************************************************************************/ 1852 1853 struct acpi_table_pdtt { 1854 struct acpi_table_header header; /* Common ACPI table header */ 1855 u8 trigger_count; 1856 u8 reserved[3]; 1857 u32 array_offset; 1858 }; 1859 1860 /* 1861 * PDTT Communication Channel Identifier Structure. 1862 * The number of these structures is defined by trigger_count above, 1863 * starting at array_offset. 1864 */ 1865 struct acpi_pdtt_channel { 1866 u8 subchannel_id; 1867 u8 flags; 1868 }; 1869 1870 /* Flags for above */ 1871 1872 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1873 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1874 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1875 1876 /******************************************************************************* 1877 * 1878 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1879 * Version 1 1880 * 1881 ******************************************************************************/ 1882 1883 struct acpi_table_phat { 1884 struct acpi_table_header header; /* Common ACPI table header */ 1885 }; 1886 1887 /* Common header for PHAT subtables that follow main table */ 1888 1889 struct acpi_phat_header { 1890 u16 type; 1891 u16 length; 1892 u8 revision; 1893 }; 1894 1895 /* Values for Type field above */ 1896 1897 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 1898 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 1899 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 1900 1901 /* 1902 * PHAT subtables, correspond to Type in struct acpi_phat_header 1903 */ 1904 1905 /* 0: Firmware Version Data Record */ 1906 1907 struct acpi_phat_version_data { 1908 struct acpi_phat_header header; 1909 u8 reserved[3]; 1910 u32 element_count; 1911 }; 1912 1913 struct acpi_phat_version_element { 1914 u8 guid[16]; 1915 u64 version_value; 1916 u32 producer_id; 1917 }; 1918 1919 /* 1: Firmware Health Data Record */ 1920 1921 struct acpi_phat_health_data { 1922 struct acpi_phat_header header; 1923 u8 reserved[2]; 1924 u8 health; 1925 u8 device_guid[16]; 1926 u32 device_specific_offset; /* Zero if no Device-specific data */ 1927 }; 1928 1929 /* Values for Health field above */ 1930 1931 #define ACPI_PHAT_ERRORS_FOUND 0 1932 #define ACPI_PHAT_NO_ERRORS 1 1933 #define ACPI_PHAT_UNKNOWN_ERRORS 2 1934 #define ACPI_PHAT_ADVISORY 3 1935 1936 /******************************************************************************* 1937 * 1938 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1939 * Version 1 1940 * 1941 ******************************************************************************/ 1942 1943 struct acpi_table_pmtt { 1944 struct acpi_table_header header; /* Common ACPI table header */ 1945 u32 memory_device_count; 1946 /* 1947 * Immediately followed by: 1948 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 1949 */ 1950 }; 1951 1952 /* Common header for PMTT subtables that follow main table */ 1953 1954 struct acpi_pmtt_header { 1955 u8 type; 1956 u8 reserved1; 1957 u16 length; 1958 u16 flags; 1959 u16 reserved2; 1960 u32 memory_device_count; /* Zero means no memory device structs follow */ 1961 /* 1962 * Immediately followed by: 1963 * u8 type_specific_data[] 1964 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 1965 */ 1966 }; 1967 1968 /* Values for Type field above */ 1969 1970 #define ACPI_PMTT_TYPE_SOCKET 0 1971 #define ACPI_PMTT_TYPE_CONTROLLER 1 1972 #define ACPI_PMTT_TYPE_DIMM 2 1973 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 1974 #define ACPI_PMTT_TYPE_VENDOR 0xFF 1975 1976 /* Values for Flags field above */ 1977 1978 #define ACPI_PMTT_TOP_LEVEL 0x0001 1979 #define ACPI_PMTT_PHYSICAL 0x0002 1980 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1981 1982 /* 1983 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 1984 */ 1985 1986 /* 0: Socket Structure */ 1987 1988 struct acpi_pmtt_socket { 1989 struct acpi_pmtt_header header; 1990 u16 socket_id; 1991 u16 reserved; 1992 }; 1993 /* 1994 * Immediately followed by: 1995 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 1996 */ 1997 1998 /* 1: Memory Controller subtable */ 1999 2000 struct acpi_pmtt_controller { 2001 struct acpi_pmtt_header header; 2002 u16 controller_id; 2003 u16 reserved; 2004 }; 2005 /* 2006 * Immediately followed by: 2007 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2008 */ 2009 2010 /* 2: Physical Component Identifier (DIMM) */ 2011 2012 struct acpi_pmtt_physical_component { 2013 struct acpi_pmtt_header header; 2014 u32 bios_handle; 2015 }; 2016 2017 /* 0xFF: Vendor Specific Data */ 2018 2019 struct acpi_pmtt_vendor_specific { 2020 struct acpi_pmtt_header header; 2021 u8 type_uuid[16]; 2022 u8 specific[]; 2023 /* 2024 * Immediately followed by: 2025 * u8 vendor_specific_data[]; 2026 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2027 */ 2028 }; 2029 2030 /******************************************************************************* 2031 * 2032 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2033 * Version 1 2034 * 2035 ******************************************************************************/ 2036 2037 struct acpi_table_pptt { 2038 struct acpi_table_header header; /* Common ACPI table header */ 2039 }; 2040 2041 /* Values for Type field above */ 2042 2043 enum acpi_pptt_type { 2044 ACPI_PPTT_TYPE_PROCESSOR = 0, 2045 ACPI_PPTT_TYPE_CACHE = 1, 2046 ACPI_PPTT_TYPE_ID = 2, 2047 ACPI_PPTT_TYPE_RESERVED = 3 2048 }; 2049 2050 /* 0: Processor Hierarchy Node Structure */ 2051 2052 struct acpi_pptt_processor { 2053 struct acpi_subtable_header header; 2054 u16 reserved; 2055 u32 flags; 2056 u32 parent; 2057 u32 acpi_processor_id; 2058 u32 number_of_priv_resources; 2059 }; 2060 2061 /* Flags */ 2062 2063 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2064 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2065 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2066 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2067 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2068 2069 /* 1: Cache Type Structure */ 2070 2071 struct acpi_pptt_cache { 2072 struct acpi_subtable_header header; 2073 u16 reserved; 2074 u32 flags; 2075 u32 next_level_of_cache; 2076 u32 size; 2077 u32 number_of_sets; 2078 u8 associativity; 2079 u8 attributes; 2080 u16 line_size; 2081 }; 2082 2083 /* 1: Cache Type Structure for PPTT version 3 */ 2084 2085 struct acpi_pptt_cache_v1 { 2086 u32 cache_id; 2087 }; 2088 2089 /* Flags */ 2090 2091 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2092 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2093 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2094 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2095 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2096 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2097 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2098 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2099 2100 /* Masks for Attributes */ 2101 2102 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2103 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2104 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2105 2106 /* Attributes describing cache */ 2107 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2108 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2109 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2110 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2111 2112 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2113 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2114 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2115 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2116 2117 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2118 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2119 2120 /* 2: ID Structure */ 2121 2122 struct acpi_pptt_id { 2123 struct acpi_subtable_header header; 2124 u16 reserved; 2125 u32 vendor_id; 2126 u64 level1_id; 2127 u64 level2_id; 2128 u16 major_rev; 2129 u16 minor_rev; 2130 u16 spin_rev; 2131 }; 2132 2133 /******************************************************************************* 2134 * 2135 * PRMT - Platform Runtime Mechanism Table 2136 * Version 1 2137 * 2138 ******************************************************************************/ 2139 2140 struct acpi_table_prmt { 2141 struct acpi_table_header header; /* Common ACPI table header */ 2142 }; 2143 2144 struct acpi_table_prmt_header { 2145 u8 platform_guid[16]; 2146 u32 module_info_offset; 2147 u32 module_info_count; 2148 }; 2149 2150 struct acpi_prmt_module_header { 2151 u16 revision; 2152 u16 length; 2153 }; 2154 2155 struct acpi_prmt_module_info { 2156 u16 revision; 2157 u16 length; 2158 u8 module_guid[16]; 2159 u16 major_rev; 2160 u16 minor_rev; 2161 u16 handler_info_count; 2162 u32 handler_info_offset; 2163 u64 mmio_list_pointer; 2164 }; 2165 2166 struct acpi_prmt_handler_info { 2167 u16 revision; 2168 u16 length; 2169 u8 handler_guid[16]; 2170 u64 handler_address; 2171 u64 static_data_buffer_address; 2172 u64 acpi_param_buffer_address; 2173 }; 2174 2175 /******************************************************************************* 2176 * 2177 * RASF - RAS Feature Table (ACPI 5.0) 2178 * Version 1 2179 * 2180 ******************************************************************************/ 2181 2182 struct acpi_table_rasf { 2183 struct acpi_table_header header; /* Common ACPI table header */ 2184 u8 channel_id[12]; 2185 }; 2186 2187 /* RASF Platform Communication Channel Shared Memory Region */ 2188 2189 struct acpi_rasf_shared_memory { 2190 u32 signature; 2191 u16 command; 2192 u16 status; 2193 u16 version; 2194 u8 capabilities[16]; 2195 u8 set_capabilities[16]; 2196 u16 num_parameter_blocks; 2197 u32 set_capabilities_status; 2198 }; 2199 2200 /* RASF Parameter Block Structure Header */ 2201 2202 struct acpi_rasf_parameter_block { 2203 u16 type; 2204 u16 version; 2205 u16 length; 2206 }; 2207 2208 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2209 2210 struct acpi_rasf_patrol_scrub_parameter { 2211 struct acpi_rasf_parameter_block header; 2212 u16 patrol_scrub_command; 2213 u64 requested_address_range[2]; 2214 u64 actual_address_range[2]; 2215 u16 flags; 2216 u8 requested_speed; 2217 }; 2218 2219 /* Masks for Flags and Speed fields above */ 2220 2221 #define ACPI_RASF_SCRUBBER_RUNNING 1 2222 #define ACPI_RASF_SPEED (7<<1) 2223 #define ACPI_RASF_SPEED_SLOW (0<<1) 2224 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2225 #define ACPI_RASF_SPEED_FAST (7<<1) 2226 2227 /* Channel Commands */ 2228 2229 enum acpi_rasf_commands { 2230 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2231 }; 2232 2233 /* Platform RAS Capabilities */ 2234 2235 enum acpi_rasf_capabiliities { 2236 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2237 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2238 }; 2239 2240 /* Patrol Scrub Commands */ 2241 2242 enum acpi_rasf_patrol_scrub_commands { 2243 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2244 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2245 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2246 }; 2247 2248 /* Channel Command flags */ 2249 2250 #define ACPI_RASF_GENERATE_SCI (1<<15) 2251 2252 /* Status values */ 2253 2254 enum acpi_rasf_status { 2255 ACPI_RASF_SUCCESS = 0, 2256 ACPI_RASF_NOT_VALID = 1, 2257 ACPI_RASF_NOT_SUPPORTED = 2, 2258 ACPI_RASF_BUSY = 3, 2259 ACPI_RASF_FAILED = 4, 2260 ACPI_RASF_ABORTED = 5, 2261 ACPI_RASF_INVALID_DATA = 6 2262 }; 2263 2264 /* Status flags */ 2265 2266 #define ACPI_RASF_COMMAND_COMPLETE (1) 2267 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2268 #define ACPI_RASF_ERROR (1<<2) 2269 #define ACPI_RASF_STATUS (0x1F<<3) 2270 2271 /******************************************************************************* 2272 * 2273 * RGRT - Regulatory Graphics Resource Table 2274 * Version 1 2275 * 2276 * Conforms to "ACPI RGRT" available at: 2277 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2278 * 2279 ******************************************************************************/ 2280 2281 struct acpi_table_rgrt { 2282 struct acpi_table_header header; /* Common ACPI table header */ 2283 u16 version; 2284 u8 image_type; 2285 u8 reserved; 2286 u8 image[0]; 2287 }; 2288 2289 /* image_type values */ 2290 2291 enum acpi_rgrt_image_type { 2292 ACPI_RGRT_TYPE_RESERVED0 = 0, 2293 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2294 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2295 }; 2296 2297 /******************************************************************************* 2298 * 2299 * SBST - Smart Battery Specification Table 2300 * Version 1 2301 * 2302 ******************************************************************************/ 2303 2304 struct acpi_table_sbst { 2305 struct acpi_table_header header; /* Common ACPI table header */ 2306 u32 warning_level; 2307 u32 low_level; 2308 u32 critical_level; 2309 }; 2310 2311 /******************************************************************************* 2312 * 2313 * SDEI - Software Delegated Exception Interface Descriptor Table 2314 * 2315 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2316 * May 8th, 2017. Copyright 2017 ARM Ltd. 2317 * 2318 ******************************************************************************/ 2319 2320 struct acpi_table_sdei { 2321 struct acpi_table_header header; /* Common ACPI table header */ 2322 }; 2323 2324 /******************************************************************************* 2325 * 2326 * SDEV - Secure Devices Table (ACPI 6.2) 2327 * Version 1 2328 * 2329 ******************************************************************************/ 2330 2331 struct acpi_table_sdev { 2332 struct acpi_table_header header; /* Common ACPI table header */ 2333 }; 2334 2335 struct acpi_sdev_header { 2336 u8 type; 2337 u8 flags; 2338 u16 length; 2339 }; 2340 2341 /* Values for subtable type above */ 2342 2343 enum acpi_sdev_type { 2344 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2345 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2346 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2347 }; 2348 2349 /* Values for flags above */ 2350 2351 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2352 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2353 2354 /* 2355 * SDEV subtables 2356 */ 2357 2358 /* 0: Namespace Device Based Secure Device Structure */ 2359 2360 struct acpi_sdev_namespace { 2361 struct acpi_sdev_header header; 2362 u16 device_id_offset; 2363 u16 device_id_length; 2364 u16 vendor_data_offset; 2365 u16 vendor_data_length; 2366 }; 2367 2368 struct acpi_sdev_secure_component { 2369 u16 secure_component_offset; 2370 u16 secure_component_length; 2371 }; 2372 2373 /* 2374 * SDEV sub-subtables ("Components") for above 2375 */ 2376 struct acpi_sdev_component { 2377 struct acpi_sdev_header header; 2378 }; 2379 2380 /* Values for sub-subtable type above */ 2381 2382 enum acpi_sac_type { 2383 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2384 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2385 }; 2386 2387 struct acpi_sdev_id_component { 2388 struct acpi_sdev_header header; 2389 u16 hardware_id_offset; 2390 u16 hardware_id_length; 2391 u16 subsystem_id_offset; 2392 u16 subsystem_id_length; 2393 u16 hardware_revision; 2394 u8 hardware_rev_present; 2395 u8 class_code_present; 2396 u8 pci_base_class; 2397 u8 pci_sub_class; 2398 u8 pci_programming_xface; 2399 }; 2400 2401 struct acpi_sdev_mem_component { 2402 struct acpi_sdev_header header; 2403 u32 reserved; 2404 u64 memory_base_address; 2405 u64 memory_length; 2406 }; 2407 2408 /* 1: PCIe Endpoint Device Based Device Structure */ 2409 2410 struct acpi_sdev_pcie { 2411 struct acpi_sdev_header header; 2412 u16 segment; 2413 u16 start_bus; 2414 u16 path_offset; 2415 u16 path_length; 2416 u16 vendor_data_offset; 2417 u16 vendor_data_length; 2418 }; 2419 2420 /* 1a: PCIe Endpoint path entry */ 2421 2422 struct acpi_sdev_pcie_path { 2423 u8 device; 2424 u8 function; 2425 }; 2426 2427 /******************************************************************************* 2428 * 2429 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2430 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2431 * Trust Domain Extensions (Intel TDX)". 2432 * Version 1 2433 * 2434 ******************************************************************************/ 2435 2436 struct acpi_table_svkl { 2437 struct acpi_table_header header; /* Common ACPI table header */ 2438 u32 count; 2439 }; 2440 2441 struct acpi_svkl_key { 2442 u16 type; 2443 u16 format; 2444 u32 size; 2445 u64 address; 2446 }; 2447 2448 enum acpi_svkl_type { 2449 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2450 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2451 }; 2452 2453 enum acpi_svkl_format { 2454 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2455 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2456 }; 2457 2458 /* Reset to default packing */ 2459 2460 #pragma pack() 2461 2462 #endif /* __ACTBL2_H__ */ 2463