1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2022, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 31 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 32 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 33 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 34 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 35 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 36 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 37 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 38 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 39 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 40 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 41 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 42 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 43 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 44 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 45 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 46 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 47 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 48 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 49 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 50 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 51 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 52 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 53 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 54 55 /* 56 * All tables must be byte-packed to match the ACPI specification, since 57 * the tables are provided by the system BIOS. 58 */ 59 #pragma pack(1) 60 61 /* 62 * Note: C bitfields are not used for this reason: 63 * 64 * "Bitfields are great and easy to read, but unfortunately the C language 65 * does not specify the layout of bitfields in memory, which means they are 66 * essentially useless for dealing with packed data in on-disk formats or 67 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 68 * this decision was a design error in C. Ritchie could have picked an order 69 * and stuck with it." Norman Ramsey. 70 * See http://stackoverflow.com/a/1053662/41661 71 */ 72 73 /******************************************************************************* 74 * 75 * AEST - Arm Error Source Table 76 * 77 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 78 * September 2020. 79 * 80 ******************************************************************************/ 81 82 struct acpi_table_aest { 83 struct acpi_table_header header; 84 void *node_array[]; 85 }; 86 87 /* Common Subtable header - one per Node Structure (Subtable) */ 88 89 struct acpi_aest_hdr { 90 u8 type; 91 u16 length; 92 u8 reserved; 93 u32 node_specific_offset; 94 u32 node_interface_offset; 95 u32 node_interrupt_offset; 96 u32 node_interrupt_count; 97 u64 timestamp_rate; 98 u64 reserved1; 99 u64 error_injection_rate; 100 }; 101 102 /* Values for Type above */ 103 104 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 105 #define ACPI_AEST_MEMORY_ERROR_NODE 1 106 #define ACPI_AEST_SMMU_ERROR_NODE 2 107 #define ACPI_AEST_VENDOR_ERROR_NODE 3 108 #define ACPI_AEST_GIC_ERROR_NODE 4 109 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 110 111 /* 112 * AEST subtables (Error nodes) 113 */ 114 115 /* 0: Processor Error */ 116 117 typedef struct acpi_aest_processor { 118 u32 processor_id; 119 u8 resource_type; 120 u8 reserved; 121 u8 flags; 122 u8 revision; 123 u64 processor_affinity; 124 125 } acpi_aest_processor; 126 127 /* Values for resource_type above, related structs below */ 128 129 #define ACPI_AEST_CACHE_RESOURCE 0 130 #define ACPI_AEST_TLB_RESOURCE 1 131 #define ACPI_AEST_GENERIC_RESOURCE 2 132 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 133 134 /* 0R: Processor Cache Resource Substructure */ 135 136 typedef struct acpi_aest_processor_cache { 137 u32 cache_reference; 138 u32 reserved; 139 140 } acpi_aest_processor_cache; 141 142 /* Values for cache_type above */ 143 144 #define ACPI_AEST_CACHE_DATA 0 145 #define ACPI_AEST_CACHE_INSTRUCTION 1 146 #define ACPI_AEST_CACHE_UNIFIED 2 147 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 148 149 /* 1R: Processor TLB Resource Substructure */ 150 151 typedef struct acpi_aest_processor_tlb { 152 u32 tlb_level; 153 u32 reserved; 154 155 } acpi_aest_processor_tlb; 156 157 /* 2R: Processor Generic Resource Substructure */ 158 159 typedef struct acpi_aest_processor_generic { 160 u32 resource; 161 162 } acpi_aest_processor_generic; 163 164 /* 1: Memory Error */ 165 166 typedef struct acpi_aest_memory { 167 u32 srat_proximity_domain; 168 169 } acpi_aest_memory; 170 171 /* 2: Smmu Error */ 172 173 typedef struct acpi_aest_smmu { 174 u32 iort_node_reference; 175 u32 subcomponent_reference; 176 177 } acpi_aest_smmu; 178 179 /* 3: Vendor Defined */ 180 181 typedef struct acpi_aest_vendor { 182 u32 acpi_hid; 183 u32 acpi_uid; 184 u8 vendor_specific_data[16]; 185 186 } acpi_aest_vendor; 187 188 /* 4: Gic Error */ 189 190 typedef struct acpi_aest_gic { 191 u32 interface_type; 192 u32 instance_id; 193 194 } acpi_aest_gic; 195 196 /* Values for interface_type above */ 197 198 #define ACPI_AEST_GIC_CPU 0 199 #define ACPI_AEST_GIC_DISTRIBUTOR 1 200 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 201 #define ACPI_AEST_GIC_ITS 3 202 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 203 204 /* Node Interface Structure */ 205 206 typedef struct acpi_aest_node_interface { 207 u8 type; 208 u8 reserved[3]; 209 u32 flags; 210 u64 address; 211 u32 error_record_index; 212 u32 error_record_count; 213 u64 error_record_implemented; 214 u64 error_status_reporting; 215 u64 addressing_mode; 216 217 } acpi_aest_node_interface; 218 219 /* Values for Type field above */ 220 221 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 222 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 223 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 224 225 /* Node Interrupt Structure */ 226 227 typedef struct acpi_aest_node_interrupt { 228 u8 type; 229 u8 reserved[2]; 230 u8 flags; 231 u32 gsiv; 232 u8 iort_id; 233 u8 reserved1[3]; 234 235 } acpi_aest_node_interrupt; 236 237 /* Values for Type field above */ 238 239 #define ACPI_AEST_NODE_FAULT_HANDLING 0 240 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 241 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 242 243 /******************************************************************************* 244 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 245 * 246 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 247 * ARM DEN0093 v1.1 248 * 249 ******************************************************************************/ 250 struct acpi_table_agdi { 251 struct acpi_table_header header; /* Common ACPI table header */ 252 u8 flags; 253 u8 reserved[3]; 254 u32 sdei_event; 255 u32 gsiv; 256 }; 257 258 /* Mask for Flags field above */ 259 260 #define ACPI_AGDI_SIGNALING_MODE (1) 261 262 /******************************************************************************* 263 * 264 * APMT - ARM Performance Monitoring Unit Table 265 * 266 * Conforms to: 267 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 268 * ARM DEN0117 v1.0 November 25, 2021 269 * 270 ******************************************************************************/ 271 272 struct acpi_table_apmt { 273 struct acpi_table_header header; /* Common ACPI table header */ 274 }; 275 276 #define ACPI_APMT_NODE_ID_LENGTH 4 277 278 /* 279 * APMT subtables 280 */ 281 struct acpi_apmt_node { 282 u16 length; 283 u8 flags; 284 u8 type; 285 u32 id; 286 u64 inst_primary; 287 u32 inst_secondary; 288 u64 base_address0; 289 u64 base_address1; 290 u32 ovflw_irq; 291 u32 reserved; 292 u32 ovflw_irq_flags; 293 u32 proc_affinity; 294 u32 impl_id; 295 }; 296 297 /* Masks for Flags field above */ 298 299 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 300 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 301 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 302 303 /* Values for Flags dual page field above */ 304 305 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 306 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 307 308 /* Values for Flags processor affinity field above */ 309 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 310 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 311 312 /* Values for Flags 64-bit atomic field above */ 313 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 314 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 315 316 /* Values for Type field above */ 317 318 enum acpi_apmt_node_type { 319 ACPI_APMT_NODE_TYPE_MC = 0x00, 320 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 321 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 322 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 323 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 324 ACPI_APMT_NODE_TYPE_COUNT 325 }; 326 327 /* Masks for ovflw_irq_flags field above */ 328 329 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 330 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 331 332 /* Values for ovflw_irq_flags mode field above */ 333 334 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 335 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 336 337 /* Values for ovflw_irq_flags type field above */ 338 339 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 340 341 /******************************************************************************* 342 * 343 * BDAT - BIOS Data ACPI Table 344 * 345 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 346 * Nov 2020 347 * 348 ******************************************************************************/ 349 350 struct acpi_table_bdat { 351 struct acpi_table_header header; 352 struct acpi_generic_address gas; 353 }; 354 355 /******************************************************************************* 356 * 357 * IORT - IO Remapping Table 358 * 359 * Conforms to "IO Remapping Table System Software on ARM Platforms", 360 * Document number: ARM DEN 0049E.d, Feb 2022 361 * 362 ******************************************************************************/ 363 364 struct acpi_table_iort { 365 struct acpi_table_header header; 366 u32 node_count; 367 u32 node_offset; 368 u32 reserved; 369 }; 370 371 /* 372 * IORT subtables 373 */ 374 struct acpi_iort_node { 375 u8 type; 376 u16 length; 377 u8 revision; 378 u32 identifier; 379 u32 mapping_count; 380 u32 mapping_offset; 381 char node_data[1]; 382 }; 383 384 /* Values for subtable Type above */ 385 386 enum acpi_iort_node_type { 387 ACPI_IORT_NODE_ITS_GROUP = 0x00, 388 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 389 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 390 ACPI_IORT_NODE_SMMU = 0x03, 391 ACPI_IORT_NODE_SMMU_V3 = 0x04, 392 ACPI_IORT_NODE_PMCG = 0x05, 393 ACPI_IORT_NODE_RMR = 0x06, 394 }; 395 396 struct acpi_iort_id_mapping { 397 u32 input_base; /* Lowest value in input range */ 398 u32 id_count; /* Number of IDs */ 399 u32 output_base; /* Lowest value in output range */ 400 u32 output_reference; /* A reference to the output node */ 401 u32 flags; 402 }; 403 404 /* Masks for Flags field above for IORT subtable */ 405 406 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 407 408 struct acpi_iort_memory_access { 409 u32 cache_coherency; 410 u8 hints; 411 u16 reserved; 412 u8 memory_flags; 413 }; 414 415 /* Values for cache_coherency field above */ 416 417 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 418 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 419 420 /* Masks for Hints field above */ 421 422 #define ACPI_IORT_HT_TRANSIENT (1) 423 #define ACPI_IORT_HT_WRITE (1<<1) 424 #define ACPI_IORT_HT_READ (1<<2) 425 #define ACPI_IORT_HT_OVERRIDE (1<<3) 426 427 /* Masks for memory_flags field above */ 428 429 #define ACPI_IORT_MF_COHERENCY (1) 430 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 431 432 /* 433 * IORT node specific subtables 434 */ 435 struct acpi_iort_its_group { 436 u32 its_count; 437 u32 identifiers[1]; /* GIC ITS identifier array */ 438 }; 439 440 struct acpi_iort_named_component { 441 u32 node_flags; 442 u64 memory_properties; /* Memory access properties */ 443 u8 memory_address_limit; /* Memory address size limit */ 444 char device_name[1]; /* Path of namespace object */ 445 }; 446 447 /* Masks for Flags field above */ 448 449 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 450 #define ACPI_IORT_NC_PASID_BITS (31<<1) 451 452 struct acpi_iort_root_complex { 453 u64 memory_properties; /* Memory access properties */ 454 u32 ats_attribute; 455 u32 pci_segment_number; 456 u8 memory_address_limit; /* Memory address size limit */ 457 u16 pasid_capabilities; /* PASID Capabilities */ 458 u8 reserved[1]; /* Reserved, must be zero */ 459 }; 460 461 /* Masks for ats_attribute field above */ 462 463 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 464 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 465 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 466 467 /* Masks for pasid_capabilities field above */ 468 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 469 470 struct acpi_iort_smmu { 471 u64 base_address; /* SMMU base address */ 472 u64 span; /* Length of memory range */ 473 u32 model; 474 u32 flags; 475 u32 global_interrupt_offset; 476 u32 context_interrupt_count; 477 u32 context_interrupt_offset; 478 u32 pmu_interrupt_count; 479 u32 pmu_interrupt_offset; 480 u64 interrupts[1]; /* Interrupt array */ 481 }; 482 483 /* Values for Model field above */ 484 485 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 486 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 487 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 488 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 489 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 490 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 491 492 /* Masks for Flags field above */ 493 494 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 495 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 496 497 /* Global interrupt format */ 498 499 struct acpi_iort_smmu_gsi { 500 u32 nsg_irpt; 501 u32 nsg_irpt_flags; 502 u32 nsg_cfg_irpt; 503 u32 nsg_cfg_irpt_flags; 504 }; 505 506 struct acpi_iort_smmu_v3 { 507 u64 base_address; /* SMMUv3 base address */ 508 u32 flags; 509 u32 reserved; 510 u64 vatos_address; 511 u32 model; 512 u32 event_gsiv; 513 u32 pri_gsiv; 514 u32 gerr_gsiv; 515 u32 sync_gsiv; 516 u32 pxm; 517 u32 id_mapping_index; 518 }; 519 520 /* Values for Model field above */ 521 522 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 523 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 524 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 525 526 /* Masks for Flags field above */ 527 528 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 529 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 530 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 531 532 struct acpi_iort_pmcg { 533 u64 page0_base_address; 534 u32 overflow_gsiv; 535 u32 node_reference; 536 u64 page1_base_address; 537 }; 538 539 struct acpi_iort_rmr { 540 u32 flags; 541 u32 rmr_count; 542 u32 rmr_offset; 543 }; 544 545 /* Masks for Flags field above */ 546 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 547 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 548 549 /* 550 * Macro to access the Access Attributes in flags field above: 551 * Access Attributes is encoded in bits 9:2 552 */ 553 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 554 555 /* Values for above Access Attributes */ 556 557 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 558 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 559 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 560 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 561 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 562 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 563 564 struct acpi_iort_rmr_desc { 565 u64 base_address; 566 u64 length; 567 u32 reserved; 568 }; 569 570 /******************************************************************************* 571 * 572 * IVRS - I/O Virtualization Reporting Structure 573 * Version 1 574 * 575 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 576 * Revision 1.26, February 2009. 577 * 578 ******************************************************************************/ 579 580 struct acpi_table_ivrs { 581 struct acpi_table_header header; /* Common ACPI table header */ 582 u32 info; /* Common virtualization info */ 583 u64 reserved; 584 }; 585 586 /* Values for Info field above */ 587 588 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 589 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 590 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 591 592 /* IVRS subtable header */ 593 594 struct acpi_ivrs_header { 595 u8 type; /* Subtable type */ 596 u8 flags; 597 u16 length; /* Subtable length */ 598 u16 device_id; /* ID of IOMMU */ 599 }; 600 601 /* Values for subtable Type above */ 602 603 enum acpi_ivrs_type { 604 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 605 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 606 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 607 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 608 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 609 ACPI_IVRS_TYPE_MEMORY3 = 0x22 610 }; 611 612 /* Masks for Flags field above for IVHD subtable */ 613 614 #define ACPI_IVHD_TT_ENABLE (1) 615 #define ACPI_IVHD_PASS_PW (1<<1) 616 #define ACPI_IVHD_RES_PASS_PW (1<<2) 617 #define ACPI_IVHD_ISOC (1<<3) 618 #define ACPI_IVHD_IOTLB (1<<4) 619 620 /* Masks for Flags field above for IVMD subtable */ 621 622 #define ACPI_IVMD_UNITY (1) 623 #define ACPI_IVMD_READ (1<<1) 624 #define ACPI_IVMD_WRITE (1<<2) 625 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 626 627 /* 628 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 629 */ 630 631 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 632 633 struct acpi_ivrs_hardware_10 { 634 struct acpi_ivrs_header header; 635 u16 capability_offset; /* Offset for IOMMU control fields */ 636 u64 base_address; /* IOMMU control registers */ 637 u16 pci_segment_group; 638 u16 info; /* MSI number and unit ID */ 639 u32 feature_reporting; 640 }; 641 642 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 643 644 struct acpi_ivrs_hardware_11 { 645 struct acpi_ivrs_header header; 646 u16 capability_offset; /* Offset for IOMMU control fields */ 647 u64 base_address; /* IOMMU control registers */ 648 u16 pci_segment_group; 649 u16 info; /* MSI number and unit ID */ 650 u32 attributes; 651 u64 efr_register_image; 652 u64 reserved; 653 }; 654 655 /* Masks for Info field above */ 656 657 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 658 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 659 660 /* 661 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 662 * Upper two bits of the Type field are the (encoded) length of the structure. 663 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 664 * are reserved for future use but not defined. 665 */ 666 struct acpi_ivrs_de_header { 667 u8 type; 668 u16 id; 669 u8 data_setting; 670 }; 671 672 /* Length of device entry is in the top two bits of Type field above */ 673 674 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 675 676 /* Values for device entry Type field above */ 677 678 enum acpi_ivrs_device_entry_type { 679 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 680 681 ACPI_IVRS_TYPE_PAD4 = 0, 682 ACPI_IVRS_TYPE_ALL = 1, 683 ACPI_IVRS_TYPE_SELECT = 2, 684 ACPI_IVRS_TYPE_START = 3, 685 ACPI_IVRS_TYPE_END = 4, 686 687 /* 8-byte device entries */ 688 689 ACPI_IVRS_TYPE_PAD8 = 64, 690 ACPI_IVRS_TYPE_NOT_USED = 65, 691 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 692 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 693 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 694 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 695 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 696 697 /* Variable-length device entries */ 698 699 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 700 }; 701 702 /* Values for Data field above */ 703 704 #define ACPI_IVHD_INIT_PASS (1) 705 #define ACPI_IVHD_EINT_PASS (1<<1) 706 #define ACPI_IVHD_NMI_PASS (1<<2) 707 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 708 #define ACPI_IVHD_LINT0_PASS (1<<6) 709 #define ACPI_IVHD_LINT1_PASS (1<<7) 710 711 /* Types 0-4: 4-byte device entry */ 712 713 struct acpi_ivrs_device4 { 714 struct acpi_ivrs_de_header header; 715 }; 716 717 /* Types 66-67: 8-byte device entry */ 718 719 struct acpi_ivrs_device8a { 720 struct acpi_ivrs_de_header header; 721 u8 reserved1; 722 u16 used_id; 723 u8 reserved2; 724 }; 725 726 /* Types 70-71: 8-byte device entry */ 727 728 struct acpi_ivrs_device8b { 729 struct acpi_ivrs_de_header header; 730 u32 extended_data; 731 }; 732 733 /* Values for extended_data above */ 734 735 #define ACPI_IVHD_ATS_DISABLED (1<<31) 736 737 /* Type 72: 8-byte device entry */ 738 739 struct acpi_ivrs_device8c { 740 struct acpi_ivrs_de_header header; 741 u8 handle; 742 u16 used_id; 743 u8 variety; 744 }; 745 746 /* Values for Variety field above */ 747 748 #define ACPI_IVHD_IOAPIC 1 749 #define ACPI_IVHD_HPET 2 750 751 /* Type 240: variable-length device entry */ 752 753 struct acpi_ivrs_device_hid { 754 struct acpi_ivrs_de_header header; 755 u64 acpi_hid; 756 u64 acpi_cid; 757 u8 uid_type; 758 u8 uid_length; 759 }; 760 761 /* Values for uid_type above */ 762 763 #define ACPI_IVRS_UID_NOT_PRESENT 0 764 #define ACPI_IVRS_UID_IS_INTEGER 1 765 #define ACPI_IVRS_UID_IS_STRING 2 766 767 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 768 769 struct acpi_ivrs_memory { 770 struct acpi_ivrs_header header; 771 u16 aux_data; 772 u64 reserved; 773 u64 start_address; 774 u64 memory_length; 775 }; 776 777 /******************************************************************************* 778 * 779 * LPIT - Low Power Idle Table 780 * 781 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 782 * 783 ******************************************************************************/ 784 785 struct acpi_table_lpit { 786 struct acpi_table_header header; /* Common ACPI table header */ 787 }; 788 789 /* LPIT subtable header */ 790 791 struct acpi_lpit_header { 792 u32 type; /* Subtable type */ 793 u32 length; /* Subtable length */ 794 u16 unique_id; 795 u16 reserved; 796 u32 flags; 797 }; 798 799 /* Values for subtable Type above */ 800 801 enum acpi_lpit_type { 802 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 803 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 804 }; 805 806 /* Masks for Flags field above */ 807 808 #define ACPI_LPIT_STATE_DISABLED (1) 809 #define ACPI_LPIT_NO_COUNTER (1<<1) 810 811 /* 812 * LPIT subtables, correspond to Type in struct acpi_lpit_header 813 */ 814 815 /* 0x00: Native C-state instruction based LPI structure */ 816 817 struct acpi_lpit_native { 818 struct acpi_lpit_header header; 819 struct acpi_generic_address entry_trigger; 820 u32 residency; 821 u32 latency; 822 struct acpi_generic_address residency_counter; 823 u64 counter_frequency; 824 }; 825 826 /******************************************************************************* 827 * 828 * MADT - Multiple APIC Description Table 829 * Version 3 830 * 831 ******************************************************************************/ 832 833 struct acpi_table_madt { 834 struct acpi_table_header header; /* Common ACPI table header */ 835 u32 address; /* Physical address of local APIC */ 836 u32 flags; 837 }; 838 839 /* Masks for Flags field above */ 840 841 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 842 843 /* Values for PCATCompat flag */ 844 845 #define ACPI_MADT_DUAL_PIC 1 846 #define ACPI_MADT_MULTIPLE_APIC 0 847 848 /* Values for MADT subtable type in struct acpi_subtable_header */ 849 850 enum acpi_madt_type { 851 ACPI_MADT_TYPE_LOCAL_APIC = 0, 852 ACPI_MADT_TYPE_IO_APIC = 1, 853 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 854 ACPI_MADT_TYPE_NMI_SOURCE = 3, 855 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 856 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 857 ACPI_MADT_TYPE_IO_SAPIC = 6, 858 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 859 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 860 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 861 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 862 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 863 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 864 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 865 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 866 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 867 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 868 ACPI_MADT_TYPE_CORE_PIC = 17, 869 ACPI_MADT_TYPE_LIO_PIC = 18, 870 ACPI_MADT_TYPE_HT_PIC = 19, 871 ACPI_MADT_TYPE_EIO_PIC = 20, 872 ACPI_MADT_TYPE_MSI_PIC = 21, 873 ACPI_MADT_TYPE_BIO_PIC = 22, 874 ACPI_MADT_TYPE_LPC_PIC = 23, 875 ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ 876 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 877 }; 878 879 /* 880 * MADT Subtables, correspond to Type in struct acpi_subtable_header 881 */ 882 883 /* 0: Processor Local APIC */ 884 885 struct acpi_madt_local_apic { 886 struct acpi_subtable_header header; 887 u8 processor_id; /* ACPI processor id */ 888 u8 id; /* Processor's local APIC id */ 889 u32 lapic_flags; 890 }; 891 892 /* 1: IO APIC */ 893 894 struct acpi_madt_io_apic { 895 struct acpi_subtable_header header; 896 u8 id; /* I/O APIC ID */ 897 u8 reserved; /* reserved - must be zero */ 898 u32 address; /* APIC physical address */ 899 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 900 }; 901 902 /* 2: Interrupt Override */ 903 904 struct acpi_madt_interrupt_override { 905 struct acpi_subtable_header header; 906 u8 bus; /* 0 - ISA */ 907 u8 source_irq; /* Interrupt source (IRQ) */ 908 u32 global_irq; /* Global system interrupt */ 909 u16 inti_flags; 910 }; 911 912 /* 3: NMI Source */ 913 914 struct acpi_madt_nmi_source { 915 struct acpi_subtable_header header; 916 u16 inti_flags; 917 u32 global_irq; /* Global system interrupt */ 918 }; 919 920 /* 4: Local APIC NMI */ 921 922 struct acpi_madt_local_apic_nmi { 923 struct acpi_subtable_header header; 924 u8 processor_id; /* ACPI processor id */ 925 u16 inti_flags; 926 u8 lint; /* LINTn to which NMI is connected */ 927 }; 928 929 /* 5: Address Override */ 930 931 struct acpi_madt_local_apic_override { 932 struct acpi_subtable_header header; 933 u16 reserved; /* Reserved, must be zero */ 934 u64 address; /* APIC physical address */ 935 }; 936 937 /* 6: I/O Sapic */ 938 939 struct acpi_madt_io_sapic { 940 struct acpi_subtable_header header; 941 u8 id; /* I/O SAPIC ID */ 942 u8 reserved; /* Reserved, must be zero */ 943 u32 global_irq_base; /* Global interrupt for SAPIC start */ 944 u64 address; /* SAPIC physical address */ 945 }; 946 947 /* 7: Local Sapic */ 948 949 struct acpi_madt_local_sapic { 950 struct acpi_subtable_header header; 951 u8 processor_id; /* ACPI processor id */ 952 u8 id; /* SAPIC ID */ 953 u8 eid; /* SAPIC EID */ 954 u8 reserved[3]; /* Reserved, must be zero */ 955 u32 lapic_flags; 956 u32 uid; /* Numeric UID - ACPI 3.0 */ 957 char uid_string[1]; /* String UID - ACPI 3.0 */ 958 }; 959 960 /* 8: Platform Interrupt Source */ 961 962 struct acpi_madt_interrupt_source { 963 struct acpi_subtable_header header; 964 u16 inti_flags; 965 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 966 u8 id; /* Processor ID */ 967 u8 eid; /* Processor EID */ 968 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 969 u32 global_irq; /* Global system interrupt */ 970 u32 flags; /* Interrupt Source Flags */ 971 }; 972 973 /* Masks for Flags field above */ 974 975 #define ACPI_MADT_CPEI_OVERRIDE (1) 976 977 /* 9: Processor Local X2APIC (ACPI 4.0) */ 978 979 struct acpi_madt_local_x2apic { 980 struct acpi_subtable_header header; 981 u16 reserved; /* reserved - must be zero */ 982 u32 local_apic_id; /* Processor x2APIC ID */ 983 u32 lapic_flags; 984 u32 uid; /* ACPI processor UID */ 985 }; 986 987 /* 10: Local X2APIC NMI (ACPI 4.0) */ 988 989 struct acpi_madt_local_x2apic_nmi { 990 struct acpi_subtable_header header; 991 u16 inti_flags; 992 u32 uid; /* ACPI processor UID */ 993 u8 lint; /* LINTn to which NMI is connected */ 994 u8 reserved[3]; /* reserved - must be zero */ 995 }; 996 997 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 998 999 struct acpi_madt_generic_interrupt { 1000 struct acpi_subtable_header header; 1001 u16 reserved; /* reserved - must be zero */ 1002 u32 cpu_interface_number; 1003 u32 uid; 1004 u32 flags; 1005 u32 parking_version; 1006 u32 performance_interrupt; 1007 u64 parked_address; 1008 u64 base_address; 1009 u64 gicv_base_address; 1010 u64 gich_base_address; 1011 u32 vgic_interrupt; 1012 u64 gicr_base_address; 1013 u64 arm_mpidr; 1014 u8 efficiency_class; 1015 u8 reserved2[1]; 1016 u16 spe_interrupt; /* ACPI 6.3 */ 1017 }; 1018 1019 /* Masks for Flags field above */ 1020 1021 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1022 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1023 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1024 1025 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1026 1027 struct acpi_madt_generic_distributor { 1028 struct acpi_subtable_header header; 1029 u16 reserved; /* reserved - must be zero */ 1030 u32 gic_id; 1031 u64 base_address; 1032 u32 global_irq_base; 1033 u8 version; 1034 u8 reserved2[3]; /* reserved - must be zero */ 1035 }; 1036 1037 /* Values for Version field above */ 1038 1039 enum acpi_madt_gic_version { 1040 ACPI_MADT_GIC_VERSION_NONE = 0, 1041 ACPI_MADT_GIC_VERSION_V1 = 1, 1042 ACPI_MADT_GIC_VERSION_V2 = 2, 1043 ACPI_MADT_GIC_VERSION_V3 = 3, 1044 ACPI_MADT_GIC_VERSION_V4 = 4, 1045 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1046 }; 1047 1048 /* 13: Generic MSI Frame (ACPI 5.1) */ 1049 1050 struct acpi_madt_generic_msi_frame { 1051 struct acpi_subtable_header header; 1052 u16 reserved; /* reserved - must be zero */ 1053 u32 msi_frame_id; 1054 u64 base_address; 1055 u32 flags; 1056 u16 spi_count; 1057 u16 spi_base; 1058 }; 1059 1060 /* Masks for Flags field above */ 1061 1062 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1063 1064 /* 14: Generic Redistributor (ACPI 5.1) */ 1065 1066 struct acpi_madt_generic_redistributor { 1067 struct acpi_subtable_header header; 1068 u16 reserved; /* reserved - must be zero */ 1069 u64 base_address; 1070 u32 length; 1071 }; 1072 1073 /* 15: Generic Translator (ACPI 6.0) */ 1074 1075 struct acpi_madt_generic_translator { 1076 struct acpi_subtable_header header; 1077 u16 reserved; /* reserved - must be zero */ 1078 u32 translation_id; 1079 u64 base_address; 1080 u32 reserved2; 1081 }; 1082 1083 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1084 1085 struct acpi_madt_multiproc_wakeup { 1086 struct acpi_subtable_header header; 1087 u16 mailbox_version; 1088 u32 reserved; /* reserved - must be zero */ 1089 u64 base_address; 1090 }; 1091 1092 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1093 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1094 1095 struct acpi_madt_multiproc_wakeup_mailbox { 1096 u16 command; 1097 u16 reserved; /* reserved - must be zero */ 1098 u32 apic_id; 1099 u64 wakeup_vector; 1100 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1101 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1102 }; 1103 1104 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1105 1106 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1107 1108 struct acpi_madt_core_pic { 1109 struct acpi_subtable_header header; 1110 u8 version; 1111 u32 processor_id; 1112 u32 core_id; 1113 u32 flags; 1114 }; 1115 1116 /* Values for Version field above */ 1117 1118 enum acpi_madt_core_pic_version { 1119 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1120 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1121 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1122 }; 1123 1124 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1125 1126 struct acpi_madt_lio_pic { 1127 struct acpi_subtable_header header; 1128 u8 version; 1129 u64 address; 1130 u16 size; 1131 u8 cascade[2]; 1132 u32 cascade_map[2]; 1133 }; 1134 1135 /* Values for Version field above */ 1136 1137 enum acpi_madt_lio_pic_version { 1138 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1139 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1140 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1141 }; 1142 1143 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1144 1145 struct acpi_madt_ht_pic { 1146 struct acpi_subtable_header header; 1147 u8 version; 1148 u64 address; 1149 u16 size; 1150 u8 cascade[8]; 1151 }; 1152 1153 /* Values for Version field above */ 1154 1155 enum acpi_madt_ht_pic_version { 1156 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1157 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1158 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1159 }; 1160 1161 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1162 1163 struct acpi_madt_eio_pic { 1164 struct acpi_subtable_header header; 1165 u8 version; 1166 u8 cascade; 1167 u8 node; 1168 u64 node_map; 1169 }; 1170 1171 /* Values for Version field above */ 1172 1173 enum acpi_madt_eio_pic_version { 1174 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1175 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1176 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1177 }; 1178 1179 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1180 1181 struct acpi_madt_msi_pic { 1182 struct acpi_subtable_header header; 1183 u8 version; 1184 u64 msg_address; 1185 u32 start; 1186 u32 count; 1187 }; 1188 1189 /* Values for Version field above */ 1190 1191 enum acpi_madt_msi_pic_version { 1192 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1193 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1194 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1195 }; 1196 1197 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1198 1199 struct acpi_madt_bio_pic { 1200 struct acpi_subtable_header header; 1201 u8 version; 1202 u64 address; 1203 u16 size; 1204 u16 id; 1205 u16 gsi_base; 1206 }; 1207 1208 /* Values for Version field above */ 1209 1210 enum acpi_madt_bio_pic_version { 1211 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1212 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1213 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1214 }; 1215 1216 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1217 1218 struct acpi_madt_lpc_pic { 1219 struct acpi_subtable_header header; 1220 u8 version; 1221 u64 address; 1222 u16 size; 1223 u8 cascade; 1224 }; 1225 1226 /* Values for Version field above */ 1227 1228 enum acpi_madt_lpc_pic_version { 1229 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1230 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1231 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1232 }; 1233 1234 /* 80: OEM data */ 1235 1236 struct acpi_madt_oem_data { 1237 u8 oem_data[0]; 1238 }; 1239 1240 /* 1241 * Common flags fields for MADT subtables 1242 */ 1243 1244 /* MADT Local APIC flags */ 1245 1246 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1247 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1248 1249 /* MADT MPS INTI flags (inti_flags) */ 1250 1251 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1252 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1253 1254 /* Values for MPS INTI flags */ 1255 1256 #define ACPI_MADT_POLARITY_CONFORMS 0 1257 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1258 #define ACPI_MADT_POLARITY_RESERVED 2 1259 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1260 1261 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1262 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1263 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1264 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1265 1266 /******************************************************************************* 1267 * 1268 * MCFG - PCI Memory Mapped Configuration table and subtable 1269 * Version 1 1270 * 1271 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1272 * 1273 ******************************************************************************/ 1274 1275 struct acpi_table_mcfg { 1276 struct acpi_table_header header; /* Common ACPI table header */ 1277 u8 reserved[8]; 1278 }; 1279 1280 /* Subtable */ 1281 1282 struct acpi_mcfg_allocation { 1283 u64 address; /* Base address, processor-relative */ 1284 u16 pci_segment; /* PCI segment group number */ 1285 u8 start_bus_number; /* Starting PCI Bus number */ 1286 u8 end_bus_number; /* Final PCI Bus number */ 1287 u32 reserved; 1288 }; 1289 1290 /******************************************************************************* 1291 * 1292 * MCHI - Management Controller Host Interface Table 1293 * Version 1 1294 * 1295 * Conforms to "Management Component Transport Protocol (MCTP) Host 1296 * Interface Specification", Revision 1.0.0a, October 13, 2009 1297 * 1298 ******************************************************************************/ 1299 1300 struct acpi_table_mchi { 1301 struct acpi_table_header header; /* Common ACPI table header */ 1302 u8 interface_type; 1303 u8 protocol; 1304 u64 protocol_data; 1305 u8 interrupt_type; 1306 u8 gpe; 1307 u8 pci_device_flag; 1308 u32 global_interrupt; 1309 struct acpi_generic_address control_register; 1310 u8 pci_segment; 1311 u8 pci_bus; 1312 u8 pci_device; 1313 u8 pci_function; 1314 }; 1315 1316 /******************************************************************************* 1317 * 1318 * MPST - Memory Power State Table (ACPI 5.0) 1319 * Version 1 1320 * 1321 ******************************************************************************/ 1322 1323 #define ACPI_MPST_CHANNEL_INFO \ 1324 u8 channel_id; \ 1325 u8 reserved1[3]; \ 1326 u16 power_node_count; \ 1327 u16 reserved2; 1328 1329 /* Main table */ 1330 1331 struct acpi_table_mpst { 1332 struct acpi_table_header header; /* Common ACPI table header */ 1333 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1334 }; 1335 1336 /* Memory Platform Communication Channel Info */ 1337 1338 struct acpi_mpst_channel { 1339 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1340 }; 1341 1342 /* Memory Power Node Structure */ 1343 1344 struct acpi_mpst_power_node { 1345 u8 flags; 1346 u8 reserved1; 1347 u16 node_id; 1348 u32 length; 1349 u64 range_address; 1350 u64 range_length; 1351 u32 num_power_states; 1352 u32 num_physical_components; 1353 }; 1354 1355 /* Values for Flags field above */ 1356 1357 #define ACPI_MPST_ENABLED 1 1358 #define ACPI_MPST_POWER_MANAGED 2 1359 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1360 1361 /* Memory Power State Structure (follows POWER_NODE above) */ 1362 1363 struct acpi_mpst_power_state { 1364 u8 power_state; 1365 u8 info_index; 1366 }; 1367 1368 /* Physical Component ID Structure (follows POWER_STATE above) */ 1369 1370 struct acpi_mpst_component { 1371 u16 component_id; 1372 }; 1373 1374 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1375 1376 struct acpi_mpst_data_hdr { 1377 u16 characteristics_count; 1378 u16 reserved; 1379 }; 1380 1381 struct acpi_mpst_power_data { 1382 u8 structure_id; 1383 u8 flags; 1384 u16 reserved1; 1385 u32 average_power; 1386 u32 power_saving; 1387 u64 exit_latency; 1388 u64 reserved2; 1389 }; 1390 1391 /* Values for Flags field above */ 1392 1393 #define ACPI_MPST_PRESERVE 1 1394 #define ACPI_MPST_AUTOENTRY 2 1395 #define ACPI_MPST_AUTOEXIT 4 1396 1397 /* Shared Memory Region (not part of an ACPI table) */ 1398 1399 struct acpi_mpst_shared { 1400 u32 signature; 1401 u16 pcc_command; 1402 u16 pcc_status; 1403 u32 command_register; 1404 u32 status_register; 1405 u32 power_state_id; 1406 u32 power_node_id; 1407 u64 energy_consumed; 1408 u64 average_power; 1409 }; 1410 1411 /******************************************************************************* 1412 * 1413 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1414 * Version 1 1415 * 1416 ******************************************************************************/ 1417 1418 struct acpi_table_msct { 1419 struct acpi_table_header header; /* Common ACPI table header */ 1420 u32 proximity_offset; /* Location of proximity info struct(s) */ 1421 u32 max_proximity_domains; /* Max number of proximity domains */ 1422 u32 max_clock_domains; /* Max number of clock domains */ 1423 u64 max_address; /* Max physical address in system */ 1424 }; 1425 1426 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1427 1428 struct acpi_msct_proximity { 1429 u8 revision; 1430 u8 length; 1431 u32 range_start; /* Start of domain range */ 1432 u32 range_end; /* End of domain range */ 1433 u32 processor_capacity; 1434 u64 memory_capacity; /* In bytes */ 1435 }; 1436 1437 /******************************************************************************* 1438 * 1439 * MSDM - Microsoft Data Management table 1440 * 1441 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1442 * November 29, 2011. Copyright 2011 Microsoft 1443 * 1444 ******************************************************************************/ 1445 1446 /* Basic MSDM table is only the common ACPI header */ 1447 1448 struct acpi_table_msdm { 1449 struct acpi_table_header header; /* Common ACPI table header */ 1450 }; 1451 1452 /******************************************************************************* 1453 * 1454 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1455 * Version 1 1456 * 1457 ******************************************************************************/ 1458 1459 struct acpi_table_nfit { 1460 struct acpi_table_header header; /* Common ACPI table header */ 1461 u32 reserved; /* Reserved, must be zero */ 1462 }; 1463 1464 /* Subtable header for NFIT */ 1465 1466 struct acpi_nfit_header { 1467 u16 type; 1468 u16 length; 1469 }; 1470 1471 /* Values for subtable type in struct acpi_nfit_header */ 1472 1473 enum acpi_nfit_type { 1474 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1475 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1476 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1477 ACPI_NFIT_TYPE_SMBIOS = 3, 1478 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1479 ACPI_NFIT_TYPE_DATA_REGION = 5, 1480 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1481 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1482 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1483 }; 1484 1485 /* 1486 * NFIT Subtables 1487 */ 1488 1489 /* 0: System Physical Address Range Structure */ 1490 1491 struct acpi_nfit_system_address { 1492 struct acpi_nfit_header header; 1493 u16 range_index; 1494 u16 flags; 1495 u32 reserved; /* Reserved, must be zero */ 1496 u32 proximity_domain; 1497 u8 range_guid[16]; 1498 u64 address; 1499 u64 length; 1500 u64 memory_mapping; 1501 u64 location_cookie; /* ACPI 6.4 */ 1502 }; 1503 1504 /* Flags */ 1505 1506 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1507 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1508 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1509 1510 /* Range Type GUIDs appear in the include/acuuid.h file */ 1511 1512 /* 1: Memory Device to System Address Range Map Structure */ 1513 1514 struct acpi_nfit_memory_map { 1515 struct acpi_nfit_header header; 1516 u32 device_handle; 1517 u16 physical_id; 1518 u16 region_id; 1519 u16 range_index; 1520 u16 region_index; 1521 u64 region_size; 1522 u64 region_offset; 1523 u64 address; 1524 u16 interleave_index; 1525 u16 interleave_ways; 1526 u16 flags; 1527 u16 reserved; /* Reserved, must be zero */ 1528 }; 1529 1530 /* Flags */ 1531 1532 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1533 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1534 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1535 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1536 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1537 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1538 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1539 1540 /* 2: Interleave Structure */ 1541 1542 struct acpi_nfit_interleave { 1543 struct acpi_nfit_header header; 1544 u16 interleave_index; 1545 u16 reserved; /* Reserved, must be zero */ 1546 u32 line_count; 1547 u32 line_size; 1548 u32 line_offset[1]; /* Variable length */ 1549 }; 1550 1551 /* 3: SMBIOS Management Information Structure */ 1552 1553 struct acpi_nfit_smbios { 1554 struct acpi_nfit_header header; 1555 u32 reserved; /* Reserved, must be zero */ 1556 u8 data[1]; /* Variable length */ 1557 }; 1558 1559 /* 4: NVDIMM Control Region Structure */ 1560 1561 struct acpi_nfit_control_region { 1562 struct acpi_nfit_header header; 1563 u16 region_index; 1564 u16 vendor_id; 1565 u16 device_id; 1566 u16 revision_id; 1567 u16 subsystem_vendor_id; 1568 u16 subsystem_device_id; 1569 u16 subsystem_revision_id; 1570 u8 valid_fields; 1571 u8 manufacturing_location; 1572 u16 manufacturing_date; 1573 u8 reserved[2]; /* Reserved, must be zero */ 1574 u32 serial_number; 1575 u16 code; 1576 u16 windows; 1577 u64 window_size; 1578 u64 command_offset; 1579 u64 command_size; 1580 u64 status_offset; 1581 u64 status_size; 1582 u16 flags; 1583 u8 reserved1[6]; /* Reserved, must be zero */ 1584 }; 1585 1586 /* Flags */ 1587 1588 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1589 1590 /* valid_fields bits */ 1591 1592 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1593 1594 /* 5: NVDIMM Block Data Window Region Structure */ 1595 1596 struct acpi_nfit_data_region { 1597 struct acpi_nfit_header header; 1598 u16 region_index; 1599 u16 windows; 1600 u64 offset; 1601 u64 size; 1602 u64 capacity; 1603 u64 start_address; 1604 }; 1605 1606 /* 6: Flush Hint Address Structure */ 1607 1608 struct acpi_nfit_flush_address { 1609 struct acpi_nfit_header header; 1610 u32 device_handle; 1611 u16 hint_count; 1612 u8 reserved[6]; /* Reserved, must be zero */ 1613 u64 hint_address[1]; /* Variable length */ 1614 }; 1615 1616 /* 7: Platform Capabilities Structure */ 1617 1618 struct acpi_nfit_capabilities { 1619 struct acpi_nfit_header header; 1620 u8 highest_capability; 1621 u8 reserved[3]; /* Reserved, must be zero */ 1622 u32 capabilities; 1623 u32 reserved2; 1624 }; 1625 1626 /* Capabilities Flags */ 1627 1628 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1629 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1630 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1631 1632 /* 1633 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1634 */ 1635 struct nfit_device_handle { 1636 u32 handle; 1637 }; 1638 1639 /* Device handle construction and extraction macros */ 1640 1641 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1642 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1643 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1644 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1645 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1646 1647 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1648 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1649 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1650 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1651 #define ACPI_NFIT_NODE_ID_OFFSET 16 1652 1653 /* Macro to construct a NFIT/NVDIMM device handle */ 1654 1655 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1656 ((dimm) | \ 1657 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1658 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1659 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1660 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1661 1662 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1663 1664 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1665 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1666 1667 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1668 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1669 1670 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1671 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1672 1673 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1674 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1675 1676 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1677 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1678 1679 /******************************************************************************* 1680 * 1681 * NHLT - Non HD Audio Link Table 1682 * 1683 * Conforms to: Intel Smart Sound Technology NHLT Specification 1684 * Version 0.8.1, January 2020. 1685 * 1686 ******************************************************************************/ 1687 1688 /* Main table */ 1689 1690 struct acpi_table_nhlt { 1691 struct acpi_table_header header; /* Common ACPI table header */ 1692 u8 endpoint_count; 1693 }; 1694 1695 struct acpi_nhlt_endpoint { 1696 u32 descriptor_length; 1697 u8 link_type; 1698 u8 instance_id; 1699 u16 vendor_id; 1700 u16 device_id; 1701 u16 revision_id; 1702 u32 subsystem_id; 1703 u8 device_type; 1704 u8 direction; 1705 u8 virtual_bus_id; 1706 }; 1707 1708 /* Types for link_type field above */ 1709 1710 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1711 #define ACPI_NHLT_RESERVED_DSP 1 1712 #define ACPI_NHLT_PDM 2 1713 #define ACPI_NHLT_SSP 3 1714 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1715 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1716 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1717 1718 /* All other values above are reserved */ 1719 1720 /* Values for device_id field above */ 1721 1722 #define ACPI_NHLT_PDM_DMIC 0xAE20 1723 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1724 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1725 1726 /* Values for device_type field above */ 1727 1728 /* SSP Link */ 1729 1730 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1731 #define ACPI_NHLT_LINK_FM 1 1732 #define ACPI_NHLT_LINK_MODEM 2 1733 /* 3 is reserved */ 1734 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1735 1736 /* PDM Link */ 1737 1738 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1739 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1740 1741 /* Values for Direction field above */ 1742 1743 #define ACPI_NHLT_DIR_RENDER 0 1744 #define ACPI_NHLT_DIR_CAPTURE 1 1745 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1746 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1747 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1748 1749 struct acpi_nhlt_device_specific_config { 1750 u32 capabilities_size; 1751 u8 virtual_slot; 1752 u8 config_type; 1753 }; 1754 1755 struct acpi_nhlt_device_specific_config_a { 1756 u32 capabilities_size; 1757 u8 virtual_slot; 1758 u8 config_type; 1759 u8 array_type; 1760 }; 1761 1762 /* Values for Config Type above */ 1763 1764 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1765 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1766 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1767 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1768 1769 struct acpi_nhlt_device_specific_config_b { 1770 u32 capabilities_size; 1771 }; 1772 1773 struct acpi_nhlt_device_specific_config_c { 1774 u32 capabilities_size; 1775 u8 virtual_slot; 1776 }; 1777 1778 struct acpi_nhlt_render_device_specific_config { 1779 u32 capabilities_size; 1780 u8 virtual_slot; 1781 }; 1782 1783 struct acpi_nhlt_wave_extensible { 1784 u16 format_tag; 1785 u16 channel_count; 1786 u32 samples_per_sec; 1787 u32 avg_bytes_per_sec; 1788 u16 block_align; 1789 u16 bits_per_sample; 1790 u16 extra_format_size; 1791 u16 valid_bits_per_sample; 1792 u32 channel_mask; 1793 u8 sub_format_guid[16]; 1794 }; 1795 1796 /* Values for channel_mask above */ 1797 1798 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1799 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1800 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1801 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1802 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1803 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1804 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1805 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1806 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1807 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1808 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1809 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1810 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1811 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1812 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1813 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1814 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1815 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1816 1817 struct acpi_nhlt_format_config { 1818 struct acpi_nhlt_wave_extensible format; 1819 u32 capability_size; 1820 u8 capabilities[]; 1821 }; 1822 1823 struct acpi_nhlt_formats_config { 1824 u8 formats_count; 1825 }; 1826 1827 struct acpi_nhlt_device_specific_hdr { 1828 u8 virtual_slot; 1829 u8 config_type; 1830 }; 1831 1832 /* Types for config_type above */ 1833 1834 #define ACPI_NHLT_GENERIC 0 1835 #define ACPI_NHLT_MIC 1 1836 #define ACPI_NHLT_RENDER 3 1837 1838 struct acpi_nhlt_mic_device_specific_config { 1839 struct acpi_nhlt_device_specific_hdr device_config; 1840 u8 array_type_ext; 1841 }; 1842 1843 /* Values for array_type_ext above */ 1844 1845 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 1846 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 1847 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 1848 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1849 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 1850 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1851 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 1852 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 1853 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 1854 1855 #define ACPI_NHLT_NO_EXTENSION 0x0 1856 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 1857 1858 struct acpi_nhlt_vendor_mic_count { 1859 u8 microphone_count; 1860 }; 1861 1862 struct acpi_nhlt_vendor_mic_config { 1863 u8 type; 1864 u8 panel; 1865 u16 speaker_position_distance; /* mm */ 1866 u16 horizontal_offset; /* mm */ 1867 u16 vertical_offset; /* mm */ 1868 u8 frequency_low_band; /* 5*Hz */ 1869 u8 frequency_high_band; /* 500*Hz */ 1870 u16 direction_angle; /* -180 - + 180 */ 1871 u16 elevation_angle; /* -180 - + 180 */ 1872 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */ 1873 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */ 1874 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */ 1875 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */ 1876 }; 1877 1878 /* Values for Type field above */ 1879 1880 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 1881 #define ACPI_NHLT_MIC_SUBCARDIOID 1 1882 #define ACPI_NHLT_MIC_CARDIOID 2 1883 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 1884 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 1885 #define ACPI_NHLT_MIC_8_SHAPED 5 1886 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 1887 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 1888 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 1889 1890 /* Values for Panel field above */ 1891 1892 #define ACPI_NHLT_MIC_POSITION_TOP 0 1893 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 1894 #define ACPI_NHLT_MIC_POSITION_LEFT 2 1895 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 1896 #define ACPI_NHLT_MIC_POSITION_FRONT 4 1897 #define ACPI_NHLT_MIC_POSITION_BACK 5 1898 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 1899 1900 struct acpi_nhlt_vendor_mic_device_specific_config { 1901 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 1902 u8 number_of_microphones; 1903 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */ 1904 }; 1905 1906 /* Microphone SNR and Sensitivity extension */ 1907 1908 struct acpi_nhlt_mic_snr_sensitivity_extension { 1909 u32 SNR; 1910 u32 sensitivity; 1911 }; 1912 1913 /* Render device with feedback */ 1914 1915 struct acpi_nhlt_render_feedback_device_specific_config { 1916 u8 feedback_virtual_slot; /* Render slot in case of capture */ 1917 u16 feedback_channels; /* Informative only */ 1918 u16 feedback_valid_bits_per_sample; 1919 }; 1920 1921 /* Non documented structures */ 1922 1923 struct acpi_nhlt_device_info_count { 1924 u8 structure_count; 1925 }; 1926 1927 struct acpi_nhlt_device_info { 1928 u8 device_id[16]; 1929 u8 device_instance_id; 1930 u8 device_port_id; 1931 }; 1932 1933 /******************************************************************************* 1934 * 1935 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1936 * Version 2 (ACPI 6.2) 1937 * 1938 ******************************************************************************/ 1939 1940 struct acpi_table_pcct { 1941 struct acpi_table_header header; /* Common ACPI table header */ 1942 u32 flags; 1943 u64 reserved; 1944 }; 1945 1946 /* Values for Flags field above */ 1947 1948 #define ACPI_PCCT_DOORBELL 1 1949 1950 /* Values for subtable type in struct acpi_subtable_header */ 1951 1952 enum acpi_pcct_type { 1953 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1954 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1955 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1956 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1957 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1958 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1959 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1960 }; 1961 1962 /* 1963 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1964 */ 1965 1966 /* 0: Generic Communications Subspace */ 1967 1968 struct acpi_pcct_subspace { 1969 struct acpi_subtable_header header; 1970 u8 reserved[6]; 1971 u64 base_address; 1972 u64 length; 1973 struct acpi_generic_address doorbell_register; 1974 u64 preserve_mask; 1975 u64 write_mask; 1976 u32 latency; 1977 u32 max_access_rate; 1978 u16 min_turnaround_time; 1979 }; 1980 1981 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1982 1983 struct acpi_pcct_hw_reduced { 1984 struct acpi_subtable_header header; 1985 u32 platform_interrupt; 1986 u8 flags; 1987 u8 reserved; 1988 u64 base_address; 1989 u64 length; 1990 struct acpi_generic_address doorbell_register; 1991 u64 preserve_mask; 1992 u64 write_mask; 1993 u32 latency; 1994 u32 max_access_rate; 1995 u16 min_turnaround_time; 1996 }; 1997 1998 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1999 2000 struct acpi_pcct_hw_reduced_type2 { 2001 struct acpi_subtable_header header; 2002 u32 platform_interrupt; 2003 u8 flags; 2004 u8 reserved; 2005 u64 base_address; 2006 u64 length; 2007 struct acpi_generic_address doorbell_register; 2008 u64 preserve_mask; 2009 u64 write_mask; 2010 u32 latency; 2011 u32 max_access_rate; 2012 u16 min_turnaround_time; 2013 struct acpi_generic_address platform_ack_register; 2014 u64 ack_preserve_mask; 2015 u64 ack_write_mask; 2016 }; 2017 2018 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2019 2020 struct acpi_pcct_ext_pcc_master { 2021 struct acpi_subtable_header header; 2022 u32 platform_interrupt; 2023 u8 flags; 2024 u8 reserved1; 2025 u64 base_address; 2026 u32 length; 2027 struct acpi_generic_address doorbell_register; 2028 u64 preserve_mask; 2029 u64 write_mask; 2030 u32 latency; 2031 u32 max_access_rate; 2032 u32 min_turnaround_time; 2033 struct acpi_generic_address platform_ack_register; 2034 u64 ack_preserve_mask; 2035 u64 ack_set_mask; 2036 u64 reserved2; 2037 struct acpi_generic_address cmd_complete_register; 2038 u64 cmd_complete_mask; 2039 struct acpi_generic_address cmd_update_register; 2040 u64 cmd_update_preserve_mask; 2041 u64 cmd_update_set_mask; 2042 struct acpi_generic_address error_status_register; 2043 u64 error_status_mask; 2044 }; 2045 2046 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2047 2048 struct acpi_pcct_ext_pcc_slave { 2049 struct acpi_subtable_header header; 2050 u32 platform_interrupt; 2051 u8 flags; 2052 u8 reserved1; 2053 u64 base_address; 2054 u32 length; 2055 struct acpi_generic_address doorbell_register; 2056 u64 preserve_mask; 2057 u64 write_mask; 2058 u32 latency; 2059 u32 max_access_rate; 2060 u32 min_turnaround_time; 2061 struct acpi_generic_address platform_ack_register; 2062 u64 ack_preserve_mask; 2063 u64 ack_set_mask; 2064 u64 reserved2; 2065 struct acpi_generic_address cmd_complete_register; 2066 u64 cmd_complete_mask; 2067 struct acpi_generic_address cmd_update_register; 2068 u64 cmd_update_preserve_mask; 2069 u64 cmd_update_set_mask; 2070 struct acpi_generic_address error_status_register; 2071 u64 error_status_mask; 2072 }; 2073 2074 /* 5: HW Registers based Communications Subspace */ 2075 2076 struct acpi_pcct_hw_reg { 2077 struct acpi_subtable_header header; 2078 u16 version; 2079 u64 base_address; 2080 u64 length; 2081 struct acpi_generic_address doorbell_register; 2082 u64 doorbell_preserve; 2083 u64 doorbell_write; 2084 struct acpi_generic_address cmd_complete_register; 2085 u64 cmd_complete_mask; 2086 struct acpi_generic_address error_status_register; 2087 u64 error_status_mask; 2088 u32 nominal_latency; 2089 u32 min_turnaround_time; 2090 }; 2091 2092 /* Values for doorbell flags above */ 2093 2094 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2095 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2096 2097 /* 2098 * PCC memory structures (not part of the ACPI table) 2099 */ 2100 2101 /* Shared Memory Region */ 2102 2103 struct acpi_pcct_shared_memory { 2104 u32 signature; 2105 u16 command; 2106 u16 status; 2107 }; 2108 2109 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2110 2111 struct acpi_pcct_ext_pcc_shared_memory { 2112 u32 signature; 2113 u32 flags; 2114 u32 length; 2115 u32 command; 2116 }; 2117 2118 /******************************************************************************* 2119 * 2120 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2121 * Version 0 2122 * 2123 ******************************************************************************/ 2124 2125 struct acpi_table_pdtt { 2126 struct acpi_table_header header; /* Common ACPI table header */ 2127 u8 trigger_count; 2128 u8 reserved[3]; 2129 u32 array_offset; 2130 }; 2131 2132 /* 2133 * PDTT Communication Channel Identifier Structure. 2134 * The number of these structures is defined by trigger_count above, 2135 * starting at array_offset. 2136 */ 2137 struct acpi_pdtt_channel { 2138 u8 subchannel_id; 2139 u8 flags; 2140 }; 2141 2142 /* Flags for above */ 2143 2144 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2145 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2146 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2147 2148 /******************************************************************************* 2149 * 2150 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2151 * Version 1 2152 * 2153 ******************************************************************************/ 2154 2155 struct acpi_table_phat { 2156 struct acpi_table_header header; /* Common ACPI table header */ 2157 }; 2158 2159 /* Common header for PHAT subtables that follow main table */ 2160 2161 struct acpi_phat_header { 2162 u16 type; 2163 u16 length; 2164 u8 revision; 2165 }; 2166 2167 /* Values for Type field above */ 2168 2169 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2170 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2171 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2172 2173 /* 2174 * PHAT subtables, correspond to Type in struct acpi_phat_header 2175 */ 2176 2177 /* 0: Firmware Version Data Record */ 2178 2179 struct acpi_phat_version_data { 2180 struct acpi_phat_header header; 2181 u8 reserved[3]; 2182 u32 element_count; 2183 }; 2184 2185 struct acpi_phat_version_element { 2186 u8 guid[16]; 2187 u64 version_value; 2188 u32 producer_id; 2189 }; 2190 2191 /* 1: Firmware Health Data Record */ 2192 2193 struct acpi_phat_health_data { 2194 struct acpi_phat_header header; 2195 u8 reserved[2]; 2196 u8 health; 2197 u8 device_guid[16]; 2198 u32 device_specific_offset; /* Zero if no Device-specific data */ 2199 }; 2200 2201 /* Values for Health field above */ 2202 2203 #define ACPI_PHAT_ERRORS_FOUND 0 2204 #define ACPI_PHAT_NO_ERRORS 1 2205 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2206 #define ACPI_PHAT_ADVISORY 3 2207 2208 /******************************************************************************* 2209 * 2210 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2211 * Version 1 2212 * 2213 ******************************************************************************/ 2214 2215 struct acpi_table_pmtt { 2216 struct acpi_table_header header; /* Common ACPI table header */ 2217 u32 memory_device_count; 2218 /* 2219 * Immediately followed by: 2220 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2221 */ 2222 }; 2223 2224 /* Common header for PMTT subtables that follow main table */ 2225 2226 struct acpi_pmtt_header { 2227 u8 type; 2228 u8 reserved1; 2229 u16 length; 2230 u16 flags; 2231 u16 reserved2; 2232 u32 memory_device_count; /* Zero means no memory device structs follow */ 2233 /* 2234 * Immediately followed by: 2235 * u8 type_specific_data[] 2236 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2237 */ 2238 }; 2239 2240 /* Values for Type field above */ 2241 2242 #define ACPI_PMTT_TYPE_SOCKET 0 2243 #define ACPI_PMTT_TYPE_CONTROLLER 1 2244 #define ACPI_PMTT_TYPE_DIMM 2 2245 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2246 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2247 2248 /* Values for Flags field above */ 2249 2250 #define ACPI_PMTT_TOP_LEVEL 0x0001 2251 #define ACPI_PMTT_PHYSICAL 0x0002 2252 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2253 2254 /* 2255 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2256 */ 2257 2258 /* 0: Socket Structure */ 2259 2260 struct acpi_pmtt_socket { 2261 struct acpi_pmtt_header header; 2262 u16 socket_id; 2263 u16 reserved; 2264 }; 2265 /* 2266 * Immediately followed by: 2267 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2268 */ 2269 2270 /* 1: Memory Controller subtable */ 2271 2272 struct acpi_pmtt_controller { 2273 struct acpi_pmtt_header header; 2274 u16 controller_id; 2275 u16 reserved; 2276 }; 2277 /* 2278 * Immediately followed by: 2279 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2280 */ 2281 2282 /* 2: Physical Component Identifier (DIMM) */ 2283 2284 struct acpi_pmtt_physical_component { 2285 struct acpi_pmtt_header header; 2286 u32 bios_handle; 2287 }; 2288 2289 /* 0xFF: Vendor Specific Data */ 2290 2291 struct acpi_pmtt_vendor_specific { 2292 struct acpi_pmtt_header header; 2293 u8 type_uuid[16]; 2294 u8 specific[]; 2295 /* 2296 * Immediately followed by: 2297 * u8 vendor_specific_data[]; 2298 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2299 */ 2300 }; 2301 2302 /******************************************************************************* 2303 * 2304 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2305 * Version 1 2306 * 2307 ******************************************************************************/ 2308 2309 struct acpi_table_pptt { 2310 struct acpi_table_header header; /* Common ACPI table header */ 2311 }; 2312 2313 /* Values for Type field above */ 2314 2315 enum acpi_pptt_type { 2316 ACPI_PPTT_TYPE_PROCESSOR = 0, 2317 ACPI_PPTT_TYPE_CACHE = 1, 2318 ACPI_PPTT_TYPE_ID = 2, 2319 ACPI_PPTT_TYPE_RESERVED = 3 2320 }; 2321 2322 /* 0: Processor Hierarchy Node Structure */ 2323 2324 struct acpi_pptt_processor { 2325 struct acpi_subtable_header header; 2326 u16 reserved; 2327 u32 flags; 2328 u32 parent; 2329 u32 acpi_processor_id; 2330 u32 number_of_priv_resources; 2331 }; 2332 2333 /* Flags */ 2334 2335 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2336 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2337 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2338 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2339 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2340 2341 /* 1: Cache Type Structure */ 2342 2343 struct acpi_pptt_cache { 2344 struct acpi_subtable_header header; 2345 u16 reserved; 2346 u32 flags; 2347 u32 next_level_of_cache; 2348 u32 size; 2349 u32 number_of_sets; 2350 u8 associativity; 2351 u8 attributes; 2352 u16 line_size; 2353 }; 2354 2355 /* 1: Cache Type Structure for PPTT version 3 */ 2356 2357 struct acpi_pptt_cache_v1 { 2358 u32 cache_id; 2359 }; 2360 2361 /* Flags */ 2362 2363 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2364 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2365 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2366 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2367 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2368 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2369 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2370 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2371 2372 /* Masks for Attributes */ 2373 2374 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2375 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2376 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2377 2378 /* Attributes describing cache */ 2379 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2380 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2381 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2382 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2383 2384 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2385 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2386 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2387 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2388 2389 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2390 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2391 2392 /* 2: ID Structure */ 2393 2394 struct acpi_pptt_id { 2395 struct acpi_subtable_header header; 2396 u16 reserved; 2397 u32 vendor_id; 2398 u64 level1_id; 2399 u64 level2_id; 2400 u16 major_rev; 2401 u16 minor_rev; 2402 u16 spin_rev; 2403 }; 2404 2405 /******************************************************************************* 2406 * 2407 * PRMT - Platform Runtime Mechanism Table 2408 * Version 1 2409 * 2410 ******************************************************************************/ 2411 2412 struct acpi_table_prmt { 2413 struct acpi_table_header header; /* Common ACPI table header */ 2414 }; 2415 2416 struct acpi_table_prmt_header { 2417 u8 platform_guid[16]; 2418 u32 module_info_offset; 2419 u32 module_info_count; 2420 }; 2421 2422 struct acpi_prmt_module_header { 2423 u16 revision; 2424 u16 length; 2425 }; 2426 2427 struct acpi_prmt_module_info { 2428 u16 revision; 2429 u16 length; 2430 u8 module_guid[16]; 2431 u16 major_rev; 2432 u16 minor_rev; 2433 u16 handler_info_count; 2434 u32 handler_info_offset; 2435 u64 mmio_list_pointer; 2436 }; 2437 2438 struct acpi_prmt_handler_info { 2439 u16 revision; 2440 u16 length; 2441 u8 handler_guid[16]; 2442 u64 handler_address; 2443 u64 static_data_buffer_address; 2444 u64 acpi_param_buffer_address; 2445 }; 2446 2447 /******************************************************************************* 2448 * 2449 * RASF - RAS Feature Table (ACPI 5.0) 2450 * Version 1 2451 * 2452 ******************************************************************************/ 2453 2454 struct acpi_table_rasf { 2455 struct acpi_table_header header; /* Common ACPI table header */ 2456 u8 channel_id[12]; 2457 }; 2458 2459 /* RASF Platform Communication Channel Shared Memory Region */ 2460 2461 struct acpi_rasf_shared_memory { 2462 u32 signature; 2463 u16 command; 2464 u16 status; 2465 u16 version; 2466 u8 capabilities[16]; 2467 u8 set_capabilities[16]; 2468 u16 num_parameter_blocks; 2469 u32 set_capabilities_status; 2470 }; 2471 2472 /* RASF Parameter Block Structure Header */ 2473 2474 struct acpi_rasf_parameter_block { 2475 u16 type; 2476 u16 version; 2477 u16 length; 2478 }; 2479 2480 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2481 2482 struct acpi_rasf_patrol_scrub_parameter { 2483 struct acpi_rasf_parameter_block header; 2484 u16 patrol_scrub_command; 2485 u64 requested_address_range[2]; 2486 u64 actual_address_range[2]; 2487 u16 flags; 2488 u8 requested_speed; 2489 }; 2490 2491 /* Masks for Flags and Speed fields above */ 2492 2493 #define ACPI_RASF_SCRUBBER_RUNNING 1 2494 #define ACPI_RASF_SPEED (7<<1) 2495 #define ACPI_RASF_SPEED_SLOW (0<<1) 2496 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2497 #define ACPI_RASF_SPEED_FAST (7<<1) 2498 2499 /* Channel Commands */ 2500 2501 enum acpi_rasf_commands { 2502 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2503 }; 2504 2505 /* Platform RAS Capabilities */ 2506 2507 enum acpi_rasf_capabiliities { 2508 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2509 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2510 }; 2511 2512 /* Patrol Scrub Commands */ 2513 2514 enum acpi_rasf_patrol_scrub_commands { 2515 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2516 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2517 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2518 }; 2519 2520 /* Channel Command flags */ 2521 2522 #define ACPI_RASF_GENERATE_SCI (1<<15) 2523 2524 /* Status values */ 2525 2526 enum acpi_rasf_status { 2527 ACPI_RASF_SUCCESS = 0, 2528 ACPI_RASF_NOT_VALID = 1, 2529 ACPI_RASF_NOT_SUPPORTED = 2, 2530 ACPI_RASF_BUSY = 3, 2531 ACPI_RASF_FAILED = 4, 2532 ACPI_RASF_ABORTED = 5, 2533 ACPI_RASF_INVALID_DATA = 6 2534 }; 2535 2536 /* Status flags */ 2537 2538 #define ACPI_RASF_COMMAND_COMPLETE (1) 2539 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2540 #define ACPI_RASF_ERROR (1<<2) 2541 #define ACPI_RASF_STATUS (0x1F<<3) 2542 2543 /******************************************************************************* 2544 * 2545 * RGRT - Regulatory Graphics Resource Table 2546 * Version 1 2547 * 2548 * Conforms to "ACPI RGRT" available at: 2549 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2550 * 2551 ******************************************************************************/ 2552 2553 struct acpi_table_rgrt { 2554 struct acpi_table_header header; /* Common ACPI table header */ 2555 u16 version; 2556 u8 image_type; 2557 u8 reserved; 2558 u8 image[]; 2559 }; 2560 2561 /* image_type values */ 2562 2563 enum acpi_rgrt_image_type { 2564 ACPI_RGRT_TYPE_RESERVED0 = 0, 2565 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2566 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2567 }; 2568 2569 /******************************************************************************* 2570 * 2571 * SBST - Smart Battery Specification Table 2572 * Version 1 2573 * 2574 ******************************************************************************/ 2575 2576 struct acpi_table_sbst { 2577 struct acpi_table_header header; /* Common ACPI table header */ 2578 u32 warning_level; 2579 u32 low_level; 2580 u32 critical_level; 2581 }; 2582 2583 /******************************************************************************* 2584 * 2585 * SDEI - Software Delegated Exception Interface Descriptor Table 2586 * 2587 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2588 * May 8th, 2017. Copyright 2017 ARM Ltd. 2589 * 2590 ******************************************************************************/ 2591 2592 struct acpi_table_sdei { 2593 struct acpi_table_header header; /* Common ACPI table header */ 2594 }; 2595 2596 /******************************************************************************* 2597 * 2598 * SDEV - Secure Devices Table (ACPI 6.2) 2599 * Version 1 2600 * 2601 ******************************************************************************/ 2602 2603 struct acpi_table_sdev { 2604 struct acpi_table_header header; /* Common ACPI table header */ 2605 }; 2606 2607 struct acpi_sdev_header { 2608 u8 type; 2609 u8 flags; 2610 u16 length; 2611 }; 2612 2613 /* Values for subtable type above */ 2614 2615 enum acpi_sdev_type { 2616 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2617 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2618 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2619 }; 2620 2621 /* Values for flags above */ 2622 2623 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2624 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2625 2626 /* 2627 * SDEV subtables 2628 */ 2629 2630 /* 0: Namespace Device Based Secure Device Structure */ 2631 2632 struct acpi_sdev_namespace { 2633 struct acpi_sdev_header header; 2634 u16 device_id_offset; 2635 u16 device_id_length; 2636 u16 vendor_data_offset; 2637 u16 vendor_data_length; 2638 }; 2639 2640 struct acpi_sdev_secure_component { 2641 u16 secure_component_offset; 2642 u16 secure_component_length; 2643 }; 2644 2645 /* 2646 * SDEV sub-subtables ("Components") for above 2647 */ 2648 struct acpi_sdev_component { 2649 struct acpi_sdev_header header; 2650 }; 2651 2652 /* Values for sub-subtable type above */ 2653 2654 enum acpi_sac_type { 2655 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2656 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2657 }; 2658 2659 struct acpi_sdev_id_component { 2660 struct acpi_sdev_header header; 2661 u16 hardware_id_offset; 2662 u16 hardware_id_length; 2663 u16 subsystem_id_offset; 2664 u16 subsystem_id_length; 2665 u16 hardware_revision; 2666 u8 hardware_rev_present; 2667 u8 class_code_present; 2668 u8 pci_base_class; 2669 u8 pci_sub_class; 2670 u8 pci_programming_xface; 2671 }; 2672 2673 struct acpi_sdev_mem_component { 2674 struct acpi_sdev_header header; 2675 u32 reserved; 2676 u64 memory_base_address; 2677 u64 memory_length; 2678 }; 2679 2680 /* 1: PCIe Endpoint Device Based Device Structure */ 2681 2682 struct acpi_sdev_pcie { 2683 struct acpi_sdev_header header; 2684 u16 segment; 2685 u16 start_bus; 2686 u16 path_offset; 2687 u16 path_length; 2688 u16 vendor_data_offset; 2689 u16 vendor_data_length; 2690 }; 2691 2692 /* 1a: PCIe Endpoint path entry */ 2693 2694 struct acpi_sdev_pcie_path { 2695 u8 device; 2696 u8 function; 2697 }; 2698 2699 /******************************************************************************* 2700 * 2701 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2702 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2703 * Trust Domain Extensions (Intel TDX)". 2704 * Version 1 2705 * 2706 ******************************************************************************/ 2707 2708 struct acpi_table_svkl { 2709 struct acpi_table_header header; /* Common ACPI table header */ 2710 u32 count; 2711 }; 2712 2713 struct acpi_svkl_key { 2714 u16 type; 2715 u16 format; 2716 u32 size; 2717 u64 address; 2718 }; 2719 2720 enum acpi_svkl_type { 2721 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2722 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2723 }; 2724 2725 enum acpi_svkl_format { 2726 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2727 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2728 }; 2729 2730 /******************************************************************************* 2731 * 2732 * TDEL - TD-Event Log 2733 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2734 * Trust Domain Extensions (Intel TDX)". 2735 * September 2020 2736 * 2737 ******************************************************************************/ 2738 2739 struct acpi_table_tdel { 2740 struct acpi_table_header header; /* Common ACPI table header */ 2741 u32 reserved; 2742 u64 log_area_minimum_length; 2743 u64 log_area_start_address; 2744 }; 2745 2746 /* Reset to default packing */ 2747 2748 #pragma pack() 2749 2750 #endif /* __ACTBL2_H__ */ 2751