1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2022, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 31 #define ACPI_SIG_CDAT "CDAT" /* Coherent Device Attribute Table */ 32 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 33 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 34 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 35 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 36 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 37 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 38 #define ACPI_SIG_MPAM "MPAM" /* Memory System Resource Partitioning and Monitoring Table */ 39 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 40 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 41 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 42 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 43 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 44 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 45 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 46 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 47 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 48 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 49 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 50 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 51 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 52 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 53 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 54 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 55 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 56 57 /* 58 * All tables must be byte-packed to match the ACPI specification, since 59 * the tables are provided by the system BIOS. 60 */ 61 #pragma pack(1) 62 63 /* 64 * Note: C bitfields are not used for this reason: 65 * 66 * "Bitfields are great and easy to read, but unfortunately the C language 67 * does not specify the layout of bitfields in memory, which means they are 68 * essentially useless for dealing with packed data in on-disk formats or 69 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 70 * this decision was a design error in C. Ritchie could have picked an order 71 * and stuck with it." Norman Ramsey. 72 * See http://stackoverflow.com/a/1053662/41661 73 */ 74 75 /******************************************************************************* 76 * 77 * AEST - Arm Error Source Table 78 * 79 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 80 * September 2020. 81 * 82 ******************************************************************************/ 83 84 struct acpi_table_aest { 85 struct acpi_table_header header; 86 }; 87 88 /* Common Subtable header - one per Node Structure (Subtable) */ 89 90 struct acpi_aest_hdr { 91 u8 type; 92 u16 length; 93 u8 reserved; 94 u32 node_specific_offset; 95 u32 node_interface_offset; 96 u32 node_interrupt_offset; 97 u32 node_interrupt_count; 98 u64 timestamp_rate; 99 u64 reserved1; 100 u64 error_injection_rate; 101 }; 102 103 /* Values for Type above */ 104 105 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 106 #define ACPI_AEST_MEMORY_ERROR_NODE 1 107 #define ACPI_AEST_SMMU_ERROR_NODE 2 108 #define ACPI_AEST_VENDOR_ERROR_NODE 3 109 #define ACPI_AEST_GIC_ERROR_NODE 4 110 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 111 112 /* 113 * AEST subtables (Error nodes) 114 */ 115 116 /* 0: Processor Error */ 117 118 typedef struct acpi_aest_processor { 119 u32 processor_id; 120 u8 resource_type; 121 u8 reserved; 122 u8 flags; 123 u8 revision; 124 u64 processor_affinity; 125 126 } acpi_aest_processor; 127 128 /* Values for resource_type above, related structs below */ 129 130 #define ACPI_AEST_CACHE_RESOURCE 0 131 #define ACPI_AEST_TLB_RESOURCE 1 132 #define ACPI_AEST_GENERIC_RESOURCE 2 133 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 134 135 /* 0R: Processor Cache Resource Substructure */ 136 137 typedef struct acpi_aest_processor_cache { 138 u32 cache_reference; 139 u32 reserved; 140 141 } acpi_aest_processor_cache; 142 143 /* Values for cache_type above */ 144 145 #define ACPI_AEST_CACHE_DATA 0 146 #define ACPI_AEST_CACHE_INSTRUCTION 1 147 #define ACPI_AEST_CACHE_UNIFIED 2 148 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 149 150 /* 1R: Processor TLB Resource Substructure */ 151 152 typedef struct acpi_aest_processor_tlb { 153 u32 tlb_level; 154 u32 reserved; 155 156 } acpi_aest_processor_tlb; 157 158 /* 2R: Processor Generic Resource Substructure */ 159 160 typedef struct acpi_aest_processor_generic { 161 u32 resource; 162 163 } acpi_aest_processor_generic; 164 165 /* 1: Memory Error */ 166 167 typedef struct acpi_aest_memory { 168 u32 srat_proximity_domain; 169 170 } acpi_aest_memory; 171 172 /* 2: Smmu Error */ 173 174 typedef struct acpi_aest_smmu { 175 u32 iort_node_reference; 176 u32 subcomponent_reference; 177 178 } acpi_aest_smmu; 179 180 /* 3: Vendor Defined */ 181 182 typedef struct acpi_aest_vendor { 183 u32 acpi_hid; 184 u32 acpi_uid; 185 u8 vendor_specific_data[16]; 186 187 } acpi_aest_vendor; 188 189 /* 4: Gic Error */ 190 191 typedef struct acpi_aest_gic { 192 u32 interface_type; 193 u32 instance_id; 194 195 } acpi_aest_gic; 196 197 /* Values for interface_type above */ 198 199 #define ACPI_AEST_GIC_CPU 0 200 #define ACPI_AEST_GIC_DISTRIBUTOR 1 201 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 202 #define ACPI_AEST_GIC_ITS 3 203 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 204 205 /* Node Interface Structure */ 206 207 typedef struct acpi_aest_node_interface { 208 u8 type; 209 u8 reserved[3]; 210 u32 flags; 211 u64 address; 212 u32 error_record_index; 213 u32 error_record_count; 214 u64 error_record_implemented; 215 u64 error_status_reporting; 216 u64 addressing_mode; 217 218 } acpi_aest_node_interface; 219 220 /* Values for Type field above */ 221 222 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 223 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 224 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 225 226 /* Node Interrupt Structure */ 227 228 typedef struct acpi_aest_node_interrupt { 229 u8 type; 230 u8 reserved[2]; 231 u8 flags; 232 u32 gsiv; 233 u8 iort_id; 234 u8 reserved1[3]; 235 236 } acpi_aest_node_interrupt; 237 238 /* Values for Type field above */ 239 240 #define ACPI_AEST_NODE_FAULT_HANDLING 0 241 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 242 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 243 244 /******************************************************************************* 245 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 246 * 247 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 248 * ARM DEN0093 v1.1 249 * 250 ******************************************************************************/ 251 struct acpi_table_agdi { 252 struct acpi_table_header header; /* Common ACPI table header */ 253 u8 flags; 254 u8 reserved[3]; 255 u32 sdei_event; 256 u32 gsiv; 257 }; 258 259 /* Mask for Flags field above */ 260 261 #define ACPI_AGDI_SIGNALING_MODE (1) 262 263 /******************************************************************************* 264 * 265 * APMT - ARM Performance Monitoring Unit Table 266 * 267 * Conforms to: 268 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 269 * ARM DEN0117 v1.0 November 25, 2021 270 * 271 ******************************************************************************/ 272 273 struct acpi_table_apmt { 274 struct acpi_table_header header; /* Common ACPI table header */ 275 }; 276 277 #define ACPI_APMT_NODE_ID_LENGTH 4 278 279 /* 280 * APMT subtables 281 */ 282 struct acpi_apmt_node { 283 u16 length; 284 u8 flags; 285 u8 type; 286 u32 id; 287 u64 inst_primary; 288 u32 inst_secondary; 289 u64 base_address0; 290 u64 base_address1; 291 u32 ovflw_irq; 292 u32 reserved; 293 u32 ovflw_irq_flags; 294 u32 proc_affinity; 295 u32 impl_id; 296 }; 297 298 /* Masks for Flags field above */ 299 300 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 301 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 302 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 303 304 /* Values for Flags dual page field above */ 305 306 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 307 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 308 309 /* Values for Flags processor affinity field above */ 310 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 311 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 312 313 /* Values for Flags 64-bit atomic field above */ 314 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 315 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 316 317 /* Values for Type field above */ 318 319 enum acpi_apmt_node_type { 320 ACPI_APMT_NODE_TYPE_MC = 0x00, 321 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 322 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 323 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 324 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 325 ACPI_APMT_NODE_TYPE_COUNT 326 }; 327 328 /* Masks for ovflw_irq_flags field above */ 329 330 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 331 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 332 333 /* Values for ovflw_irq_flags mode field above */ 334 335 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 336 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 337 338 /* Values for ovflw_irq_flags type field above */ 339 340 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 341 342 /******************************************************************************* 343 * 344 * BDAT - BIOS Data ACPI Table 345 * 346 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 347 * Nov 2020 348 * 349 ******************************************************************************/ 350 351 struct acpi_table_bdat { 352 struct acpi_table_header header; 353 struct acpi_generic_address gas; 354 }; 355 356 /******************************************************************************* 357 * 358 * CCEL - CC-Event Log 359 * From: "Guest-Host-Communication Interface (GHCI) for Intel 360 * Trust Domain Extensions (Intel TDX)". Feb 2022 361 * 362 ******************************************************************************/ 363 364 struct acpi_table_ccel { 365 struct acpi_table_header header; /* Common ACPI table header */ 366 u8 CCtype; 367 u8 Ccsub_type; 368 u16 reserved; 369 u64 log_area_minimum_length; 370 u64 log_area_start_address; 371 }; 372 373 /******************************************************************************* 374 * 375 * IORT - IO Remapping Table 376 * 377 * Conforms to "IO Remapping Table System Software on ARM Platforms", 378 * Document number: ARM DEN 0049E.e, Sep 2022 379 * 380 ******************************************************************************/ 381 382 struct acpi_table_iort { 383 struct acpi_table_header header; 384 u32 node_count; 385 u32 node_offset; 386 u32 reserved; 387 }; 388 389 /* 390 * IORT subtables 391 */ 392 struct acpi_iort_node { 393 u8 type; 394 u16 length; 395 u8 revision; 396 u32 identifier; 397 u32 mapping_count; 398 u32 mapping_offset; 399 char node_data[1]; 400 }; 401 402 /* Values for subtable Type above */ 403 404 enum acpi_iort_node_type { 405 ACPI_IORT_NODE_ITS_GROUP = 0x00, 406 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 407 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 408 ACPI_IORT_NODE_SMMU = 0x03, 409 ACPI_IORT_NODE_SMMU_V3 = 0x04, 410 ACPI_IORT_NODE_PMCG = 0x05, 411 ACPI_IORT_NODE_RMR = 0x06, 412 }; 413 414 struct acpi_iort_id_mapping { 415 u32 input_base; /* Lowest value in input range */ 416 u32 id_count; /* Number of IDs */ 417 u32 output_base; /* Lowest value in output range */ 418 u32 output_reference; /* A reference to the output node */ 419 u32 flags; 420 }; 421 422 /* Masks for Flags field above for IORT subtable */ 423 424 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 425 426 struct acpi_iort_memory_access { 427 u32 cache_coherency; 428 u8 hints; 429 u16 reserved; 430 u8 memory_flags; 431 }; 432 433 /* Values for cache_coherency field above */ 434 435 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 436 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 437 438 /* Masks for Hints field above */ 439 440 #define ACPI_IORT_HT_TRANSIENT (1) 441 #define ACPI_IORT_HT_WRITE (1<<1) 442 #define ACPI_IORT_HT_READ (1<<2) 443 #define ACPI_IORT_HT_OVERRIDE (1<<3) 444 445 /* Masks for memory_flags field above */ 446 447 #define ACPI_IORT_MF_COHERENCY (1) 448 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 449 450 /* 451 * IORT node specific subtables 452 */ 453 struct acpi_iort_its_group { 454 u32 its_count; 455 u32 identifiers[1]; /* GIC ITS identifier array */ 456 }; 457 458 struct acpi_iort_named_component { 459 u32 node_flags; 460 u64 memory_properties; /* Memory access properties */ 461 u8 memory_address_limit; /* Memory address size limit */ 462 char device_name[1]; /* Path of namespace object */ 463 }; 464 465 /* Masks for Flags field above */ 466 467 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 468 #define ACPI_IORT_NC_PASID_BITS (31<<1) 469 470 struct acpi_iort_root_complex { 471 u64 memory_properties; /* Memory access properties */ 472 u32 ats_attribute; 473 u32 pci_segment_number; 474 u8 memory_address_limit; /* Memory address size limit */ 475 u16 pasid_capabilities; /* PASID Capabilities */ 476 u8 reserved[1]; /* Reserved, must be zero */ 477 }; 478 479 /* Masks for ats_attribute field above */ 480 481 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 482 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 483 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 484 485 /* Masks for pasid_capabilities field above */ 486 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 487 488 struct acpi_iort_smmu { 489 u64 base_address; /* SMMU base address */ 490 u64 span; /* Length of memory range */ 491 u32 model; 492 u32 flags; 493 u32 global_interrupt_offset; 494 u32 context_interrupt_count; 495 u32 context_interrupt_offset; 496 u32 pmu_interrupt_count; 497 u32 pmu_interrupt_offset; 498 u64 interrupts[1]; /* Interrupt array */ 499 }; 500 501 /* Values for Model field above */ 502 503 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 504 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 505 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 506 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 507 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 508 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 509 510 /* Masks for Flags field above */ 511 512 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 513 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 514 515 /* Global interrupt format */ 516 517 struct acpi_iort_smmu_gsi { 518 u32 nsg_irpt; 519 u32 nsg_irpt_flags; 520 u32 nsg_cfg_irpt; 521 u32 nsg_cfg_irpt_flags; 522 }; 523 524 struct acpi_iort_smmu_v3 { 525 u64 base_address; /* SMMUv3 base address */ 526 u32 flags; 527 u32 reserved; 528 u64 vatos_address; 529 u32 model; 530 u32 event_gsiv; 531 u32 pri_gsiv; 532 u32 gerr_gsiv; 533 u32 sync_gsiv; 534 u32 pxm; 535 u32 id_mapping_index; 536 }; 537 538 /* Values for Model field above */ 539 540 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 541 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 542 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 543 544 /* Masks for Flags field above */ 545 546 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 547 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 548 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 549 #define ACPI_IORT_SMMU_V3_DEVICEID_VALID (1<<4) 550 551 struct acpi_iort_pmcg { 552 u64 page0_base_address; 553 u32 overflow_gsiv; 554 u32 node_reference; 555 u64 page1_base_address; 556 }; 557 558 struct acpi_iort_rmr { 559 u32 flags; 560 u32 rmr_count; 561 u32 rmr_offset; 562 }; 563 564 /* Masks for Flags field above */ 565 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 566 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 567 568 /* 569 * Macro to access the Access Attributes in flags field above: 570 * Access Attributes is encoded in bits 9:2 571 */ 572 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 573 574 /* Values for above Access Attributes */ 575 576 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 577 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 578 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 579 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 580 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 581 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 582 583 struct acpi_iort_rmr_desc { 584 u64 base_address; 585 u64 length; 586 u32 reserved; 587 }; 588 589 /******************************************************************************* 590 * 591 * IVRS - I/O Virtualization Reporting Structure 592 * Version 1 593 * 594 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 595 * Revision 1.26, February 2009. 596 * 597 ******************************************************************************/ 598 599 struct acpi_table_ivrs { 600 struct acpi_table_header header; /* Common ACPI table header */ 601 u32 info; /* Common virtualization info */ 602 u64 reserved; 603 }; 604 605 /* Values for Info field above */ 606 607 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 608 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 609 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 610 611 /* IVRS subtable header */ 612 613 struct acpi_ivrs_header { 614 u8 type; /* Subtable type */ 615 u8 flags; 616 u16 length; /* Subtable length */ 617 u16 device_id; /* ID of IOMMU */ 618 }; 619 620 /* Values for subtable Type above */ 621 622 enum acpi_ivrs_type { 623 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 624 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 625 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 626 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 627 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 628 ACPI_IVRS_TYPE_MEMORY3 = 0x22 629 }; 630 631 /* Masks for Flags field above for IVHD subtable */ 632 633 #define ACPI_IVHD_TT_ENABLE (1) 634 #define ACPI_IVHD_PASS_PW (1<<1) 635 #define ACPI_IVHD_RES_PASS_PW (1<<2) 636 #define ACPI_IVHD_ISOC (1<<3) 637 #define ACPI_IVHD_IOTLB (1<<4) 638 639 /* Masks for Flags field above for IVMD subtable */ 640 641 #define ACPI_IVMD_UNITY (1) 642 #define ACPI_IVMD_READ (1<<1) 643 #define ACPI_IVMD_WRITE (1<<2) 644 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 645 646 /* 647 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 648 */ 649 650 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 651 652 struct acpi_ivrs_hardware_10 { 653 struct acpi_ivrs_header header; 654 u16 capability_offset; /* Offset for IOMMU control fields */ 655 u64 base_address; /* IOMMU control registers */ 656 u16 pci_segment_group; 657 u16 info; /* MSI number and unit ID */ 658 u32 feature_reporting; 659 }; 660 661 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 662 663 struct acpi_ivrs_hardware_11 { 664 struct acpi_ivrs_header header; 665 u16 capability_offset; /* Offset for IOMMU control fields */ 666 u64 base_address; /* IOMMU control registers */ 667 u16 pci_segment_group; 668 u16 info; /* MSI number and unit ID */ 669 u32 attributes; 670 u64 efr_register_image; 671 u64 reserved; 672 }; 673 674 /* Masks for Info field above */ 675 676 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 677 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 678 679 /* 680 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 681 * Upper two bits of the Type field are the (encoded) length of the structure. 682 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 683 * are reserved for future use but not defined. 684 */ 685 struct acpi_ivrs_de_header { 686 u8 type; 687 u16 id; 688 u8 data_setting; 689 }; 690 691 /* Length of device entry is in the top two bits of Type field above */ 692 693 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 694 695 /* Values for device entry Type field above */ 696 697 enum acpi_ivrs_device_entry_type { 698 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 699 700 ACPI_IVRS_TYPE_PAD4 = 0, 701 ACPI_IVRS_TYPE_ALL = 1, 702 ACPI_IVRS_TYPE_SELECT = 2, 703 ACPI_IVRS_TYPE_START = 3, 704 ACPI_IVRS_TYPE_END = 4, 705 706 /* 8-byte device entries */ 707 708 ACPI_IVRS_TYPE_PAD8 = 64, 709 ACPI_IVRS_TYPE_NOT_USED = 65, 710 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 711 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 712 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 713 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 714 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 715 716 /* Variable-length device entries */ 717 718 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 719 }; 720 721 /* Values for Data field above */ 722 723 #define ACPI_IVHD_INIT_PASS (1) 724 #define ACPI_IVHD_EINT_PASS (1<<1) 725 #define ACPI_IVHD_NMI_PASS (1<<2) 726 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 727 #define ACPI_IVHD_LINT0_PASS (1<<6) 728 #define ACPI_IVHD_LINT1_PASS (1<<7) 729 730 /* Types 0-4: 4-byte device entry */ 731 732 struct acpi_ivrs_device4 { 733 struct acpi_ivrs_de_header header; 734 }; 735 736 /* Types 66-67: 8-byte device entry */ 737 738 struct acpi_ivrs_device8a { 739 struct acpi_ivrs_de_header header; 740 u8 reserved1; 741 u16 used_id; 742 u8 reserved2; 743 }; 744 745 /* Types 70-71: 8-byte device entry */ 746 747 struct acpi_ivrs_device8b { 748 struct acpi_ivrs_de_header header; 749 u32 extended_data; 750 }; 751 752 /* Values for extended_data above */ 753 754 #define ACPI_IVHD_ATS_DISABLED (1<<31) 755 756 /* Type 72: 8-byte device entry */ 757 758 struct acpi_ivrs_device8c { 759 struct acpi_ivrs_de_header header; 760 u8 handle; 761 u16 used_id; 762 u8 variety; 763 }; 764 765 /* Values for Variety field above */ 766 767 #define ACPI_IVHD_IOAPIC 1 768 #define ACPI_IVHD_HPET 2 769 770 /* Type 240: variable-length device entry */ 771 772 struct acpi_ivrs_device_hid { 773 struct acpi_ivrs_de_header header; 774 u64 acpi_hid; 775 u64 acpi_cid; 776 u8 uid_type; 777 u8 uid_length; 778 }; 779 780 /* Values for uid_type above */ 781 782 #define ACPI_IVRS_UID_NOT_PRESENT 0 783 #define ACPI_IVRS_UID_IS_INTEGER 1 784 #define ACPI_IVRS_UID_IS_STRING 2 785 786 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 787 788 struct acpi_ivrs_memory { 789 struct acpi_ivrs_header header; 790 u16 aux_data; 791 u64 reserved; 792 u64 start_address; 793 u64 memory_length; 794 }; 795 796 /******************************************************************************* 797 * 798 * LPIT - Low Power Idle Table 799 * 800 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 801 * 802 ******************************************************************************/ 803 804 struct acpi_table_lpit { 805 struct acpi_table_header header; /* Common ACPI table header */ 806 }; 807 808 /* LPIT subtable header */ 809 810 struct acpi_lpit_header { 811 u32 type; /* Subtable type */ 812 u32 length; /* Subtable length */ 813 u16 unique_id; 814 u16 reserved; 815 u32 flags; 816 }; 817 818 /* Values for subtable Type above */ 819 820 enum acpi_lpit_type { 821 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 822 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 823 }; 824 825 /* Masks for Flags field above */ 826 827 #define ACPI_LPIT_STATE_DISABLED (1) 828 #define ACPI_LPIT_NO_COUNTER (1<<1) 829 830 /* 831 * LPIT subtables, correspond to Type in struct acpi_lpit_header 832 */ 833 834 /* 0x00: Native C-state instruction based LPI structure */ 835 836 struct acpi_lpit_native { 837 struct acpi_lpit_header header; 838 struct acpi_generic_address entry_trigger; 839 u32 residency; 840 u32 latency; 841 struct acpi_generic_address residency_counter; 842 u64 counter_frequency; 843 }; 844 845 /******************************************************************************* 846 * 847 * MADT - Multiple APIC Description Table 848 * Version 3 849 * 850 ******************************************************************************/ 851 852 struct acpi_table_madt { 853 struct acpi_table_header header; /* Common ACPI table header */ 854 u32 address; /* Physical address of local APIC */ 855 u32 flags; 856 }; 857 858 /* Masks for Flags field above */ 859 860 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 861 862 /* Values for PCATCompat flag */ 863 864 #define ACPI_MADT_DUAL_PIC 1 865 #define ACPI_MADT_MULTIPLE_APIC 0 866 867 /* Values for MADT subtable type in struct acpi_subtable_header */ 868 869 enum acpi_madt_type { 870 ACPI_MADT_TYPE_LOCAL_APIC = 0, 871 ACPI_MADT_TYPE_IO_APIC = 1, 872 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 873 ACPI_MADT_TYPE_NMI_SOURCE = 3, 874 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 875 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 876 ACPI_MADT_TYPE_IO_SAPIC = 6, 877 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 878 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 879 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 880 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 881 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 882 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 883 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 884 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 885 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 886 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 887 ACPI_MADT_TYPE_CORE_PIC = 17, 888 ACPI_MADT_TYPE_LIO_PIC = 18, 889 ACPI_MADT_TYPE_HT_PIC = 19, 890 ACPI_MADT_TYPE_EIO_PIC = 20, 891 ACPI_MADT_TYPE_MSI_PIC = 21, 892 ACPI_MADT_TYPE_BIO_PIC = 22, 893 ACPI_MADT_TYPE_LPC_PIC = 23, 894 ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ 895 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 896 }; 897 898 /* 899 * MADT Subtables, correspond to Type in struct acpi_subtable_header 900 */ 901 902 /* 0: Processor Local APIC */ 903 904 struct acpi_madt_local_apic { 905 struct acpi_subtable_header header; 906 u8 processor_id; /* ACPI processor id */ 907 u8 id; /* Processor's local APIC id */ 908 u32 lapic_flags; 909 }; 910 911 /* 1: IO APIC */ 912 913 struct acpi_madt_io_apic { 914 struct acpi_subtable_header header; 915 u8 id; /* I/O APIC ID */ 916 u8 reserved; /* reserved - must be zero */ 917 u32 address; /* APIC physical address */ 918 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 919 }; 920 921 /* 2: Interrupt Override */ 922 923 struct acpi_madt_interrupt_override { 924 struct acpi_subtable_header header; 925 u8 bus; /* 0 - ISA */ 926 u8 source_irq; /* Interrupt source (IRQ) */ 927 u32 global_irq; /* Global system interrupt */ 928 u16 inti_flags; 929 }; 930 931 /* 3: NMI Source */ 932 933 struct acpi_madt_nmi_source { 934 struct acpi_subtable_header header; 935 u16 inti_flags; 936 u32 global_irq; /* Global system interrupt */ 937 }; 938 939 /* 4: Local APIC NMI */ 940 941 struct acpi_madt_local_apic_nmi { 942 struct acpi_subtable_header header; 943 u8 processor_id; /* ACPI processor id */ 944 u16 inti_flags; 945 u8 lint; /* LINTn to which NMI is connected */ 946 }; 947 948 /* 5: Address Override */ 949 950 struct acpi_madt_local_apic_override { 951 struct acpi_subtable_header header; 952 u16 reserved; /* Reserved, must be zero */ 953 u64 address; /* APIC physical address */ 954 }; 955 956 /* 6: I/O Sapic */ 957 958 struct acpi_madt_io_sapic { 959 struct acpi_subtable_header header; 960 u8 id; /* I/O SAPIC ID */ 961 u8 reserved; /* Reserved, must be zero */ 962 u32 global_irq_base; /* Global interrupt for SAPIC start */ 963 u64 address; /* SAPIC physical address */ 964 }; 965 966 /* 7: Local Sapic */ 967 968 struct acpi_madt_local_sapic { 969 struct acpi_subtable_header header; 970 u8 processor_id; /* ACPI processor id */ 971 u8 id; /* SAPIC ID */ 972 u8 eid; /* SAPIC EID */ 973 u8 reserved[3]; /* Reserved, must be zero */ 974 u32 lapic_flags; 975 u32 uid; /* Numeric UID - ACPI 3.0 */ 976 char uid_string[1]; /* String UID - ACPI 3.0 */ 977 }; 978 979 /* 8: Platform Interrupt Source */ 980 981 struct acpi_madt_interrupt_source { 982 struct acpi_subtable_header header; 983 u16 inti_flags; 984 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 985 u8 id; /* Processor ID */ 986 u8 eid; /* Processor EID */ 987 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 988 u32 global_irq; /* Global system interrupt */ 989 u32 flags; /* Interrupt Source Flags */ 990 }; 991 992 /* Masks for Flags field above */ 993 994 #define ACPI_MADT_CPEI_OVERRIDE (1) 995 996 /* 9: Processor Local X2APIC (ACPI 4.0) */ 997 998 struct acpi_madt_local_x2apic { 999 struct acpi_subtable_header header; 1000 u16 reserved; /* reserved - must be zero */ 1001 u32 local_apic_id; /* Processor x2APIC ID */ 1002 u32 lapic_flags; 1003 u32 uid; /* ACPI processor UID */ 1004 }; 1005 1006 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1007 1008 struct acpi_madt_local_x2apic_nmi { 1009 struct acpi_subtable_header header; 1010 u16 inti_flags; 1011 u32 uid; /* ACPI processor UID */ 1012 u8 lint; /* LINTn to which NMI is connected */ 1013 u8 reserved[3]; /* reserved - must be zero */ 1014 }; 1015 1016 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 + ACPI 6.5 changes) */ 1017 1018 struct acpi_madt_generic_interrupt { 1019 struct acpi_subtable_header header; 1020 u16 reserved; /* reserved - must be zero */ 1021 u32 cpu_interface_number; 1022 u32 uid; 1023 u32 flags; 1024 u32 parking_version; 1025 u32 performance_interrupt; 1026 u64 parked_address; 1027 u64 base_address; 1028 u64 gicv_base_address; 1029 u64 gich_base_address; 1030 u32 vgic_interrupt; 1031 u64 gicr_base_address; 1032 u64 arm_mpidr; 1033 u8 efficiency_class; 1034 u8 reserved2[1]; 1035 u16 spe_interrupt; /* ACPI 6.3 */ 1036 u16 trbe_interrupt; /* ACPI 6.5 */ 1037 }; 1038 1039 /* Masks for Flags field above */ 1040 1041 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1042 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1043 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1044 1045 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1046 1047 struct acpi_madt_generic_distributor { 1048 struct acpi_subtable_header header; 1049 u16 reserved; /* reserved - must be zero */ 1050 u32 gic_id; 1051 u64 base_address; 1052 u32 global_irq_base; 1053 u8 version; 1054 u8 reserved2[3]; /* reserved - must be zero */ 1055 }; 1056 1057 /* Values for Version field above */ 1058 1059 enum acpi_madt_gic_version { 1060 ACPI_MADT_GIC_VERSION_NONE = 0, 1061 ACPI_MADT_GIC_VERSION_V1 = 1, 1062 ACPI_MADT_GIC_VERSION_V2 = 2, 1063 ACPI_MADT_GIC_VERSION_V3 = 3, 1064 ACPI_MADT_GIC_VERSION_V4 = 4, 1065 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1066 }; 1067 1068 /* 13: Generic MSI Frame (ACPI 5.1) */ 1069 1070 struct acpi_madt_generic_msi_frame { 1071 struct acpi_subtable_header header; 1072 u16 reserved; /* reserved - must be zero */ 1073 u32 msi_frame_id; 1074 u64 base_address; 1075 u32 flags; 1076 u16 spi_count; 1077 u16 spi_base; 1078 }; 1079 1080 /* Masks for Flags field above */ 1081 1082 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1083 1084 /* 14: Generic Redistributor (ACPI 5.1) */ 1085 1086 struct acpi_madt_generic_redistributor { 1087 struct acpi_subtable_header header; 1088 u16 reserved; /* reserved - must be zero */ 1089 u64 base_address; 1090 u32 length; 1091 }; 1092 1093 /* 15: Generic Translator (ACPI 6.0) */ 1094 1095 struct acpi_madt_generic_translator { 1096 struct acpi_subtable_header header; 1097 u16 reserved; /* reserved - must be zero */ 1098 u32 translation_id; 1099 u64 base_address; 1100 u32 reserved2; 1101 }; 1102 1103 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1104 1105 struct acpi_madt_multiproc_wakeup { 1106 struct acpi_subtable_header header; 1107 u16 mailbox_version; 1108 u32 reserved; /* reserved - must be zero */ 1109 u64 base_address; 1110 }; 1111 1112 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1113 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1114 1115 struct acpi_madt_multiproc_wakeup_mailbox { 1116 u16 command; 1117 u16 reserved; /* reserved - must be zero */ 1118 u32 apic_id; 1119 u64 wakeup_vector; 1120 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1121 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1122 }; 1123 1124 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1125 1126 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1127 1128 struct acpi_madt_core_pic { 1129 struct acpi_subtable_header header; 1130 u8 version; 1131 u32 processor_id; 1132 u32 core_id; 1133 u32 flags; 1134 }; 1135 1136 /* Values for Version field above */ 1137 1138 enum acpi_madt_core_pic_version { 1139 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1140 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1141 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1142 }; 1143 1144 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1145 1146 struct acpi_madt_lio_pic { 1147 struct acpi_subtable_header header; 1148 u8 version; 1149 u64 address; 1150 u16 size; 1151 u8 cascade[2]; 1152 u32 cascade_map[2]; 1153 }; 1154 1155 /* Values for Version field above */ 1156 1157 enum acpi_madt_lio_pic_version { 1158 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1159 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1160 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1161 }; 1162 1163 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1164 1165 struct acpi_madt_ht_pic { 1166 struct acpi_subtable_header header; 1167 u8 version; 1168 u64 address; 1169 u16 size; 1170 u8 cascade[8]; 1171 }; 1172 1173 /* Values for Version field above */ 1174 1175 enum acpi_madt_ht_pic_version { 1176 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1177 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1178 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1179 }; 1180 1181 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1182 1183 struct acpi_madt_eio_pic { 1184 struct acpi_subtable_header header; 1185 u8 version; 1186 u8 cascade; 1187 u8 node; 1188 u64 node_map; 1189 }; 1190 1191 /* Values for Version field above */ 1192 1193 enum acpi_madt_eio_pic_version { 1194 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1195 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1196 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1197 }; 1198 1199 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1200 1201 struct acpi_madt_msi_pic { 1202 struct acpi_subtable_header header; 1203 u8 version; 1204 u64 msg_address; 1205 u32 start; 1206 u32 count; 1207 }; 1208 1209 /* Values for Version field above */ 1210 1211 enum acpi_madt_msi_pic_version { 1212 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1213 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1214 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1215 }; 1216 1217 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1218 1219 struct acpi_madt_bio_pic { 1220 struct acpi_subtable_header header; 1221 u8 version; 1222 u64 address; 1223 u16 size; 1224 u16 id; 1225 u16 gsi_base; 1226 }; 1227 1228 /* Values for Version field above */ 1229 1230 enum acpi_madt_bio_pic_version { 1231 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1232 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1233 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1234 }; 1235 1236 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1237 1238 struct acpi_madt_lpc_pic { 1239 struct acpi_subtable_header header; 1240 u8 version; 1241 u64 address; 1242 u16 size; 1243 u8 cascade; 1244 }; 1245 1246 /* Values for Version field above */ 1247 1248 enum acpi_madt_lpc_pic_version { 1249 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1250 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1251 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1252 }; 1253 1254 /* 80: OEM data */ 1255 1256 struct acpi_madt_oem_data { 1257 u8 oem_data[0]; 1258 }; 1259 1260 /* 1261 * Common flags fields for MADT subtables 1262 */ 1263 1264 /* MADT Local APIC flags */ 1265 1266 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1267 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1268 1269 /* MADT MPS INTI flags (inti_flags) */ 1270 1271 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1272 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1273 1274 /* Values for MPS INTI flags */ 1275 1276 #define ACPI_MADT_POLARITY_CONFORMS 0 1277 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1278 #define ACPI_MADT_POLARITY_RESERVED 2 1279 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1280 1281 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1282 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1283 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1284 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1285 1286 /******************************************************************************* 1287 * 1288 * MCFG - PCI Memory Mapped Configuration table and subtable 1289 * Version 1 1290 * 1291 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1292 * 1293 ******************************************************************************/ 1294 1295 struct acpi_table_mcfg { 1296 struct acpi_table_header header; /* Common ACPI table header */ 1297 u8 reserved[8]; 1298 }; 1299 1300 /* Subtable */ 1301 1302 struct acpi_mcfg_allocation { 1303 u64 address; /* Base address, processor-relative */ 1304 u16 pci_segment; /* PCI segment group number */ 1305 u8 start_bus_number; /* Starting PCI Bus number */ 1306 u8 end_bus_number; /* Final PCI Bus number */ 1307 u32 reserved; 1308 }; 1309 1310 /******************************************************************************* 1311 * 1312 * MCHI - Management Controller Host Interface Table 1313 * Version 1 1314 * 1315 * Conforms to "Management Component Transport Protocol (MCTP) Host 1316 * Interface Specification", Revision 1.0.0a, October 13, 2009 1317 * 1318 ******************************************************************************/ 1319 1320 struct acpi_table_mchi { 1321 struct acpi_table_header header; /* Common ACPI table header */ 1322 u8 interface_type; 1323 u8 protocol; 1324 u64 protocol_data; 1325 u8 interrupt_type; 1326 u8 gpe; 1327 u8 pci_device_flag; 1328 u32 global_interrupt; 1329 struct acpi_generic_address control_register; 1330 u8 pci_segment; 1331 u8 pci_bus; 1332 u8 pci_device; 1333 u8 pci_function; 1334 }; 1335 1336 /******************************************************************************* 1337 * 1338 * MPAM - Memory System Resource Partitioning and Monitoring 1339 * 1340 * Conforms to "ACPI for Memory System Resource Partitioning and Monitoring 2.0" 1341 * Document number: ARM DEN 0065, December, 2022. 1342 * 1343 ******************************************************************************/ 1344 1345 /* MPAM RIS locator types. Table 11, Location types */ 1346 enum acpi_mpam_locator_type { 1347 ACPI_MPAM_LOCATION_TYPE_PROCESSOR_CACHE = 0, 1348 ACPI_MPAM_LOCATION_TYPE_MEMORY = 1, 1349 ACPI_MPAM_LOCATION_TYPE_SMMU = 2, 1350 ACPI_MPAM_LOCATION_TYPE_MEMORY_CACHE = 3, 1351 ACPI_MPAM_LOCATION_TYPE_ACPI_DEVICE = 4, 1352 ACPI_MPAM_LOCATION_TYPE_INTERCONNECT = 5, 1353 ACPI_MPAM_LOCATION_TYPE_UNKNOWN = 0xFF 1354 }; 1355 1356 /* MPAM Functional dependency descriptor. Table 10 */ 1357 struct acpi_mpam_func_deps { 1358 u32 producer; 1359 u32 reserved; 1360 }; 1361 1362 /* MPAM Processor cache locator descriptor. Table 13 */ 1363 struct acpi_mpam_resource_cache_locator { 1364 u64 cache_reference; 1365 u32 reserved; 1366 }; 1367 1368 /* MPAM Memory locator descriptor. Table 14 */ 1369 struct acpi_mpam_resource_memory_locator { 1370 u64 proximity_domain; 1371 u32 reserved; 1372 }; 1373 1374 /* MPAM SMMU locator descriptor. Table 15 */ 1375 struct acpi_mpam_resource_smmu_locator { 1376 u64 smmu_interface; 1377 u32 reserved; 1378 }; 1379 1380 /* MPAM Memory-side cache locator descriptor. Table 16 */ 1381 struct acpi_mpam_resource_memcache_locator { 1382 u8 reserved[7]; 1383 u8 level; 1384 u32 reference; 1385 }; 1386 1387 /* MPAM ACPI device locator descriptor. Table 17 */ 1388 struct acpi_mpam_resource_acpi_locator { 1389 u64 acpi_hw_id; 1390 u32 acpi_unique_id; 1391 }; 1392 1393 /* MPAM Interconnect locator descriptor. Table 18 */ 1394 struct acpi_mpam_resource_interconnect_locator { 1395 u64 inter_connect_desc_tbl_off; 1396 u32 reserved; 1397 }; 1398 1399 /* MPAM Locator structure. Table 12 */ 1400 struct acpi_mpam_resource_generic_locator { 1401 u64 descriptor1; 1402 u32 descriptor2; 1403 }; 1404 1405 union acpi_mpam_resource_locator { 1406 struct acpi_mpam_resource_cache_locator cache_locator; 1407 struct acpi_mpam_resource_memory_locator memory_locator; 1408 struct acpi_mpam_resource_smmu_locator smmu_locator; 1409 struct acpi_mpam_resource_memcache_locator mem_cache_locator; 1410 struct acpi_mpam_resource_acpi_locator acpi_locator; 1411 struct acpi_mpam_resource_interconnect_locator interconnect_ifc_locator; 1412 struct acpi_mpam_resource_generic_locator generic_locator; 1413 }; 1414 1415 /* Memory System Component Resource Node Structure Table 9 */ 1416 struct acpi_mpam_resource_node { 1417 u32 identifier; 1418 u8 ris_index; 1419 u16 reserved1; 1420 u8 locator_type; 1421 union acpi_mpam_resource_locator locator; 1422 u32 num_functional_deps; 1423 }; 1424 1425 /* Memory System Component (MSC) Node Structure. Table 4 */ 1426 struct acpi_mpam_msc_node { 1427 u16 length; 1428 u8 interface_type; 1429 u8 reserved; 1430 u32 identifier; 1431 u64 base_address; 1432 u32 mmio_size; 1433 u32 overflow_interrupt; 1434 u32 overflow_interrupt_flags; 1435 u32 reserved1; 1436 u32 overflow_interrupt_affinity; 1437 u32 error_interrupt; 1438 u32 error_interrupt_flags; 1439 u32 reserved2; 1440 u32 error_interrupt_affinity; 1441 u32 max_nrdy_usec; 1442 u64 hardware_id_linked_device; 1443 u32 instance_id_linked_device; 1444 u32 num_resouce_nodes; 1445 }; 1446 1447 struct acpi_table_mpam { 1448 struct acpi_table_header header; /* Common ACPI table header */ 1449 }; 1450 1451 /******************************************************************************* 1452 * 1453 * MPST - Memory Power State Table (ACPI 5.0) 1454 * Version 1 1455 * 1456 ******************************************************************************/ 1457 1458 #define ACPI_MPST_CHANNEL_INFO \ 1459 u8 channel_id; \ 1460 u8 reserved1[3]; \ 1461 u16 power_node_count; \ 1462 u16 reserved2; 1463 1464 /* Main table */ 1465 1466 struct acpi_table_mpst { 1467 struct acpi_table_header header; /* Common ACPI table header */ 1468 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1469 }; 1470 1471 /* Memory Platform Communication Channel Info */ 1472 1473 struct acpi_mpst_channel { 1474 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1475 }; 1476 1477 /* Memory Power Node Structure */ 1478 1479 struct acpi_mpst_power_node { 1480 u8 flags; 1481 u8 reserved1; 1482 u16 node_id; 1483 u32 length; 1484 u64 range_address; 1485 u64 range_length; 1486 u32 num_power_states; 1487 u32 num_physical_components; 1488 }; 1489 1490 /* Values for Flags field above */ 1491 1492 #define ACPI_MPST_ENABLED 1 1493 #define ACPI_MPST_POWER_MANAGED 2 1494 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1495 1496 /* Memory Power State Structure (follows POWER_NODE above) */ 1497 1498 struct acpi_mpst_power_state { 1499 u8 power_state; 1500 u8 info_index; 1501 }; 1502 1503 /* Physical Component ID Structure (follows POWER_STATE above) */ 1504 1505 struct acpi_mpst_component { 1506 u16 component_id; 1507 }; 1508 1509 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1510 1511 struct acpi_mpst_data_hdr { 1512 u16 characteristics_count; 1513 u16 reserved; 1514 }; 1515 1516 struct acpi_mpst_power_data { 1517 u8 structure_id; 1518 u8 flags; 1519 u16 reserved1; 1520 u32 average_power; 1521 u32 power_saving; 1522 u64 exit_latency; 1523 u64 reserved2; 1524 }; 1525 1526 /* Values for Flags field above */ 1527 1528 #define ACPI_MPST_PRESERVE 1 1529 #define ACPI_MPST_AUTOENTRY 2 1530 #define ACPI_MPST_AUTOEXIT 4 1531 1532 /* Shared Memory Region (not part of an ACPI table) */ 1533 1534 struct acpi_mpst_shared { 1535 u32 signature; 1536 u16 pcc_command; 1537 u16 pcc_status; 1538 u32 command_register; 1539 u32 status_register; 1540 u32 power_state_id; 1541 u32 power_node_id; 1542 u64 energy_consumed; 1543 u64 average_power; 1544 }; 1545 1546 /******************************************************************************* 1547 * 1548 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1549 * Version 1 1550 * 1551 ******************************************************************************/ 1552 1553 struct acpi_table_msct { 1554 struct acpi_table_header header; /* Common ACPI table header */ 1555 u32 proximity_offset; /* Location of proximity info struct(s) */ 1556 u32 max_proximity_domains; /* Max number of proximity domains */ 1557 u32 max_clock_domains; /* Max number of clock domains */ 1558 u64 max_address; /* Max physical address in system */ 1559 }; 1560 1561 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1562 1563 struct acpi_msct_proximity { 1564 u8 revision; 1565 u8 length; 1566 u32 range_start; /* Start of domain range */ 1567 u32 range_end; /* End of domain range */ 1568 u32 processor_capacity; 1569 u64 memory_capacity; /* In bytes */ 1570 }; 1571 1572 /******************************************************************************* 1573 * 1574 * MSDM - Microsoft Data Management table 1575 * 1576 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1577 * November 29, 2011. Copyright 2011 Microsoft 1578 * 1579 ******************************************************************************/ 1580 1581 /* Basic MSDM table is only the common ACPI header */ 1582 1583 struct acpi_table_msdm { 1584 struct acpi_table_header header; /* Common ACPI table header */ 1585 }; 1586 1587 /******************************************************************************* 1588 * 1589 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1590 * Version 1 1591 * 1592 ******************************************************************************/ 1593 1594 struct acpi_table_nfit { 1595 struct acpi_table_header header; /* Common ACPI table header */ 1596 u32 reserved; /* Reserved, must be zero */ 1597 }; 1598 1599 /* Subtable header for NFIT */ 1600 1601 struct acpi_nfit_header { 1602 u16 type; 1603 u16 length; 1604 }; 1605 1606 /* Values for subtable type in struct acpi_nfit_header */ 1607 1608 enum acpi_nfit_type { 1609 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1610 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1611 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1612 ACPI_NFIT_TYPE_SMBIOS = 3, 1613 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1614 ACPI_NFIT_TYPE_DATA_REGION = 5, 1615 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1616 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1617 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1618 }; 1619 1620 /* 1621 * NFIT Subtables 1622 */ 1623 1624 /* 0: System Physical Address Range Structure */ 1625 1626 struct acpi_nfit_system_address { 1627 struct acpi_nfit_header header; 1628 u16 range_index; 1629 u16 flags; 1630 u32 reserved; /* Reserved, must be zero */ 1631 u32 proximity_domain; 1632 u8 range_guid[16]; 1633 u64 address; 1634 u64 length; 1635 u64 memory_mapping; 1636 u64 location_cookie; /* ACPI 6.4 */ 1637 }; 1638 1639 /* Flags */ 1640 1641 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1642 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1643 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1644 1645 /* Range Type GUIDs appear in the include/acuuid.h file */ 1646 1647 /* 1: Memory Device to System Address Range Map Structure */ 1648 1649 struct acpi_nfit_memory_map { 1650 struct acpi_nfit_header header; 1651 u32 device_handle; 1652 u16 physical_id; 1653 u16 region_id; 1654 u16 range_index; 1655 u16 region_index; 1656 u64 region_size; 1657 u64 region_offset; 1658 u64 address; 1659 u16 interleave_index; 1660 u16 interleave_ways; 1661 u16 flags; 1662 u16 reserved; /* Reserved, must be zero */ 1663 }; 1664 1665 /* Flags */ 1666 1667 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1668 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1669 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1670 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1671 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1672 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1673 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1674 1675 /* 2: Interleave Structure */ 1676 1677 struct acpi_nfit_interleave { 1678 struct acpi_nfit_header header; 1679 u16 interleave_index; 1680 u16 reserved; /* Reserved, must be zero */ 1681 u32 line_count; 1682 u32 line_size; 1683 u32 line_offset[1]; /* Variable length */ 1684 }; 1685 1686 /* 3: SMBIOS Management Information Structure */ 1687 1688 struct acpi_nfit_smbios { 1689 struct acpi_nfit_header header; 1690 u32 reserved; /* Reserved, must be zero */ 1691 u8 data[1]; /* Variable length */ 1692 }; 1693 1694 /* 4: NVDIMM Control Region Structure */ 1695 1696 struct acpi_nfit_control_region { 1697 struct acpi_nfit_header header; 1698 u16 region_index; 1699 u16 vendor_id; 1700 u16 device_id; 1701 u16 revision_id; 1702 u16 subsystem_vendor_id; 1703 u16 subsystem_device_id; 1704 u16 subsystem_revision_id; 1705 u8 valid_fields; 1706 u8 manufacturing_location; 1707 u16 manufacturing_date; 1708 u8 reserved[2]; /* Reserved, must be zero */ 1709 u32 serial_number; 1710 u16 code; 1711 u16 windows; 1712 u64 window_size; 1713 u64 command_offset; 1714 u64 command_size; 1715 u64 status_offset; 1716 u64 status_size; 1717 u16 flags; 1718 u8 reserved1[6]; /* Reserved, must be zero */ 1719 }; 1720 1721 /* Flags */ 1722 1723 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1724 1725 /* valid_fields bits */ 1726 1727 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1728 1729 /* 5: NVDIMM Block Data Window Region Structure */ 1730 1731 struct acpi_nfit_data_region { 1732 struct acpi_nfit_header header; 1733 u16 region_index; 1734 u16 windows; 1735 u64 offset; 1736 u64 size; 1737 u64 capacity; 1738 u64 start_address; 1739 }; 1740 1741 /* 6: Flush Hint Address Structure */ 1742 1743 struct acpi_nfit_flush_address { 1744 struct acpi_nfit_header header; 1745 u32 device_handle; 1746 u16 hint_count; 1747 u8 reserved[6]; /* Reserved, must be zero */ 1748 u64 hint_address[1]; /* Variable length */ 1749 }; 1750 1751 /* 7: Platform Capabilities Structure */ 1752 1753 struct acpi_nfit_capabilities { 1754 struct acpi_nfit_header header; 1755 u8 highest_capability; 1756 u8 reserved[3]; /* Reserved, must be zero */ 1757 u32 capabilities; 1758 u32 reserved2; 1759 }; 1760 1761 /* Capabilities Flags */ 1762 1763 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1764 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1765 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1766 1767 /* 1768 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1769 */ 1770 struct nfit_device_handle { 1771 u32 handle; 1772 }; 1773 1774 /* Device handle construction and extraction macros */ 1775 1776 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1777 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1778 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1779 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1780 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1781 1782 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1783 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1784 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1785 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1786 #define ACPI_NFIT_NODE_ID_OFFSET 16 1787 1788 /* Macro to construct a NFIT/NVDIMM device handle */ 1789 1790 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1791 ((dimm) | \ 1792 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1793 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1794 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1795 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1796 1797 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1798 1799 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1800 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1801 1802 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1803 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1804 1805 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1806 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1807 1808 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1809 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1810 1811 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1812 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1813 1814 /******************************************************************************* 1815 * 1816 * NHLT - Non HD Audio Link Table 1817 * 1818 * Conforms to: Intel Smart Sound Technology NHLT Specification 1819 * Version 0.8.1, January 2020. 1820 * 1821 ******************************************************************************/ 1822 1823 /* Main table */ 1824 1825 struct acpi_table_nhlt { 1826 struct acpi_table_header header; /* Common ACPI table header */ 1827 u8 endpoint_count; 1828 }; 1829 1830 struct acpi_nhlt_endpoint { 1831 u32 descriptor_length; 1832 u8 link_type; 1833 u8 instance_id; 1834 u16 vendor_id; 1835 u16 device_id; 1836 u16 revision_id; 1837 u32 subsystem_id; 1838 u8 device_type; 1839 u8 direction; 1840 u8 virtual_bus_id; 1841 }; 1842 1843 /* Types for link_type field above */ 1844 1845 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1846 #define ACPI_NHLT_RESERVED_DSP 1 1847 #define ACPI_NHLT_PDM 2 1848 #define ACPI_NHLT_SSP 3 1849 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1850 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1851 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1852 1853 /* All other values above are reserved */ 1854 1855 /* Values for device_id field above */ 1856 1857 #define ACPI_NHLT_PDM_DMIC 0xAE20 1858 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1859 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1860 1861 /* Values for device_type field above */ 1862 1863 /* SSP Link */ 1864 1865 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1866 #define ACPI_NHLT_LINK_FM 1 1867 #define ACPI_NHLT_LINK_MODEM 2 1868 /* 3 is reserved */ 1869 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1870 1871 /* PDM Link */ 1872 1873 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1874 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1875 1876 /* Values for Direction field above */ 1877 1878 #define ACPI_NHLT_DIR_RENDER 0 1879 #define ACPI_NHLT_DIR_CAPTURE 1 1880 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1881 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1882 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1883 1884 struct acpi_nhlt_device_specific_config { 1885 u32 capabilities_size; 1886 u8 virtual_slot; 1887 u8 config_type; 1888 }; 1889 1890 struct acpi_nhlt_device_specific_config_a { 1891 u32 capabilities_size; 1892 u8 virtual_slot; 1893 u8 config_type; 1894 u8 array_type; 1895 }; 1896 1897 /* Values for Config Type above */ 1898 1899 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1900 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1901 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1902 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1903 1904 struct acpi_nhlt_device_specific_config_b { 1905 u32 capabilities_size; 1906 }; 1907 1908 struct acpi_nhlt_device_specific_config_c { 1909 u32 capabilities_size; 1910 u8 virtual_slot; 1911 }; 1912 1913 struct acpi_nhlt_render_device_specific_config { 1914 u32 capabilities_size; 1915 u8 virtual_slot; 1916 }; 1917 1918 struct acpi_nhlt_wave_extensible { 1919 u16 format_tag; 1920 u16 channel_count; 1921 u32 samples_per_sec; 1922 u32 avg_bytes_per_sec; 1923 u16 block_align; 1924 u16 bits_per_sample; 1925 u16 extra_format_size; 1926 u16 valid_bits_per_sample; 1927 u32 channel_mask; 1928 u8 sub_format_guid[16]; 1929 }; 1930 1931 /* Values for channel_mask above */ 1932 1933 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1934 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1935 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1936 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1937 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1938 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1939 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1940 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1941 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1942 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1943 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1944 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1945 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1946 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1947 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1948 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1949 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1950 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1951 1952 struct acpi_nhlt_format_config { 1953 struct acpi_nhlt_wave_extensible format; 1954 u32 capability_size; 1955 u8 capabilities[]; 1956 }; 1957 1958 struct acpi_nhlt_formats_config { 1959 u8 formats_count; 1960 }; 1961 1962 struct acpi_nhlt_device_specific_hdr { 1963 u8 virtual_slot; 1964 u8 config_type; 1965 }; 1966 1967 /* Types for config_type above */ 1968 1969 #define ACPI_NHLT_GENERIC 0 1970 #define ACPI_NHLT_MIC 1 1971 #define ACPI_NHLT_RENDER 3 1972 1973 struct acpi_nhlt_mic_device_specific_config { 1974 struct acpi_nhlt_device_specific_hdr device_config; 1975 u8 array_type_ext; 1976 }; 1977 1978 /* Values for array_type_ext above */ 1979 1980 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 1981 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 1982 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 1983 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1984 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 1985 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1986 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 1987 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 1988 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 1989 1990 #define ACPI_NHLT_NO_EXTENSION 0x0 1991 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 1992 1993 struct acpi_nhlt_vendor_mic_count { 1994 u8 microphone_count; 1995 }; 1996 1997 struct acpi_nhlt_vendor_mic_config { 1998 u8 type; 1999 u8 panel; 2000 u16 speaker_position_distance; /* mm */ 2001 u16 horizontal_offset; /* mm */ 2002 u16 vertical_offset; /* mm */ 2003 u8 frequency_low_band; /* 5*Hz */ 2004 u8 frequency_high_band; /* 500*Hz */ 2005 u16 direction_angle; /* -180 - + 180 */ 2006 u16 elevation_angle; /* -180 - + 180 */ 2007 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */ 2008 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */ 2009 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */ 2010 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */ 2011 }; 2012 2013 /* Values for Type field above */ 2014 2015 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 2016 #define ACPI_NHLT_MIC_SUBCARDIOID 1 2017 #define ACPI_NHLT_MIC_CARDIOID 2 2018 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 2019 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 2020 #define ACPI_NHLT_MIC_8_SHAPED 5 2021 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 2022 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 2023 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 2024 2025 /* Values for Panel field above */ 2026 2027 #define ACPI_NHLT_MIC_POSITION_TOP 0 2028 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 2029 #define ACPI_NHLT_MIC_POSITION_LEFT 2 2030 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 2031 #define ACPI_NHLT_MIC_POSITION_FRONT 4 2032 #define ACPI_NHLT_MIC_POSITION_BACK 5 2033 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 2034 2035 struct acpi_nhlt_vendor_mic_device_specific_config { 2036 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 2037 u8 number_of_microphones; 2038 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */ 2039 }; 2040 2041 /* Microphone SNR and Sensitivity extension */ 2042 2043 struct acpi_nhlt_mic_snr_sensitivity_extension { 2044 u32 SNR; 2045 u32 sensitivity; 2046 }; 2047 2048 /* Render device with feedback */ 2049 2050 struct acpi_nhlt_render_feedback_device_specific_config { 2051 u8 feedback_virtual_slot; /* Render slot in case of capture */ 2052 u16 feedback_channels; /* Informative only */ 2053 u16 feedback_valid_bits_per_sample; 2054 }; 2055 2056 /* Non documented structures */ 2057 2058 struct acpi_nhlt_device_info_count { 2059 u8 structure_count; 2060 }; 2061 2062 struct acpi_nhlt_device_info { 2063 u8 device_id[16]; 2064 u8 device_instance_id; 2065 u8 device_port_id; 2066 }; 2067 2068 /******************************************************************************* 2069 * 2070 * PCCT - Platform Communications Channel Table (ACPI 5.0) 2071 * Version 2 (ACPI 6.2) 2072 * 2073 ******************************************************************************/ 2074 2075 struct acpi_table_pcct { 2076 struct acpi_table_header header; /* Common ACPI table header */ 2077 u32 flags; 2078 u64 reserved; 2079 }; 2080 2081 /* Values for Flags field above */ 2082 2083 #define ACPI_PCCT_DOORBELL 1 2084 2085 /* Values for subtable type in struct acpi_subtable_header */ 2086 2087 enum acpi_pcct_type { 2088 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 2089 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 2090 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 2091 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 2092 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 2093 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 2094 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2095 }; 2096 2097 /* 2098 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 2099 */ 2100 2101 /* 0: Generic Communications Subspace */ 2102 2103 struct acpi_pcct_subspace { 2104 struct acpi_subtable_header header; 2105 u8 reserved[6]; 2106 u64 base_address; 2107 u64 length; 2108 struct acpi_generic_address doorbell_register; 2109 u64 preserve_mask; 2110 u64 write_mask; 2111 u32 latency; 2112 u32 max_access_rate; 2113 u16 min_turnaround_time; 2114 }; 2115 2116 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2117 2118 struct acpi_pcct_hw_reduced { 2119 struct acpi_subtable_header header; 2120 u32 platform_interrupt; 2121 u8 flags; 2122 u8 reserved; 2123 u64 base_address; 2124 u64 length; 2125 struct acpi_generic_address doorbell_register; 2126 u64 preserve_mask; 2127 u64 write_mask; 2128 u32 latency; 2129 u32 max_access_rate; 2130 u16 min_turnaround_time; 2131 }; 2132 2133 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2134 2135 struct acpi_pcct_hw_reduced_type2 { 2136 struct acpi_subtable_header header; 2137 u32 platform_interrupt; 2138 u8 flags; 2139 u8 reserved; 2140 u64 base_address; 2141 u64 length; 2142 struct acpi_generic_address doorbell_register; 2143 u64 preserve_mask; 2144 u64 write_mask; 2145 u32 latency; 2146 u32 max_access_rate; 2147 u16 min_turnaround_time; 2148 struct acpi_generic_address platform_ack_register; 2149 u64 ack_preserve_mask; 2150 u64 ack_write_mask; 2151 }; 2152 2153 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2154 2155 struct acpi_pcct_ext_pcc_master { 2156 struct acpi_subtable_header header; 2157 u32 platform_interrupt; 2158 u8 flags; 2159 u8 reserved1; 2160 u64 base_address; 2161 u32 length; 2162 struct acpi_generic_address doorbell_register; 2163 u64 preserve_mask; 2164 u64 write_mask; 2165 u32 latency; 2166 u32 max_access_rate; 2167 u32 min_turnaround_time; 2168 struct acpi_generic_address platform_ack_register; 2169 u64 ack_preserve_mask; 2170 u64 ack_set_mask; 2171 u64 reserved2; 2172 struct acpi_generic_address cmd_complete_register; 2173 u64 cmd_complete_mask; 2174 struct acpi_generic_address cmd_update_register; 2175 u64 cmd_update_preserve_mask; 2176 u64 cmd_update_set_mask; 2177 struct acpi_generic_address error_status_register; 2178 u64 error_status_mask; 2179 }; 2180 2181 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2182 2183 struct acpi_pcct_ext_pcc_slave { 2184 struct acpi_subtable_header header; 2185 u32 platform_interrupt; 2186 u8 flags; 2187 u8 reserved1; 2188 u64 base_address; 2189 u32 length; 2190 struct acpi_generic_address doorbell_register; 2191 u64 preserve_mask; 2192 u64 write_mask; 2193 u32 latency; 2194 u32 max_access_rate; 2195 u32 min_turnaround_time; 2196 struct acpi_generic_address platform_ack_register; 2197 u64 ack_preserve_mask; 2198 u64 ack_set_mask; 2199 u64 reserved2; 2200 struct acpi_generic_address cmd_complete_register; 2201 u64 cmd_complete_mask; 2202 struct acpi_generic_address cmd_update_register; 2203 u64 cmd_update_preserve_mask; 2204 u64 cmd_update_set_mask; 2205 struct acpi_generic_address error_status_register; 2206 u64 error_status_mask; 2207 }; 2208 2209 /* 5: HW Registers based Communications Subspace */ 2210 2211 struct acpi_pcct_hw_reg { 2212 struct acpi_subtable_header header; 2213 u16 version; 2214 u64 base_address; 2215 u64 length; 2216 struct acpi_generic_address doorbell_register; 2217 u64 doorbell_preserve; 2218 u64 doorbell_write; 2219 struct acpi_generic_address cmd_complete_register; 2220 u64 cmd_complete_mask; 2221 struct acpi_generic_address error_status_register; 2222 u64 error_status_mask; 2223 u32 nominal_latency; 2224 u32 min_turnaround_time; 2225 }; 2226 2227 /* Values for doorbell flags above */ 2228 2229 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2230 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2231 2232 /* 2233 * PCC memory structures (not part of the ACPI table) 2234 */ 2235 2236 /* Shared Memory Region */ 2237 2238 struct acpi_pcct_shared_memory { 2239 u32 signature; 2240 u16 command; 2241 u16 status; 2242 }; 2243 2244 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2245 2246 struct acpi_pcct_ext_pcc_shared_memory { 2247 u32 signature; 2248 u32 flags; 2249 u32 length; 2250 u32 command; 2251 }; 2252 2253 /******************************************************************************* 2254 * 2255 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2256 * Version 0 2257 * 2258 ******************************************************************************/ 2259 2260 struct acpi_table_pdtt { 2261 struct acpi_table_header header; /* Common ACPI table header */ 2262 u8 trigger_count; 2263 u8 reserved[3]; 2264 u32 array_offset; 2265 }; 2266 2267 /* 2268 * PDTT Communication Channel Identifier Structure. 2269 * The number of these structures is defined by trigger_count above, 2270 * starting at array_offset. 2271 */ 2272 struct acpi_pdtt_channel { 2273 u8 subchannel_id; 2274 u8 flags; 2275 }; 2276 2277 /* Flags for above */ 2278 2279 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2280 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2281 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2282 2283 /******************************************************************************* 2284 * 2285 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2286 * Version 1 2287 * 2288 ******************************************************************************/ 2289 2290 struct acpi_table_phat { 2291 struct acpi_table_header header; /* Common ACPI table header */ 2292 }; 2293 2294 /* Common header for PHAT subtables that follow main table */ 2295 2296 struct acpi_phat_header { 2297 u16 type; 2298 u16 length; 2299 u8 revision; 2300 }; 2301 2302 /* Values for Type field above */ 2303 2304 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2305 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2306 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2307 2308 /* 2309 * PHAT subtables, correspond to Type in struct acpi_phat_header 2310 */ 2311 2312 /* 0: Firmware Version Data Record */ 2313 2314 struct acpi_phat_version_data { 2315 struct acpi_phat_header header; 2316 u8 reserved[3]; 2317 u32 element_count; 2318 }; 2319 2320 struct acpi_phat_version_element { 2321 u8 guid[16]; 2322 u64 version_value; 2323 u32 producer_id; 2324 }; 2325 2326 /* 1: Firmware Health Data Record */ 2327 2328 struct acpi_phat_health_data { 2329 struct acpi_phat_header header; 2330 u8 reserved[2]; 2331 u8 health; 2332 u8 device_guid[16]; 2333 u32 device_specific_offset; /* Zero if no Device-specific data */ 2334 }; 2335 2336 /* Values for Health field above */ 2337 2338 #define ACPI_PHAT_ERRORS_FOUND 0 2339 #define ACPI_PHAT_NO_ERRORS 1 2340 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2341 #define ACPI_PHAT_ADVISORY 3 2342 2343 /******************************************************************************* 2344 * 2345 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2346 * Version 1 2347 * 2348 ******************************************************************************/ 2349 2350 struct acpi_table_pmtt { 2351 struct acpi_table_header header; /* Common ACPI table header */ 2352 u32 memory_device_count; 2353 /* 2354 * Immediately followed by: 2355 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2356 */ 2357 }; 2358 2359 /* Common header for PMTT subtables that follow main table */ 2360 2361 struct acpi_pmtt_header { 2362 u8 type; 2363 u8 reserved1; 2364 u16 length; 2365 u16 flags; 2366 u16 reserved2; 2367 u32 memory_device_count; /* Zero means no memory device structs follow */ 2368 /* 2369 * Immediately followed by: 2370 * u8 type_specific_data[] 2371 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2372 */ 2373 }; 2374 2375 /* Values for Type field above */ 2376 2377 #define ACPI_PMTT_TYPE_SOCKET 0 2378 #define ACPI_PMTT_TYPE_CONTROLLER 1 2379 #define ACPI_PMTT_TYPE_DIMM 2 2380 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2381 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2382 2383 /* Values for Flags field above */ 2384 2385 #define ACPI_PMTT_TOP_LEVEL 0x0001 2386 #define ACPI_PMTT_PHYSICAL 0x0002 2387 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2388 2389 /* 2390 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2391 */ 2392 2393 /* 0: Socket Structure */ 2394 2395 struct acpi_pmtt_socket { 2396 struct acpi_pmtt_header header; 2397 u16 socket_id; 2398 u16 reserved; 2399 }; 2400 /* 2401 * Immediately followed by: 2402 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2403 */ 2404 2405 /* 1: Memory Controller subtable */ 2406 2407 struct acpi_pmtt_controller { 2408 struct acpi_pmtt_header header; 2409 u16 controller_id; 2410 u16 reserved; 2411 }; 2412 /* 2413 * Immediately followed by: 2414 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2415 */ 2416 2417 /* 2: Physical Component Identifier (DIMM) */ 2418 2419 struct acpi_pmtt_physical_component { 2420 struct acpi_pmtt_header header; 2421 u32 bios_handle; 2422 }; 2423 2424 /* 0xFF: Vendor Specific Data */ 2425 2426 struct acpi_pmtt_vendor_specific { 2427 struct acpi_pmtt_header header; 2428 u8 type_uuid[16]; 2429 u8 specific[]; 2430 /* 2431 * Immediately followed by: 2432 * u8 vendor_specific_data[]; 2433 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2434 */ 2435 }; 2436 2437 /******************************************************************************* 2438 * 2439 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2440 * Version 1 2441 * 2442 ******************************************************************************/ 2443 2444 struct acpi_table_pptt { 2445 struct acpi_table_header header; /* Common ACPI table header */ 2446 }; 2447 2448 /* Values for Type field above */ 2449 2450 enum acpi_pptt_type { 2451 ACPI_PPTT_TYPE_PROCESSOR = 0, 2452 ACPI_PPTT_TYPE_CACHE = 1, 2453 ACPI_PPTT_TYPE_ID = 2, 2454 ACPI_PPTT_TYPE_RESERVED = 3 2455 }; 2456 2457 /* 0: Processor Hierarchy Node Structure */ 2458 2459 struct acpi_pptt_processor { 2460 struct acpi_subtable_header header; 2461 u16 reserved; 2462 u32 flags; 2463 u32 parent; 2464 u32 acpi_processor_id; 2465 u32 number_of_priv_resources; 2466 }; 2467 2468 /* Flags */ 2469 2470 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2471 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2472 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2473 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2474 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2475 2476 /* 1: Cache Type Structure */ 2477 2478 struct acpi_pptt_cache { 2479 struct acpi_subtable_header header; 2480 u16 reserved; 2481 u32 flags; 2482 u32 next_level_of_cache; 2483 u32 size; 2484 u32 number_of_sets; 2485 u8 associativity; 2486 u8 attributes; 2487 u16 line_size; 2488 }; 2489 2490 /* 1: Cache Type Structure for PPTT version 3 */ 2491 2492 struct acpi_pptt_cache_v1 { 2493 u32 cache_id; 2494 }; 2495 2496 /* Flags */ 2497 2498 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2499 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2500 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2501 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2502 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2503 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2504 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2505 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2506 2507 /* Masks for Attributes */ 2508 2509 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2510 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2511 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2512 2513 /* Attributes describing cache */ 2514 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2515 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2516 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2517 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2518 2519 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2520 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2521 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2522 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2523 2524 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2525 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2526 2527 /* 2: ID Structure */ 2528 2529 struct acpi_pptt_id { 2530 struct acpi_subtable_header header; 2531 u16 reserved; 2532 u32 vendor_id; 2533 u64 level1_id; 2534 u64 level2_id; 2535 u16 major_rev; 2536 u16 minor_rev; 2537 u16 spin_rev; 2538 }; 2539 2540 /******************************************************************************* 2541 * 2542 * PRMT - Platform Runtime Mechanism Table 2543 * Version 1 2544 * 2545 ******************************************************************************/ 2546 2547 struct acpi_table_prmt { 2548 struct acpi_table_header header; /* Common ACPI table header */ 2549 }; 2550 2551 struct acpi_table_prmt_header { 2552 u8 platform_guid[16]; 2553 u32 module_info_offset; 2554 u32 module_info_count; 2555 }; 2556 2557 struct acpi_prmt_module_header { 2558 u16 revision; 2559 u16 length; 2560 }; 2561 2562 struct acpi_prmt_module_info { 2563 u16 revision; 2564 u16 length; 2565 u8 module_guid[16]; 2566 u16 major_rev; 2567 u16 minor_rev; 2568 u16 handler_info_count; 2569 u32 handler_info_offset; 2570 u64 mmio_list_pointer; 2571 }; 2572 2573 struct acpi_prmt_handler_info { 2574 u16 revision; 2575 u16 length; 2576 u8 handler_guid[16]; 2577 u64 handler_address; 2578 u64 static_data_buffer_address; 2579 u64 acpi_param_buffer_address; 2580 }; 2581 2582 /******************************************************************************* 2583 * 2584 * RASF - RAS Feature Table (ACPI 5.0) 2585 * Version 1 2586 * 2587 ******************************************************************************/ 2588 2589 struct acpi_table_rasf { 2590 struct acpi_table_header header; /* Common ACPI table header */ 2591 u8 channel_id[12]; 2592 }; 2593 2594 /* RASF Platform Communication Channel Shared Memory Region */ 2595 2596 struct acpi_rasf_shared_memory { 2597 u32 signature; 2598 u16 command; 2599 u16 status; 2600 u16 version; 2601 u8 capabilities[16]; 2602 u8 set_capabilities[16]; 2603 u16 num_parameter_blocks; 2604 u32 set_capabilities_status; 2605 }; 2606 2607 /* RASF Parameter Block Structure Header */ 2608 2609 struct acpi_rasf_parameter_block { 2610 u16 type; 2611 u16 version; 2612 u16 length; 2613 }; 2614 2615 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2616 2617 struct acpi_rasf_patrol_scrub_parameter { 2618 struct acpi_rasf_parameter_block header; 2619 u16 patrol_scrub_command; 2620 u64 requested_address_range[2]; 2621 u64 actual_address_range[2]; 2622 u16 flags; 2623 u8 requested_speed; 2624 }; 2625 2626 /* Masks for Flags and Speed fields above */ 2627 2628 #define ACPI_RASF_SCRUBBER_RUNNING 1 2629 #define ACPI_RASF_SPEED (7<<1) 2630 #define ACPI_RASF_SPEED_SLOW (0<<1) 2631 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2632 #define ACPI_RASF_SPEED_FAST (7<<1) 2633 2634 /* Channel Commands */ 2635 2636 enum acpi_rasf_commands { 2637 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2638 }; 2639 2640 /* Platform RAS Capabilities */ 2641 2642 enum acpi_rasf_capabiliities { 2643 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2644 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2645 }; 2646 2647 /* Patrol Scrub Commands */ 2648 2649 enum acpi_rasf_patrol_scrub_commands { 2650 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2651 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2652 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2653 }; 2654 2655 /* Channel Command flags */ 2656 2657 #define ACPI_RASF_GENERATE_SCI (1<<15) 2658 2659 /* Status values */ 2660 2661 enum acpi_rasf_status { 2662 ACPI_RASF_SUCCESS = 0, 2663 ACPI_RASF_NOT_VALID = 1, 2664 ACPI_RASF_NOT_SUPPORTED = 2, 2665 ACPI_RASF_BUSY = 3, 2666 ACPI_RASF_FAILED = 4, 2667 ACPI_RASF_ABORTED = 5, 2668 ACPI_RASF_INVALID_DATA = 6 2669 }; 2670 2671 /* Status flags */ 2672 2673 #define ACPI_RASF_COMMAND_COMPLETE (1) 2674 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2675 #define ACPI_RASF_ERROR (1<<2) 2676 #define ACPI_RASF_STATUS (0x1F<<3) 2677 2678 /******************************************************************************* 2679 * 2680 * RGRT - Regulatory Graphics Resource Table 2681 * Version 1 2682 * 2683 * Conforms to "ACPI RGRT" available at: 2684 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2685 * 2686 ******************************************************************************/ 2687 2688 struct acpi_table_rgrt { 2689 struct acpi_table_header header; /* Common ACPI table header */ 2690 u16 version; 2691 u8 image_type; 2692 u8 reserved; 2693 u8 image[]; 2694 }; 2695 2696 /* image_type values */ 2697 2698 enum acpi_rgrt_image_type { 2699 ACPI_RGRT_TYPE_RESERVED0 = 0, 2700 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2701 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2702 }; 2703 2704 /******************************************************************************* 2705 * 2706 * SBST - Smart Battery Specification Table 2707 * Version 1 2708 * 2709 ******************************************************************************/ 2710 2711 struct acpi_table_sbst { 2712 struct acpi_table_header header; /* Common ACPI table header */ 2713 u32 warning_level; 2714 u32 low_level; 2715 u32 critical_level; 2716 }; 2717 2718 /******************************************************************************* 2719 * 2720 * SDEI - Software Delegated Exception Interface Descriptor Table 2721 * 2722 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2723 * May 8th, 2017. Copyright 2017 ARM Ltd. 2724 * 2725 ******************************************************************************/ 2726 2727 struct acpi_table_sdei { 2728 struct acpi_table_header header; /* Common ACPI table header */ 2729 }; 2730 2731 /******************************************************************************* 2732 * 2733 * SDEV - Secure Devices Table (ACPI 6.2) 2734 * Version 1 2735 * 2736 ******************************************************************************/ 2737 2738 struct acpi_table_sdev { 2739 struct acpi_table_header header; /* Common ACPI table header */ 2740 }; 2741 2742 struct acpi_sdev_header { 2743 u8 type; 2744 u8 flags; 2745 u16 length; 2746 }; 2747 2748 /* Values for subtable type above */ 2749 2750 enum acpi_sdev_type { 2751 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2752 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2753 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2754 }; 2755 2756 /* Values for flags above */ 2757 2758 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2759 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2760 2761 /* 2762 * SDEV subtables 2763 */ 2764 2765 /* 0: Namespace Device Based Secure Device Structure */ 2766 2767 struct acpi_sdev_namespace { 2768 struct acpi_sdev_header header; 2769 u16 device_id_offset; 2770 u16 device_id_length; 2771 u16 vendor_data_offset; 2772 u16 vendor_data_length; 2773 }; 2774 2775 struct acpi_sdev_secure_component { 2776 u16 secure_component_offset; 2777 u16 secure_component_length; 2778 }; 2779 2780 /* 2781 * SDEV sub-subtables ("Components") for above 2782 */ 2783 struct acpi_sdev_component { 2784 struct acpi_sdev_header header; 2785 }; 2786 2787 /* Values for sub-subtable type above */ 2788 2789 enum acpi_sac_type { 2790 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2791 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2792 }; 2793 2794 struct acpi_sdev_id_component { 2795 struct acpi_sdev_header header; 2796 u16 hardware_id_offset; 2797 u16 hardware_id_length; 2798 u16 subsystem_id_offset; 2799 u16 subsystem_id_length; 2800 u16 hardware_revision; 2801 u8 hardware_rev_present; 2802 u8 class_code_present; 2803 u8 pci_base_class; 2804 u8 pci_sub_class; 2805 u8 pci_programming_xface; 2806 }; 2807 2808 struct acpi_sdev_mem_component { 2809 struct acpi_sdev_header header; 2810 u32 reserved; 2811 u64 memory_base_address; 2812 u64 memory_length; 2813 }; 2814 2815 /* 1: PCIe Endpoint Device Based Device Structure */ 2816 2817 struct acpi_sdev_pcie { 2818 struct acpi_sdev_header header; 2819 u16 segment; 2820 u16 start_bus; 2821 u16 path_offset; 2822 u16 path_length; 2823 u16 vendor_data_offset; 2824 u16 vendor_data_length; 2825 }; 2826 2827 /* 1a: PCIe Endpoint path entry */ 2828 2829 struct acpi_sdev_pcie_path { 2830 u8 device; 2831 u8 function; 2832 }; 2833 2834 /******************************************************************************* 2835 * 2836 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2837 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2838 * Trust Domain Extensions (Intel TDX)". 2839 * Version 1 2840 * 2841 ******************************************************************************/ 2842 2843 struct acpi_table_svkl { 2844 struct acpi_table_header header; /* Common ACPI table header */ 2845 u32 count; 2846 }; 2847 2848 struct acpi_svkl_key { 2849 u16 type; 2850 u16 format; 2851 u32 size; 2852 u64 address; 2853 }; 2854 2855 enum acpi_svkl_type { 2856 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2857 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2858 }; 2859 2860 enum acpi_svkl_format { 2861 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2862 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2863 }; 2864 2865 /******************************************************************************* 2866 * 2867 * TDEL - TD-Event Log 2868 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2869 * Trust Domain Extensions (Intel TDX)". 2870 * September 2020 2871 * 2872 ******************************************************************************/ 2873 2874 struct acpi_table_tdel { 2875 struct acpi_table_header header; /* Common ACPI table header */ 2876 u32 reserved; 2877 u64 log_area_minimum_length; 2878 u64 log_area_start_address; 2879 }; 2880 2881 /* Reset to default packing */ 2882 2883 #pragma pack() 2884 2885 #endif /* __ACTBL2_H__ */ 2886