1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2022, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_APMT "APMT" /* Arm Performance Monitoring Unit table */ 29 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 30 #define ACPI_SIG_CCEL "CCEL" /* CC Event Log Table */ 31 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 32 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 33 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 34 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 35 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 36 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 37 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 38 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 39 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 40 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 41 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 42 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 43 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 44 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 45 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 46 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 47 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 48 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 49 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 50 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 51 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 52 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 53 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 54 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 55 56 /* 57 * All tables must be byte-packed to match the ACPI specification, since 58 * the tables are provided by the system BIOS. 59 */ 60 #pragma pack(1) 61 62 /* 63 * Note: C bitfields are not used for this reason: 64 * 65 * "Bitfields are great and easy to read, but unfortunately the C language 66 * does not specify the layout of bitfields in memory, which means they are 67 * essentially useless for dealing with packed data in on-disk formats or 68 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 69 * this decision was a design error in C. Ritchie could have picked an order 70 * and stuck with it." Norman Ramsey. 71 * See http://stackoverflow.com/a/1053662/41661 72 */ 73 74 /******************************************************************************* 75 * 76 * AEST - Arm Error Source Table 77 * 78 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 79 * September 2020. 80 * 81 ******************************************************************************/ 82 83 struct acpi_table_aest { 84 struct acpi_table_header header; 85 void *node_array[]; 86 }; 87 88 /* Common Subtable header - one per Node Structure (Subtable) */ 89 90 struct acpi_aest_hdr { 91 u8 type; 92 u16 length; 93 u8 reserved; 94 u32 node_specific_offset; 95 u32 node_interface_offset; 96 u32 node_interrupt_offset; 97 u32 node_interrupt_count; 98 u64 timestamp_rate; 99 u64 reserved1; 100 u64 error_injection_rate; 101 }; 102 103 /* Values for Type above */ 104 105 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 106 #define ACPI_AEST_MEMORY_ERROR_NODE 1 107 #define ACPI_AEST_SMMU_ERROR_NODE 2 108 #define ACPI_AEST_VENDOR_ERROR_NODE 3 109 #define ACPI_AEST_GIC_ERROR_NODE 4 110 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 111 112 /* 113 * AEST subtables (Error nodes) 114 */ 115 116 /* 0: Processor Error */ 117 118 typedef struct acpi_aest_processor { 119 u32 processor_id; 120 u8 resource_type; 121 u8 reserved; 122 u8 flags; 123 u8 revision; 124 u64 processor_affinity; 125 126 } acpi_aest_processor; 127 128 /* Values for resource_type above, related structs below */ 129 130 #define ACPI_AEST_CACHE_RESOURCE 0 131 #define ACPI_AEST_TLB_RESOURCE 1 132 #define ACPI_AEST_GENERIC_RESOURCE 2 133 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 134 135 /* 0R: Processor Cache Resource Substructure */ 136 137 typedef struct acpi_aest_processor_cache { 138 u32 cache_reference; 139 u32 reserved; 140 141 } acpi_aest_processor_cache; 142 143 /* Values for cache_type above */ 144 145 #define ACPI_AEST_CACHE_DATA 0 146 #define ACPI_AEST_CACHE_INSTRUCTION 1 147 #define ACPI_AEST_CACHE_UNIFIED 2 148 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 149 150 /* 1R: Processor TLB Resource Substructure */ 151 152 typedef struct acpi_aest_processor_tlb { 153 u32 tlb_level; 154 u32 reserved; 155 156 } acpi_aest_processor_tlb; 157 158 /* 2R: Processor Generic Resource Substructure */ 159 160 typedef struct acpi_aest_processor_generic { 161 u32 resource; 162 163 } acpi_aest_processor_generic; 164 165 /* 1: Memory Error */ 166 167 typedef struct acpi_aest_memory { 168 u32 srat_proximity_domain; 169 170 } acpi_aest_memory; 171 172 /* 2: Smmu Error */ 173 174 typedef struct acpi_aest_smmu { 175 u32 iort_node_reference; 176 u32 subcomponent_reference; 177 178 } acpi_aest_smmu; 179 180 /* 3: Vendor Defined */ 181 182 typedef struct acpi_aest_vendor { 183 u32 acpi_hid; 184 u32 acpi_uid; 185 u8 vendor_specific_data[16]; 186 187 } acpi_aest_vendor; 188 189 /* 4: Gic Error */ 190 191 typedef struct acpi_aest_gic { 192 u32 interface_type; 193 u32 instance_id; 194 195 } acpi_aest_gic; 196 197 /* Values for interface_type above */ 198 199 #define ACPI_AEST_GIC_CPU 0 200 #define ACPI_AEST_GIC_DISTRIBUTOR 1 201 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 202 #define ACPI_AEST_GIC_ITS 3 203 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 204 205 /* Node Interface Structure */ 206 207 typedef struct acpi_aest_node_interface { 208 u8 type; 209 u8 reserved[3]; 210 u32 flags; 211 u64 address; 212 u32 error_record_index; 213 u32 error_record_count; 214 u64 error_record_implemented; 215 u64 error_status_reporting; 216 u64 addressing_mode; 217 218 } acpi_aest_node_interface; 219 220 /* Values for Type field above */ 221 222 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 223 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 224 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 225 226 /* Node Interrupt Structure */ 227 228 typedef struct acpi_aest_node_interrupt { 229 u8 type; 230 u8 reserved[2]; 231 u8 flags; 232 u32 gsiv; 233 u8 iort_id; 234 u8 reserved1[3]; 235 236 } acpi_aest_node_interrupt; 237 238 /* Values for Type field above */ 239 240 #define ACPI_AEST_NODE_FAULT_HANDLING 0 241 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 242 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 243 244 /******************************************************************************* 245 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 246 * 247 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 248 * ARM DEN0093 v1.1 249 * 250 ******************************************************************************/ 251 struct acpi_table_agdi { 252 struct acpi_table_header header; /* Common ACPI table header */ 253 u8 flags; 254 u8 reserved[3]; 255 u32 sdei_event; 256 u32 gsiv; 257 }; 258 259 /* Mask for Flags field above */ 260 261 #define ACPI_AGDI_SIGNALING_MODE (1) 262 263 /******************************************************************************* 264 * 265 * APMT - ARM Performance Monitoring Unit Table 266 * 267 * Conforms to: 268 * ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document 269 * ARM DEN0117 v1.0 November 25, 2021 270 * 271 ******************************************************************************/ 272 273 struct acpi_table_apmt { 274 struct acpi_table_header header; /* Common ACPI table header */ 275 }; 276 277 #define ACPI_APMT_NODE_ID_LENGTH 4 278 279 /* 280 * APMT subtables 281 */ 282 struct acpi_apmt_node { 283 u16 length; 284 u8 flags; 285 u8 type; 286 u32 id; 287 u64 inst_primary; 288 u32 inst_secondary; 289 u64 base_address0; 290 u64 base_address1; 291 u32 ovflw_irq; 292 u32 reserved; 293 u32 ovflw_irq_flags; 294 u32 proc_affinity; 295 u32 impl_id; 296 }; 297 298 /* Masks for Flags field above */ 299 300 #define ACPI_APMT_FLAGS_DUAL_PAGE (1<<0) 301 #define ACPI_APMT_FLAGS_AFFINITY (1<<1) 302 #define ACPI_APMT_FLAGS_ATOMIC (1<<2) 303 304 /* Values for Flags dual page field above */ 305 306 #define ACPI_APMT_FLAGS_DUAL_PAGE_NSUPP (0<<0) 307 #define ACPI_APMT_FLAGS_DUAL_PAGE_SUPP (1<<0) 308 309 /* Values for Flags processor affinity field above */ 310 #define ACPI_APMT_FLAGS_AFFINITY_PROC (0<<1) 311 #define ACPI_APMT_FLAGS_AFFINITY_PROC_CONTAINER (1<<1) 312 313 /* Values for Flags 64-bit atomic field above */ 314 #define ACPI_APMT_FLAGS_ATOMIC_NSUPP (0<<2) 315 #define ACPI_APMT_FLAGS_ATOMIC_SUPP (1<<2) 316 317 /* Values for Type field above */ 318 319 enum acpi_apmt_node_type { 320 ACPI_APMT_NODE_TYPE_MC = 0x00, 321 ACPI_APMT_NODE_TYPE_SMMU = 0x01, 322 ACPI_APMT_NODE_TYPE_PCIE_ROOT = 0x02, 323 ACPI_APMT_NODE_TYPE_ACPI = 0x03, 324 ACPI_APMT_NODE_TYPE_CACHE = 0x04, 325 ACPI_APMT_NODE_TYPE_COUNT 326 }; 327 328 /* Masks for ovflw_irq_flags field above */ 329 330 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE (1<<0) 331 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE (1<<1) 332 333 /* Values for ovflw_irq_flags mode field above */ 334 335 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_LEVEL (0<<0) 336 #define ACPI_APMT_OVFLW_IRQ_FLAGS_MODE_EDGE (1<<0) 337 338 /* Values for ovflw_irq_flags type field above */ 339 340 #define ACPI_APMT_OVFLW_IRQ_FLAGS_TYPE_WIRED (0<<1) 341 342 /******************************************************************************* 343 * 344 * BDAT - BIOS Data ACPI Table 345 * 346 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 347 * Nov 2020 348 * 349 ******************************************************************************/ 350 351 struct acpi_table_bdat { 352 struct acpi_table_header header; 353 struct acpi_generic_address gas; 354 }; 355 356 /******************************************************************************* 357 * 358 * CCEL - CC-Event Log 359 * From: "Guest-Host-Communication Interface (GHCI) for Intel 360 * Trust Domain Extensions (Intel TDX)". Feb 2022 361 * 362 ******************************************************************************/ 363 364 struct acpi_table_ccel { 365 struct acpi_table_header header; /* Common ACPI table header */ 366 u8 CCtype; 367 u8 Ccsub_type; 368 u16 reserved; 369 u64 log_area_minimum_length; 370 u64 log_area_start_address; 371 }; 372 373 /******************************************************************************* 374 * 375 * IORT - IO Remapping Table 376 * 377 * Conforms to "IO Remapping Table System Software on ARM Platforms", 378 * Document number: ARM DEN 0049E.d, Feb 2022 379 * 380 ******************************************************************************/ 381 382 struct acpi_table_iort { 383 struct acpi_table_header header; 384 u32 node_count; 385 u32 node_offset; 386 u32 reserved; 387 }; 388 389 /* 390 * IORT subtables 391 */ 392 struct acpi_iort_node { 393 u8 type; 394 u16 length; 395 u8 revision; 396 u32 identifier; 397 u32 mapping_count; 398 u32 mapping_offset; 399 char node_data[1]; 400 }; 401 402 /* Values for subtable Type above */ 403 404 enum acpi_iort_node_type { 405 ACPI_IORT_NODE_ITS_GROUP = 0x00, 406 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 407 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 408 ACPI_IORT_NODE_SMMU = 0x03, 409 ACPI_IORT_NODE_SMMU_V3 = 0x04, 410 ACPI_IORT_NODE_PMCG = 0x05, 411 ACPI_IORT_NODE_RMR = 0x06, 412 }; 413 414 struct acpi_iort_id_mapping { 415 u32 input_base; /* Lowest value in input range */ 416 u32 id_count; /* Number of IDs */ 417 u32 output_base; /* Lowest value in output range */ 418 u32 output_reference; /* A reference to the output node */ 419 u32 flags; 420 }; 421 422 /* Masks for Flags field above for IORT subtable */ 423 424 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 425 426 struct acpi_iort_memory_access { 427 u32 cache_coherency; 428 u8 hints; 429 u16 reserved; 430 u8 memory_flags; 431 }; 432 433 /* Values for cache_coherency field above */ 434 435 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 436 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 437 438 /* Masks for Hints field above */ 439 440 #define ACPI_IORT_HT_TRANSIENT (1) 441 #define ACPI_IORT_HT_WRITE (1<<1) 442 #define ACPI_IORT_HT_READ (1<<2) 443 #define ACPI_IORT_HT_OVERRIDE (1<<3) 444 445 /* Masks for memory_flags field above */ 446 447 #define ACPI_IORT_MF_COHERENCY (1) 448 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 449 450 /* 451 * IORT node specific subtables 452 */ 453 struct acpi_iort_its_group { 454 u32 its_count; 455 u32 identifiers[1]; /* GIC ITS identifier array */ 456 }; 457 458 struct acpi_iort_named_component { 459 u32 node_flags; 460 u64 memory_properties; /* Memory access properties */ 461 u8 memory_address_limit; /* Memory address size limit */ 462 char device_name[1]; /* Path of namespace object */ 463 }; 464 465 /* Masks for Flags field above */ 466 467 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 468 #define ACPI_IORT_NC_PASID_BITS (31<<1) 469 470 struct acpi_iort_root_complex { 471 u64 memory_properties; /* Memory access properties */ 472 u32 ats_attribute; 473 u32 pci_segment_number; 474 u8 memory_address_limit; /* Memory address size limit */ 475 u16 pasid_capabilities; /* PASID Capabilities */ 476 u8 reserved[1]; /* Reserved, must be zero */ 477 }; 478 479 /* Masks for ats_attribute field above */ 480 481 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 482 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 483 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 484 485 /* Masks for pasid_capabilities field above */ 486 #define ACPI_IORT_PASID_MAX_WIDTH (0x1F) /* Bits 0-4 */ 487 488 struct acpi_iort_smmu { 489 u64 base_address; /* SMMU base address */ 490 u64 span; /* Length of memory range */ 491 u32 model; 492 u32 flags; 493 u32 global_interrupt_offset; 494 u32 context_interrupt_count; 495 u32 context_interrupt_offset; 496 u32 pmu_interrupt_count; 497 u32 pmu_interrupt_offset; 498 u64 interrupts[1]; /* Interrupt array */ 499 }; 500 501 /* Values for Model field above */ 502 503 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 504 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 505 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 506 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 507 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 508 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 509 510 /* Masks for Flags field above */ 511 512 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 513 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 514 515 /* Global interrupt format */ 516 517 struct acpi_iort_smmu_gsi { 518 u32 nsg_irpt; 519 u32 nsg_irpt_flags; 520 u32 nsg_cfg_irpt; 521 u32 nsg_cfg_irpt_flags; 522 }; 523 524 struct acpi_iort_smmu_v3 { 525 u64 base_address; /* SMMUv3 base address */ 526 u32 flags; 527 u32 reserved; 528 u64 vatos_address; 529 u32 model; 530 u32 event_gsiv; 531 u32 pri_gsiv; 532 u32 gerr_gsiv; 533 u32 sync_gsiv; 534 u32 pxm; 535 u32 id_mapping_index; 536 }; 537 538 /* Values for Model field above */ 539 540 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 541 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 542 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 543 544 /* Masks for Flags field above */ 545 546 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 547 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 548 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 549 550 struct acpi_iort_pmcg { 551 u64 page0_base_address; 552 u32 overflow_gsiv; 553 u32 node_reference; 554 u64 page1_base_address; 555 }; 556 557 struct acpi_iort_rmr { 558 u32 flags; 559 u32 rmr_count; 560 u32 rmr_offset; 561 }; 562 563 /* Masks for Flags field above */ 564 #define ACPI_IORT_RMR_REMAP_PERMITTED (1) 565 #define ACPI_IORT_RMR_ACCESS_PRIVILEGE (1<<1) 566 567 /* 568 * Macro to access the Access Attributes in flags field above: 569 * Access Attributes is encoded in bits 9:2 570 */ 571 #define ACPI_IORT_RMR_ACCESS_ATTRIBUTES(flags) (((flags) >> 2) & 0xFF) 572 573 /* Values for above Access Attributes */ 574 575 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRNE 0x00 576 #define ACPI_IORT_RMR_ATTR_DEVICE_NGNRE 0x01 577 #define ACPI_IORT_RMR_ATTR_DEVICE_NGRE 0x02 578 #define ACPI_IORT_RMR_ATTR_DEVICE_GRE 0x03 579 #define ACPI_IORT_RMR_ATTR_NORMAL_NC 0x04 580 #define ACPI_IORT_RMR_ATTR_NORMAL_IWB_OWB 0x05 581 582 struct acpi_iort_rmr_desc { 583 u64 base_address; 584 u64 length; 585 u32 reserved; 586 }; 587 588 /******************************************************************************* 589 * 590 * IVRS - I/O Virtualization Reporting Structure 591 * Version 1 592 * 593 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 594 * Revision 1.26, February 2009. 595 * 596 ******************************************************************************/ 597 598 struct acpi_table_ivrs { 599 struct acpi_table_header header; /* Common ACPI table header */ 600 u32 info; /* Common virtualization info */ 601 u64 reserved; 602 }; 603 604 /* Values for Info field above */ 605 606 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 607 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 608 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 609 610 /* IVRS subtable header */ 611 612 struct acpi_ivrs_header { 613 u8 type; /* Subtable type */ 614 u8 flags; 615 u16 length; /* Subtable length */ 616 u16 device_id; /* ID of IOMMU */ 617 }; 618 619 /* Values for subtable Type above */ 620 621 enum acpi_ivrs_type { 622 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 623 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 624 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 625 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 626 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 627 ACPI_IVRS_TYPE_MEMORY3 = 0x22 628 }; 629 630 /* Masks for Flags field above for IVHD subtable */ 631 632 #define ACPI_IVHD_TT_ENABLE (1) 633 #define ACPI_IVHD_PASS_PW (1<<1) 634 #define ACPI_IVHD_RES_PASS_PW (1<<2) 635 #define ACPI_IVHD_ISOC (1<<3) 636 #define ACPI_IVHD_IOTLB (1<<4) 637 638 /* Masks for Flags field above for IVMD subtable */ 639 640 #define ACPI_IVMD_UNITY (1) 641 #define ACPI_IVMD_READ (1<<1) 642 #define ACPI_IVMD_WRITE (1<<2) 643 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 644 645 /* 646 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 647 */ 648 649 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 650 651 struct acpi_ivrs_hardware_10 { 652 struct acpi_ivrs_header header; 653 u16 capability_offset; /* Offset for IOMMU control fields */ 654 u64 base_address; /* IOMMU control registers */ 655 u16 pci_segment_group; 656 u16 info; /* MSI number and unit ID */ 657 u32 feature_reporting; 658 }; 659 660 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 661 662 struct acpi_ivrs_hardware_11 { 663 struct acpi_ivrs_header header; 664 u16 capability_offset; /* Offset for IOMMU control fields */ 665 u64 base_address; /* IOMMU control registers */ 666 u16 pci_segment_group; 667 u16 info; /* MSI number and unit ID */ 668 u32 attributes; 669 u64 efr_register_image; 670 u64 reserved; 671 }; 672 673 /* Masks for Info field above */ 674 675 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 676 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 677 678 /* 679 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 680 * Upper two bits of the Type field are the (encoded) length of the structure. 681 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 682 * are reserved for future use but not defined. 683 */ 684 struct acpi_ivrs_de_header { 685 u8 type; 686 u16 id; 687 u8 data_setting; 688 }; 689 690 /* Length of device entry is in the top two bits of Type field above */ 691 692 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 693 694 /* Values for device entry Type field above */ 695 696 enum acpi_ivrs_device_entry_type { 697 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 698 699 ACPI_IVRS_TYPE_PAD4 = 0, 700 ACPI_IVRS_TYPE_ALL = 1, 701 ACPI_IVRS_TYPE_SELECT = 2, 702 ACPI_IVRS_TYPE_START = 3, 703 ACPI_IVRS_TYPE_END = 4, 704 705 /* 8-byte device entries */ 706 707 ACPI_IVRS_TYPE_PAD8 = 64, 708 ACPI_IVRS_TYPE_NOT_USED = 65, 709 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 710 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 711 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 712 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 713 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 714 715 /* Variable-length device entries */ 716 717 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 718 }; 719 720 /* Values for Data field above */ 721 722 #define ACPI_IVHD_INIT_PASS (1) 723 #define ACPI_IVHD_EINT_PASS (1<<1) 724 #define ACPI_IVHD_NMI_PASS (1<<2) 725 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 726 #define ACPI_IVHD_LINT0_PASS (1<<6) 727 #define ACPI_IVHD_LINT1_PASS (1<<7) 728 729 /* Types 0-4: 4-byte device entry */ 730 731 struct acpi_ivrs_device4 { 732 struct acpi_ivrs_de_header header; 733 }; 734 735 /* Types 66-67: 8-byte device entry */ 736 737 struct acpi_ivrs_device8a { 738 struct acpi_ivrs_de_header header; 739 u8 reserved1; 740 u16 used_id; 741 u8 reserved2; 742 }; 743 744 /* Types 70-71: 8-byte device entry */ 745 746 struct acpi_ivrs_device8b { 747 struct acpi_ivrs_de_header header; 748 u32 extended_data; 749 }; 750 751 /* Values for extended_data above */ 752 753 #define ACPI_IVHD_ATS_DISABLED (1<<31) 754 755 /* Type 72: 8-byte device entry */ 756 757 struct acpi_ivrs_device8c { 758 struct acpi_ivrs_de_header header; 759 u8 handle; 760 u16 used_id; 761 u8 variety; 762 }; 763 764 /* Values for Variety field above */ 765 766 #define ACPI_IVHD_IOAPIC 1 767 #define ACPI_IVHD_HPET 2 768 769 /* Type 240: variable-length device entry */ 770 771 struct acpi_ivrs_device_hid { 772 struct acpi_ivrs_de_header header; 773 u64 acpi_hid; 774 u64 acpi_cid; 775 u8 uid_type; 776 u8 uid_length; 777 }; 778 779 /* Values for uid_type above */ 780 781 #define ACPI_IVRS_UID_NOT_PRESENT 0 782 #define ACPI_IVRS_UID_IS_INTEGER 1 783 #define ACPI_IVRS_UID_IS_STRING 2 784 785 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 786 787 struct acpi_ivrs_memory { 788 struct acpi_ivrs_header header; 789 u16 aux_data; 790 u64 reserved; 791 u64 start_address; 792 u64 memory_length; 793 }; 794 795 /******************************************************************************* 796 * 797 * LPIT - Low Power Idle Table 798 * 799 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 800 * 801 ******************************************************************************/ 802 803 struct acpi_table_lpit { 804 struct acpi_table_header header; /* Common ACPI table header */ 805 }; 806 807 /* LPIT subtable header */ 808 809 struct acpi_lpit_header { 810 u32 type; /* Subtable type */ 811 u32 length; /* Subtable length */ 812 u16 unique_id; 813 u16 reserved; 814 u32 flags; 815 }; 816 817 /* Values for subtable Type above */ 818 819 enum acpi_lpit_type { 820 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 821 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 822 }; 823 824 /* Masks for Flags field above */ 825 826 #define ACPI_LPIT_STATE_DISABLED (1) 827 #define ACPI_LPIT_NO_COUNTER (1<<1) 828 829 /* 830 * LPIT subtables, correspond to Type in struct acpi_lpit_header 831 */ 832 833 /* 0x00: Native C-state instruction based LPI structure */ 834 835 struct acpi_lpit_native { 836 struct acpi_lpit_header header; 837 struct acpi_generic_address entry_trigger; 838 u32 residency; 839 u32 latency; 840 struct acpi_generic_address residency_counter; 841 u64 counter_frequency; 842 }; 843 844 /******************************************************************************* 845 * 846 * MADT - Multiple APIC Description Table 847 * Version 3 848 * 849 ******************************************************************************/ 850 851 struct acpi_table_madt { 852 struct acpi_table_header header; /* Common ACPI table header */ 853 u32 address; /* Physical address of local APIC */ 854 u32 flags; 855 }; 856 857 /* Masks for Flags field above */ 858 859 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 860 861 /* Values for PCATCompat flag */ 862 863 #define ACPI_MADT_DUAL_PIC 1 864 #define ACPI_MADT_MULTIPLE_APIC 0 865 866 /* Values for MADT subtable type in struct acpi_subtable_header */ 867 868 enum acpi_madt_type { 869 ACPI_MADT_TYPE_LOCAL_APIC = 0, 870 ACPI_MADT_TYPE_IO_APIC = 1, 871 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 872 ACPI_MADT_TYPE_NMI_SOURCE = 3, 873 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 874 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 875 ACPI_MADT_TYPE_IO_SAPIC = 6, 876 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 877 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 878 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 879 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 880 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 881 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 882 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 883 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 884 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 885 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 886 ACPI_MADT_TYPE_CORE_PIC = 17, 887 ACPI_MADT_TYPE_LIO_PIC = 18, 888 ACPI_MADT_TYPE_HT_PIC = 19, 889 ACPI_MADT_TYPE_EIO_PIC = 20, 890 ACPI_MADT_TYPE_MSI_PIC = 21, 891 ACPI_MADT_TYPE_BIO_PIC = 22, 892 ACPI_MADT_TYPE_LPC_PIC = 23, 893 ACPI_MADT_TYPE_RESERVED = 24, /* 24 to 0x7F are reserved */ 894 ACPI_MADT_TYPE_OEM_RESERVED = 0x80 /* 0x80 to 0xFF are reserved for OEM use */ 895 }; 896 897 /* 898 * MADT Subtables, correspond to Type in struct acpi_subtable_header 899 */ 900 901 /* 0: Processor Local APIC */ 902 903 struct acpi_madt_local_apic { 904 struct acpi_subtable_header header; 905 u8 processor_id; /* ACPI processor id */ 906 u8 id; /* Processor's local APIC id */ 907 u32 lapic_flags; 908 }; 909 910 /* 1: IO APIC */ 911 912 struct acpi_madt_io_apic { 913 struct acpi_subtable_header header; 914 u8 id; /* I/O APIC ID */ 915 u8 reserved; /* reserved - must be zero */ 916 u32 address; /* APIC physical address */ 917 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 918 }; 919 920 /* 2: Interrupt Override */ 921 922 struct acpi_madt_interrupt_override { 923 struct acpi_subtable_header header; 924 u8 bus; /* 0 - ISA */ 925 u8 source_irq; /* Interrupt source (IRQ) */ 926 u32 global_irq; /* Global system interrupt */ 927 u16 inti_flags; 928 }; 929 930 /* 3: NMI Source */ 931 932 struct acpi_madt_nmi_source { 933 struct acpi_subtable_header header; 934 u16 inti_flags; 935 u32 global_irq; /* Global system interrupt */ 936 }; 937 938 /* 4: Local APIC NMI */ 939 940 struct acpi_madt_local_apic_nmi { 941 struct acpi_subtable_header header; 942 u8 processor_id; /* ACPI processor id */ 943 u16 inti_flags; 944 u8 lint; /* LINTn to which NMI is connected */ 945 }; 946 947 /* 5: Address Override */ 948 949 struct acpi_madt_local_apic_override { 950 struct acpi_subtable_header header; 951 u16 reserved; /* Reserved, must be zero */ 952 u64 address; /* APIC physical address */ 953 }; 954 955 /* 6: I/O Sapic */ 956 957 struct acpi_madt_io_sapic { 958 struct acpi_subtable_header header; 959 u8 id; /* I/O SAPIC ID */ 960 u8 reserved; /* Reserved, must be zero */ 961 u32 global_irq_base; /* Global interrupt for SAPIC start */ 962 u64 address; /* SAPIC physical address */ 963 }; 964 965 /* 7: Local Sapic */ 966 967 struct acpi_madt_local_sapic { 968 struct acpi_subtable_header header; 969 u8 processor_id; /* ACPI processor id */ 970 u8 id; /* SAPIC ID */ 971 u8 eid; /* SAPIC EID */ 972 u8 reserved[3]; /* Reserved, must be zero */ 973 u32 lapic_flags; 974 u32 uid; /* Numeric UID - ACPI 3.0 */ 975 char uid_string[1]; /* String UID - ACPI 3.0 */ 976 }; 977 978 /* 8: Platform Interrupt Source */ 979 980 struct acpi_madt_interrupt_source { 981 struct acpi_subtable_header header; 982 u16 inti_flags; 983 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 984 u8 id; /* Processor ID */ 985 u8 eid; /* Processor EID */ 986 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 987 u32 global_irq; /* Global system interrupt */ 988 u32 flags; /* Interrupt Source Flags */ 989 }; 990 991 /* Masks for Flags field above */ 992 993 #define ACPI_MADT_CPEI_OVERRIDE (1) 994 995 /* 9: Processor Local X2APIC (ACPI 4.0) */ 996 997 struct acpi_madt_local_x2apic { 998 struct acpi_subtable_header header; 999 u16 reserved; /* reserved - must be zero */ 1000 u32 local_apic_id; /* Processor x2APIC ID */ 1001 u32 lapic_flags; 1002 u32 uid; /* ACPI processor UID */ 1003 }; 1004 1005 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1006 1007 struct acpi_madt_local_x2apic_nmi { 1008 struct acpi_subtable_header header; 1009 u16 inti_flags; 1010 u32 uid; /* ACPI processor UID */ 1011 u8 lint; /* LINTn to which NMI is connected */ 1012 u8 reserved[3]; /* reserved - must be zero */ 1013 }; 1014 1015 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 1016 1017 struct acpi_madt_generic_interrupt { 1018 struct acpi_subtable_header header; 1019 u16 reserved; /* reserved - must be zero */ 1020 u32 cpu_interface_number; 1021 u32 uid; 1022 u32 flags; 1023 u32 parking_version; 1024 u32 performance_interrupt; 1025 u64 parked_address; 1026 u64 base_address; 1027 u64 gicv_base_address; 1028 u64 gich_base_address; 1029 u32 vgic_interrupt; 1030 u64 gicr_base_address; 1031 u64 arm_mpidr; 1032 u8 efficiency_class; 1033 u8 reserved2[1]; 1034 u16 spe_interrupt; /* ACPI 6.3 */ 1035 }; 1036 1037 /* Masks for Flags field above */ 1038 1039 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1040 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1041 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1042 1043 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1044 1045 struct acpi_madt_generic_distributor { 1046 struct acpi_subtable_header header; 1047 u16 reserved; /* reserved - must be zero */ 1048 u32 gic_id; 1049 u64 base_address; 1050 u32 global_irq_base; 1051 u8 version; 1052 u8 reserved2[3]; /* reserved - must be zero */ 1053 }; 1054 1055 /* Values for Version field above */ 1056 1057 enum acpi_madt_gic_version { 1058 ACPI_MADT_GIC_VERSION_NONE = 0, 1059 ACPI_MADT_GIC_VERSION_V1 = 1, 1060 ACPI_MADT_GIC_VERSION_V2 = 2, 1061 ACPI_MADT_GIC_VERSION_V3 = 3, 1062 ACPI_MADT_GIC_VERSION_V4 = 4, 1063 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1064 }; 1065 1066 /* 13: Generic MSI Frame (ACPI 5.1) */ 1067 1068 struct acpi_madt_generic_msi_frame { 1069 struct acpi_subtable_header header; 1070 u16 reserved; /* reserved - must be zero */ 1071 u32 msi_frame_id; 1072 u64 base_address; 1073 u32 flags; 1074 u16 spi_count; 1075 u16 spi_base; 1076 }; 1077 1078 /* Masks for Flags field above */ 1079 1080 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1081 1082 /* 14: Generic Redistributor (ACPI 5.1) */ 1083 1084 struct acpi_madt_generic_redistributor { 1085 struct acpi_subtable_header header; 1086 u16 reserved; /* reserved - must be zero */ 1087 u64 base_address; 1088 u32 length; 1089 }; 1090 1091 /* 15: Generic Translator (ACPI 6.0) */ 1092 1093 struct acpi_madt_generic_translator { 1094 struct acpi_subtable_header header; 1095 u16 reserved; /* reserved - must be zero */ 1096 u32 translation_id; 1097 u64 base_address; 1098 u32 reserved2; 1099 }; 1100 1101 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1102 1103 struct acpi_madt_multiproc_wakeup { 1104 struct acpi_subtable_header header; 1105 u16 mailbox_version; 1106 u32 reserved; /* reserved - must be zero */ 1107 u64 base_address; 1108 }; 1109 1110 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1111 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1112 1113 struct acpi_madt_multiproc_wakeup_mailbox { 1114 u16 command; 1115 u16 reserved; /* reserved - must be zero */ 1116 u32 apic_id; 1117 u64 wakeup_vector; 1118 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1119 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1120 }; 1121 1122 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1123 1124 /* 17: CPU Core Interrupt Controller (ACPI 6.5) */ 1125 1126 struct acpi_madt_core_pic { 1127 struct acpi_subtable_header header; 1128 u8 version; 1129 u32 processor_id; 1130 u32 core_id; 1131 u32 flags; 1132 }; 1133 1134 /* Values for Version field above */ 1135 1136 enum acpi_madt_core_pic_version { 1137 ACPI_MADT_CORE_PIC_VERSION_NONE = 0, 1138 ACPI_MADT_CORE_PIC_VERSION_V1 = 1, 1139 ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1140 }; 1141 1142 /* 18: Legacy I/O Interrupt Controller (ACPI 6.5) */ 1143 1144 struct acpi_madt_lio_pic { 1145 struct acpi_subtable_header header; 1146 u8 version; 1147 u64 address; 1148 u16 size; 1149 u8 cascade[2]; 1150 u32 cascade_map[2]; 1151 }; 1152 1153 /* Values for Version field above */ 1154 1155 enum acpi_madt_lio_pic_version { 1156 ACPI_MADT_LIO_PIC_VERSION_NONE = 0, 1157 ACPI_MADT_LIO_PIC_VERSION_V1 = 1, 1158 ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1159 }; 1160 1161 /* 19: HT Interrupt Controller (ACPI 6.5) */ 1162 1163 struct acpi_madt_ht_pic { 1164 struct acpi_subtable_header header; 1165 u8 version; 1166 u64 address; 1167 u16 size; 1168 u8 cascade[8]; 1169 }; 1170 1171 /* Values for Version field above */ 1172 1173 enum acpi_madt_ht_pic_version { 1174 ACPI_MADT_HT_PIC_VERSION_NONE = 0, 1175 ACPI_MADT_HT_PIC_VERSION_V1 = 1, 1176 ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1177 }; 1178 1179 /* 20: Extend I/O Interrupt Controller (ACPI 6.5) */ 1180 1181 struct acpi_madt_eio_pic { 1182 struct acpi_subtable_header header; 1183 u8 version; 1184 u8 cascade; 1185 u8 node; 1186 u64 node_map; 1187 }; 1188 1189 /* Values for Version field above */ 1190 1191 enum acpi_madt_eio_pic_version { 1192 ACPI_MADT_EIO_PIC_VERSION_NONE = 0, 1193 ACPI_MADT_EIO_PIC_VERSION_V1 = 1, 1194 ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1195 }; 1196 1197 /* 21: MSI Interrupt Controller (ACPI 6.5) */ 1198 1199 struct acpi_madt_msi_pic { 1200 struct acpi_subtable_header header; 1201 u8 version; 1202 u64 msg_address; 1203 u32 start; 1204 u32 count; 1205 }; 1206 1207 /* Values for Version field above */ 1208 1209 enum acpi_madt_msi_pic_version { 1210 ACPI_MADT_MSI_PIC_VERSION_NONE = 0, 1211 ACPI_MADT_MSI_PIC_VERSION_V1 = 1, 1212 ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1213 }; 1214 1215 /* 22: Bridge I/O Interrupt Controller (ACPI 6.5) */ 1216 1217 struct acpi_madt_bio_pic { 1218 struct acpi_subtable_header header; 1219 u8 version; 1220 u64 address; 1221 u16 size; 1222 u16 id; 1223 u16 gsi_base; 1224 }; 1225 1226 /* Values for Version field above */ 1227 1228 enum acpi_madt_bio_pic_version { 1229 ACPI_MADT_BIO_PIC_VERSION_NONE = 0, 1230 ACPI_MADT_BIO_PIC_VERSION_V1 = 1, 1231 ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1232 }; 1233 1234 /* 23: LPC Interrupt Controller (ACPI 6.5) */ 1235 1236 struct acpi_madt_lpc_pic { 1237 struct acpi_subtable_header header; 1238 u8 version; 1239 u64 address; 1240 u16 size; 1241 u8 cascade; 1242 }; 1243 1244 /* Values for Version field above */ 1245 1246 enum acpi_madt_lpc_pic_version { 1247 ACPI_MADT_LPC_PIC_VERSION_NONE = 0, 1248 ACPI_MADT_LPC_PIC_VERSION_V1 = 1, 1249 ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ 1250 }; 1251 1252 /* 80: OEM data */ 1253 1254 struct acpi_madt_oem_data { 1255 u8 oem_data[0]; 1256 }; 1257 1258 /* 1259 * Common flags fields for MADT subtables 1260 */ 1261 1262 /* MADT Local APIC flags */ 1263 1264 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1265 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1266 1267 /* MADT MPS INTI flags (inti_flags) */ 1268 1269 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1270 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1271 1272 /* Values for MPS INTI flags */ 1273 1274 #define ACPI_MADT_POLARITY_CONFORMS 0 1275 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1276 #define ACPI_MADT_POLARITY_RESERVED 2 1277 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1278 1279 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1280 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1281 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1282 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1283 1284 /******************************************************************************* 1285 * 1286 * MCFG - PCI Memory Mapped Configuration table and subtable 1287 * Version 1 1288 * 1289 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1290 * 1291 ******************************************************************************/ 1292 1293 struct acpi_table_mcfg { 1294 struct acpi_table_header header; /* Common ACPI table header */ 1295 u8 reserved[8]; 1296 }; 1297 1298 /* Subtable */ 1299 1300 struct acpi_mcfg_allocation { 1301 u64 address; /* Base address, processor-relative */ 1302 u16 pci_segment; /* PCI segment group number */ 1303 u8 start_bus_number; /* Starting PCI Bus number */ 1304 u8 end_bus_number; /* Final PCI Bus number */ 1305 u32 reserved; 1306 }; 1307 1308 /******************************************************************************* 1309 * 1310 * MCHI - Management Controller Host Interface Table 1311 * Version 1 1312 * 1313 * Conforms to "Management Component Transport Protocol (MCTP) Host 1314 * Interface Specification", Revision 1.0.0a, October 13, 2009 1315 * 1316 ******************************************************************************/ 1317 1318 struct acpi_table_mchi { 1319 struct acpi_table_header header; /* Common ACPI table header */ 1320 u8 interface_type; 1321 u8 protocol; 1322 u64 protocol_data; 1323 u8 interrupt_type; 1324 u8 gpe; 1325 u8 pci_device_flag; 1326 u32 global_interrupt; 1327 struct acpi_generic_address control_register; 1328 u8 pci_segment; 1329 u8 pci_bus; 1330 u8 pci_device; 1331 u8 pci_function; 1332 }; 1333 1334 /******************************************************************************* 1335 * 1336 * MPST - Memory Power State Table (ACPI 5.0) 1337 * Version 1 1338 * 1339 ******************************************************************************/ 1340 1341 #define ACPI_MPST_CHANNEL_INFO \ 1342 u8 channel_id; \ 1343 u8 reserved1[3]; \ 1344 u16 power_node_count; \ 1345 u16 reserved2; 1346 1347 /* Main table */ 1348 1349 struct acpi_table_mpst { 1350 struct acpi_table_header header; /* Common ACPI table header */ 1351 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1352 }; 1353 1354 /* Memory Platform Communication Channel Info */ 1355 1356 struct acpi_mpst_channel { 1357 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1358 }; 1359 1360 /* Memory Power Node Structure */ 1361 1362 struct acpi_mpst_power_node { 1363 u8 flags; 1364 u8 reserved1; 1365 u16 node_id; 1366 u32 length; 1367 u64 range_address; 1368 u64 range_length; 1369 u32 num_power_states; 1370 u32 num_physical_components; 1371 }; 1372 1373 /* Values for Flags field above */ 1374 1375 #define ACPI_MPST_ENABLED 1 1376 #define ACPI_MPST_POWER_MANAGED 2 1377 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1378 1379 /* Memory Power State Structure (follows POWER_NODE above) */ 1380 1381 struct acpi_mpst_power_state { 1382 u8 power_state; 1383 u8 info_index; 1384 }; 1385 1386 /* Physical Component ID Structure (follows POWER_STATE above) */ 1387 1388 struct acpi_mpst_component { 1389 u16 component_id; 1390 }; 1391 1392 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1393 1394 struct acpi_mpst_data_hdr { 1395 u16 characteristics_count; 1396 u16 reserved; 1397 }; 1398 1399 struct acpi_mpst_power_data { 1400 u8 structure_id; 1401 u8 flags; 1402 u16 reserved1; 1403 u32 average_power; 1404 u32 power_saving; 1405 u64 exit_latency; 1406 u64 reserved2; 1407 }; 1408 1409 /* Values for Flags field above */ 1410 1411 #define ACPI_MPST_PRESERVE 1 1412 #define ACPI_MPST_AUTOENTRY 2 1413 #define ACPI_MPST_AUTOEXIT 4 1414 1415 /* Shared Memory Region (not part of an ACPI table) */ 1416 1417 struct acpi_mpst_shared { 1418 u32 signature; 1419 u16 pcc_command; 1420 u16 pcc_status; 1421 u32 command_register; 1422 u32 status_register; 1423 u32 power_state_id; 1424 u32 power_node_id; 1425 u64 energy_consumed; 1426 u64 average_power; 1427 }; 1428 1429 /******************************************************************************* 1430 * 1431 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1432 * Version 1 1433 * 1434 ******************************************************************************/ 1435 1436 struct acpi_table_msct { 1437 struct acpi_table_header header; /* Common ACPI table header */ 1438 u32 proximity_offset; /* Location of proximity info struct(s) */ 1439 u32 max_proximity_domains; /* Max number of proximity domains */ 1440 u32 max_clock_domains; /* Max number of clock domains */ 1441 u64 max_address; /* Max physical address in system */ 1442 }; 1443 1444 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1445 1446 struct acpi_msct_proximity { 1447 u8 revision; 1448 u8 length; 1449 u32 range_start; /* Start of domain range */ 1450 u32 range_end; /* End of domain range */ 1451 u32 processor_capacity; 1452 u64 memory_capacity; /* In bytes */ 1453 }; 1454 1455 /******************************************************************************* 1456 * 1457 * MSDM - Microsoft Data Management table 1458 * 1459 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1460 * November 29, 2011. Copyright 2011 Microsoft 1461 * 1462 ******************************************************************************/ 1463 1464 /* Basic MSDM table is only the common ACPI header */ 1465 1466 struct acpi_table_msdm { 1467 struct acpi_table_header header; /* Common ACPI table header */ 1468 }; 1469 1470 /******************************************************************************* 1471 * 1472 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1473 * Version 1 1474 * 1475 ******************************************************************************/ 1476 1477 struct acpi_table_nfit { 1478 struct acpi_table_header header; /* Common ACPI table header */ 1479 u32 reserved; /* Reserved, must be zero */ 1480 }; 1481 1482 /* Subtable header for NFIT */ 1483 1484 struct acpi_nfit_header { 1485 u16 type; 1486 u16 length; 1487 }; 1488 1489 /* Values for subtable type in struct acpi_nfit_header */ 1490 1491 enum acpi_nfit_type { 1492 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1493 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1494 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1495 ACPI_NFIT_TYPE_SMBIOS = 3, 1496 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1497 ACPI_NFIT_TYPE_DATA_REGION = 5, 1498 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1499 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1500 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1501 }; 1502 1503 /* 1504 * NFIT Subtables 1505 */ 1506 1507 /* 0: System Physical Address Range Structure */ 1508 1509 struct acpi_nfit_system_address { 1510 struct acpi_nfit_header header; 1511 u16 range_index; 1512 u16 flags; 1513 u32 reserved; /* Reserved, must be zero */ 1514 u32 proximity_domain; 1515 u8 range_guid[16]; 1516 u64 address; 1517 u64 length; 1518 u64 memory_mapping; 1519 u64 location_cookie; /* ACPI 6.4 */ 1520 }; 1521 1522 /* Flags */ 1523 1524 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1525 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1526 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1527 1528 /* Range Type GUIDs appear in the include/acuuid.h file */ 1529 1530 /* 1: Memory Device to System Address Range Map Structure */ 1531 1532 struct acpi_nfit_memory_map { 1533 struct acpi_nfit_header header; 1534 u32 device_handle; 1535 u16 physical_id; 1536 u16 region_id; 1537 u16 range_index; 1538 u16 region_index; 1539 u64 region_size; 1540 u64 region_offset; 1541 u64 address; 1542 u16 interleave_index; 1543 u16 interleave_ways; 1544 u16 flags; 1545 u16 reserved; /* Reserved, must be zero */ 1546 }; 1547 1548 /* Flags */ 1549 1550 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1551 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1552 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1553 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1554 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1555 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1556 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1557 1558 /* 2: Interleave Structure */ 1559 1560 struct acpi_nfit_interleave { 1561 struct acpi_nfit_header header; 1562 u16 interleave_index; 1563 u16 reserved; /* Reserved, must be zero */ 1564 u32 line_count; 1565 u32 line_size; 1566 u32 line_offset[1]; /* Variable length */ 1567 }; 1568 1569 /* 3: SMBIOS Management Information Structure */ 1570 1571 struct acpi_nfit_smbios { 1572 struct acpi_nfit_header header; 1573 u32 reserved; /* Reserved, must be zero */ 1574 u8 data[1]; /* Variable length */ 1575 }; 1576 1577 /* 4: NVDIMM Control Region Structure */ 1578 1579 struct acpi_nfit_control_region { 1580 struct acpi_nfit_header header; 1581 u16 region_index; 1582 u16 vendor_id; 1583 u16 device_id; 1584 u16 revision_id; 1585 u16 subsystem_vendor_id; 1586 u16 subsystem_device_id; 1587 u16 subsystem_revision_id; 1588 u8 valid_fields; 1589 u8 manufacturing_location; 1590 u16 manufacturing_date; 1591 u8 reserved[2]; /* Reserved, must be zero */ 1592 u32 serial_number; 1593 u16 code; 1594 u16 windows; 1595 u64 window_size; 1596 u64 command_offset; 1597 u64 command_size; 1598 u64 status_offset; 1599 u64 status_size; 1600 u16 flags; 1601 u8 reserved1[6]; /* Reserved, must be zero */ 1602 }; 1603 1604 /* Flags */ 1605 1606 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1607 1608 /* valid_fields bits */ 1609 1610 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1611 1612 /* 5: NVDIMM Block Data Window Region Structure */ 1613 1614 struct acpi_nfit_data_region { 1615 struct acpi_nfit_header header; 1616 u16 region_index; 1617 u16 windows; 1618 u64 offset; 1619 u64 size; 1620 u64 capacity; 1621 u64 start_address; 1622 }; 1623 1624 /* 6: Flush Hint Address Structure */ 1625 1626 struct acpi_nfit_flush_address { 1627 struct acpi_nfit_header header; 1628 u32 device_handle; 1629 u16 hint_count; 1630 u8 reserved[6]; /* Reserved, must be zero */ 1631 u64 hint_address[1]; /* Variable length */ 1632 }; 1633 1634 /* 7: Platform Capabilities Structure */ 1635 1636 struct acpi_nfit_capabilities { 1637 struct acpi_nfit_header header; 1638 u8 highest_capability; 1639 u8 reserved[3]; /* Reserved, must be zero */ 1640 u32 capabilities; 1641 u32 reserved2; 1642 }; 1643 1644 /* Capabilities Flags */ 1645 1646 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1647 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1648 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1649 1650 /* 1651 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1652 */ 1653 struct nfit_device_handle { 1654 u32 handle; 1655 }; 1656 1657 /* Device handle construction and extraction macros */ 1658 1659 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1660 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1661 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1662 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1663 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1664 1665 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1666 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1667 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1668 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1669 #define ACPI_NFIT_NODE_ID_OFFSET 16 1670 1671 /* Macro to construct a NFIT/NVDIMM device handle */ 1672 1673 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1674 ((dimm) | \ 1675 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1676 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1677 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1678 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1679 1680 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1681 1682 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1683 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1684 1685 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1686 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1687 1688 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1689 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1690 1691 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1692 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1693 1694 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1695 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1696 1697 /******************************************************************************* 1698 * 1699 * NHLT - Non HD Audio Link Table 1700 * 1701 * Conforms to: Intel Smart Sound Technology NHLT Specification 1702 * Version 0.8.1, January 2020. 1703 * 1704 ******************************************************************************/ 1705 1706 /* Main table */ 1707 1708 struct acpi_table_nhlt { 1709 struct acpi_table_header header; /* Common ACPI table header */ 1710 u8 endpoint_count; 1711 }; 1712 1713 struct acpi_nhlt_endpoint { 1714 u32 descriptor_length; 1715 u8 link_type; 1716 u8 instance_id; 1717 u16 vendor_id; 1718 u16 device_id; 1719 u16 revision_id; 1720 u32 subsystem_id; 1721 u8 device_type; 1722 u8 direction; 1723 u8 virtual_bus_id; 1724 }; 1725 1726 /* Types for link_type field above */ 1727 1728 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1729 #define ACPI_NHLT_RESERVED_DSP 1 1730 #define ACPI_NHLT_PDM 2 1731 #define ACPI_NHLT_SSP 3 1732 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1733 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1734 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1735 1736 /* All other values above are reserved */ 1737 1738 /* Values for device_id field above */ 1739 1740 #define ACPI_NHLT_PDM_DMIC 0xAE20 1741 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1742 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1743 1744 /* Values for device_type field above */ 1745 1746 /* SSP Link */ 1747 1748 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1749 #define ACPI_NHLT_LINK_FM 1 1750 #define ACPI_NHLT_LINK_MODEM 2 1751 /* 3 is reserved */ 1752 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1753 1754 /* PDM Link */ 1755 1756 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1757 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1758 1759 /* Values for Direction field above */ 1760 1761 #define ACPI_NHLT_DIR_RENDER 0 1762 #define ACPI_NHLT_DIR_CAPTURE 1 1763 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1764 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1765 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1766 1767 struct acpi_nhlt_device_specific_config { 1768 u32 capabilities_size; 1769 u8 virtual_slot; 1770 u8 config_type; 1771 }; 1772 1773 struct acpi_nhlt_device_specific_config_a { 1774 u32 capabilities_size; 1775 u8 virtual_slot; 1776 u8 config_type; 1777 u8 array_type; 1778 }; 1779 1780 /* Values for Config Type above */ 1781 1782 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1783 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1784 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1785 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1786 1787 struct acpi_nhlt_device_specific_config_b { 1788 u32 capabilities_size; 1789 }; 1790 1791 struct acpi_nhlt_device_specific_config_c { 1792 u32 capabilities_size; 1793 u8 virtual_slot; 1794 }; 1795 1796 struct acpi_nhlt_render_device_specific_config { 1797 u32 capabilities_size; 1798 u8 virtual_slot; 1799 }; 1800 1801 struct acpi_nhlt_wave_extensible { 1802 u16 format_tag; 1803 u16 channel_count; 1804 u32 samples_per_sec; 1805 u32 avg_bytes_per_sec; 1806 u16 block_align; 1807 u16 bits_per_sample; 1808 u16 extra_format_size; 1809 u16 valid_bits_per_sample; 1810 u32 channel_mask; 1811 u8 sub_format_guid[16]; 1812 }; 1813 1814 /* Values for channel_mask above */ 1815 1816 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1817 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1818 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1819 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1820 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1821 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1822 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1823 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1824 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1825 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1826 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1827 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1828 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1829 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1830 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1831 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1832 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1833 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1834 1835 struct acpi_nhlt_format_config { 1836 struct acpi_nhlt_wave_extensible format; 1837 u32 capability_size; 1838 u8 capabilities[]; 1839 }; 1840 1841 struct acpi_nhlt_formats_config { 1842 u8 formats_count; 1843 }; 1844 1845 struct acpi_nhlt_device_specific_hdr { 1846 u8 virtual_slot; 1847 u8 config_type; 1848 }; 1849 1850 /* Types for config_type above */ 1851 1852 #define ACPI_NHLT_GENERIC 0 1853 #define ACPI_NHLT_MIC 1 1854 #define ACPI_NHLT_RENDER 3 1855 1856 struct acpi_nhlt_mic_device_specific_config { 1857 struct acpi_nhlt_device_specific_hdr device_config; 1858 u8 array_type_ext; 1859 }; 1860 1861 /* Values for array_type_ext above */ 1862 1863 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 /* 9 and below are reserved */ 1864 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 1865 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 1866 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1867 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 1868 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1869 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 1870 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 1871 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 1872 1873 #define ACPI_NHLT_NO_EXTENSION 0x0 1874 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 1875 1876 struct acpi_nhlt_vendor_mic_count { 1877 u8 microphone_count; 1878 }; 1879 1880 struct acpi_nhlt_vendor_mic_config { 1881 u8 type; 1882 u8 panel; 1883 u16 speaker_position_distance; /* mm */ 1884 u16 horizontal_offset; /* mm */ 1885 u16 vertical_offset; /* mm */ 1886 u8 frequency_low_band; /* 5*Hz */ 1887 u8 frequency_high_band; /* 500*Hz */ 1888 u16 direction_angle; /* -180 - + 180 */ 1889 u16 elevation_angle; /* -180 - + 180 */ 1890 u16 work_vertical_angle_begin; /* -180 - + 180 with 2 deg step */ 1891 u16 work_vertical_angle_end; /* -180 - + 180 with 2 deg step */ 1892 u16 work_horizontal_angle_begin; /* -180 - + 180 with 2 deg step */ 1893 u16 work_horizontal_angle_end; /* -180 - + 180 with 2 deg step */ 1894 }; 1895 1896 /* Values for Type field above */ 1897 1898 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 1899 #define ACPI_NHLT_MIC_SUBCARDIOID 1 1900 #define ACPI_NHLT_MIC_CARDIOID 2 1901 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 1902 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 1903 #define ACPI_NHLT_MIC_8_SHAPED 5 1904 #define ACPI_NHLT_MIC_RESERVED6 6 /* 6 is reserved */ 1905 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 1906 #define ACPI_NHLT_MIC_RESERVED 8 /* 8 and above are reserved */ 1907 1908 /* Values for Panel field above */ 1909 1910 #define ACPI_NHLT_MIC_POSITION_TOP 0 1911 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 1912 #define ACPI_NHLT_MIC_POSITION_LEFT 2 1913 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 1914 #define ACPI_NHLT_MIC_POSITION_FRONT 4 1915 #define ACPI_NHLT_MIC_POSITION_BACK 5 1916 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 /* 6 and above are reserved */ 1917 1918 struct acpi_nhlt_vendor_mic_device_specific_config { 1919 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 1920 u8 number_of_microphones; 1921 struct acpi_nhlt_vendor_mic_config mic_config[]; /* Indexed by number_of_microphones */ 1922 }; 1923 1924 /* Microphone SNR and Sensitivity extension */ 1925 1926 struct acpi_nhlt_mic_snr_sensitivity_extension { 1927 u32 SNR; 1928 u32 sensitivity; 1929 }; 1930 1931 /* Render device with feedback */ 1932 1933 struct acpi_nhlt_render_feedback_device_specific_config { 1934 u8 feedback_virtual_slot; /* Render slot in case of capture */ 1935 u16 feedback_channels; /* Informative only */ 1936 u16 feedback_valid_bits_per_sample; 1937 }; 1938 1939 /* Non documented structures */ 1940 1941 struct acpi_nhlt_device_info_count { 1942 u8 structure_count; 1943 }; 1944 1945 struct acpi_nhlt_device_info { 1946 u8 device_id[16]; 1947 u8 device_instance_id; 1948 u8 device_port_id; 1949 }; 1950 1951 /******************************************************************************* 1952 * 1953 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1954 * Version 2 (ACPI 6.2) 1955 * 1956 ******************************************************************************/ 1957 1958 struct acpi_table_pcct { 1959 struct acpi_table_header header; /* Common ACPI table header */ 1960 u32 flags; 1961 u64 reserved; 1962 }; 1963 1964 /* Values for Flags field above */ 1965 1966 #define ACPI_PCCT_DOORBELL 1 1967 1968 /* Values for subtable type in struct acpi_subtable_header */ 1969 1970 enum acpi_pcct_type { 1971 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1972 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1973 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1974 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1975 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1976 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1977 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1978 }; 1979 1980 /* 1981 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1982 */ 1983 1984 /* 0: Generic Communications Subspace */ 1985 1986 struct acpi_pcct_subspace { 1987 struct acpi_subtable_header header; 1988 u8 reserved[6]; 1989 u64 base_address; 1990 u64 length; 1991 struct acpi_generic_address doorbell_register; 1992 u64 preserve_mask; 1993 u64 write_mask; 1994 u32 latency; 1995 u32 max_access_rate; 1996 u16 min_turnaround_time; 1997 }; 1998 1999 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 2000 2001 struct acpi_pcct_hw_reduced { 2002 struct acpi_subtable_header header; 2003 u32 platform_interrupt; 2004 u8 flags; 2005 u8 reserved; 2006 u64 base_address; 2007 u64 length; 2008 struct acpi_generic_address doorbell_register; 2009 u64 preserve_mask; 2010 u64 write_mask; 2011 u32 latency; 2012 u32 max_access_rate; 2013 u16 min_turnaround_time; 2014 }; 2015 2016 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 2017 2018 struct acpi_pcct_hw_reduced_type2 { 2019 struct acpi_subtable_header header; 2020 u32 platform_interrupt; 2021 u8 flags; 2022 u8 reserved; 2023 u64 base_address; 2024 u64 length; 2025 struct acpi_generic_address doorbell_register; 2026 u64 preserve_mask; 2027 u64 write_mask; 2028 u32 latency; 2029 u32 max_access_rate; 2030 u16 min_turnaround_time; 2031 struct acpi_generic_address platform_ack_register; 2032 u64 ack_preserve_mask; 2033 u64 ack_write_mask; 2034 }; 2035 2036 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 2037 2038 struct acpi_pcct_ext_pcc_master { 2039 struct acpi_subtable_header header; 2040 u32 platform_interrupt; 2041 u8 flags; 2042 u8 reserved1; 2043 u64 base_address; 2044 u32 length; 2045 struct acpi_generic_address doorbell_register; 2046 u64 preserve_mask; 2047 u64 write_mask; 2048 u32 latency; 2049 u32 max_access_rate; 2050 u32 min_turnaround_time; 2051 struct acpi_generic_address platform_ack_register; 2052 u64 ack_preserve_mask; 2053 u64 ack_set_mask; 2054 u64 reserved2; 2055 struct acpi_generic_address cmd_complete_register; 2056 u64 cmd_complete_mask; 2057 struct acpi_generic_address cmd_update_register; 2058 u64 cmd_update_preserve_mask; 2059 u64 cmd_update_set_mask; 2060 struct acpi_generic_address error_status_register; 2061 u64 error_status_mask; 2062 }; 2063 2064 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 2065 2066 struct acpi_pcct_ext_pcc_slave { 2067 struct acpi_subtable_header header; 2068 u32 platform_interrupt; 2069 u8 flags; 2070 u8 reserved1; 2071 u64 base_address; 2072 u32 length; 2073 struct acpi_generic_address doorbell_register; 2074 u64 preserve_mask; 2075 u64 write_mask; 2076 u32 latency; 2077 u32 max_access_rate; 2078 u32 min_turnaround_time; 2079 struct acpi_generic_address platform_ack_register; 2080 u64 ack_preserve_mask; 2081 u64 ack_set_mask; 2082 u64 reserved2; 2083 struct acpi_generic_address cmd_complete_register; 2084 u64 cmd_complete_mask; 2085 struct acpi_generic_address cmd_update_register; 2086 u64 cmd_update_preserve_mask; 2087 u64 cmd_update_set_mask; 2088 struct acpi_generic_address error_status_register; 2089 u64 error_status_mask; 2090 }; 2091 2092 /* 5: HW Registers based Communications Subspace */ 2093 2094 struct acpi_pcct_hw_reg { 2095 struct acpi_subtable_header header; 2096 u16 version; 2097 u64 base_address; 2098 u64 length; 2099 struct acpi_generic_address doorbell_register; 2100 u64 doorbell_preserve; 2101 u64 doorbell_write; 2102 struct acpi_generic_address cmd_complete_register; 2103 u64 cmd_complete_mask; 2104 struct acpi_generic_address error_status_register; 2105 u64 error_status_mask; 2106 u32 nominal_latency; 2107 u32 min_turnaround_time; 2108 }; 2109 2110 /* Values for doorbell flags above */ 2111 2112 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 2113 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 2114 2115 /* 2116 * PCC memory structures (not part of the ACPI table) 2117 */ 2118 2119 /* Shared Memory Region */ 2120 2121 struct acpi_pcct_shared_memory { 2122 u32 signature; 2123 u16 command; 2124 u16 status; 2125 }; 2126 2127 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 2128 2129 struct acpi_pcct_ext_pcc_shared_memory { 2130 u32 signature; 2131 u32 flags; 2132 u32 length; 2133 u32 command; 2134 }; 2135 2136 /******************************************************************************* 2137 * 2138 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 2139 * Version 0 2140 * 2141 ******************************************************************************/ 2142 2143 struct acpi_table_pdtt { 2144 struct acpi_table_header header; /* Common ACPI table header */ 2145 u8 trigger_count; 2146 u8 reserved[3]; 2147 u32 array_offset; 2148 }; 2149 2150 /* 2151 * PDTT Communication Channel Identifier Structure. 2152 * The number of these structures is defined by trigger_count above, 2153 * starting at array_offset. 2154 */ 2155 struct acpi_pdtt_channel { 2156 u8 subchannel_id; 2157 u8 flags; 2158 }; 2159 2160 /* Flags for above */ 2161 2162 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 2163 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 2164 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 2165 2166 /******************************************************************************* 2167 * 2168 * PHAT - Platform Health Assessment Table (ACPI 6.4) 2169 * Version 1 2170 * 2171 ******************************************************************************/ 2172 2173 struct acpi_table_phat { 2174 struct acpi_table_header header; /* Common ACPI table header */ 2175 }; 2176 2177 /* Common header for PHAT subtables that follow main table */ 2178 2179 struct acpi_phat_header { 2180 u16 type; 2181 u16 length; 2182 u8 revision; 2183 }; 2184 2185 /* Values for Type field above */ 2186 2187 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 2188 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 2189 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 2190 2191 /* 2192 * PHAT subtables, correspond to Type in struct acpi_phat_header 2193 */ 2194 2195 /* 0: Firmware Version Data Record */ 2196 2197 struct acpi_phat_version_data { 2198 struct acpi_phat_header header; 2199 u8 reserved[3]; 2200 u32 element_count; 2201 }; 2202 2203 struct acpi_phat_version_element { 2204 u8 guid[16]; 2205 u64 version_value; 2206 u32 producer_id; 2207 }; 2208 2209 /* 1: Firmware Health Data Record */ 2210 2211 struct acpi_phat_health_data { 2212 struct acpi_phat_header header; 2213 u8 reserved[2]; 2214 u8 health; 2215 u8 device_guid[16]; 2216 u32 device_specific_offset; /* Zero if no Device-specific data */ 2217 }; 2218 2219 /* Values for Health field above */ 2220 2221 #define ACPI_PHAT_ERRORS_FOUND 0 2222 #define ACPI_PHAT_NO_ERRORS 1 2223 #define ACPI_PHAT_UNKNOWN_ERRORS 2 2224 #define ACPI_PHAT_ADVISORY 3 2225 2226 /******************************************************************************* 2227 * 2228 * PMTT - Platform Memory Topology Table (ACPI 5.0) 2229 * Version 1 2230 * 2231 ******************************************************************************/ 2232 2233 struct acpi_table_pmtt { 2234 struct acpi_table_header header; /* Common ACPI table header */ 2235 u32 memory_device_count; 2236 /* 2237 * Immediately followed by: 2238 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2239 */ 2240 }; 2241 2242 /* Common header for PMTT subtables that follow main table */ 2243 2244 struct acpi_pmtt_header { 2245 u8 type; 2246 u8 reserved1; 2247 u16 length; 2248 u16 flags; 2249 u16 reserved2; 2250 u32 memory_device_count; /* Zero means no memory device structs follow */ 2251 /* 2252 * Immediately followed by: 2253 * u8 type_specific_data[] 2254 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2255 */ 2256 }; 2257 2258 /* Values for Type field above */ 2259 2260 #define ACPI_PMTT_TYPE_SOCKET 0 2261 #define ACPI_PMTT_TYPE_CONTROLLER 1 2262 #define ACPI_PMTT_TYPE_DIMM 2 2263 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2264 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2265 2266 /* Values for Flags field above */ 2267 2268 #define ACPI_PMTT_TOP_LEVEL 0x0001 2269 #define ACPI_PMTT_PHYSICAL 0x0002 2270 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2271 2272 /* 2273 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2274 */ 2275 2276 /* 0: Socket Structure */ 2277 2278 struct acpi_pmtt_socket { 2279 struct acpi_pmtt_header header; 2280 u16 socket_id; 2281 u16 reserved; 2282 }; 2283 /* 2284 * Immediately followed by: 2285 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2286 */ 2287 2288 /* 1: Memory Controller subtable */ 2289 2290 struct acpi_pmtt_controller { 2291 struct acpi_pmtt_header header; 2292 u16 controller_id; 2293 u16 reserved; 2294 }; 2295 /* 2296 * Immediately followed by: 2297 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2298 */ 2299 2300 /* 2: Physical Component Identifier (DIMM) */ 2301 2302 struct acpi_pmtt_physical_component { 2303 struct acpi_pmtt_header header; 2304 u32 bios_handle; 2305 }; 2306 2307 /* 0xFF: Vendor Specific Data */ 2308 2309 struct acpi_pmtt_vendor_specific { 2310 struct acpi_pmtt_header header; 2311 u8 type_uuid[16]; 2312 u8 specific[]; 2313 /* 2314 * Immediately followed by: 2315 * u8 vendor_specific_data[]; 2316 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2317 */ 2318 }; 2319 2320 /******************************************************************************* 2321 * 2322 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2323 * Version 1 2324 * 2325 ******************************************************************************/ 2326 2327 struct acpi_table_pptt { 2328 struct acpi_table_header header; /* Common ACPI table header */ 2329 }; 2330 2331 /* Values for Type field above */ 2332 2333 enum acpi_pptt_type { 2334 ACPI_PPTT_TYPE_PROCESSOR = 0, 2335 ACPI_PPTT_TYPE_CACHE = 1, 2336 ACPI_PPTT_TYPE_ID = 2, 2337 ACPI_PPTT_TYPE_RESERVED = 3 2338 }; 2339 2340 /* 0: Processor Hierarchy Node Structure */ 2341 2342 struct acpi_pptt_processor { 2343 struct acpi_subtable_header header; 2344 u16 reserved; 2345 u32 flags; 2346 u32 parent; 2347 u32 acpi_processor_id; 2348 u32 number_of_priv_resources; 2349 }; 2350 2351 /* Flags */ 2352 2353 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2354 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2355 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2356 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2357 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2358 2359 /* 1: Cache Type Structure */ 2360 2361 struct acpi_pptt_cache { 2362 struct acpi_subtable_header header; 2363 u16 reserved; 2364 u32 flags; 2365 u32 next_level_of_cache; 2366 u32 size; 2367 u32 number_of_sets; 2368 u8 associativity; 2369 u8 attributes; 2370 u16 line_size; 2371 }; 2372 2373 /* 1: Cache Type Structure for PPTT version 3 */ 2374 2375 struct acpi_pptt_cache_v1 { 2376 u32 cache_id; 2377 }; 2378 2379 /* Flags */ 2380 2381 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2382 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2383 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2384 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2385 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2386 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2387 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2388 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2389 2390 /* Masks for Attributes */ 2391 2392 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2393 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2394 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2395 2396 /* Attributes describing cache */ 2397 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2398 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2399 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2400 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2401 2402 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2403 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2404 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2405 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2406 2407 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2408 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2409 2410 /* 2: ID Structure */ 2411 2412 struct acpi_pptt_id { 2413 struct acpi_subtable_header header; 2414 u16 reserved; 2415 u32 vendor_id; 2416 u64 level1_id; 2417 u64 level2_id; 2418 u16 major_rev; 2419 u16 minor_rev; 2420 u16 spin_rev; 2421 }; 2422 2423 /******************************************************************************* 2424 * 2425 * PRMT - Platform Runtime Mechanism Table 2426 * Version 1 2427 * 2428 ******************************************************************************/ 2429 2430 struct acpi_table_prmt { 2431 struct acpi_table_header header; /* Common ACPI table header */ 2432 }; 2433 2434 struct acpi_table_prmt_header { 2435 u8 platform_guid[16]; 2436 u32 module_info_offset; 2437 u32 module_info_count; 2438 }; 2439 2440 struct acpi_prmt_module_header { 2441 u16 revision; 2442 u16 length; 2443 }; 2444 2445 struct acpi_prmt_module_info { 2446 u16 revision; 2447 u16 length; 2448 u8 module_guid[16]; 2449 u16 major_rev; 2450 u16 minor_rev; 2451 u16 handler_info_count; 2452 u32 handler_info_offset; 2453 u64 mmio_list_pointer; 2454 }; 2455 2456 struct acpi_prmt_handler_info { 2457 u16 revision; 2458 u16 length; 2459 u8 handler_guid[16]; 2460 u64 handler_address; 2461 u64 static_data_buffer_address; 2462 u64 acpi_param_buffer_address; 2463 }; 2464 2465 /******************************************************************************* 2466 * 2467 * RASF - RAS Feature Table (ACPI 5.0) 2468 * Version 1 2469 * 2470 ******************************************************************************/ 2471 2472 struct acpi_table_rasf { 2473 struct acpi_table_header header; /* Common ACPI table header */ 2474 u8 channel_id[12]; 2475 }; 2476 2477 /* RASF Platform Communication Channel Shared Memory Region */ 2478 2479 struct acpi_rasf_shared_memory { 2480 u32 signature; 2481 u16 command; 2482 u16 status; 2483 u16 version; 2484 u8 capabilities[16]; 2485 u8 set_capabilities[16]; 2486 u16 num_parameter_blocks; 2487 u32 set_capabilities_status; 2488 }; 2489 2490 /* RASF Parameter Block Structure Header */ 2491 2492 struct acpi_rasf_parameter_block { 2493 u16 type; 2494 u16 version; 2495 u16 length; 2496 }; 2497 2498 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2499 2500 struct acpi_rasf_patrol_scrub_parameter { 2501 struct acpi_rasf_parameter_block header; 2502 u16 patrol_scrub_command; 2503 u64 requested_address_range[2]; 2504 u64 actual_address_range[2]; 2505 u16 flags; 2506 u8 requested_speed; 2507 }; 2508 2509 /* Masks for Flags and Speed fields above */ 2510 2511 #define ACPI_RASF_SCRUBBER_RUNNING 1 2512 #define ACPI_RASF_SPEED (7<<1) 2513 #define ACPI_RASF_SPEED_SLOW (0<<1) 2514 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2515 #define ACPI_RASF_SPEED_FAST (7<<1) 2516 2517 /* Channel Commands */ 2518 2519 enum acpi_rasf_commands { 2520 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2521 }; 2522 2523 /* Platform RAS Capabilities */ 2524 2525 enum acpi_rasf_capabiliities { 2526 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2527 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2528 }; 2529 2530 /* Patrol Scrub Commands */ 2531 2532 enum acpi_rasf_patrol_scrub_commands { 2533 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2534 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2535 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2536 }; 2537 2538 /* Channel Command flags */ 2539 2540 #define ACPI_RASF_GENERATE_SCI (1<<15) 2541 2542 /* Status values */ 2543 2544 enum acpi_rasf_status { 2545 ACPI_RASF_SUCCESS = 0, 2546 ACPI_RASF_NOT_VALID = 1, 2547 ACPI_RASF_NOT_SUPPORTED = 2, 2548 ACPI_RASF_BUSY = 3, 2549 ACPI_RASF_FAILED = 4, 2550 ACPI_RASF_ABORTED = 5, 2551 ACPI_RASF_INVALID_DATA = 6 2552 }; 2553 2554 /* Status flags */ 2555 2556 #define ACPI_RASF_COMMAND_COMPLETE (1) 2557 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2558 #define ACPI_RASF_ERROR (1<<2) 2559 #define ACPI_RASF_STATUS (0x1F<<3) 2560 2561 /******************************************************************************* 2562 * 2563 * RGRT - Regulatory Graphics Resource Table 2564 * Version 1 2565 * 2566 * Conforms to "ACPI RGRT" available at: 2567 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2568 * 2569 ******************************************************************************/ 2570 2571 struct acpi_table_rgrt { 2572 struct acpi_table_header header; /* Common ACPI table header */ 2573 u16 version; 2574 u8 image_type; 2575 u8 reserved; 2576 u8 image[]; 2577 }; 2578 2579 /* image_type values */ 2580 2581 enum acpi_rgrt_image_type { 2582 ACPI_RGRT_TYPE_RESERVED0 = 0, 2583 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2584 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2585 }; 2586 2587 /******************************************************************************* 2588 * 2589 * SBST - Smart Battery Specification Table 2590 * Version 1 2591 * 2592 ******************************************************************************/ 2593 2594 struct acpi_table_sbst { 2595 struct acpi_table_header header; /* Common ACPI table header */ 2596 u32 warning_level; 2597 u32 low_level; 2598 u32 critical_level; 2599 }; 2600 2601 /******************************************************************************* 2602 * 2603 * SDEI - Software Delegated Exception Interface Descriptor Table 2604 * 2605 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2606 * May 8th, 2017. Copyright 2017 ARM Ltd. 2607 * 2608 ******************************************************************************/ 2609 2610 struct acpi_table_sdei { 2611 struct acpi_table_header header; /* Common ACPI table header */ 2612 }; 2613 2614 /******************************************************************************* 2615 * 2616 * SDEV - Secure Devices Table (ACPI 6.2) 2617 * Version 1 2618 * 2619 ******************************************************************************/ 2620 2621 struct acpi_table_sdev { 2622 struct acpi_table_header header; /* Common ACPI table header */ 2623 }; 2624 2625 struct acpi_sdev_header { 2626 u8 type; 2627 u8 flags; 2628 u16 length; 2629 }; 2630 2631 /* Values for subtable type above */ 2632 2633 enum acpi_sdev_type { 2634 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2635 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2636 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2637 }; 2638 2639 /* Values for flags above */ 2640 2641 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2642 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2643 2644 /* 2645 * SDEV subtables 2646 */ 2647 2648 /* 0: Namespace Device Based Secure Device Structure */ 2649 2650 struct acpi_sdev_namespace { 2651 struct acpi_sdev_header header; 2652 u16 device_id_offset; 2653 u16 device_id_length; 2654 u16 vendor_data_offset; 2655 u16 vendor_data_length; 2656 }; 2657 2658 struct acpi_sdev_secure_component { 2659 u16 secure_component_offset; 2660 u16 secure_component_length; 2661 }; 2662 2663 /* 2664 * SDEV sub-subtables ("Components") for above 2665 */ 2666 struct acpi_sdev_component { 2667 struct acpi_sdev_header header; 2668 }; 2669 2670 /* Values for sub-subtable type above */ 2671 2672 enum acpi_sac_type { 2673 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2674 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2675 }; 2676 2677 struct acpi_sdev_id_component { 2678 struct acpi_sdev_header header; 2679 u16 hardware_id_offset; 2680 u16 hardware_id_length; 2681 u16 subsystem_id_offset; 2682 u16 subsystem_id_length; 2683 u16 hardware_revision; 2684 u8 hardware_rev_present; 2685 u8 class_code_present; 2686 u8 pci_base_class; 2687 u8 pci_sub_class; 2688 u8 pci_programming_xface; 2689 }; 2690 2691 struct acpi_sdev_mem_component { 2692 struct acpi_sdev_header header; 2693 u32 reserved; 2694 u64 memory_base_address; 2695 u64 memory_length; 2696 }; 2697 2698 /* 1: PCIe Endpoint Device Based Device Structure */ 2699 2700 struct acpi_sdev_pcie { 2701 struct acpi_sdev_header header; 2702 u16 segment; 2703 u16 start_bus; 2704 u16 path_offset; 2705 u16 path_length; 2706 u16 vendor_data_offset; 2707 u16 vendor_data_length; 2708 }; 2709 2710 /* 1a: PCIe Endpoint path entry */ 2711 2712 struct acpi_sdev_pcie_path { 2713 u8 device; 2714 u8 function; 2715 }; 2716 2717 /******************************************************************************* 2718 * 2719 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2720 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2721 * Trust Domain Extensions (Intel TDX)". 2722 * Version 1 2723 * 2724 ******************************************************************************/ 2725 2726 struct acpi_table_svkl { 2727 struct acpi_table_header header; /* Common ACPI table header */ 2728 u32 count; 2729 }; 2730 2731 struct acpi_svkl_key { 2732 u16 type; 2733 u16 format; 2734 u32 size; 2735 u64 address; 2736 }; 2737 2738 enum acpi_svkl_type { 2739 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2740 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2741 }; 2742 2743 enum acpi_svkl_format { 2744 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2745 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2746 }; 2747 2748 /******************************************************************************* 2749 * 2750 * TDEL - TD-Event Log 2751 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2752 * Trust Domain Extensions (Intel TDX)". 2753 * September 2020 2754 * 2755 ******************************************************************************/ 2756 2757 struct acpi_table_tdel { 2758 struct acpi_table_header header; /* Common ACPI table header */ 2759 u32 reserved; 2760 u64 log_area_minimum_length; 2761 u64 log_area_start_address; 2762 }; 2763 2764 /* Reset to default packing */ 2765 2766 #pragma pack() 2767 2768 #endif /* __ACTBL2_H__ */ 2769