1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2021, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AGDI "AGDI" /* Arm Generic Diagnostic Dump and Reset Device Interface */ 28 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 29 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 30 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 31 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 32 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 33 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 34 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 35 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 36 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 37 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 38 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 39 #define ACPI_SIG_NHLT "NHLT" /* Non HD Audio Link Table */ 40 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 41 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 42 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 43 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 44 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 45 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 46 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 47 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 48 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 49 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 50 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 51 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 52 #define ACPI_SIG_TDEL "TDEL" /* TD Event Log Table */ 53 54 /* 55 * All tables must be byte-packed to match the ACPI specification, since 56 * the tables are provided by the system BIOS. 57 */ 58 #pragma pack(1) 59 60 /* 61 * Note: C bitfields are not used for this reason: 62 * 63 * "Bitfields are great and easy to read, but unfortunately the C language 64 * does not specify the layout of bitfields in memory, which means they are 65 * essentially useless for dealing with packed data in on-disk formats or 66 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 67 * this decision was a design error in C. Ritchie could have picked an order 68 * and stuck with it." Norman Ramsey. 69 * See http://stackoverflow.com/a/1053662/41661 70 */ 71 72 /******************************************************************************* 73 * 74 * AEST - Arm Error Source Table 75 * 76 * Conforms to: ACPI for the Armv8 RAS Extensions 1.1 Platform Design Document 77 * September 2020. 78 * 79 ******************************************************************************/ 80 81 struct acpi_table_aest { 82 struct acpi_table_header header; 83 void *node_array[]; 84 }; 85 86 /* Common Subtable header - one per Node Structure (Subtable) */ 87 88 struct acpi_aest_hdr { 89 u8 type; 90 u16 length; 91 u8 reserved; 92 u32 node_specific_offset; 93 u32 node_interface_offset; 94 u32 node_interrupt_offset; 95 u32 node_interrupt_count; 96 u64 timestamp_rate; 97 u64 reserved1; 98 u64 error_injection_rate; 99 }; 100 101 /* Values for Type above */ 102 103 #define ACPI_AEST_PROCESSOR_ERROR_NODE 0 104 #define ACPI_AEST_MEMORY_ERROR_NODE 1 105 #define ACPI_AEST_SMMU_ERROR_NODE 2 106 #define ACPI_AEST_VENDOR_ERROR_NODE 3 107 #define ACPI_AEST_GIC_ERROR_NODE 4 108 #define ACPI_AEST_NODE_TYPE_RESERVED 5 /* 5 and above are reserved */ 109 110 /* 111 * AEST subtables (Error nodes) 112 */ 113 114 /* 0: Processor Error */ 115 116 typedef struct acpi_aest_processor { 117 u32 processor_id; 118 u8 resource_type; 119 u8 reserved; 120 u8 flags; 121 u8 revision; 122 u64 processor_affinity; 123 124 } acpi_aest_processor; 125 126 /* Values for resource_type above, related structs below */ 127 128 #define ACPI_AEST_CACHE_RESOURCE 0 129 #define ACPI_AEST_TLB_RESOURCE 1 130 #define ACPI_AEST_GENERIC_RESOURCE 2 131 #define ACPI_AEST_RESOURCE_RESERVED 3 /* 3 and above are reserved */ 132 133 /* 0R: Processor Cache Resource Substructure */ 134 135 typedef struct acpi_aest_processor_cache { 136 u32 cache_reference; 137 u32 reserved; 138 139 } acpi_aest_processor_cache; 140 141 /* Values for cache_type above */ 142 143 #define ACPI_AEST_CACHE_DATA 0 144 #define ACPI_AEST_CACHE_INSTRUCTION 1 145 #define ACPI_AEST_CACHE_UNIFIED 2 146 #define ACPI_AEST_CACHE_RESERVED 3 /* 3 and above are reserved */ 147 148 /* 1R: Processor TLB Resource Substructure */ 149 150 typedef struct acpi_aest_processor_tlb { 151 u32 tlb_level; 152 u32 reserved; 153 154 } acpi_aest_processor_tlb; 155 156 /* 2R: Processor Generic Resource Substructure */ 157 158 typedef struct acpi_aest_processor_generic { 159 u32 resource; 160 161 } acpi_aest_processor_generic; 162 163 /* 1: Memory Error */ 164 165 typedef struct acpi_aest_memory { 166 u32 srat_proximity_domain; 167 168 } acpi_aest_memory; 169 170 /* 2: Smmu Error */ 171 172 typedef struct acpi_aest_smmu { 173 u32 iort_node_reference; 174 u32 subcomponent_reference; 175 176 } acpi_aest_smmu; 177 178 /* 3: Vendor Defined */ 179 180 typedef struct acpi_aest_vendor { 181 u32 acpi_hid; 182 u32 acpi_uid; 183 u8 vendor_specific_data[16]; 184 185 } acpi_aest_vendor; 186 187 /* 4: Gic Error */ 188 189 typedef struct acpi_aest_gic { 190 u32 interface_type; 191 u32 instance_id; 192 193 } acpi_aest_gic; 194 195 /* Values for interface_type above */ 196 197 #define ACPI_AEST_GIC_CPU 0 198 #define ACPI_AEST_GIC_DISTRIBUTOR 1 199 #define ACPI_AEST_GIC_REDISTRIBUTOR 2 200 #define ACPI_AEST_GIC_ITS 3 201 #define ACPI_AEST_GIC_RESERVED 4 /* 4 and above are reserved */ 202 203 /* Node Interface Structure */ 204 205 typedef struct acpi_aest_node_interface { 206 u8 type; 207 u8 reserved[3]; 208 u32 flags; 209 u64 address; 210 u32 error_record_index; 211 u32 error_record_count; 212 u64 error_record_implemented; 213 u64 error_status_reporting; 214 u64 addressing_mode; 215 216 } acpi_aest_node_interface; 217 218 /* Values for Type field above */ 219 220 #define ACPI_AEST_NODE_SYSTEM_REGISTER 0 221 #define ACPI_AEST_NODE_MEMORY_MAPPED 1 222 #define ACPI_AEST_XFACE_RESERVED 2 /* 2 and above are reserved */ 223 224 /* Node Interrupt Structure */ 225 226 typedef struct acpi_aest_node_interrupt { 227 u8 type; 228 u8 reserved[2]; 229 u8 flags; 230 u32 gsiv; 231 u8 iort_id; 232 u8 reserved1[3]; 233 234 } acpi_aest_node_interrupt; 235 236 /* Values for Type field above */ 237 238 #define ACPI_AEST_NODE_FAULT_HANDLING 0 239 #define ACPI_AEST_NODE_ERROR_RECOVERY 1 240 #define ACPI_AEST_XRUPT_RESERVED 2 /* 2 and above are reserved */ 241 242 /******************************************************************************* 243 * AGDI - Arm Generic Diagnostic Dump and Reset Device Interface 244 * 245 * Conforms to "ACPI for Arm Components 1.1, Platform Design Document" 246 * ARM DEN0093 v1.1 247 * 248 ******************************************************************************/ 249 struct acpi_table_agdi { 250 struct acpi_table_header header; /* Common ACPI table header */ 251 u8 flags; 252 u8 reserved[3]; 253 u32 sdei_event; 254 u32 gsiv; 255 }; 256 257 /* Mask for Flags field above */ 258 259 #define ACPI_AGDI_SIGNALING_MODE (1) 260 261 /******************************************************************************* 262 * 263 * BDAT - BIOS Data ACPI Table 264 * 265 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 266 * Nov 2020 267 * 268 ******************************************************************************/ 269 270 struct acpi_table_bdat { 271 struct acpi_table_header header; 272 struct acpi_generic_address gas; 273 }; 274 275 /******************************************************************************* 276 * 277 * IORT - IO Remapping Table 278 * 279 * Conforms to "IO Remapping Table System Software on ARM Platforms", 280 * Document number: ARM DEN 0049E.b, Feb 2021 281 * 282 ******************************************************************************/ 283 284 struct acpi_table_iort { 285 struct acpi_table_header header; 286 u32 node_count; 287 u32 node_offset; 288 u32 reserved; 289 }; 290 291 /* 292 * IORT subtables 293 */ 294 struct acpi_iort_node { 295 u8 type; 296 u16 length; 297 u8 revision; 298 u32 identifier; 299 u32 mapping_count; 300 u32 mapping_offset; 301 char node_data[1]; 302 }; 303 304 /* Values for subtable Type above */ 305 306 enum acpi_iort_node_type { 307 ACPI_IORT_NODE_ITS_GROUP = 0x00, 308 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 309 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 310 ACPI_IORT_NODE_SMMU = 0x03, 311 ACPI_IORT_NODE_SMMU_V3 = 0x04, 312 ACPI_IORT_NODE_PMCG = 0x05, 313 ACPI_IORT_NODE_RMR = 0x06, 314 }; 315 316 struct acpi_iort_id_mapping { 317 u32 input_base; /* Lowest value in input range */ 318 u32 id_count; /* Number of IDs */ 319 u32 output_base; /* Lowest value in output range */ 320 u32 output_reference; /* A reference to the output node */ 321 u32 flags; 322 }; 323 324 /* Masks for Flags field above for IORT subtable */ 325 326 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 327 328 struct acpi_iort_memory_access { 329 u32 cache_coherency; 330 u8 hints; 331 u16 reserved; 332 u8 memory_flags; 333 }; 334 335 /* Values for cache_coherency field above */ 336 337 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 338 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 339 340 /* Masks for Hints field above */ 341 342 #define ACPI_IORT_HT_TRANSIENT (1) 343 #define ACPI_IORT_HT_WRITE (1<<1) 344 #define ACPI_IORT_HT_READ (1<<2) 345 #define ACPI_IORT_HT_OVERRIDE (1<<3) 346 347 /* Masks for memory_flags field above */ 348 349 #define ACPI_IORT_MF_COHERENCY (1) 350 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 351 352 /* 353 * IORT node specific subtables 354 */ 355 struct acpi_iort_its_group { 356 u32 its_count; 357 u32 identifiers[1]; /* GIC ITS identifier array */ 358 }; 359 360 struct acpi_iort_named_component { 361 u32 node_flags; 362 u64 memory_properties; /* Memory access properties */ 363 u8 memory_address_limit; /* Memory address size limit */ 364 char device_name[1]; /* Path of namespace object */ 365 }; 366 367 /* Masks for Flags field above */ 368 369 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 370 #define ACPI_IORT_NC_PASID_BITS (31<<1) 371 372 struct acpi_iort_root_complex { 373 u64 memory_properties; /* Memory access properties */ 374 u32 ats_attribute; 375 u32 pci_segment_number; 376 u8 memory_address_limit; /* Memory address size limit */ 377 u8 reserved[3]; /* Reserved, must be zero */ 378 }; 379 380 /* Masks for ats_attribute field above */ 381 382 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 383 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 384 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 385 386 struct acpi_iort_smmu { 387 u64 base_address; /* SMMU base address */ 388 u64 span; /* Length of memory range */ 389 u32 model; 390 u32 flags; 391 u32 global_interrupt_offset; 392 u32 context_interrupt_count; 393 u32 context_interrupt_offset; 394 u32 pmu_interrupt_count; 395 u32 pmu_interrupt_offset; 396 u64 interrupts[1]; /* Interrupt array */ 397 }; 398 399 /* Values for Model field above */ 400 401 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 402 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 403 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 404 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 405 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 406 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 407 408 /* Masks for Flags field above */ 409 410 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 411 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 412 413 /* Global interrupt format */ 414 415 struct acpi_iort_smmu_gsi { 416 u32 nsg_irpt; 417 u32 nsg_irpt_flags; 418 u32 nsg_cfg_irpt; 419 u32 nsg_cfg_irpt_flags; 420 }; 421 422 struct acpi_iort_smmu_v3 { 423 u64 base_address; /* SMMUv3 base address */ 424 u32 flags; 425 u32 reserved; 426 u64 vatos_address; 427 u32 model; 428 u32 event_gsiv; 429 u32 pri_gsiv; 430 u32 gerr_gsiv; 431 u32 sync_gsiv; 432 u32 pxm; 433 u32 id_mapping_index; 434 }; 435 436 /* Values for Model field above */ 437 438 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 439 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 440 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 441 442 /* Masks for Flags field above */ 443 444 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 445 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 446 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 447 448 struct acpi_iort_pmcg { 449 u64 page0_base_address; 450 u32 overflow_gsiv; 451 u32 node_reference; 452 u64 page1_base_address; 453 }; 454 455 struct acpi_iort_rmr { 456 u32 flags; 457 u32 rmr_count; 458 u32 rmr_offset; 459 }; 460 461 struct acpi_iort_rmr_desc { 462 u64 base_address; 463 u64 length; 464 u32 reserved; 465 }; 466 467 /******************************************************************************* 468 * 469 * IVRS - I/O Virtualization Reporting Structure 470 * Version 1 471 * 472 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 473 * Revision 1.26, February 2009. 474 * 475 ******************************************************************************/ 476 477 struct acpi_table_ivrs { 478 struct acpi_table_header header; /* Common ACPI table header */ 479 u32 info; /* Common virtualization info */ 480 u64 reserved; 481 }; 482 483 /* Values for Info field above */ 484 485 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 486 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 487 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 488 489 /* IVRS subtable header */ 490 491 struct acpi_ivrs_header { 492 u8 type; /* Subtable type */ 493 u8 flags; 494 u16 length; /* Subtable length */ 495 u16 device_id; /* ID of IOMMU */ 496 }; 497 498 /* Values for subtable Type above */ 499 500 enum acpi_ivrs_type { 501 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 502 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 503 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 504 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 505 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 506 ACPI_IVRS_TYPE_MEMORY3 = 0x22 507 }; 508 509 /* Masks for Flags field above for IVHD subtable */ 510 511 #define ACPI_IVHD_TT_ENABLE (1) 512 #define ACPI_IVHD_PASS_PW (1<<1) 513 #define ACPI_IVHD_RES_PASS_PW (1<<2) 514 #define ACPI_IVHD_ISOC (1<<3) 515 #define ACPI_IVHD_IOTLB (1<<4) 516 517 /* Masks for Flags field above for IVMD subtable */ 518 519 #define ACPI_IVMD_UNITY (1) 520 #define ACPI_IVMD_READ (1<<1) 521 #define ACPI_IVMD_WRITE (1<<2) 522 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 523 524 /* 525 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 526 */ 527 528 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 529 530 struct acpi_ivrs_hardware_10 { 531 struct acpi_ivrs_header header; 532 u16 capability_offset; /* Offset for IOMMU control fields */ 533 u64 base_address; /* IOMMU control registers */ 534 u16 pci_segment_group; 535 u16 info; /* MSI number and unit ID */ 536 u32 feature_reporting; 537 }; 538 539 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 540 541 struct acpi_ivrs_hardware_11 { 542 struct acpi_ivrs_header header; 543 u16 capability_offset; /* Offset for IOMMU control fields */ 544 u64 base_address; /* IOMMU control registers */ 545 u16 pci_segment_group; 546 u16 info; /* MSI number and unit ID */ 547 u32 attributes; 548 u64 efr_register_image; 549 u64 reserved; 550 }; 551 552 /* Masks for Info field above */ 553 554 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 555 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 556 557 /* 558 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 559 * Upper two bits of the Type field are the (encoded) length of the structure. 560 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 561 * are reserved for future use but not defined. 562 */ 563 struct acpi_ivrs_de_header { 564 u8 type; 565 u16 id; 566 u8 data_setting; 567 }; 568 569 /* Length of device entry is in the top two bits of Type field above */ 570 571 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 572 573 /* Values for device entry Type field above */ 574 575 enum acpi_ivrs_device_entry_type { 576 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 577 578 ACPI_IVRS_TYPE_PAD4 = 0, 579 ACPI_IVRS_TYPE_ALL = 1, 580 ACPI_IVRS_TYPE_SELECT = 2, 581 ACPI_IVRS_TYPE_START = 3, 582 ACPI_IVRS_TYPE_END = 4, 583 584 /* 8-byte device entries */ 585 586 ACPI_IVRS_TYPE_PAD8 = 64, 587 ACPI_IVRS_TYPE_NOT_USED = 65, 588 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 589 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 590 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 591 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 592 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses struct acpi_ivrs_device8c */ 593 594 /* Variable-length device entries */ 595 596 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 597 }; 598 599 /* Values for Data field above */ 600 601 #define ACPI_IVHD_INIT_PASS (1) 602 #define ACPI_IVHD_EINT_PASS (1<<1) 603 #define ACPI_IVHD_NMI_PASS (1<<2) 604 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 605 #define ACPI_IVHD_LINT0_PASS (1<<6) 606 #define ACPI_IVHD_LINT1_PASS (1<<7) 607 608 /* Types 0-4: 4-byte device entry */ 609 610 struct acpi_ivrs_device4 { 611 struct acpi_ivrs_de_header header; 612 }; 613 614 /* Types 66-67: 8-byte device entry */ 615 616 struct acpi_ivrs_device8a { 617 struct acpi_ivrs_de_header header; 618 u8 reserved1; 619 u16 used_id; 620 u8 reserved2; 621 }; 622 623 /* Types 70-71: 8-byte device entry */ 624 625 struct acpi_ivrs_device8b { 626 struct acpi_ivrs_de_header header; 627 u32 extended_data; 628 }; 629 630 /* Values for extended_data above */ 631 632 #define ACPI_IVHD_ATS_DISABLED (1<<31) 633 634 /* Type 72: 8-byte device entry */ 635 636 struct acpi_ivrs_device8c { 637 struct acpi_ivrs_de_header header; 638 u8 handle; 639 u16 used_id; 640 u8 variety; 641 }; 642 643 /* Values for Variety field above */ 644 645 #define ACPI_IVHD_IOAPIC 1 646 #define ACPI_IVHD_HPET 2 647 648 /* Type 240: variable-length device entry */ 649 650 struct acpi_ivrs_device_hid { 651 struct acpi_ivrs_de_header header; 652 u64 acpi_hid; 653 u64 acpi_cid; 654 u8 uid_type; 655 u8 uid_length; 656 }; 657 658 /* Values for uid_type above */ 659 660 #define ACPI_IVRS_UID_NOT_PRESENT 0 661 #define ACPI_IVRS_UID_IS_INTEGER 1 662 #define ACPI_IVRS_UID_IS_STRING 2 663 664 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 665 666 struct acpi_ivrs_memory { 667 struct acpi_ivrs_header header; 668 u16 aux_data; 669 u64 reserved; 670 u64 start_address; 671 u64 memory_length; 672 }; 673 674 /******************************************************************************* 675 * 676 * LPIT - Low Power Idle Table 677 * 678 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 679 * 680 ******************************************************************************/ 681 682 struct acpi_table_lpit { 683 struct acpi_table_header header; /* Common ACPI table header */ 684 }; 685 686 /* LPIT subtable header */ 687 688 struct acpi_lpit_header { 689 u32 type; /* Subtable type */ 690 u32 length; /* Subtable length */ 691 u16 unique_id; 692 u16 reserved; 693 u32 flags; 694 }; 695 696 /* Values for subtable Type above */ 697 698 enum acpi_lpit_type { 699 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 700 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 701 }; 702 703 /* Masks for Flags field above */ 704 705 #define ACPI_LPIT_STATE_DISABLED (1) 706 #define ACPI_LPIT_NO_COUNTER (1<<1) 707 708 /* 709 * LPIT subtables, correspond to Type in struct acpi_lpit_header 710 */ 711 712 /* 0x00: Native C-state instruction based LPI structure */ 713 714 struct acpi_lpit_native { 715 struct acpi_lpit_header header; 716 struct acpi_generic_address entry_trigger; 717 u32 residency; 718 u32 latency; 719 struct acpi_generic_address residency_counter; 720 u64 counter_frequency; 721 }; 722 723 /******************************************************************************* 724 * 725 * MADT - Multiple APIC Description Table 726 * Version 3 727 * 728 ******************************************************************************/ 729 730 struct acpi_table_madt { 731 struct acpi_table_header header; /* Common ACPI table header */ 732 u32 address; /* Physical address of local APIC */ 733 u32 flags; 734 }; 735 736 /* Masks for Flags field above */ 737 738 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 739 740 /* Values for PCATCompat flag */ 741 742 #define ACPI_MADT_DUAL_PIC 1 743 #define ACPI_MADT_MULTIPLE_APIC 0 744 745 /* Values for MADT subtable type in struct acpi_subtable_header */ 746 747 enum acpi_madt_type { 748 ACPI_MADT_TYPE_LOCAL_APIC = 0, 749 ACPI_MADT_TYPE_IO_APIC = 1, 750 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 751 ACPI_MADT_TYPE_NMI_SOURCE = 3, 752 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 753 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 754 ACPI_MADT_TYPE_IO_SAPIC = 6, 755 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 756 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 757 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 758 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 759 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 760 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 761 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 762 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 763 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 764 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 765 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 766 }; 767 768 /* 769 * MADT Subtables, correspond to Type in struct acpi_subtable_header 770 */ 771 772 /* 0: Processor Local APIC */ 773 774 struct acpi_madt_local_apic { 775 struct acpi_subtable_header header; 776 u8 processor_id; /* ACPI processor id */ 777 u8 id; /* Processor's local APIC id */ 778 u32 lapic_flags; 779 }; 780 781 /* 1: IO APIC */ 782 783 struct acpi_madt_io_apic { 784 struct acpi_subtable_header header; 785 u8 id; /* I/O APIC ID */ 786 u8 reserved; /* reserved - must be zero */ 787 u32 address; /* APIC physical address */ 788 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 789 }; 790 791 /* 2: Interrupt Override */ 792 793 struct acpi_madt_interrupt_override { 794 struct acpi_subtable_header header; 795 u8 bus; /* 0 - ISA */ 796 u8 source_irq; /* Interrupt source (IRQ) */ 797 u32 global_irq; /* Global system interrupt */ 798 u16 inti_flags; 799 }; 800 801 /* 3: NMI Source */ 802 803 struct acpi_madt_nmi_source { 804 struct acpi_subtable_header header; 805 u16 inti_flags; 806 u32 global_irq; /* Global system interrupt */ 807 }; 808 809 /* 4: Local APIC NMI */ 810 811 struct acpi_madt_local_apic_nmi { 812 struct acpi_subtable_header header; 813 u8 processor_id; /* ACPI processor id */ 814 u16 inti_flags; 815 u8 lint; /* LINTn to which NMI is connected */ 816 }; 817 818 /* 5: Address Override */ 819 820 struct acpi_madt_local_apic_override { 821 struct acpi_subtable_header header; 822 u16 reserved; /* Reserved, must be zero */ 823 u64 address; /* APIC physical address */ 824 }; 825 826 /* 6: I/O Sapic */ 827 828 struct acpi_madt_io_sapic { 829 struct acpi_subtable_header header; 830 u8 id; /* I/O SAPIC ID */ 831 u8 reserved; /* Reserved, must be zero */ 832 u32 global_irq_base; /* Global interrupt for SAPIC start */ 833 u64 address; /* SAPIC physical address */ 834 }; 835 836 /* 7: Local Sapic */ 837 838 struct acpi_madt_local_sapic { 839 struct acpi_subtable_header header; 840 u8 processor_id; /* ACPI processor id */ 841 u8 id; /* SAPIC ID */ 842 u8 eid; /* SAPIC EID */ 843 u8 reserved[3]; /* Reserved, must be zero */ 844 u32 lapic_flags; 845 u32 uid; /* Numeric UID - ACPI 3.0 */ 846 char uid_string[1]; /* String UID - ACPI 3.0 */ 847 }; 848 849 /* 8: Platform Interrupt Source */ 850 851 struct acpi_madt_interrupt_source { 852 struct acpi_subtable_header header; 853 u16 inti_flags; 854 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 855 u8 id; /* Processor ID */ 856 u8 eid; /* Processor EID */ 857 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 858 u32 global_irq; /* Global system interrupt */ 859 u32 flags; /* Interrupt Source Flags */ 860 }; 861 862 /* Masks for Flags field above */ 863 864 #define ACPI_MADT_CPEI_OVERRIDE (1) 865 866 /* 9: Processor Local X2APIC (ACPI 4.0) */ 867 868 struct acpi_madt_local_x2apic { 869 struct acpi_subtable_header header; 870 u16 reserved; /* reserved - must be zero */ 871 u32 local_apic_id; /* Processor x2APIC ID */ 872 u32 lapic_flags; 873 u32 uid; /* ACPI processor UID */ 874 }; 875 876 /* 10: Local X2APIC NMI (ACPI 4.0) */ 877 878 struct acpi_madt_local_x2apic_nmi { 879 struct acpi_subtable_header header; 880 u16 inti_flags; 881 u32 uid; /* ACPI processor UID */ 882 u8 lint; /* LINTn to which NMI is connected */ 883 u8 reserved[3]; /* reserved - must be zero */ 884 }; 885 886 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 887 888 struct acpi_madt_generic_interrupt { 889 struct acpi_subtable_header header; 890 u16 reserved; /* reserved - must be zero */ 891 u32 cpu_interface_number; 892 u32 uid; 893 u32 flags; 894 u32 parking_version; 895 u32 performance_interrupt; 896 u64 parked_address; 897 u64 base_address; 898 u64 gicv_base_address; 899 u64 gich_base_address; 900 u32 vgic_interrupt; 901 u64 gicr_base_address; 902 u64 arm_mpidr; 903 u8 efficiency_class; 904 u8 reserved2[1]; 905 u16 spe_interrupt; /* ACPI 6.3 */ 906 }; 907 908 /* Masks for Flags field above */ 909 910 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 911 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 912 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 913 914 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 915 916 struct acpi_madt_generic_distributor { 917 struct acpi_subtable_header header; 918 u16 reserved; /* reserved - must be zero */ 919 u32 gic_id; 920 u64 base_address; 921 u32 global_irq_base; 922 u8 version; 923 u8 reserved2[3]; /* reserved - must be zero */ 924 }; 925 926 /* Values for Version field above */ 927 928 enum acpi_madt_gic_version { 929 ACPI_MADT_GIC_VERSION_NONE = 0, 930 ACPI_MADT_GIC_VERSION_V1 = 1, 931 ACPI_MADT_GIC_VERSION_V2 = 2, 932 ACPI_MADT_GIC_VERSION_V3 = 3, 933 ACPI_MADT_GIC_VERSION_V4 = 4, 934 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 935 }; 936 937 /* 13: Generic MSI Frame (ACPI 5.1) */ 938 939 struct acpi_madt_generic_msi_frame { 940 struct acpi_subtable_header header; 941 u16 reserved; /* reserved - must be zero */ 942 u32 msi_frame_id; 943 u64 base_address; 944 u32 flags; 945 u16 spi_count; 946 u16 spi_base; 947 }; 948 949 /* Masks for Flags field above */ 950 951 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 952 953 /* 14: Generic Redistributor (ACPI 5.1) */ 954 955 struct acpi_madt_generic_redistributor { 956 struct acpi_subtable_header header; 957 u16 reserved; /* reserved - must be zero */ 958 u64 base_address; 959 u32 length; 960 }; 961 962 /* 15: Generic Translator (ACPI 6.0) */ 963 964 struct acpi_madt_generic_translator { 965 struct acpi_subtable_header header; 966 u16 reserved; /* reserved - must be zero */ 967 u32 translation_id; 968 u64 base_address; 969 u32 reserved2; 970 }; 971 972 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 973 974 struct acpi_madt_multiproc_wakeup { 975 struct acpi_subtable_header header; 976 u16 mailbox_version; 977 u32 reserved; /* reserved - must be zero */ 978 u64 base_address; 979 }; 980 981 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 982 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 983 984 struct acpi_madt_multiproc_wakeup_mailbox { 985 u16 command; 986 u16 reserved; /* reserved - must be zero */ 987 u32 apic_id; 988 u64 wakeup_vector; 989 u8 reserved_os[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 990 u8 reserved_firmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 991 }; 992 993 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 994 995 /* 996 * Common flags fields for MADT subtables 997 */ 998 999 /* MADT Local APIC flags */ 1000 1001 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1002 #define ACPI_MADT_ONLINE_CAPABLE (2) /* 01: System HW supports enabling processor at runtime */ 1003 1004 /* MADT MPS INTI flags (inti_flags) */ 1005 1006 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1007 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1008 1009 /* Values for MPS INTI flags */ 1010 1011 #define ACPI_MADT_POLARITY_CONFORMS 0 1012 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1013 #define ACPI_MADT_POLARITY_RESERVED 2 1014 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1015 1016 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1017 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1018 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1019 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1020 1021 /******************************************************************************* 1022 * 1023 * MCFG - PCI Memory Mapped Configuration table and subtable 1024 * Version 1 1025 * 1026 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1027 * 1028 ******************************************************************************/ 1029 1030 struct acpi_table_mcfg { 1031 struct acpi_table_header header; /* Common ACPI table header */ 1032 u8 reserved[8]; 1033 }; 1034 1035 /* Subtable */ 1036 1037 struct acpi_mcfg_allocation { 1038 u64 address; /* Base address, processor-relative */ 1039 u16 pci_segment; /* PCI segment group number */ 1040 u8 start_bus_number; /* Starting PCI Bus number */ 1041 u8 end_bus_number; /* Final PCI Bus number */ 1042 u32 reserved; 1043 }; 1044 1045 /******************************************************************************* 1046 * 1047 * MCHI - Management Controller Host Interface Table 1048 * Version 1 1049 * 1050 * Conforms to "Management Component Transport Protocol (MCTP) Host 1051 * Interface Specification", Revision 1.0.0a, October 13, 2009 1052 * 1053 ******************************************************************************/ 1054 1055 struct acpi_table_mchi { 1056 struct acpi_table_header header; /* Common ACPI table header */ 1057 u8 interface_type; 1058 u8 protocol; 1059 u64 protocol_data; 1060 u8 interrupt_type; 1061 u8 gpe; 1062 u8 pci_device_flag; 1063 u32 global_interrupt; 1064 struct acpi_generic_address control_register; 1065 u8 pci_segment; 1066 u8 pci_bus; 1067 u8 pci_device; 1068 u8 pci_function; 1069 }; 1070 1071 /******************************************************************************* 1072 * 1073 * MPST - Memory Power State Table (ACPI 5.0) 1074 * Version 1 1075 * 1076 ******************************************************************************/ 1077 1078 #define ACPI_MPST_CHANNEL_INFO \ 1079 u8 channel_id; \ 1080 u8 reserved1[3]; \ 1081 u16 power_node_count; \ 1082 u16 reserved2; 1083 1084 /* Main table */ 1085 1086 struct acpi_table_mpst { 1087 struct acpi_table_header header; /* Common ACPI table header */ 1088 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1089 }; 1090 1091 /* Memory Platform Communication Channel Info */ 1092 1093 struct acpi_mpst_channel { 1094 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1095 }; 1096 1097 /* Memory Power Node Structure */ 1098 1099 struct acpi_mpst_power_node { 1100 u8 flags; 1101 u8 reserved1; 1102 u16 node_id; 1103 u32 length; 1104 u64 range_address; 1105 u64 range_length; 1106 u32 num_power_states; 1107 u32 num_physical_components; 1108 }; 1109 1110 /* Values for Flags field above */ 1111 1112 #define ACPI_MPST_ENABLED 1 1113 #define ACPI_MPST_POWER_MANAGED 2 1114 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1115 1116 /* Memory Power State Structure (follows POWER_NODE above) */ 1117 1118 struct acpi_mpst_power_state { 1119 u8 power_state; 1120 u8 info_index; 1121 }; 1122 1123 /* Physical Component ID Structure (follows POWER_STATE above) */ 1124 1125 struct acpi_mpst_component { 1126 u16 component_id; 1127 }; 1128 1129 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1130 1131 struct acpi_mpst_data_hdr { 1132 u16 characteristics_count; 1133 u16 reserved; 1134 }; 1135 1136 struct acpi_mpst_power_data { 1137 u8 structure_id; 1138 u8 flags; 1139 u16 reserved1; 1140 u32 average_power; 1141 u32 power_saving; 1142 u64 exit_latency; 1143 u64 reserved2; 1144 }; 1145 1146 /* Values for Flags field above */ 1147 1148 #define ACPI_MPST_PRESERVE 1 1149 #define ACPI_MPST_AUTOENTRY 2 1150 #define ACPI_MPST_AUTOEXIT 4 1151 1152 /* Shared Memory Region (not part of an ACPI table) */ 1153 1154 struct acpi_mpst_shared { 1155 u32 signature; 1156 u16 pcc_command; 1157 u16 pcc_status; 1158 u32 command_register; 1159 u32 status_register; 1160 u32 power_state_id; 1161 u32 power_node_id; 1162 u64 energy_consumed; 1163 u64 average_power; 1164 }; 1165 1166 /******************************************************************************* 1167 * 1168 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1169 * Version 1 1170 * 1171 ******************************************************************************/ 1172 1173 struct acpi_table_msct { 1174 struct acpi_table_header header; /* Common ACPI table header */ 1175 u32 proximity_offset; /* Location of proximity info struct(s) */ 1176 u32 max_proximity_domains; /* Max number of proximity domains */ 1177 u32 max_clock_domains; /* Max number of clock domains */ 1178 u64 max_address; /* Max physical address in system */ 1179 }; 1180 1181 /* subtable - Maximum Proximity Domain Information. Version 1 */ 1182 1183 struct acpi_msct_proximity { 1184 u8 revision; 1185 u8 length; 1186 u32 range_start; /* Start of domain range */ 1187 u32 range_end; /* End of domain range */ 1188 u32 processor_capacity; 1189 u64 memory_capacity; /* In bytes */ 1190 }; 1191 1192 /******************************************************************************* 1193 * 1194 * MSDM - Microsoft Data Management table 1195 * 1196 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1197 * November 29, 2011. Copyright 2011 Microsoft 1198 * 1199 ******************************************************************************/ 1200 1201 /* Basic MSDM table is only the common ACPI header */ 1202 1203 struct acpi_table_msdm { 1204 struct acpi_table_header header; /* Common ACPI table header */ 1205 }; 1206 1207 /******************************************************************************* 1208 * 1209 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1210 * Version 1 1211 * 1212 ******************************************************************************/ 1213 1214 struct acpi_table_nfit { 1215 struct acpi_table_header header; /* Common ACPI table header */ 1216 u32 reserved; /* Reserved, must be zero */ 1217 }; 1218 1219 /* Subtable header for NFIT */ 1220 1221 struct acpi_nfit_header { 1222 u16 type; 1223 u16 length; 1224 }; 1225 1226 /* Values for subtable type in struct acpi_nfit_header */ 1227 1228 enum acpi_nfit_type { 1229 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1230 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1231 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1232 ACPI_NFIT_TYPE_SMBIOS = 3, 1233 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1234 ACPI_NFIT_TYPE_DATA_REGION = 5, 1235 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1236 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1237 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1238 }; 1239 1240 /* 1241 * NFIT Subtables 1242 */ 1243 1244 /* 0: System Physical Address Range Structure */ 1245 1246 struct acpi_nfit_system_address { 1247 struct acpi_nfit_header header; 1248 u16 range_index; 1249 u16 flags; 1250 u32 reserved; /* Reserved, must be zero */ 1251 u32 proximity_domain; 1252 u8 range_guid[16]; 1253 u64 address; 1254 u64 length; 1255 u64 memory_mapping; 1256 u64 location_cookie; /* ACPI 6.4 */ 1257 }; 1258 1259 /* Flags */ 1260 1261 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1262 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1263 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1264 1265 /* Range Type GUIDs appear in the include/acuuid.h file */ 1266 1267 /* 1: Memory Device to System Address Range Map Structure */ 1268 1269 struct acpi_nfit_memory_map { 1270 struct acpi_nfit_header header; 1271 u32 device_handle; 1272 u16 physical_id; 1273 u16 region_id; 1274 u16 range_index; 1275 u16 region_index; 1276 u64 region_size; 1277 u64 region_offset; 1278 u64 address; 1279 u16 interleave_index; 1280 u16 interleave_ways; 1281 u16 flags; 1282 u16 reserved; /* Reserved, must be zero */ 1283 }; 1284 1285 /* Flags */ 1286 1287 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1288 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1289 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1290 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1291 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1292 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1293 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1294 1295 /* 2: Interleave Structure */ 1296 1297 struct acpi_nfit_interleave { 1298 struct acpi_nfit_header header; 1299 u16 interleave_index; 1300 u16 reserved; /* Reserved, must be zero */ 1301 u32 line_count; 1302 u32 line_size; 1303 u32 line_offset[1]; /* Variable length */ 1304 }; 1305 1306 /* 3: SMBIOS Management Information Structure */ 1307 1308 struct acpi_nfit_smbios { 1309 struct acpi_nfit_header header; 1310 u32 reserved; /* Reserved, must be zero */ 1311 u8 data[1]; /* Variable length */ 1312 }; 1313 1314 /* 4: NVDIMM Control Region Structure */ 1315 1316 struct acpi_nfit_control_region { 1317 struct acpi_nfit_header header; 1318 u16 region_index; 1319 u16 vendor_id; 1320 u16 device_id; 1321 u16 revision_id; 1322 u16 subsystem_vendor_id; 1323 u16 subsystem_device_id; 1324 u16 subsystem_revision_id; 1325 u8 valid_fields; 1326 u8 manufacturing_location; 1327 u16 manufacturing_date; 1328 u8 reserved[2]; /* Reserved, must be zero */ 1329 u32 serial_number; 1330 u16 code; 1331 u16 windows; 1332 u64 window_size; 1333 u64 command_offset; 1334 u64 command_size; 1335 u64 status_offset; 1336 u64 status_size; 1337 u16 flags; 1338 u8 reserved1[6]; /* Reserved, must be zero */ 1339 }; 1340 1341 /* Flags */ 1342 1343 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1344 1345 /* valid_fields bits */ 1346 1347 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1348 1349 /* 5: NVDIMM Block Data Window Region Structure */ 1350 1351 struct acpi_nfit_data_region { 1352 struct acpi_nfit_header header; 1353 u16 region_index; 1354 u16 windows; 1355 u64 offset; 1356 u64 size; 1357 u64 capacity; 1358 u64 start_address; 1359 }; 1360 1361 /* 6: Flush Hint Address Structure */ 1362 1363 struct acpi_nfit_flush_address { 1364 struct acpi_nfit_header header; 1365 u32 device_handle; 1366 u16 hint_count; 1367 u8 reserved[6]; /* Reserved, must be zero */ 1368 u64 hint_address[1]; /* Variable length */ 1369 }; 1370 1371 /* 7: Platform Capabilities Structure */ 1372 1373 struct acpi_nfit_capabilities { 1374 struct acpi_nfit_header header; 1375 u8 highest_capability; 1376 u8 reserved[3]; /* Reserved, must be zero */ 1377 u32 capabilities; 1378 u32 reserved2; 1379 }; 1380 1381 /* Capabilities Flags */ 1382 1383 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1384 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1385 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1386 1387 /* 1388 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1389 */ 1390 struct nfit_device_handle { 1391 u32 handle; 1392 }; 1393 1394 /* Device handle construction and extraction macros */ 1395 1396 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1397 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1398 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1399 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1400 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1401 1402 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1403 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1404 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1405 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1406 #define ACPI_NFIT_NODE_ID_OFFSET 16 1407 1408 /* Macro to construct a NFIT/NVDIMM device handle */ 1409 1410 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1411 ((dimm) | \ 1412 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1413 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1414 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1415 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1416 1417 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1418 1419 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1420 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1421 1422 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1423 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1424 1425 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1426 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1427 1428 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1429 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1430 1431 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1432 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1433 1434 /******************************************************************************* 1435 * 1436 * NHLT - Non HD Audio Link Table 1437 * 1438 * Conforms to: Intel Smart Sound Technology NHLT Specification 1439 * Version 0.8.1, January 2020. 1440 * 1441 ******************************************************************************/ 1442 1443 /* Main table */ 1444 1445 struct acpi_table_nhlt { 1446 struct acpi_table_header header; /* Common ACPI table header */ 1447 u8 endpoint_count; 1448 }; 1449 1450 struct acpi_nhlt_endpoint { 1451 u32 descriptor_length; 1452 u8 link_type; 1453 u8 instance_id; 1454 u16 vendor_id; 1455 u16 device_id; 1456 u16 revision_id; 1457 u32 subsystem_id; 1458 u8 device_type; 1459 u8 direction; 1460 u8 virtual_bus_id; 1461 }; 1462 1463 /* Types for link_type field above */ 1464 1465 #define ACPI_NHLT_RESERVED_HD_AUDIO 0 1466 #define ACPI_NHLT_RESERVED_DSP 1 1467 #define ACPI_NHLT_PDM 2 1468 #define ACPI_NHLT_SSP 3 1469 #define ACPI_NHLT_RESERVED_SLIMBUS 4 1470 #define ACPI_NHLT_RESERVED_SOUNDWIRE 5 1471 #define ACPI_NHLT_TYPE_RESERVED 6 /* 6 and above are reserved */ 1472 1473 /* All other values above are reserved */ 1474 1475 /* Values for device_id field above */ 1476 1477 #define ACPI_NHLT_PDM_DMIC 0xAE20 1478 #define ACPI_NHLT_BT_SIDEBAND 0xAE30 1479 #define ACPI_NHLT_I2S_TDM_CODECS 0xAE23 1480 1481 /* Values for device_type field above */ 1482 1483 /* SSP Link */ 1484 1485 #define ACPI_NHLT_LINK_BT_SIDEBAND 0 1486 #define ACPI_NHLT_LINK_FM 1 1487 #define ACPI_NHLT_LINK_MODEM 2 1488 /* 3 is reserved */ 1489 #define ACPI_NHLT_LINK_SSP_ANALOG_CODEC 4 1490 1491 /* PDM Link */ 1492 1493 #define ACPI_NHLT_PDM_ON_CAVS_1P8 0 1494 #define ACPI_NHLT_PDM_ON_CAVS_1P5 1 1495 1496 /* Values for Direction field above */ 1497 1498 #define ACPI_NHLT_DIR_RENDER 0 1499 #define ACPI_NHLT_DIR_CAPTURE 1 1500 #define ACPI_NHLT_DIR_RENDER_LOOPBACK 2 1501 #define ACPI_NHLT_DIR_RENDER_FEEDBACK 3 1502 #define ACPI_NHLT_DIR_RESERVED 4 /* 4 and above are reserved */ 1503 1504 struct acpi_nhlt_device_specific_config { 1505 u32 capabilities_size; 1506 u8 virtual_slot; 1507 u8 config_type; 1508 }; 1509 1510 struct acpi_nhlt_device_specific_config_a { 1511 u32 capabilities_size; 1512 u8 virtual_slot; 1513 u8 config_type; 1514 u8 array_type; 1515 }; 1516 1517 /* Values for Config Type above */ 1518 1519 #define ACPI_NHLT_CONFIG_TYPE_GENERIC 0x00 1520 #define ACPI_NHLT_CONFIG_TYPE_MIC_ARRAY 0x01 1521 #define ACPI_NHLT_CONFIG_TYPE_RENDER_FEEDBACK 0x03 1522 #define ACPI_NHLT_CONFIG_TYPE_RESERVED 0x04 /* 4 and above are reserved */ 1523 1524 struct acpi_nhlt_device_specific_config_b { 1525 u32 capabilities_size; 1526 }; 1527 1528 struct acpi_nhlt_device_specific_config_c { 1529 u32 capabilities_size; 1530 u8 virtual_slot; 1531 }; 1532 1533 struct acpi_nhlt_render_device_specific_config { 1534 u32 capabilities_size; 1535 u8 virtual_slot; 1536 }; 1537 1538 struct acpi_nhlt_wave_extensible { 1539 u16 format_tag; 1540 u16 channel_count; 1541 u32 samples_per_sec; 1542 u32 avg_bytes_per_sec; 1543 u16 block_align; 1544 u16 bits_per_sample; 1545 u16 extra_format_size; 1546 u16 valid_bits_per_sample; 1547 u32 channel_mask; 1548 u8 sub_format_guid[16]; 1549 }; 1550 1551 /* Values for channel_mask above */ 1552 1553 #define ACPI_NHLT_SPKR_FRONT_LEFT 0x1 1554 #define ACPI_NHLT_SPKR_FRONT_RIGHT 0x2 1555 #define ACPI_NHLT_SPKR_FRONT_CENTER 0x4 1556 #define ACPI_NHLT_SPKR_LOW_FREQ 0x8 1557 #define ACPI_NHLT_SPKR_BACK_LEFT 0x10 1558 #define ACPI_NHLT_SPKR_BACK_RIGHT 0x20 1559 #define ACPI_NHLT_SPKR_FRONT_LEFT_OF_CENTER 0x40 1560 #define ACPI_NHLT_SPKR_FRONT_RIGHT_OF_CENTER 0x80 1561 #define ACPI_NHLT_SPKR_BACK_CENTER 0x100 1562 #define ACPI_NHLT_SPKR_SIDE_LEFT 0x200 1563 #define ACPI_NHLT_SPKR_SIDE_RIGHT 0x400 1564 #define ACPI_NHLT_SPKR_TOP_CENTER 0x800 1565 #define ACPI_NHLT_SPKR_TOP_FRONT_LEFT 0x1000 1566 #define ACPI_NHLT_SPKR_TOP_FRONT_CENTER 0x2000 1567 #define ACPI_NHLT_SPKR_TOP_FRONT_RIGHT 0x4000 1568 #define ACPI_NHLT_SPKR_TOP_BACK_LEFT 0x8000 1569 #define ACPI_NHLT_SPKR_TOP_BACK_CENTER 0x10000 1570 #define ACPI_NHLT_SPKR_TOP_BACK_RIGHT 0x20000 1571 1572 struct acpi_nhlt_format_config { 1573 struct acpi_nhlt_wave_extensible format; 1574 u32 capability_size; 1575 u8 capabilities[]; 1576 }; 1577 1578 struct acpi_nhlt_formats_config { 1579 u8 formats_count; 1580 }; 1581 1582 struct acpi_nhlt_device_specific_hdr { 1583 u8 virtual_slot; 1584 u8 config_type; 1585 }; 1586 1587 /* Types for config_type above */ 1588 1589 #define ACPI_NHLT_GENERIC 0 1590 #define ACPI_NHLT_MIC 1 1591 #define ACPI_NHLT_RENDER 3 1592 1593 struct acpi_nhlt_mic_device_specific_config { 1594 struct acpi_nhlt_device_specific_hdr device_config; 1595 u8 array_type_ext; 1596 }; 1597 1598 /* Values for array_type_ext above */ 1599 1600 #define ACPI_NHLT_ARRAY_TYPE_RESERVED 0x09 // 9 and below are reserved 1601 #define ACPI_NHLT_SMALL_LINEAR_2ELEMENT 0x0A 1602 #define ACPI_NHLT_BIG_LINEAR_2ELEMENT 0x0B 1603 #define ACPI_NHLT_FIRST_GEOMETRY_LINEAR_4ELEMENT 0x0C 1604 #define ACPI_NHLT_PLANAR_LSHAPED_4ELEMENT 0x0D 1605 #define ACPI_NHLT_SECOND_GEOMETRY_LINEAR_4ELEMENT 0x0E 1606 #define ACPI_NHLT_VENDOR_DEFINED 0x0F 1607 #define ACPI_NHLT_ARRAY_TYPE_MASK 0x0F 1608 #define ACPI_NHLT_ARRAY_TYPE_EXT_MASK 0x10 1609 1610 #define ACPI_NHLT_NO_EXTENSION 0x0 1611 #define ACPI_NHLT_MIC_SNR_SENSITIVITY_EXT (1<<4) 1612 1613 struct acpi_nhlt_vendor_mic_count { 1614 u8 microphone_count; 1615 }; 1616 1617 struct acpi_nhlt_vendor_mic_config { 1618 u8 type; 1619 u8 panel; 1620 u16 speaker_position_distance; // mm 1621 u16 horizontal_offset; // mm 1622 u16 vertical_offset; // mm 1623 u8 frequency_low_band; // 5*hz 1624 u8 frequency_high_band; // 500*hz 1625 u16 direction_angle; // -180 - + 180 1626 u16 elevation_angle; // -180 - + 180 1627 u16 work_vertical_angle_begin; // -180 - + 180 with 2 deg step 1628 u16 work_vertical_angle_end; // -180 - + 180 with 2 deg step 1629 u16 work_horizontal_angle_begin; // -180 - + 180 with 2 deg step 1630 u16 work_horizontal_angle_end; // -180 - + 180 with 2 deg step 1631 }; 1632 1633 /* Values for Type field above */ 1634 1635 #define ACPI_NHLT_MIC_OMNIDIRECTIONAL 0 1636 #define ACPI_NHLT_MIC_SUBCARDIOID 1 1637 #define ACPI_NHLT_MIC_CARDIOID 2 1638 #define ACPI_NHLT_MIC_SUPER_CARDIOID 3 1639 #define ACPI_NHLT_MIC_HYPER_CARDIOID 4 1640 #define ACPI_NHLT_MIC_8_SHAPED 5 1641 #define ACPI_NHLT_MIC_RESERVED6 6 // 6 is reserved 1642 #define ACPI_NHLT_MIC_VENDOR_DEFINED 7 1643 #define ACPI_NHLT_MIC_RESERVED 8 // 8 and above are reserved 1644 1645 /* Values for Panel field above */ 1646 1647 #define ACPI_NHLT_MIC_POSITION_TOP 0 1648 #define ACPI_NHLT_MIC_POSITION_BOTTOM 1 1649 #define ACPI_NHLT_MIC_POSITION_LEFT 2 1650 #define ACPI_NHLT_MIC_POSITION_RIGHT 3 1651 #define ACPI_NHLT_MIC_POSITION_FRONT 4 1652 #define ACPI_NHLT_MIC_POSITION_BACK 5 1653 #define ACPI_NHLT_MIC_POSITION_RESERVED 6 // 6 and above are reserved 1654 1655 struct acpi_nhlt_vendor_mic_device_specific_config { 1656 struct acpi_nhlt_mic_device_specific_config mic_array_device_config; 1657 u8 number_of_microphones; 1658 struct acpi_nhlt_vendor_mic_config mic_config[]; // indexed by number_of_microphones 1659 }; 1660 1661 /* Microphone SNR and Sensitivity extension */ 1662 1663 struct acpi_nhlt_mic_snr_sensitivity_extension { 1664 u32 SNR; 1665 u32 sensitivity; 1666 }; 1667 1668 /* Render device with feedback */ 1669 1670 struct acpi_nhlt_render_feedback_device_specific_config { 1671 u8 feedback_virtual_slot; // render slot in case of capture 1672 u16 feedback_channels; // informative only 1673 u16 feedback_valid_bits_per_sample; 1674 }; 1675 1676 /* Linux-specific structures */ 1677 1678 struct acpi_nhlt_linux_specific_count { 1679 u8 structure_count; 1680 }; 1681 1682 struct acpi_nhlt_linux_specific_data { 1683 u8 device_id[16]; 1684 u8 device_instance_id; 1685 u8 device_port_id; 1686 }; 1687 1688 struct acpi_nhlt_linux_specific_data_b { 1689 u8 specific_data[18]; 1690 }; 1691 1692 struct acpi_nhlt_table_terminator { 1693 u32 terminator_value; 1694 u32 terminator_signature; 1695 }; 1696 1697 /******************************************************************************* 1698 * 1699 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1700 * Version 2 (ACPI 6.2) 1701 * 1702 ******************************************************************************/ 1703 1704 struct acpi_table_pcct { 1705 struct acpi_table_header header; /* Common ACPI table header */ 1706 u32 flags; 1707 u64 reserved; 1708 }; 1709 1710 /* Values for Flags field above */ 1711 1712 #define ACPI_PCCT_DOORBELL 1 1713 1714 /* Values for subtable type in struct acpi_subtable_header */ 1715 1716 enum acpi_pcct_type { 1717 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1718 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1719 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1720 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1721 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1722 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1723 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1724 }; 1725 1726 /* 1727 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1728 */ 1729 1730 /* 0: Generic Communications Subspace */ 1731 1732 struct acpi_pcct_subspace { 1733 struct acpi_subtable_header header; 1734 u8 reserved[6]; 1735 u64 base_address; 1736 u64 length; 1737 struct acpi_generic_address doorbell_register; 1738 u64 preserve_mask; 1739 u64 write_mask; 1740 u32 latency; 1741 u32 max_access_rate; 1742 u16 min_turnaround_time; 1743 }; 1744 1745 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1746 1747 struct acpi_pcct_hw_reduced { 1748 struct acpi_subtable_header header; 1749 u32 platform_interrupt; 1750 u8 flags; 1751 u8 reserved; 1752 u64 base_address; 1753 u64 length; 1754 struct acpi_generic_address doorbell_register; 1755 u64 preserve_mask; 1756 u64 write_mask; 1757 u32 latency; 1758 u32 max_access_rate; 1759 u16 min_turnaround_time; 1760 }; 1761 1762 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1763 1764 struct acpi_pcct_hw_reduced_type2 { 1765 struct acpi_subtable_header header; 1766 u32 platform_interrupt; 1767 u8 flags; 1768 u8 reserved; 1769 u64 base_address; 1770 u64 length; 1771 struct acpi_generic_address doorbell_register; 1772 u64 preserve_mask; 1773 u64 write_mask; 1774 u32 latency; 1775 u32 max_access_rate; 1776 u16 min_turnaround_time; 1777 struct acpi_generic_address platform_ack_register; 1778 u64 ack_preserve_mask; 1779 u64 ack_write_mask; 1780 }; 1781 1782 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1783 1784 struct acpi_pcct_ext_pcc_master { 1785 struct acpi_subtable_header header; 1786 u32 platform_interrupt; 1787 u8 flags; 1788 u8 reserved1; 1789 u64 base_address; 1790 u32 length; 1791 struct acpi_generic_address doorbell_register; 1792 u64 preserve_mask; 1793 u64 write_mask; 1794 u32 latency; 1795 u32 max_access_rate; 1796 u32 min_turnaround_time; 1797 struct acpi_generic_address platform_ack_register; 1798 u64 ack_preserve_mask; 1799 u64 ack_set_mask; 1800 u64 reserved2; 1801 struct acpi_generic_address cmd_complete_register; 1802 u64 cmd_complete_mask; 1803 struct acpi_generic_address cmd_update_register; 1804 u64 cmd_update_preserve_mask; 1805 u64 cmd_update_set_mask; 1806 struct acpi_generic_address error_status_register; 1807 u64 error_status_mask; 1808 }; 1809 1810 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1811 1812 struct acpi_pcct_ext_pcc_slave { 1813 struct acpi_subtable_header header; 1814 u32 platform_interrupt; 1815 u8 flags; 1816 u8 reserved1; 1817 u64 base_address; 1818 u32 length; 1819 struct acpi_generic_address doorbell_register; 1820 u64 preserve_mask; 1821 u64 write_mask; 1822 u32 latency; 1823 u32 max_access_rate; 1824 u32 min_turnaround_time; 1825 struct acpi_generic_address platform_ack_register; 1826 u64 ack_preserve_mask; 1827 u64 ack_set_mask; 1828 u64 reserved2; 1829 struct acpi_generic_address cmd_complete_register; 1830 u64 cmd_complete_mask; 1831 struct acpi_generic_address cmd_update_register; 1832 u64 cmd_update_preserve_mask; 1833 u64 cmd_update_set_mask; 1834 struct acpi_generic_address error_status_register; 1835 u64 error_status_mask; 1836 }; 1837 1838 /* 5: HW Registers based Communications Subspace */ 1839 1840 struct acpi_pcct_hw_reg { 1841 struct acpi_subtable_header header; 1842 u16 version; 1843 u64 base_address; 1844 u64 length; 1845 struct acpi_generic_address doorbell_register; 1846 u64 doorbell_preserve; 1847 u64 doorbell_write; 1848 struct acpi_generic_address cmd_complete_register; 1849 u64 cmd_complete_mask; 1850 struct acpi_generic_address error_status_register; 1851 u64 error_status_mask; 1852 u32 nominal_latency; 1853 u32 min_turnaround_time; 1854 }; 1855 1856 /* Values for doorbell flags above */ 1857 1858 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1859 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1860 1861 /* 1862 * PCC memory structures (not part of the ACPI table) 1863 */ 1864 1865 /* Shared Memory Region */ 1866 1867 struct acpi_pcct_shared_memory { 1868 u32 signature; 1869 u16 command; 1870 u16 status; 1871 }; 1872 1873 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1874 1875 struct acpi_pcct_ext_pcc_shared_memory { 1876 u32 signature; 1877 u32 flags; 1878 u32 length; 1879 u32 command; 1880 }; 1881 1882 /******************************************************************************* 1883 * 1884 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1885 * Version 0 1886 * 1887 ******************************************************************************/ 1888 1889 struct acpi_table_pdtt { 1890 struct acpi_table_header header; /* Common ACPI table header */ 1891 u8 trigger_count; 1892 u8 reserved[3]; 1893 u32 array_offset; 1894 }; 1895 1896 /* 1897 * PDTT Communication Channel Identifier Structure. 1898 * The number of these structures is defined by trigger_count above, 1899 * starting at array_offset. 1900 */ 1901 struct acpi_pdtt_channel { 1902 u8 subchannel_id; 1903 u8 flags; 1904 }; 1905 1906 /* Flags for above */ 1907 1908 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1909 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1910 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1911 1912 /******************************************************************************* 1913 * 1914 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1915 * Version 1 1916 * 1917 ******************************************************************************/ 1918 1919 struct acpi_table_phat { 1920 struct acpi_table_header header; /* Common ACPI table header */ 1921 }; 1922 1923 /* Common header for PHAT subtables that follow main table */ 1924 1925 struct acpi_phat_header { 1926 u16 type; 1927 u16 length; 1928 u8 revision; 1929 }; 1930 1931 /* Values for Type field above */ 1932 1933 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 1934 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 1935 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 1936 1937 /* 1938 * PHAT subtables, correspond to Type in struct acpi_phat_header 1939 */ 1940 1941 /* 0: Firmware Version Data Record */ 1942 1943 struct acpi_phat_version_data { 1944 struct acpi_phat_header header; 1945 u8 reserved[3]; 1946 u32 element_count; 1947 }; 1948 1949 struct acpi_phat_version_element { 1950 u8 guid[16]; 1951 u64 version_value; 1952 u32 producer_id; 1953 }; 1954 1955 /* 1: Firmware Health Data Record */ 1956 1957 struct acpi_phat_health_data { 1958 struct acpi_phat_header header; 1959 u8 reserved[2]; 1960 u8 health; 1961 u8 device_guid[16]; 1962 u32 device_specific_offset; /* Zero if no Device-specific data */ 1963 }; 1964 1965 /* Values for Health field above */ 1966 1967 #define ACPI_PHAT_ERRORS_FOUND 0 1968 #define ACPI_PHAT_NO_ERRORS 1 1969 #define ACPI_PHAT_UNKNOWN_ERRORS 2 1970 #define ACPI_PHAT_ADVISORY 3 1971 1972 /******************************************************************************* 1973 * 1974 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1975 * Version 1 1976 * 1977 ******************************************************************************/ 1978 1979 struct acpi_table_pmtt { 1980 struct acpi_table_header header; /* Common ACPI table header */ 1981 u32 memory_device_count; 1982 /* 1983 * Immediately followed by: 1984 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 1985 */ 1986 }; 1987 1988 /* Common header for PMTT subtables that follow main table */ 1989 1990 struct acpi_pmtt_header { 1991 u8 type; 1992 u8 reserved1; 1993 u16 length; 1994 u16 flags; 1995 u16 reserved2; 1996 u32 memory_device_count; /* Zero means no memory device structs follow */ 1997 /* 1998 * Immediately followed by: 1999 * u8 type_specific_data[] 2000 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2001 */ 2002 }; 2003 2004 /* Values for Type field above */ 2005 2006 #define ACPI_PMTT_TYPE_SOCKET 0 2007 #define ACPI_PMTT_TYPE_CONTROLLER 1 2008 #define ACPI_PMTT_TYPE_DIMM 2 2009 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 2010 #define ACPI_PMTT_TYPE_VENDOR 0xFF 2011 2012 /* Values for Flags field above */ 2013 2014 #define ACPI_PMTT_TOP_LEVEL 0x0001 2015 #define ACPI_PMTT_PHYSICAL 0x0002 2016 #define ACPI_PMTT_MEMORY_TYPE 0x000C 2017 2018 /* 2019 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 2020 */ 2021 2022 /* 0: Socket Structure */ 2023 2024 struct acpi_pmtt_socket { 2025 struct acpi_pmtt_header header; 2026 u16 socket_id; 2027 u16 reserved; 2028 }; 2029 /* 2030 * Immediately followed by: 2031 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2032 */ 2033 2034 /* 1: Memory Controller subtable */ 2035 2036 struct acpi_pmtt_controller { 2037 struct acpi_pmtt_header header; 2038 u16 controller_id; 2039 u16 reserved; 2040 }; 2041 /* 2042 * Immediately followed by: 2043 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2044 */ 2045 2046 /* 2: Physical Component Identifier (DIMM) */ 2047 2048 struct acpi_pmtt_physical_component { 2049 struct acpi_pmtt_header header; 2050 u32 bios_handle; 2051 }; 2052 2053 /* 0xFF: Vendor Specific Data */ 2054 2055 struct acpi_pmtt_vendor_specific { 2056 struct acpi_pmtt_header header; 2057 u8 type_uuid[16]; 2058 u8 specific[]; 2059 /* 2060 * Immediately followed by: 2061 * u8 vendor_specific_data[]; 2062 * MEMORY_DEVICE memory_device_struct[memory_device_count]; 2063 */ 2064 }; 2065 2066 /******************************************************************************* 2067 * 2068 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2069 * Version 1 2070 * 2071 ******************************************************************************/ 2072 2073 struct acpi_table_pptt { 2074 struct acpi_table_header header; /* Common ACPI table header */ 2075 }; 2076 2077 /* Values for Type field above */ 2078 2079 enum acpi_pptt_type { 2080 ACPI_PPTT_TYPE_PROCESSOR = 0, 2081 ACPI_PPTT_TYPE_CACHE = 1, 2082 ACPI_PPTT_TYPE_ID = 2, 2083 ACPI_PPTT_TYPE_RESERVED = 3 2084 }; 2085 2086 /* 0: Processor Hierarchy Node Structure */ 2087 2088 struct acpi_pptt_processor { 2089 struct acpi_subtable_header header; 2090 u16 reserved; 2091 u32 flags; 2092 u32 parent; 2093 u32 acpi_processor_id; 2094 u32 number_of_priv_resources; 2095 }; 2096 2097 /* Flags */ 2098 2099 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2100 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2101 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2102 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2103 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2104 2105 /* 1: Cache Type Structure */ 2106 2107 struct acpi_pptt_cache { 2108 struct acpi_subtable_header header; 2109 u16 reserved; 2110 u32 flags; 2111 u32 next_level_of_cache; 2112 u32 size; 2113 u32 number_of_sets; 2114 u8 associativity; 2115 u8 attributes; 2116 u16 line_size; 2117 }; 2118 2119 /* 1: Cache Type Structure for PPTT version 3 */ 2120 2121 struct acpi_pptt_cache_v1 { 2122 u32 cache_id; 2123 }; 2124 2125 /* Flags */ 2126 2127 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2128 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2129 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2130 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2131 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2132 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2133 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2134 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2135 2136 /* Masks for Attributes */ 2137 2138 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2139 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2140 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2141 2142 /* Attributes describing cache */ 2143 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2144 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2145 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2146 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2147 2148 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2149 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2150 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2151 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2152 2153 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2154 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2155 2156 /* 2: ID Structure */ 2157 2158 struct acpi_pptt_id { 2159 struct acpi_subtable_header header; 2160 u16 reserved; 2161 u32 vendor_id; 2162 u64 level1_id; 2163 u64 level2_id; 2164 u16 major_rev; 2165 u16 minor_rev; 2166 u16 spin_rev; 2167 }; 2168 2169 /******************************************************************************* 2170 * 2171 * PRMT - Platform Runtime Mechanism Table 2172 * Version 1 2173 * 2174 ******************************************************************************/ 2175 2176 struct acpi_table_prmt { 2177 struct acpi_table_header header; /* Common ACPI table header */ 2178 }; 2179 2180 struct acpi_table_prmt_header { 2181 u8 platform_guid[16]; 2182 u32 module_info_offset; 2183 u32 module_info_count; 2184 }; 2185 2186 struct acpi_prmt_module_header { 2187 u16 revision; 2188 u16 length; 2189 }; 2190 2191 struct acpi_prmt_module_info { 2192 u16 revision; 2193 u16 length; 2194 u8 module_guid[16]; 2195 u16 major_rev; 2196 u16 minor_rev; 2197 u16 handler_info_count; 2198 u32 handler_info_offset; 2199 u64 mmio_list_pointer; 2200 }; 2201 2202 struct acpi_prmt_handler_info { 2203 u16 revision; 2204 u16 length; 2205 u8 handler_guid[16]; 2206 u64 handler_address; 2207 u64 static_data_buffer_address; 2208 u64 acpi_param_buffer_address; 2209 }; 2210 2211 /******************************************************************************* 2212 * 2213 * RASF - RAS Feature Table (ACPI 5.0) 2214 * Version 1 2215 * 2216 ******************************************************************************/ 2217 2218 struct acpi_table_rasf { 2219 struct acpi_table_header header; /* Common ACPI table header */ 2220 u8 channel_id[12]; 2221 }; 2222 2223 /* RASF Platform Communication Channel Shared Memory Region */ 2224 2225 struct acpi_rasf_shared_memory { 2226 u32 signature; 2227 u16 command; 2228 u16 status; 2229 u16 version; 2230 u8 capabilities[16]; 2231 u8 set_capabilities[16]; 2232 u16 num_parameter_blocks; 2233 u32 set_capabilities_status; 2234 }; 2235 2236 /* RASF Parameter Block Structure Header */ 2237 2238 struct acpi_rasf_parameter_block { 2239 u16 type; 2240 u16 version; 2241 u16 length; 2242 }; 2243 2244 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2245 2246 struct acpi_rasf_patrol_scrub_parameter { 2247 struct acpi_rasf_parameter_block header; 2248 u16 patrol_scrub_command; 2249 u64 requested_address_range[2]; 2250 u64 actual_address_range[2]; 2251 u16 flags; 2252 u8 requested_speed; 2253 }; 2254 2255 /* Masks for Flags and Speed fields above */ 2256 2257 #define ACPI_RASF_SCRUBBER_RUNNING 1 2258 #define ACPI_RASF_SPEED (7<<1) 2259 #define ACPI_RASF_SPEED_SLOW (0<<1) 2260 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2261 #define ACPI_RASF_SPEED_FAST (7<<1) 2262 2263 /* Channel Commands */ 2264 2265 enum acpi_rasf_commands { 2266 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2267 }; 2268 2269 /* Platform RAS Capabilities */ 2270 2271 enum acpi_rasf_capabiliities { 2272 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2273 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2274 }; 2275 2276 /* Patrol Scrub Commands */ 2277 2278 enum acpi_rasf_patrol_scrub_commands { 2279 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2280 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2281 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2282 }; 2283 2284 /* Channel Command flags */ 2285 2286 #define ACPI_RASF_GENERATE_SCI (1<<15) 2287 2288 /* Status values */ 2289 2290 enum acpi_rasf_status { 2291 ACPI_RASF_SUCCESS = 0, 2292 ACPI_RASF_NOT_VALID = 1, 2293 ACPI_RASF_NOT_SUPPORTED = 2, 2294 ACPI_RASF_BUSY = 3, 2295 ACPI_RASF_FAILED = 4, 2296 ACPI_RASF_ABORTED = 5, 2297 ACPI_RASF_INVALID_DATA = 6 2298 }; 2299 2300 /* Status flags */ 2301 2302 #define ACPI_RASF_COMMAND_COMPLETE (1) 2303 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2304 #define ACPI_RASF_ERROR (1<<2) 2305 #define ACPI_RASF_STATUS (0x1F<<3) 2306 2307 /******************************************************************************* 2308 * 2309 * RGRT - Regulatory Graphics Resource Table 2310 * Version 1 2311 * 2312 * Conforms to "ACPI RGRT" available at: 2313 * https://microsoft.github.io/mu/dyn/mu_plus/ms_core_pkg/acpi_RGRT/feature_acpi_rgrt/ 2314 * 2315 ******************************************************************************/ 2316 2317 struct acpi_table_rgrt { 2318 struct acpi_table_header header; /* Common ACPI table header */ 2319 u16 version; 2320 u8 image_type; 2321 u8 reserved; 2322 u8 image[0]; 2323 }; 2324 2325 /* image_type values */ 2326 2327 enum acpi_rgrt_image_type { 2328 ACPI_RGRT_TYPE_RESERVED0 = 0, 2329 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2330 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2331 }; 2332 2333 /******************************************************************************* 2334 * 2335 * SBST - Smart Battery Specification Table 2336 * Version 1 2337 * 2338 ******************************************************************************/ 2339 2340 struct acpi_table_sbst { 2341 struct acpi_table_header header; /* Common ACPI table header */ 2342 u32 warning_level; 2343 u32 low_level; 2344 u32 critical_level; 2345 }; 2346 2347 /******************************************************************************* 2348 * 2349 * SDEI - Software Delegated Exception Interface Descriptor Table 2350 * 2351 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2352 * May 8th, 2017. Copyright 2017 ARM Ltd. 2353 * 2354 ******************************************************************************/ 2355 2356 struct acpi_table_sdei { 2357 struct acpi_table_header header; /* Common ACPI table header */ 2358 }; 2359 2360 /******************************************************************************* 2361 * 2362 * SDEV - Secure Devices Table (ACPI 6.2) 2363 * Version 1 2364 * 2365 ******************************************************************************/ 2366 2367 struct acpi_table_sdev { 2368 struct acpi_table_header header; /* Common ACPI table header */ 2369 }; 2370 2371 struct acpi_sdev_header { 2372 u8 type; 2373 u8 flags; 2374 u16 length; 2375 }; 2376 2377 /* Values for subtable type above */ 2378 2379 enum acpi_sdev_type { 2380 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2381 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2382 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2383 }; 2384 2385 /* Values for flags above */ 2386 2387 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2388 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2389 2390 /* 2391 * SDEV subtables 2392 */ 2393 2394 /* 0: Namespace Device Based Secure Device Structure */ 2395 2396 struct acpi_sdev_namespace { 2397 struct acpi_sdev_header header; 2398 u16 device_id_offset; 2399 u16 device_id_length; 2400 u16 vendor_data_offset; 2401 u16 vendor_data_length; 2402 }; 2403 2404 struct acpi_sdev_secure_component { 2405 u16 secure_component_offset; 2406 u16 secure_component_length; 2407 }; 2408 2409 /* 2410 * SDEV sub-subtables ("Components") for above 2411 */ 2412 struct acpi_sdev_component { 2413 struct acpi_sdev_header header; 2414 }; 2415 2416 /* Values for sub-subtable type above */ 2417 2418 enum acpi_sac_type { 2419 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2420 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2421 }; 2422 2423 struct acpi_sdev_id_component { 2424 struct acpi_sdev_header header; 2425 u16 hardware_id_offset; 2426 u16 hardware_id_length; 2427 u16 subsystem_id_offset; 2428 u16 subsystem_id_length; 2429 u16 hardware_revision; 2430 u8 hardware_rev_present; 2431 u8 class_code_present; 2432 u8 pci_base_class; 2433 u8 pci_sub_class; 2434 u8 pci_programming_xface; 2435 }; 2436 2437 struct acpi_sdev_mem_component { 2438 struct acpi_sdev_header header; 2439 u32 reserved; 2440 u64 memory_base_address; 2441 u64 memory_length; 2442 }; 2443 2444 /* 1: PCIe Endpoint Device Based Device Structure */ 2445 2446 struct acpi_sdev_pcie { 2447 struct acpi_sdev_header header; 2448 u16 segment; 2449 u16 start_bus; 2450 u16 path_offset; 2451 u16 path_length; 2452 u16 vendor_data_offset; 2453 u16 vendor_data_length; 2454 }; 2455 2456 /* 1a: PCIe Endpoint path entry */ 2457 2458 struct acpi_sdev_pcie_path { 2459 u8 device; 2460 u8 function; 2461 }; 2462 2463 /******************************************************************************* 2464 * 2465 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2466 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2467 * Trust Domain Extensions (Intel TDX)". 2468 * Version 1 2469 * 2470 ******************************************************************************/ 2471 2472 struct acpi_table_svkl { 2473 struct acpi_table_header header; /* Common ACPI table header */ 2474 u32 count; 2475 }; 2476 2477 struct acpi_svkl_key { 2478 u16 type; 2479 u16 format; 2480 u32 size; 2481 u64 address; 2482 }; 2483 2484 enum acpi_svkl_type { 2485 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2486 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2487 }; 2488 2489 enum acpi_svkl_format { 2490 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2491 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2492 }; 2493 2494 /******************************************************************************* 2495 * 2496 * TDEL - TD-Event Log 2497 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2498 * Trust Domain Extensions (Intel TDX)". 2499 * September 2020 2500 * 2501 ******************************************************************************/ 2502 2503 struct acpi_table_tdel { 2504 struct acpi_table_header header; /* Common ACPI table header */ 2505 u32 reserved; 2506 u64 log_area_minimum_length; 2507 u64 log_area_start_address; 2508 }; 2509 2510 /* Reset to default packing */ 2511 2512 #pragma pack() 2513 2514 #endif /* __ACTBL2_H__ */ 2515