1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 5 * 6 * Copyright (C) 2000 - 2020, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL2_H__ 11 #define __ACTBL2_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables (2) 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 28 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 29 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 30 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 31 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 32 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 33 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 34 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 35 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 36 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 37 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 38 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 39 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 40 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 41 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 42 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 43 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 44 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 45 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 46 47 /* 48 * All tables must be byte-packed to match the ACPI specification, since 49 * the tables are provided by the system BIOS. 50 */ 51 #pragma pack(1) 52 53 /* 54 * Note: C bitfields are not used for this reason: 55 * 56 * "Bitfields are great and easy to read, but unfortunately the C language 57 * does not specify the layout of bitfields in memory, which means they are 58 * essentially useless for dealing with packed data in on-disk formats or 59 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 60 * this decision was a design error in C. Ritchie could have picked an order 61 * and stuck with it." Norman Ramsey. 62 * See http://stackoverflow.com/a/1053662/41661 63 */ 64 65 /******************************************************************************* 66 * 67 * IORT - IO Remapping Table 68 * 69 * Conforms to "IO Remapping Table System Software on ARM Platforms", 70 * Document number: ARM DEN 0049D, March 2018 71 * 72 ******************************************************************************/ 73 74 struct acpi_table_iort { 75 struct acpi_table_header header; 76 u32 node_count; 77 u32 node_offset; 78 u32 reserved; 79 }; 80 81 /* 82 * IORT subtables 83 */ 84 struct acpi_iort_node { 85 u8 type; 86 u16 length; 87 u8 revision; 88 u32 reserved; 89 u32 mapping_count; 90 u32 mapping_offset; 91 char node_data[1]; 92 }; 93 94 /* Values for subtable Type above */ 95 96 enum acpi_iort_node_type { 97 ACPI_IORT_NODE_ITS_GROUP = 0x00, 98 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 99 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 100 ACPI_IORT_NODE_SMMU = 0x03, 101 ACPI_IORT_NODE_SMMU_V3 = 0x04, 102 ACPI_IORT_NODE_PMCG = 0x05 103 }; 104 105 struct acpi_iort_id_mapping { 106 u32 input_base; /* Lowest value in input range */ 107 u32 id_count; /* Number of IDs */ 108 u32 output_base; /* Lowest value in output range */ 109 u32 output_reference; /* A reference to the output node */ 110 u32 flags; 111 }; 112 113 /* Masks for Flags field above for IORT subtable */ 114 115 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 116 117 struct acpi_iort_memory_access { 118 u32 cache_coherency; 119 u8 hints; 120 u16 reserved; 121 u8 memory_flags; 122 }; 123 124 /* Values for cache_coherency field above */ 125 126 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 127 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 128 129 /* Masks for Hints field above */ 130 131 #define ACPI_IORT_HT_TRANSIENT (1) 132 #define ACPI_IORT_HT_WRITE (1<<1) 133 #define ACPI_IORT_HT_READ (1<<2) 134 #define ACPI_IORT_HT_OVERRIDE (1<<3) 135 136 /* Masks for memory_flags field above */ 137 138 #define ACPI_IORT_MF_COHERENCY (1) 139 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 140 141 /* 142 * IORT node specific subtables 143 */ 144 struct acpi_iort_its_group { 145 u32 its_count; 146 u32 identifiers[1]; /* GIC ITS identifier array */ 147 }; 148 149 struct acpi_iort_named_component { 150 u32 node_flags; 151 u64 memory_properties; /* Memory access properties */ 152 u8 memory_address_limit; /* Memory address size limit */ 153 char device_name[1]; /* Path of namespace object */ 154 }; 155 156 /* Masks for Flags field above */ 157 158 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 159 #define ACPI_IORT_NC_PASID_BITS (31<<1) 160 161 struct acpi_iort_root_complex { 162 u64 memory_properties; /* Memory access properties */ 163 u32 ats_attribute; 164 u32 pci_segment_number; 165 u8 memory_address_limit; /* Memory address size limit */ 166 u8 reserved[3]; /* Reserved, must be zero */ 167 }; 168 169 /* Values for ats_attribute field above */ 170 171 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 172 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 173 174 struct acpi_iort_smmu { 175 u64 base_address; /* SMMU base address */ 176 u64 span; /* Length of memory range */ 177 u32 model; 178 u32 flags; 179 u32 global_interrupt_offset; 180 u32 context_interrupt_count; 181 u32 context_interrupt_offset; 182 u32 pmu_interrupt_count; 183 u32 pmu_interrupt_offset; 184 u64 interrupts[1]; /* Interrupt array */ 185 }; 186 187 /* Values for Model field above */ 188 189 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 190 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 191 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 192 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 193 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 194 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium thunder_x SMMUv2 */ 195 196 /* Masks for Flags field above */ 197 198 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 199 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 200 201 /* Global interrupt format */ 202 203 struct acpi_iort_smmu_gsi { 204 u32 nsg_irpt; 205 u32 nsg_irpt_flags; 206 u32 nsg_cfg_irpt; 207 u32 nsg_cfg_irpt_flags; 208 }; 209 210 struct acpi_iort_smmu_v3 { 211 u64 base_address; /* SMMUv3 base address */ 212 u32 flags; 213 u32 reserved; 214 u64 vatos_address; 215 u32 model; 216 u32 event_gsiv; 217 u32 pri_gsiv; 218 u32 gerr_gsiv; 219 u32 sync_gsiv; 220 u32 pxm; 221 u32 id_mapping_index; 222 }; 223 224 /* Values for Model field above */ 225 226 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 227 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* hi_silicon Hi161x SMMUv3 */ 228 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 229 230 /* Masks for Flags field above */ 231 232 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 233 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 234 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 235 236 struct acpi_iort_pmcg { 237 u64 page0_base_address; 238 u32 overflow_gsiv; 239 u32 node_reference; 240 u64 page1_base_address; 241 }; 242 243 /******************************************************************************* 244 * 245 * IVRS - I/O Virtualization Reporting Structure 246 * Version 1 247 * 248 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 249 * Revision 1.26, February 2009. 250 * 251 ******************************************************************************/ 252 253 struct acpi_table_ivrs { 254 struct acpi_table_header header; /* Common ACPI table header */ 255 u32 info; /* Common virtualization info */ 256 u64 reserved; 257 }; 258 259 /* Values for Info field above */ 260 261 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 262 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 263 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 264 265 /* IVRS subtable header */ 266 267 struct acpi_ivrs_header { 268 u8 type; /* Subtable type */ 269 u8 flags; 270 u16 length; /* Subtable length */ 271 u16 device_id; /* ID of IOMMU */ 272 }; 273 274 /* Values for subtable Type above */ 275 276 enum acpi_ivrs_type { 277 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 278 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 279 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 280 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 281 ACPI_IVRS_TYPE_MEMORY3 = 0x22 282 }; 283 284 /* Masks for Flags field above for IVHD subtable */ 285 286 #define ACPI_IVHD_TT_ENABLE (1) 287 #define ACPI_IVHD_PASS_PW (1<<1) 288 #define ACPI_IVHD_RES_PASS_PW (1<<2) 289 #define ACPI_IVHD_ISOC (1<<3) 290 #define ACPI_IVHD_IOTLB (1<<4) 291 292 /* Masks for Flags field above for IVMD subtable */ 293 294 #define ACPI_IVMD_UNITY (1) 295 #define ACPI_IVMD_READ (1<<1) 296 #define ACPI_IVMD_WRITE (1<<2) 297 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 298 299 /* 300 * IVRS subtables, correspond to Type in struct acpi_ivrs_header 301 */ 302 303 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 304 305 struct acpi_ivrs_hardware_10 { 306 struct acpi_ivrs_header header; 307 u16 capability_offset; /* Offset for IOMMU control fields */ 308 u64 base_address; /* IOMMU control registers */ 309 u16 pci_segment_group; 310 u16 info; /* MSI number and unit ID */ 311 u32 feature_reporting; 312 }; 313 314 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 315 316 struct acpi_ivrs_hardware_11 { 317 struct acpi_ivrs_header header; 318 u16 capability_offset; /* Offset for IOMMU control fields */ 319 u64 base_address; /* IOMMU control registers */ 320 u16 pci_segment_group; 321 u16 info; /* MSI number and unit ID */ 322 u32 attributes; 323 u64 efr_register_image; 324 u64 reserved; 325 }; 326 327 /* Masks for Info field above */ 328 329 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 330 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, unit_ID */ 331 332 /* 333 * Device Entries for IVHD subtable, appear after struct acpi_ivrs_hardware structure. 334 * Upper two bits of the Type field are the (encoded) length of the structure. 335 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 336 * are reserved for future use but not defined. 337 */ 338 struct acpi_ivrs_de_header { 339 u8 type; 340 u16 id; 341 u8 data_setting; 342 }; 343 344 /* Length of device entry is in the top two bits of Type field above */ 345 346 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 347 348 /* Values for device entry Type field above */ 349 350 enum acpi_ivrs_device_entry_type { 351 /* 4-byte device entries, all use struct acpi_ivrs_device4 */ 352 353 ACPI_IVRS_TYPE_PAD4 = 0, 354 ACPI_IVRS_TYPE_ALL = 1, 355 ACPI_IVRS_TYPE_SELECT = 2, 356 ACPI_IVRS_TYPE_START = 3, 357 ACPI_IVRS_TYPE_END = 4, 358 359 /* 8-byte device entries */ 360 361 ACPI_IVRS_TYPE_PAD8 = 64, 362 ACPI_IVRS_TYPE_NOT_USED = 65, 363 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses struct acpi_ivrs_device8a */ 364 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses struct acpi_ivrs_device8a */ 365 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses struct acpi_ivrs_device8b */ 366 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses struct acpi_ivrs_device8b */ 367 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses struct acpi_ivrs_device8c */ 368 }; 369 370 /* Values for Data field above */ 371 372 #define ACPI_IVHD_INIT_PASS (1) 373 #define ACPI_IVHD_EINT_PASS (1<<1) 374 #define ACPI_IVHD_NMI_PASS (1<<2) 375 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 376 #define ACPI_IVHD_LINT0_PASS (1<<6) 377 #define ACPI_IVHD_LINT1_PASS (1<<7) 378 379 /* Types 0-4: 4-byte device entry */ 380 381 struct acpi_ivrs_device4 { 382 struct acpi_ivrs_de_header header; 383 }; 384 385 /* Types 66-67: 8-byte device entry */ 386 387 struct acpi_ivrs_device8a { 388 struct acpi_ivrs_de_header header; 389 u8 reserved1; 390 u16 used_id; 391 u8 reserved2; 392 }; 393 394 /* Types 70-71: 8-byte device entry */ 395 396 struct acpi_ivrs_device8b { 397 struct acpi_ivrs_de_header header; 398 u32 extended_data; 399 }; 400 401 /* Values for extended_data above */ 402 403 #define ACPI_IVHD_ATS_DISABLED (1<<31) 404 405 /* Type 72: 8-byte device entry */ 406 407 struct acpi_ivrs_device8c { 408 struct acpi_ivrs_de_header header; 409 u8 handle; 410 u16 used_id; 411 u8 variety; 412 }; 413 414 /* Values for Variety field above */ 415 416 #define ACPI_IVHD_IOAPIC 1 417 #define ACPI_IVHD_HPET 2 418 419 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 420 421 struct acpi_ivrs_memory { 422 struct acpi_ivrs_header header; 423 u16 aux_data; 424 u64 reserved; 425 u64 start_address; 426 u64 memory_length; 427 }; 428 429 /******************************************************************************* 430 * 431 * LPIT - Low Power Idle Table 432 * 433 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 434 * 435 ******************************************************************************/ 436 437 struct acpi_table_lpit { 438 struct acpi_table_header header; /* Common ACPI table header */ 439 }; 440 441 /* LPIT subtable header */ 442 443 struct acpi_lpit_header { 444 u32 type; /* Subtable type */ 445 u32 length; /* Subtable length */ 446 u16 unique_id; 447 u16 reserved; 448 u32 flags; 449 }; 450 451 /* Values for subtable Type above */ 452 453 enum acpi_lpit_type { 454 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 455 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 456 }; 457 458 /* Masks for Flags field above */ 459 460 #define ACPI_LPIT_STATE_DISABLED (1) 461 #define ACPI_LPIT_NO_COUNTER (1<<1) 462 463 /* 464 * LPIT subtables, correspond to Type in struct acpi_lpit_header 465 */ 466 467 /* 0x00: Native C-state instruction based LPI structure */ 468 469 struct acpi_lpit_native { 470 struct acpi_lpit_header header; 471 struct acpi_generic_address entry_trigger; 472 u32 residency; 473 u32 latency; 474 struct acpi_generic_address residency_counter; 475 u64 counter_frequency; 476 }; 477 478 /******************************************************************************* 479 * 480 * MADT - Multiple APIC Description Table 481 * Version 3 482 * 483 ******************************************************************************/ 484 485 struct acpi_table_madt { 486 struct acpi_table_header header; /* Common ACPI table header */ 487 u32 address; /* Physical address of local APIC */ 488 u32 flags; 489 }; 490 491 /* Masks for Flags field above */ 492 493 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 494 495 /* Values for PCATCompat flag */ 496 497 #define ACPI_MADT_DUAL_PIC 1 498 #define ACPI_MADT_MULTIPLE_APIC 0 499 500 /* Values for MADT subtable type in struct acpi_subtable_header */ 501 502 enum acpi_madt_type { 503 ACPI_MADT_TYPE_LOCAL_APIC = 0, 504 ACPI_MADT_TYPE_IO_APIC = 1, 505 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 506 ACPI_MADT_TYPE_NMI_SOURCE = 3, 507 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 508 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 509 ACPI_MADT_TYPE_IO_SAPIC = 6, 510 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 511 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 512 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 513 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 514 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 515 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 516 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 517 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 518 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 519 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 520 }; 521 522 /* 523 * MADT Subtables, correspond to Type in struct acpi_subtable_header 524 */ 525 526 /* 0: Processor Local APIC */ 527 528 struct acpi_madt_local_apic { 529 struct acpi_subtable_header header; 530 u8 processor_id; /* ACPI processor id */ 531 u8 id; /* Processor's local APIC id */ 532 u32 lapic_flags; 533 }; 534 535 /* 1: IO APIC */ 536 537 struct acpi_madt_io_apic { 538 struct acpi_subtable_header header; 539 u8 id; /* I/O APIC ID */ 540 u8 reserved; /* reserved - must be zero */ 541 u32 address; /* APIC physical address */ 542 u32 global_irq_base; /* Global system interrupt where INTI lines start */ 543 }; 544 545 /* 2: Interrupt Override */ 546 547 struct acpi_madt_interrupt_override { 548 struct acpi_subtable_header header; 549 u8 bus; /* 0 - ISA */ 550 u8 source_irq; /* Interrupt source (IRQ) */ 551 u32 global_irq; /* Global system interrupt */ 552 u16 inti_flags; 553 }; 554 555 /* 3: NMI Source */ 556 557 struct acpi_madt_nmi_source { 558 struct acpi_subtable_header header; 559 u16 inti_flags; 560 u32 global_irq; /* Global system interrupt */ 561 }; 562 563 /* 4: Local APIC NMI */ 564 565 struct acpi_madt_local_apic_nmi { 566 struct acpi_subtable_header header; 567 u8 processor_id; /* ACPI processor id */ 568 u16 inti_flags; 569 u8 lint; /* LINTn to which NMI is connected */ 570 }; 571 572 /* 5: Address Override */ 573 574 struct acpi_madt_local_apic_override { 575 struct acpi_subtable_header header; 576 u16 reserved; /* Reserved, must be zero */ 577 u64 address; /* APIC physical address */ 578 }; 579 580 /* 6: I/O Sapic */ 581 582 struct acpi_madt_io_sapic { 583 struct acpi_subtable_header header; 584 u8 id; /* I/O SAPIC ID */ 585 u8 reserved; /* Reserved, must be zero */ 586 u32 global_irq_base; /* Global interrupt for SAPIC start */ 587 u64 address; /* SAPIC physical address */ 588 }; 589 590 /* 7: Local Sapic */ 591 592 struct acpi_madt_local_sapic { 593 struct acpi_subtable_header header; 594 u8 processor_id; /* ACPI processor id */ 595 u8 id; /* SAPIC ID */ 596 u8 eid; /* SAPIC EID */ 597 u8 reserved[3]; /* Reserved, must be zero */ 598 u32 lapic_flags; 599 u32 uid; /* Numeric UID - ACPI 3.0 */ 600 char uid_string[1]; /* String UID - ACPI 3.0 */ 601 }; 602 603 /* 8: Platform Interrupt Source */ 604 605 struct acpi_madt_interrupt_source { 606 struct acpi_subtable_header header; 607 u16 inti_flags; 608 u8 type; /* 1=PMI, 2=INIT, 3=corrected */ 609 u8 id; /* Processor ID */ 610 u8 eid; /* Processor EID */ 611 u8 io_sapic_vector; /* Vector value for PMI interrupts */ 612 u32 global_irq; /* Global system interrupt */ 613 u32 flags; /* Interrupt Source Flags */ 614 }; 615 616 /* Masks for Flags field above */ 617 618 #define ACPI_MADT_CPEI_OVERRIDE (1) 619 620 /* 9: Processor Local X2APIC (ACPI 4.0) */ 621 622 struct acpi_madt_local_x2apic { 623 struct acpi_subtable_header header; 624 u16 reserved; /* reserved - must be zero */ 625 u32 local_apic_id; /* Processor x2APIC ID */ 626 u32 lapic_flags; 627 u32 uid; /* ACPI processor UID */ 628 }; 629 630 /* 10: Local X2APIC NMI (ACPI 4.0) */ 631 632 struct acpi_madt_local_x2apic_nmi { 633 struct acpi_subtable_header header; 634 u16 inti_flags; 635 u32 uid; /* ACPI processor UID */ 636 u8 lint; /* LINTn to which NMI is connected */ 637 u8 reserved[3]; /* reserved - must be zero */ 638 }; 639 640 /* 11: Generic interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 641 642 struct acpi_madt_generic_interrupt { 643 struct acpi_subtable_header header; 644 u16 reserved; /* reserved - must be zero */ 645 u32 cpu_interface_number; 646 u32 uid; 647 u32 flags; 648 u32 parking_version; 649 u32 performance_interrupt; 650 u64 parked_address; 651 u64 base_address; 652 u64 gicv_base_address; 653 u64 gich_base_address; 654 u32 vgic_interrupt; 655 u64 gicr_base_address; 656 u64 arm_mpidr; 657 u8 efficiency_class; 658 u8 reserved2[1]; 659 u16 spe_interrupt; /* ACPI 6.3 */ 660 }; 661 662 /* Masks for Flags field above */ 663 664 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 665 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 666 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 667 668 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 669 670 struct acpi_madt_generic_distributor { 671 struct acpi_subtable_header header; 672 u16 reserved; /* reserved - must be zero */ 673 u32 gic_id; 674 u64 base_address; 675 u32 global_irq_base; 676 u8 version; 677 u8 reserved2[3]; /* reserved - must be zero */ 678 }; 679 680 /* Values for Version field above */ 681 682 enum acpi_madt_gic_version { 683 ACPI_MADT_GIC_VERSION_NONE = 0, 684 ACPI_MADT_GIC_VERSION_V1 = 1, 685 ACPI_MADT_GIC_VERSION_V2 = 2, 686 ACPI_MADT_GIC_VERSION_V3 = 3, 687 ACPI_MADT_GIC_VERSION_V4 = 4, 688 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 689 }; 690 691 /* 13: Generic MSI Frame (ACPI 5.1) */ 692 693 struct acpi_madt_generic_msi_frame { 694 struct acpi_subtable_header header; 695 u16 reserved; /* reserved - must be zero */ 696 u32 msi_frame_id; 697 u64 base_address; 698 u32 flags; 699 u16 spi_count; 700 u16 spi_base; 701 }; 702 703 /* Masks for Flags field above */ 704 705 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 706 707 /* 14: Generic Redistributor (ACPI 5.1) */ 708 709 struct acpi_madt_generic_redistributor { 710 struct acpi_subtable_header header; 711 u16 reserved; /* reserved - must be zero */ 712 u64 base_address; 713 u32 length; 714 }; 715 716 /* 15: Generic Translator (ACPI 6.0) */ 717 718 struct acpi_madt_generic_translator { 719 struct acpi_subtable_header header; 720 u16 reserved; /* reserved - must be zero */ 721 u32 translation_id; 722 u64 base_address; 723 u32 reserved2; 724 }; 725 726 /* 727 * Common flags fields for MADT subtables 728 */ 729 730 /* MADT Local APIC flags */ 731 732 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 733 734 /* MADT MPS INTI flags (inti_flags) */ 735 736 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 737 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 738 739 /* Values for MPS INTI flags */ 740 741 #define ACPI_MADT_POLARITY_CONFORMS 0 742 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 743 #define ACPI_MADT_POLARITY_RESERVED 2 744 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 745 746 #define ACPI_MADT_TRIGGER_CONFORMS (0) 747 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 748 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 749 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 750 751 /******************************************************************************* 752 * 753 * MCFG - PCI Memory Mapped Configuration table and subtable 754 * Version 1 755 * 756 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 757 * 758 ******************************************************************************/ 759 760 struct acpi_table_mcfg { 761 struct acpi_table_header header; /* Common ACPI table header */ 762 u8 reserved[8]; 763 }; 764 765 /* Subtable */ 766 767 struct acpi_mcfg_allocation { 768 u64 address; /* Base address, processor-relative */ 769 u16 pci_segment; /* PCI segment group number */ 770 u8 start_bus_number; /* Starting PCI Bus number */ 771 u8 end_bus_number; /* Final PCI Bus number */ 772 u32 reserved; 773 }; 774 775 /******************************************************************************* 776 * 777 * MCHI - Management Controller Host Interface Table 778 * Version 1 779 * 780 * Conforms to "Management Component Transport Protocol (MCTP) Host 781 * Interface Specification", Revision 1.0.0a, October 13, 2009 782 * 783 ******************************************************************************/ 784 785 struct acpi_table_mchi { 786 struct acpi_table_header header; /* Common ACPI table header */ 787 u8 interface_type; 788 u8 protocol; 789 u64 protocol_data; 790 u8 interrupt_type; 791 u8 gpe; 792 u8 pci_device_flag; 793 u32 global_interrupt; 794 struct acpi_generic_address control_register; 795 u8 pci_segment; 796 u8 pci_bus; 797 u8 pci_device; 798 u8 pci_function; 799 }; 800 801 /******************************************************************************* 802 * 803 * MPST - Memory Power State Table (ACPI 5.0) 804 * Version 1 805 * 806 ******************************************************************************/ 807 808 #define ACPI_MPST_CHANNEL_INFO \ 809 u8 channel_id; \ 810 u8 reserved1[3]; \ 811 u16 power_node_count; \ 812 u16 reserved2; 813 814 /* Main table */ 815 816 struct acpi_table_mpst { 817 struct acpi_table_header header; /* Common ACPI table header */ 818 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 819 }; 820 821 /* Memory Platform Communication Channel Info */ 822 823 struct acpi_mpst_channel { 824 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 825 }; 826 827 /* Memory Power Node Structure */ 828 829 struct acpi_mpst_power_node { 830 u8 flags; 831 u8 reserved1; 832 u16 node_id; 833 u32 length; 834 u64 range_address; 835 u64 range_length; 836 u32 num_power_states; 837 u32 num_physical_components; 838 }; 839 840 /* Values for Flags field above */ 841 842 #define ACPI_MPST_ENABLED 1 843 #define ACPI_MPST_POWER_MANAGED 2 844 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 845 846 /* Memory Power State Structure (follows POWER_NODE above) */ 847 848 struct acpi_mpst_power_state { 849 u8 power_state; 850 u8 info_index; 851 }; 852 853 /* Physical Component ID Structure (follows POWER_STATE above) */ 854 855 struct acpi_mpst_component { 856 u16 component_id; 857 }; 858 859 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 860 861 struct acpi_mpst_data_hdr { 862 u16 characteristics_count; 863 u16 reserved; 864 }; 865 866 struct acpi_mpst_power_data { 867 u8 structure_id; 868 u8 flags; 869 u16 reserved1; 870 u32 average_power; 871 u32 power_saving; 872 u64 exit_latency; 873 u64 reserved2; 874 }; 875 876 /* Values for Flags field above */ 877 878 #define ACPI_MPST_PRESERVE 1 879 #define ACPI_MPST_AUTOENTRY 2 880 #define ACPI_MPST_AUTOEXIT 4 881 882 /* Shared Memory Region (not part of an ACPI table) */ 883 884 struct acpi_mpst_shared { 885 u32 signature; 886 u16 pcc_command; 887 u16 pcc_status; 888 u32 command_register; 889 u32 status_register; 890 u32 power_state_id; 891 u32 power_node_id; 892 u64 energy_consumed; 893 u64 average_power; 894 }; 895 896 /******************************************************************************* 897 * 898 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 899 * Version 1 900 * 901 ******************************************************************************/ 902 903 struct acpi_table_msct { 904 struct acpi_table_header header; /* Common ACPI table header */ 905 u32 proximity_offset; /* Location of proximity info struct(s) */ 906 u32 max_proximity_domains; /* Max number of proximity domains */ 907 u32 max_clock_domains; /* Max number of clock domains */ 908 u64 max_address; /* Max physical address in system */ 909 }; 910 911 /* subtable - Maximum Proximity Domain Information. Version 1 */ 912 913 struct acpi_msct_proximity { 914 u8 revision; 915 u8 length; 916 u32 range_start; /* Start of domain range */ 917 u32 range_end; /* End of domain range */ 918 u32 processor_capacity; 919 u64 memory_capacity; /* In bytes */ 920 }; 921 922 /******************************************************************************* 923 * 924 * MSDM - Microsoft Data Management table 925 * 926 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 927 * November 29, 2011. Copyright 2011 Microsoft 928 * 929 ******************************************************************************/ 930 931 /* Basic MSDM table is only the common ACPI header */ 932 933 struct acpi_table_msdm { 934 struct acpi_table_header header; /* Common ACPI table header */ 935 }; 936 937 /******************************************************************************* 938 * 939 * MTMR - MID Timer Table 940 * Version 1 941 * 942 * Conforms to "Simple Firmware Interface Specification", 943 * Draft 0.8.2, Oct 19, 2010 944 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 945 * 946 ******************************************************************************/ 947 948 struct acpi_table_mtmr { 949 struct acpi_table_header header; /* Common ACPI table header */ 950 }; 951 952 /* MTMR entry */ 953 954 struct acpi_mtmr_entry { 955 struct acpi_generic_address physical_address; 956 u32 frequency; 957 u32 irq; 958 }; 959 960 /******************************************************************************* 961 * 962 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 963 * Version 1 964 * 965 ******************************************************************************/ 966 967 struct acpi_table_nfit { 968 struct acpi_table_header header; /* Common ACPI table header */ 969 u32 reserved; /* Reserved, must be zero */ 970 }; 971 972 /* Subtable header for NFIT */ 973 974 struct acpi_nfit_header { 975 u16 type; 976 u16 length; 977 }; 978 979 /* Values for subtable type in struct acpi_nfit_header */ 980 981 enum acpi_nfit_type { 982 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 983 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 984 ACPI_NFIT_TYPE_INTERLEAVE = 2, 985 ACPI_NFIT_TYPE_SMBIOS = 3, 986 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 987 ACPI_NFIT_TYPE_DATA_REGION = 5, 988 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 989 ACPI_NFIT_TYPE_CAPABILITIES = 7, 990 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 991 }; 992 993 /* 994 * NFIT Subtables 995 */ 996 997 /* 0: System Physical Address Range Structure */ 998 999 struct acpi_nfit_system_address { 1000 struct acpi_nfit_header header; 1001 u16 range_index; 1002 u16 flags; 1003 u32 reserved; /* Reserved, must be zero */ 1004 u32 proximity_domain; 1005 u8 range_guid[16]; 1006 u64 address; 1007 u64 length; 1008 u64 memory_mapping; 1009 }; 1010 1011 /* Flags */ 1012 1013 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1014 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1015 1016 /* Range Type GUIDs appear in the include/acuuid.h file */ 1017 1018 /* 1: Memory Device to System Address Range Map Structure */ 1019 1020 struct acpi_nfit_memory_map { 1021 struct acpi_nfit_header header; 1022 u32 device_handle; 1023 u16 physical_id; 1024 u16 region_id; 1025 u16 range_index; 1026 u16 region_index; 1027 u64 region_size; 1028 u64 region_offset; 1029 u64 address; 1030 u16 interleave_index; 1031 u16 interleave_ways; 1032 u16 flags; 1033 u16 reserved; /* Reserved, must be zero */ 1034 }; 1035 1036 /* Flags */ 1037 1038 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1039 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1040 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1041 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1042 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1043 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1044 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1045 1046 /* 2: Interleave Structure */ 1047 1048 struct acpi_nfit_interleave { 1049 struct acpi_nfit_header header; 1050 u16 interleave_index; 1051 u16 reserved; /* Reserved, must be zero */ 1052 u32 line_count; 1053 u32 line_size; 1054 u32 line_offset[1]; /* Variable length */ 1055 }; 1056 1057 /* 3: SMBIOS Management Information Structure */ 1058 1059 struct acpi_nfit_smbios { 1060 struct acpi_nfit_header header; 1061 u32 reserved; /* Reserved, must be zero */ 1062 u8 data[1]; /* Variable length */ 1063 }; 1064 1065 /* 4: NVDIMM Control Region Structure */ 1066 1067 struct acpi_nfit_control_region { 1068 struct acpi_nfit_header header; 1069 u16 region_index; 1070 u16 vendor_id; 1071 u16 device_id; 1072 u16 revision_id; 1073 u16 subsystem_vendor_id; 1074 u16 subsystem_device_id; 1075 u16 subsystem_revision_id; 1076 u8 valid_fields; 1077 u8 manufacturing_location; 1078 u16 manufacturing_date; 1079 u8 reserved[2]; /* Reserved, must be zero */ 1080 u32 serial_number; 1081 u16 code; 1082 u16 windows; 1083 u64 window_size; 1084 u64 command_offset; 1085 u64 command_size; 1086 u64 status_offset; 1087 u64 status_size; 1088 u16 flags; 1089 u8 reserved1[6]; /* Reserved, must be zero */ 1090 }; 1091 1092 /* Flags */ 1093 1094 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1095 1096 /* valid_fields bits */ 1097 1098 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1099 1100 /* 5: NVDIMM Block Data Window Region Structure */ 1101 1102 struct acpi_nfit_data_region { 1103 struct acpi_nfit_header header; 1104 u16 region_index; 1105 u16 windows; 1106 u64 offset; 1107 u64 size; 1108 u64 capacity; 1109 u64 start_address; 1110 }; 1111 1112 /* 6: Flush Hint Address Structure */ 1113 1114 struct acpi_nfit_flush_address { 1115 struct acpi_nfit_header header; 1116 u32 device_handle; 1117 u16 hint_count; 1118 u8 reserved[6]; /* Reserved, must be zero */ 1119 u64 hint_address[1]; /* Variable length */ 1120 }; 1121 1122 /* 7: Platform Capabilities Structure */ 1123 1124 struct acpi_nfit_capabilities { 1125 struct acpi_nfit_header header; 1126 u8 highest_capability; 1127 u8 reserved[3]; /* Reserved, must be zero */ 1128 u32 capabilities; 1129 u32 reserved2; 1130 }; 1131 1132 /* Capabilities Flags */ 1133 1134 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1135 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1136 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1137 1138 /* 1139 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1140 */ 1141 struct nfit_device_handle { 1142 u32 handle; 1143 }; 1144 1145 /* Device handle construction and extraction macros */ 1146 1147 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1148 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1149 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1150 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1151 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1152 1153 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1154 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1155 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1156 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1157 #define ACPI_NFIT_NODE_ID_OFFSET 16 1158 1159 /* Macro to construct a NFIT/NVDIMM device handle */ 1160 1161 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1162 ((dimm) | \ 1163 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1164 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1165 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1166 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1167 1168 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1169 1170 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1171 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1172 1173 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1174 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1175 1176 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1177 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1178 1179 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1180 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1181 1182 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1183 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1184 1185 /******************************************************************************* 1186 * 1187 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1188 * Version 2 (ACPI 6.2) 1189 * 1190 ******************************************************************************/ 1191 1192 struct acpi_table_pcct { 1193 struct acpi_table_header header; /* Common ACPI table header */ 1194 u32 flags; 1195 u64 reserved; 1196 }; 1197 1198 /* Values for Flags field above */ 1199 1200 #define ACPI_PCCT_DOORBELL 1 1201 1202 /* Values for subtable type in struct acpi_subtable_header */ 1203 1204 enum acpi_pcct_type { 1205 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1206 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1207 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1208 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1209 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1210 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1211 }; 1212 1213 /* 1214 * PCCT Subtables, correspond to Type in struct acpi_subtable_header 1215 */ 1216 1217 /* 0: Generic Communications Subspace */ 1218 1219 struct acpi_pcct_subspace { 1220 struct acpi_subtable_header header; 1221 u8 reserved[6]; 1222 u64 base_address; 1223 u64 length; 1224 struct acpi_generic_address doorbell_register; 1225 u64 preserve_mask; 1226 u64 write_mask; 1227 u32 latency; 1228 u32 max_access_rate; 1229 u16 min_turnaround_time; 1230 }; 1231 1232 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1233 1234 struct acpi_pcct_hw_reduced { 1235 struct acpi_subtable_header header; 1236 u32 platform_interrupt; 1237 u8 flags; 1238 u8 reserved; 1239 u64 base_address; 1240 u64 length; 1241 struct acpi_generic_address doorbell_register; 1242 u64 preserve_mask; 1243 u64 write_mask; 1244 u32 latency; 1245 u32 max_access_rate; 1246 u16 min_turnaround_time; 1247 }; 1248 1249 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1250 1251 struct acpi_pcct_hw_reduced_type2 { 1252 struct acpi_subtable_header header; 1253 u32 platform_interrupt; 1254 u8 flags; 1255 u8 reserved; 1256 u64 base_address; 1257 u64 length; 1258 struct acpi_generic_address doorbell_register; 1259 u64 preserve_mask; 1260 u64 write_mask; 1261 u32 latency; 1262 u32 max_access_rate; 1263 u16 min_turnaround_time; 1264 struct acpi_generic_address platform_ack_register; 1265 u64 ack_preserve_mask; 1266 u64 ack_write_mask; 1267 }; 1268 1269 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1270 1271 struct acpi_pcct_ext_pcc_master { 1272 struct acpi_subtable_header header; 1273 u32 platform_interrupt; 1274 u8 flags; 1275 u8 reserved1; 1276 u64 base_address; 1277 u32 length; 1278 struct acpi_generic_address doorbell_register; 1279 u64 preserve_mask; 1280 u64 write_mask; 1281 u32 latency; 1282 u32 max_access_rate; 1283 u32 min_turnaround_time; 1284 struct acpi_generic_address platform_ack_register; 1285 u64 ack_preserve_mask; 1286 u64 ack_set_mask; 1287 u64 reserved2; 1288 struct acpi_generic_address cmd_complete_register; 1289 u64 cmd_complete_mask; 1290 struct acpi_generic_address cmd_update_register; 1291 u64 cmd_update_preserve_mask; 1292 u64 cmd_update_set_mask; 1293 struct acpi_generic_address error_status_register; 1294 u64 error_status_mask; 1295 }; 1296 1297 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1298 1299 struct acpi_pcct_ext_pcc_slave { 1300 struct acpi_subtable_header header; 1301 u32 platform_interrupt; 1302 u8 flags; 1303 u8 reserved1; 1304 u64 base_address; 1305 u32 length; 1306 struct acpi_generic_address doorbell_register; 1307 u64 preserve_mask; 1308 u64 write_mask; 1309 u32 latency; 1310 u32 max_access_rate; 1311 u32 min_turnaround_time; 1312 struct acpi_generic_address platform_ack_register; 1313 u64 ack_preserve_mask; 1314 u64 ack_set_mask; 1315 u64 reserved2; 1316 struct acpi_generic_address cmd_complete_register; 1317 u64 cmd_complete_mask; 1318 struct acpi_generic_address cmd_update_register; 1319 u64 cmd_update_preserve_mask; 1320 u64 cmd_update_set_mask; 1321 struct acpi_generic_address error_status_register; 1322 u64 error_status_mask; 1323 }; 1324 1325 /* Values for doorbell flags above */ 1326 1327 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1328 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1329 1330 /* 1331 * PCC memory structures (not part of the ACPI table) 1332 */ 1333 1334 /* Shared Memory Region */ 1335 1336 struct acpi_pcct_shared_memory { 1337 u32 signature; 1338 u16 command; 1339 u16 status; 1340 }; 1341 1342 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1343 1344 struct acpi_pcct_ext_pcc_shared_memory { 1345 u32 signature; 1346 u32 flags; 1347 u32 length; 1348 u32 command; 1349 }; 1350 1351 /******************************************************************************* 1352 * 1353 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1354 * Version 0 1355 * 1356 ******************************************************************************/ 1357 1358 struct acpi_table_pdtt { 1359 struct acpi_table_header header; /* Common ACPI table header */ 1360 u8 trigger_count; 1361 u8 reserved[3]; 1362 u32 array_offset; 1363 }; 1364 1365 /* 1366 * PDTT Communication Channel Identifier Structure. 1367 * The number of these structures is defined by trigger_count above, 1368 * starting at array_offset. 1369 */ 1370 struct acpi_pdtt_channel { 1371 u8 subchannel_id; 1372 u8 flags; 1373 }; 1374 1375 /* Flags for above */ 1376 1377 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1378 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1379 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1380 1381 /******************************************************************************* 1382 * 1383 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1384 * Version 1 1385 * 1386 ******************************************************************************/ 1387 1388 struct acpi_table_pmtt { 1389 struct acpi_table_header header; /* Common ACPI table header */ 1390 u32 reserved; 1391 }; 1392 1393 /* Common header for PMTT subtables that follow main table */ 1394 1395 struct acpi_pmtt_header { 1396 u8 type; 1397 u8 reserved1; 1398 u16 length; 1399 u16 flags; 1400 u16 reserved2; 1401 }; 1402 1403 /* Values for Type field above */ 1404 1405 #define ACPI_PMTT_TYPE_SOCKET 0 1406 #define ACPI_PMTT_TYPE_CONTROLLER 1 1407 #define ACPI_PMTT_TYPE_DIMM 2 1408 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1409 1410 /* Values for Flags field above */ 1411 1412 #define ACPI_PMTT_TOP_LEVEL 0x0001 1413 #define ACPI_PMTT_PHYSICAL 0x0002 1414 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1415 1416 /* 1417 * PMTT subtables, correspond to Type in struct acpi_pmtt_header 1418 */ 1419 1420 /* 0: Socket Structure */ 1421 1422 struct acpi_pmtt_socket { 1423 struct acpi_pmtt_header header; 1424 u16 socket_id; 1425 u16 reserved; 1426 }; 1427 1428 /* 1: Memory Controller subtable */ 1429 1430 struct acpi_pmtt_controller { 1431 struct acpi_pmtt_header header; 1432 u32 read_latency; 1433 u32 write_latency; 1434 u32 read_bandwidth; 1435 u32 write_bandwidth; 1436 u16 access_width; 1437 u16 alignment; 1438 u16 reserved; 1439 u16 domain_count; 1440 }; 1441 1442 /* 1a: Proximity Domain substructure */ 1443 1444 struct acpi_pmtt_domain { 1445 u32 proximity_domain; 1446 }; 1447 1448 /* 2: Physical Component Identifier (DIMM) */ 1449 1450 struct acpi_pmtt_physical_component { 1451 struct acpi_pmtt_header header; 1452 u16 component_id; 1453 u16 reserved; 1454 u32 memory_size; 1455 u32 bios_handle; 1456 }; 1457 1458 /******************************************************************************* 1459 * 1460 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1461 * Version 1 1462 * 1463 ******************************************************************************/ 1464 1465 struct acpi_table_pptt { 1466 struct acpi_table_header header; /* Common ACPI table header */ 1467 }; 1468 1469 /* Values for Type field above */ 1470 1471 enum acpi_pptt_type { 1472 ACPI_PPTT_TYPE_PROCESSOR = 0, 1473 ACPI_PPTT_TYPE_CACHE = 1, 1474 ACPI_PPTT_TYPE_ID = 2, 1475 ACPI_PPTT_TYPE_RESERVED = 3 1476 }; 1477 1478 /* 0: Processor Hierarchy Node Structure */ 1479 1480 struct acpi_pptt_processor { 1481 struct acpi_subtable_header header; 1482 u16 reserved; 1483 u32 flags; 1484 u32 parent; 1485 u32 acpi_processor_id; 1486 u32 number_of_priv_resources; 1487 }; 1488 1489 /* Flags */ 1490 1491 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 1492 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 1493 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 1494 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 1495 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 1496 1497 /* 1: Cache Type Structure */ 1498 1499 struct acpi_pptt_cache { 1500 struct acpi_subtable_header header; 1501 u16 reserved; 1502 u32 flags; 1503 u32 next_level_of_cache; 1504 u32 size; 1505 u32 number_of_sets; 1506 u8 associativity; 1507 u8 attributes; 1508 u16 line_size; 1509 }; 1510 1511 /* Flags */ 1512 1513 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1514 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1515 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1516 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1517 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1518 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1519 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1520 1521 /* Masks for Attributes */ 1522 1523 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1524 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1525 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1526 1527 /* Attributes describing cache */ 1528 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1529 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1530 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1531 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1532 1533 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1534 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1535 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1536 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1537 1538 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1539 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1540 1541 /* 2: ID Structure */ 1542 1543 struct acpi_pptt_id { 1544 struct acpi_subtable_header header; 1545 u16 reserved; 1546 u32 vendor_id; 1547 u64 level1_id; 1548 u64 level2_id; 1549 u16 major_rev; 1550 u16 minor_rev; 1551 u16 spin_rev; 1552 }; 1553 1554 /******************************************************************************* 1555 * 1556 * RASF - RAS Feature Table (ACPI 5.0) 1557 * Version 1 1558 * 1559 ******************************************************************************/ 1560 1561 struct acpi_table_rasf { 1562 struct acpi_table_header header; /* Common ACPI table header */ 1563 u8 channel_id[12]; 1564 }; 1565 1566 /* RASF Platform Communication Channel Shared Memory Region */ 1567 1568 struct acpi_rasf_shared_memory { 1569 u32 signature; 1570 u16 command; 1571 u16 status; 1572 u16 version; 1573 u8 capabilities[16]; 1574 u8 set_capabilities[16]; 1575 u16 num_parameter_blocks; 1576 u32 set_capabilities_status; 1577 }; 1578 1579 /* RASF Parameter Block Structure Header */ 1580 1581 struct acpi_rasf_parameter_block { 1582 u16 type; 1583 u16 version; 1584 u16 length; 1585 }; 1586 1587 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1588 1589 struct acpi_rasf_patrol_scrub_parameter { 1590 struct acpi_rasf_parameter_block header; 1591 u16 patrol_scrub_command; 1592 u64 requested_address_range[2]; 1593 u64 actual_address_range[2]; 1594 u16 flags; 1595 u8 requested_speed; 1596 }; 1597 1598 /* Masks for Flags and Speed fields above */ 1599 1600 #define ACPI_RASF_SCRUBBER_RUNNING 1 1601 #define ACPI_RASF_SPEED (7<<1) 1602 #define ACPI_RASF_SPEED_SLOW (0<<1) 1603 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 1604 #define ACPI_RASF_SPEED_FAST (7<<1) 1605 1606 /* Channel Commands */ 1607 1608 enum acpi_rasf_commands { 1609 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 1610 }; 1611 1612 /* Platform RAS Capabilities */ 1613 1614 enum acpi_rasf_capabiliities { 1615 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 1616 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 1617 }; 1618 1619 /* Patrol Scrub Commands */ 1620 1621 enum acpi_rasf_patrol_scrub_commands { 1622 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 1623 ACPI_RASF_START_PATROL_SCRUBBER = 2, 1624 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 1625 }; 1626 1627 /* Channel Command flags */ 1628 1629 #define ACPI_RASF_GENERATE_SCI (1<<15) 1630 1631 /* Status values */ 1632 1633 enum acpi_rasf_status { 1634 ACPI_RASF_SUCCESS = 0, 1635 ACPI_RASF_NOT_VALID = 1, 1636 ACPI_RASF_NOT_SUPPORTED = 2, 1637 ACPI_RASF_BUSY = 3, 1638 ACPI_RASF_FAILED = 4, 1639 ACPI_RASF_ABORTED = 5, 1640 ACPI_RASF_INVALID_DATA = 6 1641 }; 1642 1643 /* Status flags */ 1644 1645 #define ACPI_RASF_COMMAND_COMPLETE (1) 1646 #define ACPI_RASF_SCI_DOORBELL (1<<1) 1647 #define ACPI_RASF_ERROR (1<<2) 1648 #define ACPI_RASF_STATUS (0x1F<<3) 1649 1650 /******************************************************************************* 1651 * 1652 * SBST - Smart Battery Specification Table 1653 * Version 1 1654 * 1655 ******************************************************************************/ 1656 1657 struct acpi_table_sbst { 1658 struct acpi_table_header header; /* Common ACPI table header */ 1659 u32 warning_level; 1660 u32 low_level; 1661 u32 critical_level; 1662 }; 1663 1664 /******************************************************************************* 1665 * 1666 * SDEI - Software Delegated Exception Interface Descriptor Table 1667 * 1668 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 1669 * May 8th, 2017. Copyright 2017 ARM Ltd. 1670 * 1671 ******************************************************************************/ 1672 1673 struct acpi_table_sdei { 1674 struct acpi_table_header header; /* Common ACPI table header */ 1675 }; 1676 1677 /******************************************************************************* 1678 * 1679 * SDEV - Secure Devices Table (ACPI 6.2) 1680 * Version 1 1681 * 1682 ******************************************************************************/ 1683 1684 struct acpi_table_sdev { 1685 struct acpi_table_header header; /* Common ACPI table header */ 1686 }; 1687 1688 struct acpi_sdev_header { 1689 u8 type; 1690 u8 flags; 1691 u16 length; 1692 }; 1693 1694 /* Values for subtable type above */ 1695 1696 enum acpi_sdev_type { 1697 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 1698 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 1699 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1700 }; 1701 1702 /* Values for flags above */ 1703 1704 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 1705 1706 /* 1707 * SDEV subtables 1708 */ 1709 1710 /* 0: Namespace Device Based Secure Device Structure */ 1711 1712 struct acpi_sdev_namespace { 1713 struct acpi_sdev_header header; 1714 u16 device_id_offset; 1715 u16 device_id_length; 1716 u16 vendor_data_offset; 1717 u16 vendor_data_length; 1718 }; 1719 1720 /* 1: PCIe Endpoint Device Based Device Structure */ 1721 1722 struct acpi_sdev_pcie { 1723 struct acpi_sdev_header header; 1724 u16 segment; 1725 u16 start_bus; 1726 u16 path_offset; 1727 u16 path_length; 1728 u16 vendor_data_offset; 1729 u16 vendor_data_length; 1730 }; 1731 1732 /* 1a: PCIe Endpoint path entry */ 1733 1734 struct acpi_sdev_pcie_path { 1735 u8 device; 1736 u8 function; 1737 }; 1738 1739 /* Reset to default packing */ 1740 1741 #pragma pack() 1742 1743 #endif /* __ACTBL2_H__ */ 1744