1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl1.h - Additional ACPI table definitions 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL1_H__ 11 #define __ACTBL1_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 28 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 29 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 30 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 31 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 32 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 33 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 34 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 35 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 36 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 37 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 38 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 39 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 40 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 41 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 42 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 43 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 44 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 45 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 46 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 47 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 48 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 49 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 50 51 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 52 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 53 54 #define ACPI_SIG_NBFT "NBFT" /* NVMe Boot Firmware Table */ 55 56 /* Reserved table signatures */ 57 58 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 59 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 60 61 /* 62 * These tables have been seen in the field, but no definition has been found 63 */ 64 #ifdef ACPI_UNDEFINED_TABLES 65 #define ACPI_SIG_ATKG "ATKG" 66 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 67 #define ACPI_SIG_IEIT "IEIT" 68 #endif 69 70 /* 71 * All tables must be byte-packed to match the ACPI specification, since 72 * the tables are provided by the system BIOS. 73 */ 74 #pragma pack(1) 75 76 /* 77 * Note: C bitfields are not used for this reason: 78 * 79 * "Bitfields are great and easy to read, but unfortunately the C language 80 * does not specify the layout of bitfields in memory, which means they are 81 * essentially useless for dealing with packed data in on-disk formats or 82 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 83 * this decision was a design error in C. Ritchie could have picked an order 84 * and stuck with it." Norman Ramsey. 85 * See http://stackoverflow.com/a/1053662/41661 86 */ 87 88 /******************************************************************************* 89 * 90 * Common subtable headers 91 * 92 ******************************************************************************/ 93 94 /* Generic subtable header (used in MADT, SRAT, etc.) */ 95 96 struct acpi_subtable_header { 97 u8 type; 98 u8 length; 99 }; 100 101 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 102 103 struct acpi_whea_header { 104 u8 action; 105 u8 instruction; 106 u8 flags; 107 u8 reserved; 108 struct acpi_generic_address register_region; 109 u64 value; /* Value used with Read/Write register */ 110 u64 mask; /* Bitmask required for this register instruction */ 111 }; 112 113 /* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */ 114 #define ASPT_REVISION_ID 0x01 115 struct acpi_table_aspt { 116 struct acpi_table_header header; 117 u32 num_entries; 118 }; 119 120 struct acpi_aspt_header { 121 u16 type; 122 u16 length; 123 }; 124 125 enum acpi_aspt_type { 126 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 127 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 128 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 129 }; 130 131 /* 0: ASPT Global Registers */ 132 struct acpi_aspt_global_regs { 133 struct acpi_aspt_header header; 134 u32 reserved; 135 u64 feature_reg_addr; 136 u64 irq_en_reg_addr; 137 u64 irq_st_reg_addr; 138 }; 139 140 /* 1: ASPT SEV Mailbox Registers */ 141 struct acpi_aspt_sev_mbox_regs { 142 struct acpi_aspt_header header; 143 u8 mbox_irq_id; 144 u8 reserved[3]; 145 u64 cmd_resp_reg_addr; 146 u64 cmd_buf_lo_reg_addr; 147 u64 cmd_buf_hi_reg_addr; 148 }; 149 150 /* 2: ASPT ACPI Mailbox Registers */ 151 struct acpi_aspt_acpi_mbox_regs { 152 struct acpi_aspt_header header; 153 u32 reserved1; 154 u64 cmd_resp_reg_addr; 155 u64 reserved2[2]; 156 }; 157 158 /******************************************************************************* 159 * 160 * ASF - Alert Standard Format table (Signature "ASF!") 161 * Revision 0x10 162 * 163 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 164 * 165 ******************************************************************************/ 166 167 struct acpi_table_asf { 168 struct acpi_table_header header; /* Common ACPI table header */ 169 }; 170 171 /* ASF subtable header */ 172 173 struct acpi_asf_header { 174 u8 type; 175 u8 reserved; 176 u16 length; 177 }; 178 179 /* Values for Type field above */ 180 181 enum acpi_asf_type { 182 ACPI_ASF_TYPE_INFO = 0, 183 ACPI_ASF_TYPE_ALERT = 1, 184 ACPI_ASF_TYPE_CONTROL = 2, 185 ACPI_ASF_TYPE_BOOT = 3, 186 ACPI_ASF_TYPE_ADDRESS = 4, 187 ACPI_ASF_TYPE_RESERVED = 5 188 }; 189 190 /* 191 * ASF subtables 192 */ 193 194 /* 0: ASF Information */ 195 196 struct acpi_asf_info { 197 struct acpi_asf_header header; 198 u8 min_reset_value; 199 u8 min_poll_interval; 200 u16 system_id; 201 u32 mfg_id; 202 u8 flags; 203 u8 reserved2[3]; 204 }; 205 206 /* Masks for Flags field above */ 207 208 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 209 210 /* 1: ASF Alerts */ 211 212 struct acpi_asf_alert { 213 struct acpi_asf_header header; 214 u8 assert_mask; 215 u8 deassert_mask; 216 u8 alerts; 217 u8 data_length; 218 }; 219 220 struct acpi_asf_alert_data { 221 u8 address; 222 u8 command; 223 u8 mask; 224 u8 value; 225 u8 sensor_type; 226 u8 type; 227 u8 offset; 228 u8 source_type; 229 u8 severity; 230 u8 sensor_number; 231 u8 entity; 232 u8 instance; 233 }; 234 235 /* 2: ASF Remote Control */ 236 237 struct acpi_asf_remote { 238 struct acpi_asf_header header; 239 u8 controls; 240 u8 data_length; 241 u16 reserved2; 242 }; 243 244 struct acpi_asf_control_data { 245 u8 function; 246 u8 address; 247 u8 command; 248 u8 value; 249 }; 250 251 /* 3: ASF RMCP Boot Options */ 252 253 struct acpi_asf_rmcp { 254 struct acpi_asf_header header; 255 u8 capabilities[7]; 256 u8 completion_code; 257 u32 enterprise_id; 258 u8 command; 259 u16 parameter; 260 u16 boot_options; 261 u16 oem_parameters; 262 }; 263 264 /* 4: ASF Address */ 265 266 struct acpi_asf_address { 267 struct acpi_asf_header header; 268 u8 eprom_address; 269 u8 devices; 270 }; 271 272 /******************************************************************************* 273 * 274 * BERT - Boot Error Record Table (ACPI 4.0) 275 * Version 1 276 * 277 ******************************************************************************/ 278 279 struct acpi_table_bert { 280 struct acpi_table_header header; /* Common ACPI table header */ 281 u32 region_length; /* Length of the boot error region */ 282 u64 address; /* Physical address of the error region */ 283 }; 284 285 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 286 287 struct acpi_bert_region { 288 u32 block_status; /* Type of error information */ 289 u32 raw_data_offset; /* Offset to raw error data */ 290 u32 raw_data_length; /* Length of raw error data */ 291 u32 data_length; /* Length of generic error data */ 292 u32 error_severity; /* Severity code */ 293 }; 294 295 /* Values for block_status flags above */ 296 297 #define ACPI_BERT_UNCORRECTABLE (1) 298 #define ACPI_BERT_CORRECTABLE (1<<1) 299 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 300 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 301 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 302 303 /* Values for error_severity above */ 304 305 enum acpi_bert_error_severity { 306 ACPI_BERT_ERROR_CORRECTABLE = 0, 307 ACPI_BERT_ERROR_FATAL = 1, 308 ACPI_BERT_ERROR_CORRECTED = 2, 309 ACPI_BERT_ERROR_NONE = 3, 310 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 311 }; 312 313 /* 314 * Note: The generic error data that follows the error_severity field above 315 * uses the struct acpi_hest_generic_data defined under the HEST table below 316 */ 317 318 /******************************************************************************* 319 * 320 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 321 * Version 1 322 * 323 ******************************************************************************/ 324 325 struct acpi_table_bgrt { 326 struct acpi_table_header header; /* Common ACPI table header */ 327 u16 version; 328 u8 status; 329 u8 image_type; 330 u64 image_address; 331 u32 image_offset_x; 332 u32 image_offset_y; 333 }; 334 335 /* Flags for Status field above */ 336 337 #define ACPI_BGRT_DISPLAYED (1) 338 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 339 340 /******************************************************************************* 341 * 342 * BOOT - Simple Boot Flag Table 343 * Version 1 344 * 345 * Conforms to the "Simple Boot Flag Specification", Version 2.1 346 * 347 ******************************************************************************/ 348 349 struct acpi_table_boot { 350 struct acpi_table_header header; /* Common ACPI table header */ 351 u8 cmos_index; /* Index in CMOS RAM for the boot register */ 352 u8 reserved[3]; 353 }; 354 355 /******************************************************************************* 356 * 357 * CDAT - Coherent Device Attribute Table 358 * Version 1 359 * 360 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 361 " (Revision 1.01, October 2020.) 362 * 363 ******************************************************************************/ 364 365 struct acpi_table_cdat { 366 u32 length; /* Length of table in bytes, including this header */ 367 u8 revision; /* ACPI Specification minor version number */ 368 u8 checksum; /* To make sum of entire table == 0 */ 369 u8 reserved[6]; 370 u32 sequence; /* Used to detect runtime CDAT table changes */ 371 }; 372 373 /* CDAT common subtable header */ 374 375 struct acpi_cdat_header { 376 u8 type; 377 u8 reserved; 378 u16 length; 379 }; 380 381 /* Values for Type field above */ 382 383 enum acpi_cdat_type { 384 ACPI_CDAT_TYPE_DSMAS = 0, 385 ACPI_CDAT_TYPE_DSLBIS = 1, 386 ACPI_CDAT_TYPE_DSMSCIS = 2, 387 ACPI_CDAT_TYPE_DSIS = 3, 388 ACPI_CDAT_TYPE_DSEMTS = 4, 389 ACPI_CDAT_TYPE_SSLBIS = 5, 390 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 391 }; 392 393 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 394 395 struct acpi_cdat_dsmas { 396 u8 dsmad_handle; 397 u8 flags; 398 u16 reserved; 399 u64 dpa_base_address; 400 u64 dpa_length; 401 }; 402 403 /* Flags for subtable above */ 404 405 #define ACPI_CEDT_DSMAS_NON_VOLATILE (1 << 2) 406 407 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 408 409 struct acpi_cdat_dslbis { 410 u8 handle; 411 u8 flags; /* If Handle matches a DSMAS handle, the definition of this field matches 412 * Flags field in HMAT System Locality Latency */ 413 u8 data_type; 414 u8 reserved; 415 u64 entry_base_unit; 416 u16 entry[3]; 417 u16 reserved2; 418 }; 419 420 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 421 422 struct acpi_cdat_dsmscis { 423 u8 dsmas_handle; 424 u8 reserved[3]; 425 u64 side_cache_size; 426 u32 cache_attributes; 427 }; 428 429 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 430 431 struct acpi_cdat_dsis { 432 u8 flags; 433 u8 handle; 434 u16 reserved; 435 }; 436 437 /* Flags for above subtable */ 438 439 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 440 441 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 442 443 struct acpi_cdat_dsemts { 444 u8 dsmas_handle; 445 u8 memory_type; 446 u16 reserved; 447 u64 dpa_offset; 448 u64 range_length; 449 }; 450 451 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 452 453 struct acpi_cdat_sslbis { 454 u8 data_type; 455 u8 reserved[3]; 456 u64 entry_base_unit; 457 }; 458 459 /* Sub-subtable for above, sslbe_entries field */ 460 461 struct acpi_cdat_sslbe { 462 u16 portx_id; 463 u16 porty_id; 464 u16 latency_or_bandwidth; 465 u16 reserved; 466 }; 467 468 /******************************************************************************* 469 * 470 * CEDT - CXL Early Discovery Table 471 * Version 1 472 * 473 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 474 * 475 ******************************************************************************/ 476 477 struct acpi_table_cedt { 478 struct acpi_table_header header; /* Common ACPI table header */ 479 }; 480 481 /* CEDT subtable header (Performance Record Structure) */ 482 483 struct acpi_cedt_header { 484 u8 type; 485 u8 reserved; 486 u16 length; 487 }; 488 489 /* Values for Type field above */ 490 491 enum acpi_cedt_type { 492 ACPI_CEDT_TYPE_CHBS = 0, 493 ACPI_CEDT_TYPE_CFMWS = 1, 494 ACPI_CEDT_TYPE_CXIMS = 2, 495 ACPI_CEDT_TYPE_RDPAS = 3, 496 ACPI_CEDT_TYPE_RESERVED = 4, 497 }; 498 499 /* Values for version field above */ 500 501 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 502 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 503 504 /* Values for length field above */ 505 506 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 507 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 508 509 /* 510 * CEDT subtables 511 */ 512 513 /* 0: CXL Host Bridge Structure */ 514 515 struct acpi_cedt_chbs { 516 struct acpi_cedt_header header; 517 u32 uid; 518 u32 cxl_version; 519 u32 reserved; 520 u64 base; 521 u64 length; 522 }; 523 524 /* 1: CXL Fixed Memory Window Structure */ 525 526 struct acpi_cedt_cfmws { 527 struct acpi_cedt_header header; 528 u32 reserved1; 529 u64 base_hpa; 530 u64 window_size; 531 u8 interleave_ways; 532 u8 interleave_arithmetic; 533 u16 reserved2; 534 u32 granularity; 535 u16 restrictions; 536 u16 qtg_id; 537 u32 interleave_targets[]; 538 }; 539 540 struct acpi_cedt_cfmws_target_element { 541 u32 interleave_target; 542 }; 543 544 /* Values for Interleave Arithmetic field above */ 545 546 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 547 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 548 549 /* Values for Restrictions field above */ 550 551 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 552 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 553 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 554 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 555 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 556 557 /* 2: CXL XOR Interleave Math Structure */ 558 559 struct acpi_cedt_cxims { 560 struct acpi_cedt_header header; 561 u16 reserved1; 562 u8 hbig; 563 u8 nr_xormaps; 564 u64 xormap_list[]; 565 }; 566 567 /* 3: CXL RCEC Downstream Port Association Structure */ 568 569 struct acpi_cedt_rdpas { 570 struct acpi_cedt_header header; 571 u8 reserved1; 572 u16 length; 573 u16 segment; 574 u16 bdf; 575 u8 protocol; 576 u64 address; 577 }; 578 579 /* Masks for bdf field above */ 580 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 581 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 582 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 583 584 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 585 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 586 587 /******************************************************************************* 588 * 589 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 590 * Version 1 591 * 592 ******************************************************************************/ 593 594 struct acpi_table_cpep { 595 struct acpi_table_header header; /* Common ACPI table header */ 596 u64 reserved; 597 }; 598 599 /* Subtable */ 600 601 struct acpi_cpep_polling { 602 struct acpi_subtable_header header; 603 u8 id; /* Processor ID */ 604 u8 eid; /* Processor EID */ 605 u32 interval; /* Polling interval (msec) */ 606 }; 607 608 /******************************************************************************* 609 * 610 * CSRT - Core System Resource Table 611 * Version 0 612 * 613 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 614 * 615 ******************************************************************************/ 616 617 struct acpi_table_csrt { 618 struct acpi_table_header header; /* Common ACPI table header */ 619 }; 620 621 /* Resource Group subtable */ 622 623 struct acpi_csrt_group { 624 u32 length; 625 u32 vendor_id; 626 u32 subvendor_id; 627 u16 device_id; 628 u16 subdevice_id; 629 u16 revision; 630 u16 reserved; 631 u32 shared_info_length; 632 633 /* Shared data immediately follows (Length = shared_info_length) */ 634 }; 635 636 /* Shared Info subtable */ 637 638 struct acpi_csrt_shared_info { 639 u16 major_version; 640 u16 minor_version; 641 u32 mmio_base_low; 642 u32 mmio_base_high; 643 u32 gsi_interrupt; 644 u8 interrupt_polarity; 645 u8 interrupt_mode; 646 u8 num_channels; 647 u8 dma_address_width; 648 u16 base_request_line; 649 u16 num_handshake_signals; 650 u32 max_block_size; 651 652 /* Resource descriptors immediately follow (Length = Group length - shared_info_length) */ 653 }; 654 655 /* Resource Descriptor subtable */ 656 657 struct acpi_csrt_descriptor { 658 u32 length; 659 u16 type; 660 u16 subtype; 661 u32 uid; 662 663 /* Resource-specific information immediately follows */ 664 }; 665 666 /* Resource Types */ 667 668 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 669 #define ACPI_CSRT_TYPE_TIMER 0x0002 670 #define ACPI_CSRT_TYPE_DMA 0x0003 671 672 /* Resource Subtypes */ 673 674 #define ACPI_CSRT_XRUPT_LINE 0x0000 675 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 676 #define ACPI_CSRT_TIMER 0x0000 677 #define ACPI_CSRT_DMA_CHANNEL 0x0000 678 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 679 680 /******************************************************************************* 681 * 682 * DBG2 - Debug Port Table 2 683 * Version 0 (Both main table and subtables) 684 * 685 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 686 * 687 ******************************************************************************/ 688 689 struct acpi_table_dbg2 { 690 struct acpi_table_header header; /* Common ACPI table header */ 691 u32 info_offset; 692 u32 info_count; 693 }; 694 695 struct acpi_dbg2_header { 696 u32 info_offset; 697 u32 info_count; 698 }; 699 700 /* Debug Device Information Subtable */ 701 702 struct acpi_dbg2_device { 703 u8 revision; 704 u16 length; 705 u8 register_count; /* Number of base_address registers */ 706 u16 namepath_length; 707 u16 namepath_offset; 708 u16 oem_data_length; 709 u16 oem_data_offset; 710 u16 port_type; 711 u16 port_subtype; 712 u16 reserved; 713 u16 base_address_offset; 714 u16 address_size_offset; 715 /* 716 * Data that follows: 717 * base_address (required) - Each in 12-byte Generic Address Structure format. 718 * address_size (required) - Array of u32 sizes corresponding to each base_address register. 719 * Namepath (required) - Null terminated string. Single dot if not supported. 720 * oem_data (optional) - Length is oem_data_length. 721 */ 722 }; 723 724 /* Types for port_type field above */ 725 726 #define ACPI_DBG2_SERIAL_PORT 0x8000 727 #define ACPI_DBG2_1394_PORT 0x8001 728 #define ACPI_DBG2_USB_PORT 0x8002 729 #define ACPI_DBG2_NET_PORT 0x8003 730 731 /* Subtypes for port_subtype field above */ 732 733 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 734 #define ACPI_DBG2_16550_SUBSET 0x0001 735 #define ACPI_DBG2_MAX311XE_SPI 0x0002 736 #define ACPI_DBG2_ARM_PL011 0x0003 737 #define ACPI_DBG2_MSM8X60 0x0004 738 #define ACPI_DBG2_16550_NVIDIA 0x0005 739 #define ACPI_DBG2_TI_OMAP 0x0006 740 #define ACPI_DBG2_APM88XXXX 0x0008 741 #define ACPI_DBG2_MSM8974 0x0009 742 #define ACPI_DBG2_SAM5250 0x000A 743 #define ACPI_DBG2_INTEL_USIF 0x000B 744 #define ACPI_DBG2_IMX6 0x000C 745 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 746 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 747 #define ACPI_DBG2_ARM_DCC 0x000F 748 #define ACPI_DBG2_BCM2835 0x0010 749 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 750 #define ACPI_DBG2_16550_WITH_GAS 0x0012 751 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 752 #define ACPI_DBG2_INTEL_LPSS 0x0014 753 754 #define ACPI_DBG2_1394_STANDARD 0x0000 755 756 #define ACPI_DBG2_USB_XHCI 0x0000 757 #define ACPI_DBG2_USB_EHCI 0x0001 758 759 /******************************************************************************* 760 * 761 * DBGP - Debug Port table 762 * Version 1 763 * 764 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 765 * 766 ******************************************************************************/ 767 768 struct acpi_table_dbgp { 769 struct acpi_table_header header; /* Common ACPI table header */ 770 u8 type; /* 0=full 16550, 1=subset of 16550 */ 771 u8 reserved[3]; 772 struct acpi_generic_address debug_port; 773 }; 774 775 /******************************************************************************* 776 * 777 * DMAR - DMA Remapping table 778 * Version 1 779 * 780 * Conforms to "Intel Virtualization Technology for Directed I/O", 781 * Version 2.3, October 2014 782 * 783 ******************************************************************************/ 784 785 struct acpi_table_dmar { 786 struct acpi_table_header header; /* Common ACPI table header */ 787 u8 width; /* Host Address Width */ 788 u8 flags; 789 u8 reserved[10]; 790 }; 791 792 /* Masks for Flags field above */ 793 794 #define ACPI_DMAR_INTR_REMAP (1) 795 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 796 #define ACPI_DMAR_X2APIC_MODE (1<<2) 797 798 /* DMAR subtable header */ 799 800 struct acpi_dmar_header { 801 u16 type; 802 u16 length; 803 }; 804 805 /* Values for subtable type in struct acpi_dmar_header */ 806 807 enum acpi_dmar_type { 808 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 809 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 810 ACPI_DMAR_TYPE_ROOT_ATS = 2, 811 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 812 ACPI_DMAR_TYPE_NAMESPACE = 4, 813 ACPI_DMAR_TYPE_SATC = 5, 814 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 815 }; 816 817 /* DMAR Device Scope structure */ 818 819 struct acpi_dmar_device_scope { 820 u8 entry_type; 821 u8 length; 822 u16 reserved; 823 u8 enumeration_id; 824 u8 bus; 825 }; 826 827 /* Values for entry_type in struct acpi_dmar_device_scope - device types */ 828 829 enum acpi_dmar_scope_type { 830 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 831 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 832 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 833 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 834 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 835 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 836 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 837 }; 838 839 struct acpi_dmar_pci_path { 840 u8 device; 841 u8 function; 842 }; 843 844 /* 845 * DMAR Subtables, correspond to Type in struct acpi_dmar_header 846 */ 847 848 /* 0: Hardware Unit Definition */ 849 850 struct acpi_dmar_hardware_unit { 851 struct acpi_dmar_header header; 852 u8 flags; 853 u8 size; /* Size of the register set */ 854 u16 segment; 855 u64 address; /* Register Base Address */ 856 }; 857 858 /* Masks for Flags field above */ 859 860 #define ACPI_DMAR_INCLUDE_ALL (1) 861 862 /* 1: Reserved Memory Definition */ 863 864 struct acpi_dmar_reserved_memory { 865 struct acpi_dmar_header header; 866 u16 reserved; 867 u16 segment; 868 u64 base_address; /* 4K aligned base address */ 869 u64 end_address; /* 4K aligned limit address */ 870 }; 871 872 /* Masks for Flags field above */ 873 874 #define ACPI_DMAR_ALLOW_ALL (1) 875 876 /* 2: Root Port ATS Capability Reporting Structure */ 877 878 struct acpi_dmar_atsr { 879 struct acpi_dmar_header header; 880 u8 flags; 881 u8 reserved; 882 u16 segment; 883 }; 884 885 /* Masks for Flags field above */ 886 887 #define ACPI_DMAR_ALL_PORTS (1) 888 889 /* 3: Remapping Hardware Static Affinity Structure */ 890 891 struct acpi_dmar_rhsa { 892 struct acpi_dmar_header header; 893 u32 reserved; 894 u64 base_address; 895 u32 proximity_domain; 896 }; 897 898 /* 4: ACPI Namespace Device Declaration Structure */ 899 900 struct acpi_dmar_andd { 901 struct acpi_dmar_header header; 902 u8 reserved[3]; 903 u8 device_number; 904 char device_name[1]; 905 }; 906 907 /* 5: SOC Integrated Address Translation Cache Reporting Structure */ 908 909 struct acpi_dmar_satc { 910 struct acpi_dmar_header header; 911 u8 flags; 912 u8 reserved; 913 u16 segment; 914 }; 915 /******************************************************************************* 916 * 917 * DRTM - Dynamic Root of Trust for Measurement table 918 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 919 * Table version 1 920 * 921 ******************************************************************************/ 922 923 struct acpi_table_drtm { 924 struct acpi_table_header header; /* Common ACPI table header */ 925 u64 entry_base_address; 926 u64 entry_length; 927 u32 entry_address32; 928 u64 entry_address64; 929 u64 exit_address; 930 u64 log_area_address; 931 u32 log_area_length; 932 u64 arch_dependent_address; 933 u32 flags; 934 }; 935 936 /* Flag Definitions for above */ 937 938 #define ACPI_DRTM_ACCESS_ALLOWED (1) 939 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 940 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 941 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 942 943 /* 1) Validated Tables List (64-bit addresses) */ 944 945 struct acpi_drtm_vtable_list { 946 u32 validated_table_count; 947 u64 validated_tables[]; 948 }; 949 950 /* 2) Resources List (of Resource Descriptors) */ 951 952 /* Resource Descriptor */ 953 954 struct acpi_drtm_resource { 955 u8 size[7]; 956 u8 type; 957 u64 address; 958 }; 959 960 struct acpi_drtm_resource_list { 961 u32 resource_count; 962 struct acpi_drtm_resource resources[]; 963 }; 964 965 /* 3) Platform-specific Identifiers List */ 966 967 struct acpi_drtm_dps_id { 968 u32 dps_id_length; 969 u8 dps_id[16]; 970 }; 971 972 /******************************************************************************* 973 * 974 * ECDT - Embedded Controller Boot Resources Table 975 * Version 1 976 * 977 ******************************************************************************/ 978 979 struct acpi_table_ecdt { 980 struct acpi_table_header header; /* Common ACPI table header */ 981 struct acpi_generic_address control; /* Address of EC command/status register */ 982 struct acpi_generic_address data; /* Address of EC data register */ 983 u32 uid; /* Unique ID - must be same as the EC _UID method */ 984 u8 gpe; /* The GPE for the EC */ 985 u8 id[]; /* Full namepath of the EC in the ACPI namespace */ 986 }; 987 988 /******************************************************************************* 989 * 990 * EINJ - Error Injection Table (ACPI 4.0) 991 * Version 1 992 * 993 ******************************************************************************/ 994 995 struct acpi_table_einj { 996 struct acpi_table_header header; /* Common ACPI table header */ 997 u32 header_length; 998 u8 flags; 999 u8 reserved[3]; 1000 u32 entries; 1001 }; 1002 1003 /* EINJ Injection Instruction Entries (actions) */ 1004 1005 struct acpi_einj_entry { 1006 struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 1007 }; 1008 1009 /* Masks for Flags field above */ 1010 1011 #define ACPI_EINJ_PRESERVE (1) 1012 1013 /* Values for Action field above */ 1014 1015 enum acpi_einj_actions { 1016 ACPI_EINJ_BEGIN_OPERATION = 0, 1017 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 1018 ACPI_EINJ_SET_ERROR_TYPE = 2, 1019 ACPI_EINJ_GET_ERROR_TYPE = 3, 1020 ACPI_EINJ_END_OPERATION = 4, 1021 ACPI_EINJ_EXECUTE_OPERATION = 5, 1022 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 1023 ACPI_EINJ_GET_COMMAND_STATUS = 7, 1024 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 1025 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 1026 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 1027 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1028 }; 1029 1030 /* Values for Instruction field above */ 1031 1032 enum acpi_einj_instructions { 1033 ACPI_EINJ_READ_REGISTER = 0, 1034 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1035 ACPI_EINJ_WRITE_REGISTER = 2, 1036 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1037 ACPI_EINJ_NOOP = 4, 1038 ACPI_EINJ_FLUSH_CACHELINE = 5, 1039 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1040 }; 1041 1042 struct acpi_einj_error_type_with_addr { 1043 u32 error_type; 1044 u32 vendor_struct_offset; 1045 u32 flags; 1046 u32 apic_id; 1047 u64 address; 1048 u64 range; 1049 u32 pcie_id; 1050 }; 1051 1052 struct acpi_einj_vendor { 1053 u32 length; 1054 u32 pcie_id; 1055 u16 vendor_id; 1056 u16 device_id; 1057 u8 revision_id; 1058 u8 reserved[3]; 1059 }; 1060 1061 /* EINJ Trigger Error Action Table */ 1062 1063 struct acpi_einj_trigger { 1064 u32 header_size; 1065 u32 revision; 1066 u32 table_size; 1067 u32 entry_count; 1068 }; 1069 1070 /* Command status return values */ 1071 1072 enum acpi_einj_command_status { 1073 ACPI_EINJ_SUCCESS = 0, 1074 ACPI_EINJ_FAILURE = 1, 1075 ACPI_EINJ_INVALID_ACCESS = 2, 1076 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1077 }; 1078 1079 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1080 1081 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1082 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1083 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1084 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1085 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1086 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1087 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1088 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1089 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1090 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1091 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1092 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1093 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1094 1095 /******************************************************************************* 1096 * 1097 * ERST - Error Record Serialization Table (ACPI 4.0) 1098 * Version 1 1099 * 1100 ******************************************************************************/ 1101 1102 struct acpi_table_erst { 1103 struct acpi_table_header header; /* Common ACPI table header */ 1104 u32 header_length; 1105 u32 reserved; 1106 u32 entries; 1107 }; 1108 1109 /* ERST Serialization Entries (actions) */ 1110 1111 struct acpi_erst_entry { 1112 struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 1113 }; 1114 1115 /* Masks for Flags field above */ 1116 1117 #define ACPI_ERST_PRESERVE (1) 1118 1119 /* Values for Action field above */ 1120 1121 enum acpi_erst_actions { 1122 ACPI_ERST_BEGIN_WRITE = 0, 1123 ACPI_ERST_BEGIN_READ = 1, 1124 ACPI_ERST_BEGIN_CLEAR = 2, 1125 ACPI_ERST_END = 3, 1126 ACPI_ERST_SET_RECORD_OFFSET = 4, 1127 ACPI_ERST_EXECUTE_OPERATION = 5, 1128 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1129 ACPI_ERST_GET_COMMAND_STATUS = 7, 1130 ACPI_ERST_GET_RECORD_ID = 8, 1131 ACPI_ERST_SET_RECORD_ID = 9, 1132 ACPI_ERST_GET_RECORD_COUNT = 10, 1133 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1134 ACPI_ERST_NOT_USED = 12, 1135 ACPI_ERST_GET_ERROR_RANGE = 13, 1136 ACPI_ERST_GET_ERROR_LENGTH = 14, 1137 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1138 ACPI_ERST_EXECUTE_TIMINGS = 16, 1139 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1140 }; 1141 1142 /* Values for Instruction field above */ 1143 1144 enum acpi_erst_instructions { 1145 ACPI_ERST_READ_REGISTER = 0, 1146 ACPI_ERST_READ_REGISTER_VALUE = 1, 1147 ACPI_ERST_WRITE_REGISTER = 2, 1148 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1149 ACPI_ERST_NOOP = 4, 1150 ACPI_ERST_LOAD_VAR1 = 5, 1151 ACPI_ERST_LOAD_VAR2 = 6, 1152 ACPI_ERST_STORE_VAR1 = 7, 1153 ACPI_ERST_ADD = 8, 1154 ACPI_ERST_SUBTRACT = 9, 1155 ACPI_ERST_ADD_VALUE = 10, 1156 ACPI_ERST_SUBTRACT_VALUE = 11, 1157 ACPI_ERST_STALL = 12, 1158 ACPI_ERST_STALL_WHILE_TRUE = 13, 1159 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1160 ACPI_ERST_GOTO = 15, 1161 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1162 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1163 ACPI_ERST_MOVE_DATA = 18, 1164 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1165 }; 1166 1167 /* Command status return values */ 1168 1169 enum acpi_erst_command_status { 1170 ACPI_ERST_SUCCESS = 0, 1171 ACPI_ERST_NO_SPACE = 1, 1172 ACPI_ERST_NOT_AVAILABLE = 2, 1173 ACPI_ERST_FAILURE = 3, 1174 ACPI_ERST_RECORD_EMPTY = 4, 1175 ACPI_ERST_NOT_FOUND = 5, 1176 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1177 }; 1178 1179 /* Error Record Serialization Information */ 1180 1181 struct acpi_erst_info { 1182 u16 signature; /* Should be "ER" */ 1183 u8 data[48]; 1184 }; 1185 1186 /******************************************************************************* 1187 * 1188 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1189 * Version 1 1190 * 1191 ******************************************************************************/ 1192 1193 struct acpi_table_fpdt { 1194 struct acpi_table_header header; /* Common ACPI table header */ 1195 }; 1196 1197 /* FPDT subtable header (Performance Record Structure) */ 1198 1199 struct acpi_fpdt_header { 1200 u16 type; 1201 u8 length; 1202 u8 revision; 1203 }; 1204 1205 /* Values for Type field above */ 1206 1207 enum acpi_fpdt_type { 1208 ACPI_FPDT_TYPE_BOOT = 0, 1209 ACPI_FPDT_TYPE_S3PERF = 1 1210 }; 1211 1212 /* 1213 * FPDT subtables 1214 */ 1215 1216 /* 0: Firmware Basic Boot Performance Record */ 1217 1218 struct acpi_fpdt_boot_pointer { 1219 struct acpi_fpdt_header header; 1220 u8 reserved[4]; 1221 u64 address; 1222 }; 1223 1224 /* 1: S3 Performance Table Pointer Record */ 1225 1226 struct acpi_fpdt_s3pt_pointer { 1227 struct acpi_fpdt_header header; 1228 u8 reserved[4]; 1229 u64 address; 1230 }; 1231 1232 /* 1233 * S3PT - S3 Performance Table. This table is pointed to by the 1234 * S3 Pointer Record above. 1235 */ 1236 struct acpi_table_s3pt { 1237 u8 signature[4]; /* "S3PT" */ 1238 u32 length; 1239 }; 1240 1241 /* 1242 * S3PT Subtables (Not part of the actual FPDT) 1243 */ 1244 1245 /* Values for Type field in S3PT header */ 1246 1247 enum acpi_s3pt_type { 1248 ACPI_S3PT_TYPE_RESUME = 0, 1249 ACPI_S3PT_TYPE_SUSPEND = 1, 1250 ACPI_FPDT_BOOT_PERFORMANCE = 2 1251 }; 1252 1253 struct acpi_s3pt_resume { 1254 struct acpi_fpdt_header header; 1255 u32 resume_count; 1256 u64 full_resume; 1257 u64 average_resume; 1258 }; 1259 1260 struct acpi_s3pt_suspend { 1261 struct acpi_fpdt_header header; 1262 u64 suspend_start; 1263 u64 suspend_end; 1264 }; 1265 1266 /* 1267 * FPDT Boot Performance Record (Not part of the actual FPDT) 1268 */ 1269 struct acpi_fpdt_boot { 1270 struct acpi_fpdt_header header; 1271 u8 reserved[4]; 1272 u64 reset_end; 1273 u64 load_start; 1274 u64 startup_start; 1275 u64 exit_services_entry; 1276 u64 exit_services_exit; 1277 }; 1278 1279 /******************************************************************************* 1280 * 1281 * GTDT - Generic Timer Description Table (ACPI 5.1) 1282 * Version 2 1283 * 1284 ******************************************************************************/ 1285 1286 struct acpi_table_gtdt { 1287 struct acpi_table_header header; /* Common ACPI table header */ 1288 u64 counter_block_addresss; 1289 u32 reserved; 1290 u32 secure_el1_interrupt; 1291 u32 secure_el1_flags; 1292 u32 non_secure_el1_interrupt; 1293 u32 non_secure_el1_flags; 1294 u32 virtual_timer_interrupt; 1295 u32 virtual_timer_flags; 1296 u32 non_secure_el2_interrupt; 1297 u32 non_secure_el2_flags; 1298 u64 counter_read_block_address; 1299 u32 platform_timer_count; 1300 u32 platform_timer_offset; 1301 }; 1302 1303 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1304 1305 #define ACPI_GTDT_INTERRUPT_MODE (1) 1306 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1307 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1308 1309 struct acpi_gtdt_el2 { 1310 u32 virtual_el2_timer_gsiv; 1311 u32 virtual_el2_timer_flags; 1312 }; 1313 1314 /* Common GTDT subtable header */ 1315 1316 struct acpi_gtdt_header { 1317 u8 type; 1318 u16 length; 1319 }; 1320 1321 /* Values for GTDT subtable type above */ 1322 1323 enum acpi_gtdt_type { 1324 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1325 ACPI_GTDT_TYPE_WATCHDOG = 1, 1326 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1327 }; 1328 1329 /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */ 1330 1331 /* 0: Generic Timer Block */ 1332 1333 struct acpi_gtdt_timer_block { 1334 struct acpi_gtdt_header header; 1335 u8 reserved; 1336 u64 block_address; 1337 u32 timer_count; 1338 u32 timer_offset; 1339 }; 1340 1341 /* Timer Sub-Structure, one per timer */ 1342 1343 struct acpi_gtdt_timer_entry { 1344 u8 frame_number; 1345 u8 reserved[3]; 1346 u64 base_address; 1347 u64 el0_base_address; 1348 u32 timer_interrupt; 1349 u32 timer_flags; 1350 u32 virtual_timer_interrupt; 1351 u32 virtual_timer_flags; 1352 u32 common_flags; 1353 }; 1354 1355 /* Flag Definitions: timer_flags and virtual_timer_flags above */ 1356 1357 #define ACPI_GTDT_GT_IRQ_MODE (1) 1358 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1359 1360 /* Flag Definitions: common_flags above */ 1361 1362 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1363 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1364 1365 /* 1: SBSA Generic Watchdog Structure */ 1366 1367 struct acpi_gtdt_watchdog { 1368 struct acpi_gtdt_header header; 1369 u8 reserved; 1370 u64 refresh_frame_address; 1371 u64 control_frame_address; 1372 u32 timer_interrupt; 1373 u32 timer_flags; 1374 }; 1375 1376 /* Flag Definitions: timer_flags above */ 1377 1378 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1379 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1380 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1381 1382 /******************************************************************************* 1383 * 1384 * HEST - Hardware Error Source Table (ACPI 4.0) 1385 * Version 1 1386 * 1387 ******************************************************************************/ 1388 1389 struct acpi_table_hest { 1390 struct acpi_table_header header; /* Common ACPI table header */ 1391 u32 error_source_count; 1392 }; 1393 1394 /* HEST subtable header */ 1395 1396 struct acpi_hest_header { 1397 u16 type; 1398 u16 source_id; 1399 }; 1400 1401 /* Values for Type field above for subtables */ 1402 1403 enum acpi_hest_types { 1404 ACPI_HEST_TYPE_IA32_CHECK = 0, 1405 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1406 ACPI_HEST_TYPE_IA32_NMI = 2, 1407 ACPI_HEST_TYPE_NOT_USED3 = 3, 1408 ACPI_HEST_TYPE_NOT_USED4 = 4, 1409 ACPI_HEST_TYPE_NOT_USED5 = 5, 1410 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1411 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1412 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1413 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1414 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1415 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1416 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1417 }; 1418 1419 /* 1420 * HEST substructures contained in subtables 1421 */ 1422 1423 /* 1424 * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and 1425 * struct acpi_hest_ia_corrected structures. 1426 */ 1427 struct acpi_hest_ia_error_bank { 1428 u8 bank_number; 1429 u8 clear_status_on_init; 1430 u8 status_format; 1431 u8 reserved; 1432 u32 control_register; 1433 u64 control_data; 1434 u32 status_register; 1435 u32 address_register; 1436 u32 misc_register; 1437 }; 1438 1439 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1440 1441 struct acpi_hest_aer_common { 1442 u16 reserved1; 1443 u8 flags; 1444 u8 enabled; 1445 u32 records_to_preallocate; 1446 u32 max_sections_per_record; 1447 u32 bus; /* Bus and Segment numbers */ 1448 u16 device; 1449 u16 function; 1450 u16 device_control; 1451 u16 reserved2; 1452 u32 uncorrectable_mask; 1453 u32 uncorrectable_severity; 1454 u32 correctable_mask; 1455 u32 advanced_capabilities; 1456 }; 1457 1458 /* Masks for HEST Flags fields */ 1459 1460 #define ACPI_HEST_FIRMWARE_FIRST (1) 1461 #define ACPI_HEST_GLOBAL (1<<1) 1462 #define ACPI_HEST_GHES_ASSIST (1<<2) 1463 1464 /* 1465 * Macros to access the bus/segment numbers in Bus field above: 1466 * Bus number is encoded in bits 7:0 1467 * Segment number is encoded in bits 23:8 1468 */ 1469 #define ACPI_HEST_BUS(bus) ((bus) & 0xFF) 1470 #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF) 1471 1472 /* Hardware Error Notification */ 1473 1474 struct acpi_hest_notify { 1475 u8 type; 1476 u8 length; 1477 u16 config_write_enable; 1478 u32 poll_interval; 1479 u32 vector; 1480 u32 polling_threshold_value; 1481 u32 polling_threshold_window; 1482 u32 error_threshold_value; 1483 u32 error_threshold_window; 1484 }; 1485 1486 /* Values for Notify Type field above */ 1487 1488 enum acpi_hest_notify_types { 1489 ACPI_HEST_NOTIFY_POLLED = 0, 1490 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1491 ACPI_HEST_NOTIFY_LOCAL = 2, 1492 ACPI_HEST_NOTIFY_SCI = 3, 1493 ACPI_HEST_NOTIFY_NMI = 4, 1494 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1495 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1496 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1497 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1498 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1499 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1500 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1501 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1502 }; 1503 1504 /* Values for config_write_enable bitfield above */ 1505 1506 #define ACPI_HEST_TYPE (1) 1507 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1508 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1509 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1510 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1511 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1512 1513 /* 1514 * HEST subtables 1515 */ 1516 1517 /* 0: IA32 Machine Check Exception */ 1518 1519 struct acpi_hest_ia_machine_check { 1520 struct acpi_hest_header header; 1521 u16 reserved1; 1522 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1523 u8 enabled; 1524 u32 records_to_preallocate; 1525 u32 max_sections_per_record; 1526 u64 global_capability_data; 1527 u64 global_control_data; 1528 u8 num_hardware_banks; 1529 u8 reserved3[7]; 1530 }; 1531 1532 /* 1: IA32 Corrected Machine Check */ 1533 1534 struct acpi_hest_ia_corrected { 1535 struct acpi_hest_header header; 1536 u16 reserved1; 1537 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1538 u8 enabled; 1539 u32 records_to_preallocate; 1540 u32 max_sections_per_record; 1541 struct acpi_hest_notify notify; 1542 u8 num_hardware_banks; 1543 u8 reserved2[3]; 1544 }; 1545 1546 /* 2: IA32 Non-Maskable Interrupt */ 1547 1548 struct acpi_hest_ia_nmi { 1549 struct acpi_hest_header header; 1550 u32 reserved; 1551 u32 records_to_preallocate; 1552 u32 max_sections_per_record; 1553 u32 max_raw_data_length; 1554 }; 1555 1556 /* 3,4,5: Not used */ 1557 1558 /* 6: PCI Express Root Port AER */ 1559 1560 struct acpi_hest_aer_root { 1561 struct acpi_hest_header header; 1562 struct acpi_hest_aer_common aer; 1563 u32 root_error_command; 1564 }; 1565 1566 /* 7: PCI Express AER (AER Endpoint) */ 1567 1568 struct acpi_hest_aer { 1569 struct acpi_hest_header header; 1570 struct acpi_hest_aer_common aer; 1571 }; 1572 1573 /* 8: PCI Express/PCI-X Bridge AER */ 1574 1575 struct acpi_hest_aer_bridge { 1576 struct acpi_hest_header header; 1577 struct acpi_hest_aer_common aer; 1578 u32 uncorrectable_mask2; 1579 u32 uncorrectable_severity2; 1580 u32 advanced_capabilities2; 1581 }; 1582 1583 /* 9: Generic Hardware Error Source */ 1584 1585 struct acpi_hest_generic { 1586 struct acpi_hest_header header; 1587 u16 related_source_id; 1588 u8 reserved; 1589 u8 enabled; 1590 u32 records_to_preallocate; 1591 u32 max_sections_per_record; 1592 u32 max_raw_data_length; 1593 struct acpi_generic_address error_status_address; 1594 struct acpi_hest_notify notify; 1595 u32 error_block_length; 1596 }; 1597 1598 /* 10: Generic Hardware Error Source, version 2 */ 1599 1600 struct acpi_hest_generic_v2 { 1601 struct acpi_hest_header header; 1602 u16 related_source_id; 1603 u8 reserved; 1604 u8 enabled; 1605 u32 records_to_preallocate; 1606 u32 max_sections_per_record; 1607 u32 max_raw_data_length; 1608 struct acpi_generic_address error_status_address; 1609 struct acpi_hest_notify notify; 1610 u32 error_block_length; 1611 struct acpi_generic_address read_ack_register; 1612 u64 read_ack_preserve; 1613 u64 read_ack_write; 1614 }; 1615 1616 /* Generic Error Status block */ 1617 1618 struct acpi_hest_generic_status { 1619 u32 block_status; 1620 u32 raw_data_offset; 1621 u32 raw_data_length; 1622 u32 data_length; 1623 u32 error_severity; 1624 }; 1625 1626 /* Values for block_status flags above */ 1627 1628 #define ACPI_HEST_UNCORRECTABLE (1) 1629 #define ACPI_HEST_CORRECTABLE (1<<1) 1630 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 1631 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 1632 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 1633 1634 /* Generic Error Data entry */ 1635 1636 struct acpi_hest_generic_data { 1637 u8 section_type[16]; 1638 u32 error_severity; 1639 u16 revision; 1640 u8 validation_bits; 1641 u8 flags; 1642 u32 error_data_length; 1643 u8 fru_id[16]; 1644 u8 fru_text[20]; 1645 }; 1646 1647 /* Extension for revision 0x0300 */ 1648 1649 struct acpi_hest_generic_data_v300 { 1650 u8 section_type[16]; 1651 u32 error_severity; 1652 u16 revision; 1653 u8 validation_bits; 1654 u8 flags; 1655 u32 error_data_length; 1656 u8 fru_id[16]; 1657 u8 fru_text[20]; 1658 u64 time_stamp; 1659 }; 1660 1661 /* Values for error_severity above */ 1662 1663 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 1664 #define ACPI_HEST_GEN_ERROR_FATAL 1 1665 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 1666 #define ACPI_HEST_GEN_ERROR_NONE 3 1667 1668 /* Flags for validation_bits above */ 1669 1670 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 1671 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 1672 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 1673 1674 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 1675 1676 struct acpi_hest_ia_deferred_check { 1677 struct acpi_hest_header header; 1678 u16 reserved1; 1679 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1680 u8 enabled; 1681 u32 records_to_preallocate; 1682 u32 max_sections_per_record; 1683 struct acpi_hest_notify notify; 1684 u8 num_hardware_banks; 1685 u8 reserved2[3]; 1686 }; 1687 1688 /******************************************************************************* 1689 * 1690 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2) 1691 * Version 1 1692 * 1693 ******************************************************************************/ 1694 1695 struct acpi_table_hmat { 1696 struct acpi_table_header header; /* Common ACPI table header */ 1697 u32 reserved; 1698 }; 1699 1700 /* Values for HMAT structure types */ 1701 1702 enum acpi_hmat_type { 1703 ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */ 1704 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 1705 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 1706 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 1707 }; 1708 1709 struct acpi_hmat_structure { 1710 u16 type; 1711 u16 reserved; 1712 u32 length; 1713 }; 1714 1715 /* 1716 * HMAT Structures, correspond to Type in struct acpi_hmat_structure 1717 */ 1718 1719 /* 0: Memory proximity domain attributes */ 1720 1721 struct acpi_hmat_proximity_domain { 1722 struct acpi_hmat_structure header; 1723 u16 flags; 1724 u16 reserved1; 1725 u32 processor_PD; /* Processor proximity domain */ 1726 u32 memory_PD; /* Memory proximity domain */ 1727 u32 reserved2; 1728 u64 reserved3; 1729 u64 reserved4; 1730 }; 1731 1732 /* Masks for Flags field above */ 1733 1734 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */ 1735 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */ 1736 #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */ 1737 1738 /* 1: System locality latency and bandwidth information */ 1739 1740 struct acpi_hmat_locality { 1741 struct acpi_hmat_structure header; 1742 u8 flags; 1743 u8 data_type; 1744 u8 min_transfer_size; 1745 u8 reserved1; 1746 u32 number_of_initiator_Pds; 1747 u32 number_of_target_Pds; 1748 u32 reserved2; 1749 u64 entry_base_unit; 1750 }; 1751 1752 /* Masks for Flags field above */ 1753 1754 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 1755 1756 /* Values for Memory Hierarchy flags */ 1757 1758 #define ACPI_HMAT_MEMORY 0 1759 #define ACPI_HMAT_LAST_LEVEL_CACHE 1 1760 #define ACPI_HMAT_1ST_LEVEL_CACHE 2 1761 #define ACPI_HMAT_2ND_LEVEL_CACHE 3 1762 #define ACPI_HMAT_3RD_LEVEL_CACHE 4 1763 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 1764 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 1765 1766 1767 /* Values for data_type field above */ 1768 1769 #define ACPI_HMAT_ACCESS_LATENCY 0 1770 #define ACPI_HMAT_READ_LATENCY 1 1771 #define ACPI_HMAT_WRITE_LATENCY 2 1772 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 1773 #define ACPI_HMAT_READ_BANDWIDTH 4 1774 #define ACPI_HMAT_WRITE_BANDWIDTH 5 1775 1776 /* 2: Memory side cache information */ 1777 1778 struct acpi_hmat_cache { 1779 struct acpi_hmat_structure header; 1780 u32 memory_PD; 1781 u32 reserved1; 1782 u64 cache_size; 1783 u32 cache_attributes; 1784 u16 reserved2; 1785 u16 number_of_SMBIOShandles; 1786 }; 1787 1788 /* Masks for cache_attributes field above */ 1789 1790 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 1791 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 1792 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 1793 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 1794 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 1795 1796 /* Values for cache associativity flag */ 1797 1798 #define ACPI_HMAT_CA_NONE (0) 1799 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 1800 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 1801 1802 /* Values for write policy flag */ 1803 1804 #define ACPI_HMAT_CP_NONE (0) 1805 #define ACPI_HMAT_CP_WB (1) 1806 #define ACPI_HMAT_CP_WT (2) 1807 1808 /******************************************************************************* 1809 * 1810 * HPET - High Precision Event Timer table 1811 * Version 1 1812 * 1813 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 1814 * Version 1.0a, October 2004 1815 * 1816 ******************************************************************************/ 1817 1818 struct acpi_table_hpet { 1819 struct acpi_table_header header; /* Common ACPI table header */ 1820 u32 id; /* Hardware ID of event timer block */ 1821 struct acpi_generic_address address; /* Address of event timer block */ 1822 u8 sequence; /* HPET sequence number */ 1823 u16 minimum_tick; /* Main counter min tick, periodic mode */ 1824 u8 flags; 1825 }; 1826 1827 /* Masks for Flags field above */ 1828 1829 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 1830 1831 /* Values for Page Protect flags */ 1832 1833 enum acpi_hpet_page_protect { 1834 ACPI_HPET_NO_PAGE_PROTECT = 0, 1835 ACPI_HPET_PAGE_PROTECT4 = 1, 1836 ACPI_HPET_PAGE_PROTECT64 = 2 1837 }; 1838 1839 /******************************************************************************* 1840 * 1841 * IBFT - Boot Firmware Table 1842 * Version 1 1843 * 1844 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 1845 * Specification", Version 1.01, March 1, 2007 1846 * 1847 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 1848 * Therefore, it is not currently supported by the disassembler. 1849 * 1850 ******************************************************************************/ 1851 1852 struct acpi_table_ibft { 1853 struct acpi_table_header header; /* Common ACPI table header */ 1854 u8 reserved[12]; 1855 }; 1856 1857 /* IBFT common subtable header */ 1858 1859 struct acpi_ibft_header { 1860 u8 type; 1861 u8 version; 1862 u16 length; 1863 u8 index; 1864 u8 flags; 1865 }; 1866 1867 /* Values for Type field above */ 1868 1869 enum acpi_ibft_type { 1870 ACPI_IBFT_TYPE_NOT_USED = 0, 1871 ACPI_IBFT_TYPE_CONTROL = 1, 1872 ACPI_IBFT_TYPE_INITIATOR = 2, 1873 ACPI_IBFT_TYPE_NIC = 3, 1874 ACPI_IBFT_TYPE_TARGET = 4, 1875 ACPI_IBFT_TYPE_EXTENSIONS = 5, 1876 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1877 }; 1878 1879 /* IBFT subtables */ 1880 1881 struct acpi_ibft_control { 1882 struct acpi_ibft_header header; 1883 u16 extensions; 1884 u16 initiator_offset; 1885 u16 nic0_offset; 1886 u16 target0_offset; 1887 u16 nic1_offset; 1888 u16 target1_offset; 1889 }; 1890 1891 struct acpi_ibft_initiator { 1892 struct acpi_ibft_header header; 1893 u8 sns_server[16]; 1894 u8 slp_server[16]; 1895 u8 primary_server[16]; 1896 u8 secondary_server[16]; 1897 u16 name_length; 1898 u16 name_offset; 1899 }; 1900 1901 struct acpi_ibft_nic { 1902 struct acpi_ibft_header header; 1903 u8 ip_address[16]; 1904 u8 subnet_mask_prefix; 1905 u8 origin; 1906 u8 gateway[16]; 1907 u8 primary_dns[16]; 1908 u8 secondary_dns[16]; 1909 u8 dhcp[16]; 1910 u16 vlan; 1911 u8 mac_address[6]; 1912 u16 pci_address; 1913 u16 name_length; 1914 u16 name_offset; 1915 }; 1916 1917 struct acpi_ibft_target { 1918 struct acpi_ibft_header header; 1919 u8 target_ip_address[16]; 1920 u16 target_ip_socket; 1921 u8 target_boot_lun[8]; 1922 u8 chap_type; 1923 u8 nic_association; 1924 u16 target_name_length; 1925 u16 target_name_offset; 1926 u16 chap_name_length; 1927 u16 chap_name_offset; 1928 u16 chap_secret_length; 1929 u16 chap_secret_offset; 1930 u16 reverse_chap_name_length; 1931 u16 reverse_chap_name_offset; 1932 u16 reverse_chap_secret_length; 1933 u16 reverse_chap_secret_offset; 1934 }; 1935 1936 /* Reset to default packing */ 1937 1938 #pragma pack() 1939 1940 #endif /* __ACTBL1_H__ */ 1941