1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Name: actbl1.h - Additional ACPI table definitions 5 * 6 * Copyright (C) 2000 - 2023, Intel Corp. 7 * 8 *****************************************************************************/ 9 10 #ifndef __ACTBL1_H__ 11 #define __ACTBL1_H__ 12 13 /******************************************************************************* 14 * 15 * Additional ACPI Tables 16 * 17 * These tables are not consumed directly by the ACPICA subsystem, but are 18 * included here to support device drivers and the AML disassembler. 19 * 20 ******************************************************************************/ 21 22 /* 23 * Values for description table header signatures for tables defined in this 24 * file. Useful because they make it more difficult to inadvertently type in 25 * the wrong signature. 26 */ 27 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 28 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 29 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 30 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 31 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 32 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 33 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 34 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 35 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 36 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 37 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 38 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 39 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 40 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 41 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 42 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 43 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 44 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 45 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 46 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 47 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 48 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 49 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 50 51 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 52 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 53 54 #define ACPI_SIG_NBFT "NBFT" /* NVMe Boot Firmware Table */ 55 56 /* Reserved table signatures */ 57 58 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 59 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 60 61 /* 62 * These tables have been seen in the field, but no definition has been found 63 */ 64 #ifdef ACPI_UNDEFINED_TABLES 65 #define ACPI_SIG_ATKG "ATKG" 66 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 67 #define ACPI_SIG_IEIT "IEIT" 68 #endif 69 70 /* 71 * All tables must be byte-packed to match the ACPI specification, since 72 * the tables are provided by the system BIOS. 73 */ 74 #pragma pack(1) 75 76 /* 77 * Note: C bitfields are not used for this reason: 78 * 79 * "Bitfields are great and easy to read, but unfortunately the C language 80 * does not specify the layout of bitfields in memory, which means they are 81 * essentially useless for dealing with packed data in on-disk formats or 82 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 83 * this decision was a design error in C. Ritchie could have picked an order 84 * and stuck with it." Norman Ramsey. 85 * See http://stackoverflow.com/a/1053662/41661 86 */ 87 88 /******************************************************************************* 89 * 90 * Common subtable headers 91 * 92 ******************************************************************************/ 93 94 /* Generic subtable header (used in MADT, SRAT, etc.) */ 95 96 struct acpi_subtable_header { 97 u8 type; 98 u8 length; 99 }; 100 101 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 102 103 struct acpi_whea_header { 104 u8 action; 105 u8 instruction; 106 u8 flags; 107 u8 reserved; 108 struct acpi_generic_address register_region; 109 u64 value; /* Value used with Read/Write register */ 110 u64 mask; /* Bitmask required for this register instruction */ 111 }; 112 113 /* https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/acpitabl/ns-acpitabl-aspt_table */ 114 #define ASPT_REVISION_ID 0x01 115 struct acpi_table_aspt { 116 struct acpi_table_header header; 117 u32 num_entries; 118 }; 119 120 struct acpi_aspt_header { 121 u16 type; 122 u16 length; 123 }; 124 125 enum acpi_aspt_type { 126 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 127 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 128 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 129 }; 130 131 /* 0: ASPT Global Registers */ 132 struct acpi_aspt_global_regs { 133 struct acpi_aspt_header header; 134 u32 reserved; 135 u64 feature_reg_addr; 136 u64 irq_en_reg_addr; 137 u64 irq_st_reg_addr; 138 }; 139 140 /* 1: ASPT SEV Mailbox Registers */ 141 struct acpi_aspt_sev_mbox_regs { 142 struct acpi_aspt_header header; 143 u8 mbox_irq_id; 144 u8 reserved[3]; 145 u64 cmd_resp_reg_addr; 146 u64 cmd_buf_lo_reg_addr; 147 u64 cmd_buf_hi_reg_addr; 148 }; 149 150 /* 2: ASPT ACPI Mailbox Registers */ 151 struct acpi_aspt_acpi_mbox_regs { 152 struct acpi_aspt_header header; 153 u32 reserved1; 154 u64 cmd_resp_reg_addr; 155 u64 reserved2[2]; 156 }; 157 158 /******************************************************************************* 159 * 160 * ASF - Alert Standard Format table (Signature "ASF!") 161 * Revision 0x10 162 * 163 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 164 * 165 ******************************************************************************/ 166 167 struct acpi_table_asf { 168 struct acpi_table_header header; /* Common ACPI table header */ 169 }; 170 171 /* ASF subtable header */ 172 173 struct acpi_asf_header { 174 u8 type; 175 u8 reserved; 176 u16 length; 177 }; 178 179 /* Values for Type field above */ 180 181 enum acpi_asf_type { 182 ACPI_ASF_TYPE_INFO = 0, 183 ACPI_ASF_TYPE_ALERT = 1, 184 ACPI_ASF_TYPE_CONTROL = 2, 185 ACPI_ASF_TYPE_BOOT = 3, 186 ACPI_ASF_TYPE_ADDRESS = 4, 187 ACPI_ASF_TYPE_RESERVED = 5 188 }; 189 190 /* 191 * ASF subtables 192 */ 193 194 /* 0: ASF Information */ 195 196 struct acpi_asf_info { 197 struct acpi_asf_header header; 198 u8 min_reset_value; 199 u8 min_poll_interval; 200 u16 system_id; 201 u32 mfg_id; 202 u8 flags; 203 u8 reserved2[3]; 204 }; 205 206 /* Masks for Flags field above */ 207 208 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 209 210 /* 1: ASF Alerts */ 211 212 struct acpi_asf_alert { 213 struct acpi_asf_header header; 214 u8 assert_mask; 215 u8 deassert_mask; 216 u8 alerts; 217 u8 data_length; 218 }; 219 220 struct acpi_asf_alert_data { 221 u8 address; 222 u8 command; 223 u8 mask; 224 u8 value; 225 u8 sensor_type; 226 u8 type; 227 u8 offset; 228 u8 source_type; 229 u8 severity; 230 u8 sensor_number; 231 u8 entity; 232 u8 instance; 233 }; 234 235 /* 2: ASF Remote Control */ 236 237 struct acpi_asf_remote { 238 struct acpi_asf_header header; 239 u8 controls; 240 u8 data_length; 241 u16 reserved2; 242 }; 243 244 struct acpi_asf_control_data { 245 u8 function; 246 u8 address; 247 u8 command; 248 u8 value; 249 }; 250 251 /* 3: ASF RMCP Boot Options */ 252 253 struct acpi_asf_rmcp { 254 struct acpi_asf_header header; 255 u8 capabilities[7]; 256 u8 completion_code; 257 u32 enterprise_id; 258 u8 command; 259 u16 parameter; 260 u16 boot_options; 261 u16 oem_parameters; 262 }; 263 264 /* 4: ASF Address */ 265 266 struct acpi_asf_address { 267 struct acpi_asf_header header; 268 u8 eprom_address; 269 u8 devices; 270 }; 271 272 /******************************************************************************* 273 * 274 * BERT - Boot Error Record Table (ACPI 4.0) 275 * Version 1 276 * 277 ******************************************************************************/ 278 279 struct acpi_table_bert { 280 struct acpi_table_header header; /* Common ACPI table header */ 281 u32 region_length; /* Length of the boot error region */ 282 u64 address; /* Physical address of the error region */ 283 }; 284 285 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 286 287 struct acpi_bert_region { 288 u32 block_status; /* Type of error information */ 289 u32 raw_data_offset; /* Offset to raw error data */ 290 u32 raw_data_length; /* Length of raw error data */ 291 u32 data_length; /* Length of generic error data */ 292 u32 error_severity; /* Severity code */ 293 }; 294 295 /* Values for block_status flags above */ 296 297 #define ACPI_BERT_UNCORRECTABLE (1) 298 #define ACPI_BERT_CORRECTABLE (1<<1) 299 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 300 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 301 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 302 303 /* Values for error_severity above */ 304 305 enum acpi_bert_error_severity { 306 ACPI_BERT_ERROR_CORRECTABLE = 0, 307 ACPI_BERT_ERROR_FATAL = 1, 308 ACPI_BERT_ERROR_CORRECTED = 2, 309 ACPI_BERT_ERROR_NONE = 3, 310 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 311 }; 312 313 /* 314 * Note: The generic error data that follows the error_severity field above 315 * uses the struct acpi_hest_generic_data defined under the HEST table below 316 */ 317 318 /******************************************************************************* 319 * 320 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 321 * Version 1 322 * 323 ******************************************************************************/ 324 325 struct acpi_table_bgrt { 326 struct acpi_table_header header; /* Common ACPI table header */ 327 u16 version; 328 u8 status; 329 u8 image_type; 330 u64 image_address; 331 u32 image_offset_x; 332 u32 image_offset_y; 333 }; 334 335 /* Flags for Status field above */ 336 337 #define ACPI_BGRT_DISPLAYED (1) 338 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 339 340 /******************************************************************************* 341 * 342 * BOOT - Simple Boot Flag Table 343 * Version 1 344 * 345 * Conforms to the "Simple Boot Flag Specification", Version 2.1 346 * 347 ******************************************************************************/ 348 349 struct acpi_table_boot { 350 struct acpi_table_header header; /* Common ACPI table header */ 351 u8 cmos_index; /* Index in CMOS RAM for the boot register */ 352 u8 reserved[3]; 353 }; 354 355 /******************************************************************************* 356 * 357 * CDAT - Coherent Device Attribute Table 358 * Version 1 359 * 360 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 361 " (Revision 1.01, October 2020.) 362 * 363 ******************************************************************************/ 364 365 struct acpi_table_cdat { 366 u32 length; /* Length of table in bytes, including this header */ 367 u8 revision; /* ACPI Specification minor version number */ 368 u8 checksum; /* To make sum of entire table == 0 */ 369 u8 reserved[6]; 370 u32 sequence; /* Used to detect runtime CDAT table changes */ 371 }; 372 373 /* CDAT common subtable header */ 374 375 struct acpi_cdat_header { 376 u8 type; 377 u8 reserved; 378 u16 length; 379 }; 380 381 /* Values for Type field above */ 382 383 enum acpi_cdat_type { 384 ACPI_CDAT_TYPE_DSMAS = 0, 385 ACPI_CDAT_TYPE_DSLBIS = 1, 386 ACPI_CDAT_TYPE_DSMSCIS = 2, 387 ACPI_CDAT_TYPE_DSIS = 3, 388 ACPI_CDAT_TYPE_DSEMTS = 4, 389 ACPI_CDAT_TYPE_SSLBIS = 5, 390 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 391 }; 392 393 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 394 395 struct acpi_cdat_dsmas { 396 u8 dsmad_handle; 397 u8 flags; 398 u16 reserved; 399 u64 dpa_base_address; 400 u64 dpa_length; 401 }; 402 403 /* Flags for subtable above */ 404 405 #define ACPI_CEDT_DSMAS_NON_VOLATILE (1 << 2) 406 407 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 408 409 struct acpi_cdat_dslbis { 410 u8 handle; 411 u8 flags; /* If Handle matches a DSMAS handle, the definition of this field matches 412 * Flags field in HMAT System Locality Latency */ 413 u8 data_type; 414 u8 reserved; 415 u64 entry_base_unit; 416 u16 entry[3]; 417 u16 reserved2; 418 }; 419 420 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 421 422 struct acpi_cdat_dsmscis { 423 u8 dsmas_handle; 424 u8 reserved[3]; 425 u64 side_cache_size; 426 u32 cache_attributes; 427 }; 428 429 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 430 431 struct acpi_cdat_dsis { 432 u8 flags; 433 u8 handle; 434 u16 reserved; 435 }; 436 437 /* Flags for above subtable */ 438 439 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 440 441 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 442 443 struct acpi_cdat_dsemts { 444 u8 dsmas_handle; 445 u8 memory_type; 446 u16 reserved; 447 u64 dpa_offset; 448 u64 range_length; 449 }; 450 451 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 452 453 struct acpi_cdat_sslbis { 454 u8 data_type; 455 u8 reserved[3]; 456 u64 entry_base_unit; 457 }; 458 459 /* Sub-subtable for above, sslbe_entries field */ 460 461 struct acpi_cdat_sslbe { 462 u16 portx_id; 463 u16 porty_id; 464 u16 latency_or_bandwidth; 465 u16 reserved; 466 }; 467 468 /******************************************************************************* 469 * 470 * CEDT - CXL Early Discovery Table 471 * Version 1 472 * 473 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 474 * 475 ******************************************************************************/ 476 477 struct acpi_table_cedt { 478 struct acpi_table_header header; /* Common ACPI table header */ 479 }; 480 481 /* CEDT subtable header (Performance Record Structure) */ 482 483 struct acpi_cedt_header { 484 u8 type; 485 u8 reserved; 486 u16 length; 487 }; 488 489 /* Values for Type field above */ 490 491 enum acpi_cedt_type { 492 ACPI_CEDT_TYPE_CHBS = 0, 493 ACPI_CEDT_TYPE_CFMWS = 1, 494 ACPI_CEDT_TYPE_CXIMS = 2, 495 ACPI_CEDT_TYPE_RDPAS = 3, 496 ACPI_CEDT_TYPE_RESERVED = 4, 497 }; 498 499 /* Values for version field above */ 500 501 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 502 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 503 504 /* Values for length field above */ 505 506 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 507 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 508 509 /* 510 * CEDT subtables 511 */ 512 513 /* 0: CXL Host Bridge Structure */ 514 515 struct acpi_cedt_chbs { 516 struct acpi_cedt_header header; 517 u32 uid; 518 u32 cxl_version; 519 u32 reserved; 520 u64 base; 521 u64 length; 522 }; 523 524 /* 1: CXL Fixed Memory Window Structure */ 525 526 struct acpi_cedt_cfmws { 527 struct acpi_cedt_header header; 528 u32 reserved1; 529 u64 base_hpa; 530 u64 window_size; 531 u8 interleave_ways; 532 u8 interleave_arithmetic; 533 u16 reserved2; 534 u32 granularity; 535 u16 restrictions; 536 u16 qtg_id; 537 u32 interleave_targets[]; 538 }; 539 540 struct acpi_cedt_cfmws_target_element { 541 u32 interleave_target; 542 }; 543 544 /* Values for Interleave Arithmetic field above */ 545 546 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 547 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 548 549 /* Values for Restrictions field above */ 550 551 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 552 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 553 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 554 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 555 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 556 557 /* 2: CXL XOR Interleave Math Structure */ 558 559 struct acpi_cedt_cxims { 560 struct acpi_cedt_header header; 561 u16 reserved1; 562 u8 hbig; 563 u8 nr_xormaps; 564 u64 xormap_list[]; 565 }; 566 567 /* 3: CXL RCEC Downstream Port Association Structure */ 568 569 struct acpi_cedt_rdpas { 570 struct acpi_cedt_header header; 571 u8 reserved1; 572 u16 length; 573 u16 segment; 574 u16 bdf; 575 u8 protocol; 576 u64 address; 577 }; 578 579 /* Masks for bdf field above */ 580 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 581 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 582 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 583 584 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 585 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 586 587 /******************************************************************************* 588 * 589 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 590 * Version 1 591 * 592 ******************************************************************************/ 593 594 struct acpi_table_cpep { 595 struct acpi_table_header header; /* Common ACPI table header */ 596 u64 reserved; 597 }; 598 599 /* Subtable */ 600 601 struct acpi_cpep_polling { 602 struct acpi_subtable_header header; 603 u8 id; /* Processor ID */ 604 u8 eid; /* Processor EID */ 605 u32 interval; /* Polling interval (msec) */ 606 }; 607 608 /******************************************************************************* 609 * 610 * CSRT - Core System Resource Table 611 * Version 0 612 * 613 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 614 * 615 ******************************************************************************/ 616 617 struct acpi_table_csrt { 618 struct acpi_table_header header; /* Common ACPI table header */ 619 }; 620 621 /* Resource Group subtable */ 622 623 struct acpi_csrt_group { 624 u32 length; 625 u32 vendor_id; 626 u32 subvendor_id; 627 u16 device_id; 628 u16 subdevice_id; 629 u16 revision; 630 u16 reserved; 631 u32 shared_info_length; 632 633 /* Shared data immediately follows (Length = shared_info_length) */ 634 }; 635 636 /* Shared Info subtable */ 637 638 struct acpi_csrt_shared_info { 639 u16 major_version; 640 u16 minor_version; 641 u32 mmio_base_low; 642 u32 mmio_base_high; 643 u32 gsi_interrupt; 644 u8 interrupt_polarity; 645 u8 interrupt_mode; 646 u8 num_channels; 647 u8 dma_address_width; 648 u16 base_request_line; 649 u16 num_handshake_signals; 650 u32 max_block_size; 651 652 /* Resource descriptors immediately follow (Length = Group length - shared_info_length) */ 653 }; 654 655 /* Resource Descriptor subtable */ 656 657 struct acpi_csrt_descriptor { 658 u32 length; 659 u16 type; 660 u16 subtype; 661 u32 uid; 662 663 /* Resource-specific information immediately follows */ 664 }; 665 666 /* Resource Types */ 667 668 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 669 #define ACPI_CSRT_TYPE_TIMER 0x0002 670 #define ACPI_CSRT_TYPE_DMA 0x0003 671 672 /* Resource Subtypes */ 673 674 #define ACPI_CSRT_XRUPT_LINE 0x0000 675 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 676 #define ACPI_CSRT_TIMER 0x0000 677 #define ACPI_CSRT_DMA_CHANNEL 0x0000 678 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 679 680 /******************************************************************************* 681 * 682 * DBG2 - Debug Port Table 2 683 * Version 0 (Both main table and subtables) 684 * 685 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 686 * 687 ******************************************************************************/ 688 689 struct acpi_table_dbg2 { 690 struct acpi_table_header header; /* Common ACPI table header */ 691 u32 info_offset; 692 u32 info_count; 693 }; 694 695 struct acpi_dbg2_header { 696 u32 info_offset; 697 u32 info_count; 698 }; 699 700 /* Debug Device Information Subtable */ 701 702 struct acpi_dbg2_device { 703 u8 revision; 704 u16 length; 705 u8 register_count; /* Number of base_address registers */ 706 u16 namepath_length; 707 u16 namepath_offset; 708 u16 oem_data_length; 709 u16 oem_data_offset; 710 u16 port_type; 711 u16 port_subtype; 712 u16 reserved; 713 u16 base_address_offset; 714 u16 address_size_offset; 715 /* 716 * Data that follows: 717 * base_address (required) - Each in 12-byte Generic Address Structure format. 718 * address_size (required) - Array of u32 sizes corresponding to each base_address register. 719 * Namepath (required) - Null terminated string. Single dot if not supported. 720 * oem_data (optional) - Length is oem_data_length. 721 */ 722 }; 723 724 /* Types for port_type field above */ 725 726 #define ACPI_DBG2_SERIAL_PORT 0x8000 727 #define ACPI_DBG2_1394_PORT 0x8001 728 #define ACPI_DBG2_USB_PORT 0x8002 729 #define ACPI_DBG2_NET_PORT 0x8003 730 731 /* Subtypes for port_subtype field above */ 732 733 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 734 #define ACPI_DBG2_16550_SUBSET 0x0001 735 #define ACPI_DBG2_MAX311XE_SPI 0x0002 736 #define ACPI_DBG2_ARM_PL011 0x0003 737 #define ACPI_DBG2_MSM8X60 0x0004 738 #define ACPI_DBG2_16550_NVIDIA 0x0005 739 #define ACPI_DBG2_TI_OMAP 0x0006 740 #define ACPI_DBG2_APM88XXXX 0x0008 741 #define ACPI_DBG2_MSM8974 0x0009 742 #define ACPI_DBG2_SAM5250 0x000A 743 #define ACPI_DBG2_INTEL_USIF 0x000B 744 #define ACPI_DBG2_IMX6 0x000C 745 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 746 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 747 #define ACPI_DBG2_ARM_DCC 0x000F 748 #define ACPI_DBG2_BCM2835 0x0010 749 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 750 #define ACPI_DBG2_16550_WITH_GAS 0x0012 751 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 752 #define ACPI_DBG2_INTEL_LPSS 0x0014 753 754 #define ACPI_DBG2_1394_STANDARD 0x0000 755 756 #define ACPI_DBG2_USB_XHCI 0x0000 757 #define ACPI_DBG2_USB_EHCI 0x0001 758 759 /******************************************************************************* 760 * 761 * DBGP - Debug Port table 762 * Version 1 763 * 764 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 765 * 766 ******************************************************************************/ 767 768 struct acpi_table_dbgp { 769 struct acpi_table_header header; /* Common ACPI table header */ 770 u8 type; /* 0=full 16550, 1=subset of 16550 */ 771 u8 reserved[3]; 772 struct acpi_generic_address debug_port; 773 }; 774 775 /******************************************************************************* 776 * 777 * DMAR - DMA Remapping table 778 * Version 1 779 * 780 * Conforms to "Intel Virtualization Technology for Directed I/O", 781 * Version 2.3, October 2014 782 * 783 ******************************************************************************/ 784 785 struct acpi_table_dmar { 786 struct acpi_table_header header; /* Common ACPI table header */ 787 u8 width; /* Host Address Width */ 788 u8 flags; 789 u8 reserved[10]; 790 }; 791 792 /* Masks for Flags field above */ 793 794 #define ACPI_DMAR_INTR_REMAP (1) 795 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 796 #define ACPI_DMAR_X2APIC_MODE (1<<2) 797 798 /* DMAR subtable header */ 799 800 struct acpi_dmar_header { 801 u16 type; 802 u16 length; 803 }; 804 805 /* Values for subtable type in struct acpi_dmar_header */ 806 807 enum acpi_dmar_type { 808 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 809 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 810 ACPI_DMAR_TYPE_ROOT_ATS = 2, 811 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 812 ACPI_DMAR_TYPE_NAMESPACE = 4, 813 ACPI_DMAR_TYPE_SATC = 5, 814 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 815 }; 816 817 /* DMAR Device Scope structure */ 818 819 struct acpi_dmar_device_scope { 820 u8 entry_type; 821 u8 length; 822 u16 reserved; 823 u8 enumeration_id; 824 u8 bus; 825 }; 826 827 /* Values for entry_type in struct acpi_dmar_device_scope - device types */ 828 829 enum acpi_dmar_scope_type { 830 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 831 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 832 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 833 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 834 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 835 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 836 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 837 }; 838 839 struct acpi_dmar_pci_path { 840 u8 device; 841 u8 function; 842 }; 843 844 /* 845 * DMAR Subtables, correspond to Type in struct acpi_dmar_header 846 */ 847 848 /* 0: Hardware Unit Definition */ 849 850 struct acpi_dmar_hardware_unit { 851 struct acpi_dmar_header header; 852 u8 flags; 853 u8 size; /* Size of the register set */ 854 u16 segment; 855 u64 address; /* Register Base Address */ 856 }; 857 858 /* Masks for Flags field above */ 859 860 #define ACPI_DMAR_INCLUDE_ALL (1) 861 862 /* 1: Reserved Memory Definition */ 863 864 struct acpi_dmar_reserved_memory { 865 struct acpi_dmar_header header; 866 u16 reserved; 867 u16 segment; 868 u64 base_address; /* 4K aligned base address */ 869 u64 end_address; /* 4K aligned limit address */ 870 }; 871 872 /* Masks for Flags field above */ 873 874 #define ACPI_DMAR_ALLOW_ALL (1) 875 876 /* 2: Root Port ATS Capability Reporting Structure */ 877 878 struct acpi_dmar_atsr { 879 struct acpi_dmar_header header; 880 u8 flags; 881 u8 reserved; 882 u16 segment; 883 }; 884 885 /* Masks for Flags field above */ 886 887 #define ACPI_DMAR_ALL_PORTS (1) 888 889 /* 3: Remapping Hardware Static Affinity Structure */ 890 891 struct acpi_dmar_rhsa { 892 struct acpi_dmar_header header; 893 u32 reserved; 894 u64 base_address; 895 u32 proximity_domain; 896 }; 897 898 /* 4: ACPI Namespace Device Declaration Structure */ 899 900 struct acpi_dmar_andd { 901 struct acpi_dmar_header header; 902 u8 reserved[3]; 903 u8 device_number; 904 union { 905 char __pad; 906 ACPI_FLEX_ARRAY(char, device_name); 907 }; 908 }; 909 910 /* 5: SOC Integrated Address Translation Cache Reporting Structure */ 911 912 struct acpi_dmar_satc { 913 struct acpi_dmar_header header; 914 u8 flags; 915 u8 reserved; 916 u16 segment; 917 }; 918 /******************************************************************************* 919 * 920 * DRTM - Dynamic Root of Trust for Measurement table 921 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 922 * Table version 1 923 * 924 ******************************************************************************/ 925 926 struct acpi_table_drtm { 927 struct acpi_table_header header; /* Common ACPI table header */ 928 u64 entry_base_address; 929 u64 entry_length; 930 u32 entry_address32; 931 u64 entry_address64; 932 u64 exit_address; 933 u64 log_area_address; 934 u32 log_area_length; 935 u64 arch_dependent_address; 936 u32 flags; 937 }; 938 939 /* Flag Definitions for above */ 940 941 #define ACPI_DRTM_ACCESS_ALLOWED (1) 942 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 943 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 944 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 945 946 /* 1) Validated Tables List (64-bit addresses) */ 947 948 struct acpi_drtm_vtable_list { 949 u32 validated_table_count; 950 u64 validated_tables[]; 951 }; 952 953 /* 2) Resources List (of Resource Descriptors) */ 954 955 /* Resource Descriptor */ 956 957 struct acpi_drtm_resource { 958 u8 size[7]; 959 u8 type; 960 u64 address; 961 }; 962 963 struct acpi_drtm_resource_list { 964 u32 resource_count; 965 struct acpi_drtm_resource resources[]; 966 }; 967 968 /* 3) Platform-specific Identifiers List */ 969 970 struct acpi_drtm_dps_id { 971 u32 dps_id_length; 972 u8 dps_id[16]; 973 }; 974 975 /******************************************************************************* 976 * 977 * ECDT - Embedded Controller Boot Resources Table 978 * Version 1 979 * 980 ******************************************************************************/ 981 982 struct acpi_table_ecdt { 983 struct acpi_table_header header; /* Common ACPI table header */ 984 struct acpi_generic_address control; /* Address of EC command/status register */ 985 struct acpi_generic_address data; /* Address of EC data register */ 986 u32 uid; /* Unique ID - must be same as the EC _UID method */ 987 u8 gpe; /* The GPE for the EC */ 988 u8 id[]; /* Full namepath of the EC in the ACPI namespace */ 989 }; 990 991 /******************************************************************************* 992 * 993 * EINJ - Error Injection Table (ACPI 4.0) 994 * Version 1 995 * 996 ******************************************************************************/ 997 998 struct acpi_table_einj { 999 struct acpi_table_header header; /* Common ACPI table header */ 1000 u32 header_length; 1001 u8 flags; 1002 u8 reserved[3]; 1003 u32 entries; 1004 }; 1005 1006 /* EINJ Injection Instruction Entries (actions) */ 1007 1008 struct acpi_einj_entry { 1009 struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 1010 }; 1011 1012 /* Masks for Flags field above */ 1013 1014 #define ACPI_EINJ_PRESERVE (1) 1015 1016 /* Values for Action field above */ 1017 1018 enum acpi_einj_actions { 1019 ACPI_EINJ_BEGIN_OPERATION = 0, 1020 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 1021 ACPI_EINJ_SET_ERROR_TYPE = 2, 1022 ACPI_EINJ_GET_ERROR_TYPE = 3, 1023 ACPI_EINJ_END_OPERATION = 4, 1024 ACPI_EINJ_EXECUTE_OPERATION = 5, 1025 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 1026 ACPI_EINJ_GET_COMMAND_STATUS = 7, 1027 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 1028 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 1029 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 1030 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1031 }; 1032 1033 /* Values for Instruction field above */ 1034 1035 enum acpi_einj_instructions { 1036 ACPI_EINJ_READ_REGISTER = 0, 1037 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1038 ACPI_EINJ_WRITE_REGISTER = 2, 1039 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1040 ACPI_EINJ_NOOP = 4, 1041 ACPI_EINJ_FLUSH_CACHELINE = 5, 1042 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1043 }; 1044 1045 struct acpi_einj_error_type_with_addr { 1046 u32 error_type; 1047 u32 vendor_struct_offset; 1048 u32 flags; 1049 u32 apic_id; 1050 u64 address; 1051 u64 range; 1052 u32 pcie_id; 1053 }; 1054 1055 struct acpi_einj_vendor { 1056 u32 length; 1057 u32 pcie_id; 1058 u16 vendor_id; 1059 u16 device_id; 1060 u8 revision_id; 1061 u8 reserved[3]; 1062 }; 1063 1064 /* EINJ Trigger Error Action Table */ 1065 1066 struct acpi_einj_trigger { 1067 u32 header_size; 1068 u32 revision; 1069 u32 table_size; 1070 u32 entry_count; 1071 }; 1072 1073 /* Command status return values */ 1074 1075 enum acpi_einj_command_status { 1076 ACPI_EINJ_SUCCESS = 0, 1077 ACPI_EINJ_FAILURE = 1, 1078 ACPI_EINJ_INVALID_ACCESS = 2, 1079 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1080 }; 1081 1082 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1083 1084 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1085 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1086 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1087 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1088 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1089 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1090 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1091 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1092 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1093 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1094 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1095 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1096 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1097 1098 /******************************************************************************* 1099 * 1100 * ERST - Error Record Serialization Table (ACPI 4.0) 1101 * Version 1 1102 * 1103 ******************************************************************************/ 1104 1105 struct acpi_table_erst { 1106 struct acpi_table_header header; /* Common ACPI table header */ 1107 u32 header_length; 1108 u32 reserved; 1109 u32 entries; 1110 }; 1111 1112 /* ERST Serialization Entries (actions) */ 1113 1114 struct acpi_erst_entry { 1115 struct acpi_whea_header whea_header; /* Common header for WHEA tables */ 1116 }; 1117 1118 /* Masks for Flags field above */ 1119 1120 #define ACPI_ERST_PRESERVE (1) 1121 1122 /* Values for Action field above */ 1123 1124 enum acpi_erst_actions { 1125 ACPI_ERST_BEGIN_WRITE = 0, 1126 ACPI_ERST_BEGIN_READ = 1, 1127 ACPI_ERST_BEGIN_CLEAR = 2, 1128 ACPI_ERST_END = 3, 1129 ACPI_ERST_SET_RECORD_OFFSET = 4, 1130 ACPI_ERST_EXECUTE_OPERATION = 5, 1131 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1132 ACPI_ERST_GET_COMMAND_STATUS = 7, 1133 ACPI_ERST_GET_RECORD_ID = 8, 1134 ACPI_ERST_SET_RECORD_ID = 9, 1135 ACPI_ERST_GET_RECORD_COUNT = 10, 1136 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1137 ACPI_ERST_NOT_USED = 12, 1138 ACPI_ERST_GET_ERROR_RANGE = 13, 1139 ACPI_ERST_GET_ERROR_LENGTH = 14, 1140 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1141 ACPI_ERST_EXECUTE_TIMINGS = 16, 1142 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1143 }; 1144 1145 /* Values for Instruction field above */ 1146 1147 enum acpi_erst_instructions { 1148 ACPI_ERST_READ_REGISTER = 0, 1149 ACPI_ERST_READ_REGISTER_VALUE = 1, 1150 ACPI_ERST_WRITE_REGISTER = 2, 1151 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1152 ACPI_ERST_NOOP = 4, 1153 ACPI_ERST_LOAD_VAR1 = 5, 1154 ACPI_ERST_LOAD_VAR2 = 6, 1155 ACPI_ERST_STORE_VAR1 = 7, 1156 ACPI_ERST_ADD = 8, 1157 ACPI_ERST_SUBTRACT = 9, 1158 ACPI_ERST_ADD_VALUE = 10, 1159 ACPI_ERST_SUBTRACT_VALUE = 11, 1160 ACPI_ERST_STALL = 12, 1161 ACPI_ERST_STALL_WHILE_TRUE = 13, 1162 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1163 ACPI_ERST_GOTO = 15, 1164 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1165 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1166 ACPI_ERST_MOVE_DATA = 18, 1167 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1168 }; 1169 1170 /* Command status return values */ 1171 1172 enum acpi_erst_command_status { 1173 ACPI_ERST_SUCCESS = 0, 1174 ACPI_ERST_NO_SPACE = 1, 1175 ACPI_ERST_NOT_AVAILABLE = 2, 1176 ACPI_ERST_FAILURE = 3, 1177 ACPI_ERST_RECORD_EMPTY = 4, 1178 ACPI_ERST_NOT_FOUND = 5, 1179 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1180 }; 1181 1182 /* Error Record Serialization Information */ 1183 1184 struct acpi_erst_info { 1185 u16 signature; /* Should be "ER" */ 1186 u8 data[48]; 1187 }; 1188 1189 /******************************************************************************* 1190 * 1191 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1192 * Version 1 1193 * 1194 ******************************************************************************/ 1195 1196 struct acpi_table_fpdt { 1197 struct acpi_table_header header; /* Common ACPI table header */ 1198 }; 1199 1200 /* FPDT subtable header (Performance Record Structure) */ 1201 1202 struct acpi_fpdt_header { 1203 u16 type; 1204 u8 length; 1205 u8 revision; 1206 }; 1207 1208 /* Values for Type field above */ 1209 1210 enum acpi_fpdt_type { 1211 ACPI_FPDT_TYPE_BOOT = 0, 1212 ACPI_FPDT_TYPE_S3PERF = 1 1213 }; 1214 1215 /* 1216 * FPDT subtables 1217 */ 1218 1219 /* 0: Firmware Basic Boot Performance Record */ 1220 1221 struct acpi_fpdt_boot_pointer { 1222 struct acpi_fpdt_header header; 1223 u8 reserved[4]; 1224 u64 address; 1225 }; 1226 1227 /* 1: S3 Performance Table Pointer Record */ 1228 1229 struct acpi_fpdt_s3pt_pointer { 1230 struct acpi_fpdt_header header; 1231 u8 reserved[4]; 1232 u64 address; 1233 }; 1234 1235 /* 1236 * S3PT - S3 Performance Table. This table is pointed to by the 1237 * S3 Pointer Record above. 1238 */ 1239 struct acpi_table_s3pt { 1240 u8 signature[4]; /* "S3PT" */ 1241 u32 length; 1242 }; 1243 1244 /* 1245 * S3PT Subtables (Not part of the actual FPDT) 1246 */ 1247 1248 /* Values for Type field in S3PT header */ 1249 1250 enum acpi_s3pt_type { 1251 ACPI_S3PT_TYPE_RESUME = 0, 1252 ACPI_S3PT_TYPE_SUSPEND = 1, 1253 ACPI_FPDT_BOOT_PERFORMANCE = 2 1254 }; 1255 1256 struct acpi_s3pt_resume { 1257 struct acpi_fpdt_header header; 1258 u32 resume_count; 1259 u64 full_resume; 1260 u64 average_resume; 1261 }; 1262 1263 struct acpi_s3pt_suspend { 1264 struct acpi_fpdt_header header; 1265 u64 suspend_start; 1266 u64 suspend_end; 1267 }; 1268 1269 /* 1270 * FPDT Boot Performance Record (Not part of the actual FPDT) 1271 */ 1272 struct acpi_fpdt_boot { 1273 struct acpi_fpdt_header header; 1274 u8 reserved[4]; 1275 u64 reset_end; 1276 u64 load_start; 1277 u64 startup_start; 1278 u64 exit_services_entry; 1279 u64 exit_services_exit; 1280 }; 1281 1282 /******************************************************************************* 1283 * 1284 * GTDT - Generic Timer Description Table (ACPI 5.1) 1285 * Version 2 1286 * 1287 ******************************************************************************/ 1288 1289 struct acpi_table_gtdt { 1290 struct acpi_table_header header; /* Common ACPI table header */ 1291 u64 counter_block_addresss; 1292 u32 reserved; 1293 u32 secure_el1_interrupt; 1294 u32 secure_el1_flags; 1295 u32 non_secure_el1_interrupt; 1296 u32 non_secure_el1_flags; 1297 u32 virtual_timer_interrupt; 1298 u32 virtual_timer_flags; 1299 u32 non_secure_el2_interrupt; 1300 u32 non_secure_el2_flags; 1301 u64 counter_read_block_address; 1302 u32 platform_timer_count; 1303 u32 platform_timer_offset; 1304 }; 1305 1306 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1307 1308 #define ACPI_GTDT_INTERRUPT_MODE (1) 1309 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1310 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1311 1312 struct acpi_gtdt_el2 { 1313 u32 virtual_el2_timer_gsiv; 1314 u32 virtual_el2_timer_flags; 1315 }; 1316 1317 /* Common GTDT subtable header */ 1318 1319 struct acpi_gtdt_header { 1320 u8 type; 1321 u16 length; 1322 }; 1323 1324 /* Values for GTDT subtable type above */ 1325 1326 enum acpi_gtdt_type { 1327 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1328 ACPI_GTDT_TYPE_WATCHDOG = 1, 1329 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1330 }; 1331 1332 /* GTDT Subtables, correspond to Type in struct acpi_gtdt_header */ 1333 1334 /* 0: Generic Timer Block */ 1335 1336 struct acpi_gtdt_timer_block { 1337 struct acpi_gtdt_header header; 1338 u8 reserved; 1339 u64 block_address; 1340 u32 timer_count; 1341 u32 timer_offset; 1342 }; 1343 1344 /* Timer Sub-Structure, one per timer */ 1345 1346 struct acpi_gtdt_timer_entry { 1347 u8 frame_number; 1348 u8 reserved[3]; 1349 u64 base_address; 1350 u64 el0_base_address; 1351 u32 timer_interrupt; 1352 u32 timer_flags; 1353 u32 virtual_timer_interrupt; 1354 u32 virtual_timer_flags; 1355 u32 common_flags; 1356 }; 1357 1358 /* Flag Definitions: timer_flags and virtual_timer_flags above */ 1359 1360 #define ACPI_GTDT_GT_IRQ_MODE (1) 1361 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1362 1363 /* Flag Definitions: common_flags above */ 1364 1365 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1366 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1367 1368 /* 1: SBSA Generic Watchdog Structure */ 1369 1370 struct acpi_gtdt_watchdog { 1371 struct acpi_gtdt_header header; 1372 u8 reserved; 1373 u64 refresh_frame_address; 1374 u64 control_frame_address; 1375 u32 timer_interrupt; 1376 u32 timer_flags; 1377 }; 1378 1379 /* Flag Definitions: timer_flags above */ 1380 1381 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1382 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1383 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1384 1385 /******************************************************************************* 1386 * 1387 * HEST - Hardware Error Source Table (ACPI 4.0) 1388 * Version 1 1389 * 1390 ******************************************************************************/ 1391 1392 struct acpi_table_hest { 1393 struct acpi_table_header header; /* Common ACPI table header */ 1394 u32 error_source_count; 1395 }; 1396 1397 /* HEST subtable header */ 1398 1399 struct acpi_hest_header { 1400 u16 type; 1401 u16 source_id; 1402 }; 1403 1404 /* Values for Type field above for subtables */ 1405 1406 enum acpi_hest_types { 1407 ACPI_HEST_TYPE_IA32_CHECK = 0, 1408 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1409 ACPI_HEST_TYPE_IA32_NMI = 2, 1410 ACPI_HEST_TYPE_NOT_USED3 = 3, 1411 ACPI_HEST_TYPE_NOT_USED4 = 4, 1412 ACPI_HEST_TYPE_NOT_USED5 = 5, 1413 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1414 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1415 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1416 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1417 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1418 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1419 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1420 }; 1421 1422 /* 1423 * HEST substructures contained in subtables 1424 */ 1425 1426 /* 1427 * IA32 Error Bank(s) - Follows the struct acpi_hest_ia_machine_check and 1428 * struct acpi_hest_ia_corrected structures. 1429 */ 1430 struct acpi_hest_ia_error_bank { 1431 u8 bank_number; 1432 u8 clear_status_on_init; 1433 u8 status_format; 1434 u8 reserved; 1435 u32 control_register; 1436 u64 control_data; 1437 u32 status_register; 1438 u32 address_register; 1439 u32 misc_register; 1440 }; 1441 1442 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1443 1444 struct acpi_hest_aer_common { 1445 u16 reserved1; 1446 u8 flags; 1447 u8 enabled; 1448 u32 records_to_preallocate; 1449 u32 max_sections_per_record; 1450 u32 bus; /* Bus and Segment numbers */ 1451 u16 device; 1452 u16 function; 1453 u16 device_control; 1454 u16 reserved2; 1455 u32 uncorrectable_mask; 1456 u32 uncorrectable_severity; 1457 u32 correctable_mask; 1458 u32 advanced_capabilities; 1459 }; 1460 1461 /* Masks for HEST Flags fields */ 1462 1463 #define ACPI_HEST_FIRMWARE_FIRST (1) 1464 #define ACPI_HEST_GLOBAL (1<<1) 1465 #define ACPI_HEST_GHES_ASSIST (1<<2) 1466 1467 /* 1468 * Macros to access the bus/segment numbers in Bus field above: 1469 * Bus number is encoded in bits 7:0 1470 * Segment number is encoded in bits 23:8 1471 */ 1472 #define ACPI_HEST_BUS(bus) ((bus) & 0xFF) 1473 #define ACPI_HEST_SEGMENT(bus) (((bus) >> 8) & 0xFFFF) 1474 1475 /* Hardware Error Notification */ 1476 1477 struct acpi_hest_notify { 1478 u8 type; 1479 u8 length; 1480 u16 config_write_enable; 1481 u32 poll_interval; 1482 u32 vector; 1483 u32 polling_threshold_value; 1484 u32 polling_threshold_window; 1485 u32 error_threshold_value; 1486 u32 error_threshold_window; 1487 }; 1488 1489 /* Values for Notify Type field above */ 1490 1491 enum acpi_hest_notify_types { 1492 ACPI_HEST_NOTIFY_POLLED = 0, 1493 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1494 ACPI_HEST_NOTIFY_LOCAL = 2, 1495 ACPI_HEST_NOTIFY_SCI = 3, 1496 ACPI_HEST_NOTIFY_NMI = 4, 1497 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1498 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1499 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1500 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1501 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1502 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1503 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1504 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1505 }; 1506 1507 /* Values for config_write_enable bitfield above */ 1508 1509 #define ACPI_HEST_TYPE (1) 1510 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1511 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1512 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1513 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1514 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1515 1516 /* 1517 * HEST subtables 1518 */ 1519 1520 /* 0: IA32 Machine Check Exception */ 1521 1522 struct acpi_hest_ia_machine_check { 1523 struct acpi_hest_header header; 1524 u16 reserved1; 1525 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1526 u8 enabled; 1527 u32 records_to_preallocate; 1528 u32 max_sections_per_record; 1529 u64 global_capability_data; 1530 u64 global_control_data; 1531 u8 num_hardware_banks; 1532 u8 reserved3[7]; 1533 }; 1534 1535 /* 1: IA32 Corrected Machine Check */ 1536 1537 struct acpi_hest_ia_corrected { 1538 struct acpi_hest_header header; 1539 u16 reserved1; 1540 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1541 u8 enabled; 1542 u32 records_to_preallocate; 1543 u32 max_sections_per_record; 1544 struct acpi_hest_notify notify; 1545 u8 num_hardware_banks; 1546 u8 reserved2[3]; 1547 }; 1548 1549 /* 2: IA32 Non-Maskable Interrupt */ 1550 1551 struct acpi_hest_ia_nmi { 1552 struct acpi_hest_header header; 1553 u32 reserved; 1554 u32 records_to_preallocate; 1555 u32 max_sections_per_record; 1556 u32 max_raw_data_length; 1557 }; 1558 1559 /* 3,4,5: Not used */ 1560 1561 /* 6: PCI Express Root Port AER */ 1562 1563 struct acpi_hest_aer_root { 1564 struct acpi_hest_header header; 1565 struct acpi_hest_aer_common aer; 1566 u32 root_error_command; 1567 }; 1568 1569 /* 7: PCI Express AER (AER Endpoint) */ 1570 1571 struct acpi_hest_aer { 1572 struct acpi_hest_header header; 1573 struct acpi_hest_aer_common aer; 1574 }; 1575 1576 /* 8: PCI Express/PCI-X Bridge AER */ 1577 1578 struct acpi_hest_aer_bridge { 1579 struct acpi_hest_header header; 1580 struct acpi_hest_aer_common aer; 1581 u32 uncorrectable_mask2; 1582 u32 uncorrectable_severity2; 1583 u32 advanced_capabilities2; 1584 }; 1585 1586 /* 9: Generic Hardware Error Source */ 1587 1588 struct acpi_hest_generic { 1589 struct acpi_hest_header header; 1590 u16 related_source_id; 1591 u8 reserved; 1592 u8 enabled; 1593 u32 records_to_preallocate; 1594 u32 max_sections_per_record; 1595 u32 max_raw_data_length; 1596 struct acpi_generic_address error_status_address; 1597 struct acpi_hest_notify notify; 1598 u32 error_block_length; 1599 }; 1600 1601 /* 10: Generic Hardware Error Source, version 2 */ 1602 1603 struct acpi_hest_generic_v2 { 1604 struct acpi_hest_header header; 1605 u16 related_source_id; 1606 u8 reserved; 1607 u8 enabled; 1608 u32 records_to_preallocate; 1609 u32 max_sections_per_record; 1610 u32 max_raw_data_length; 1611 struct acpi_generic_address error_status_address; 1612 struct acpi_hest_notify notify; 1613 u32 error_block_length; 1614 struct acpi_generic_address read_ack_register; 1615 u64 read_ack_preserve; 1616 u64 read_ack_write; 1617 }; 1618 1619 /* Generic Error Status block */ 1620 1621 struct acpi_hest_generic_status { 1622 u32 block_status; 1623 u32 raw_data_offset; 1624 u32 raw_data_length; 1625 u32 data_length; 1626 u32 error_severity; 1627 }; 1628 1629 /* Values for block_status flags above */ 1630 1631 #define ACPI_HEST_UNCORRECTABLE (1) 1632 #define ACPI_HEST_CORRECTABLE (1<<1) 1633 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 1634 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 1635 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 1636 1637 /* Generic Error Data entry */ 1638 1639 struct acpi_hest_generic_data { 1640 u8 section_type[16]; 1641 u32 error_severity; 1642 u16 revision; 1643 u8 validation_bits; 1644 u8 flags; 1645 u32 error_data_length; 1646 u8 fru_id[16]; 1647 u8 fru_text[20]; 1648 }; 1649 1650 /* Extension for revision 0x0300 */ 1651 1652 struct acpi_hest_generic_data_v300 { 1653 u8 section_type[16]; 1654 u32 error_severity; 1655 u16 revision; 1656 u8 validation_bits; 1657 u8 flags; 1658 u32 error_data_length; 1659 u8 fru_id[16]; 1660 u8 fru_text[20]; 1661 u64 time_stamp; 1662 }; 1663 1664 /* Values for error_severity above */ 1665 1666 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 1667 #define ACPI_HEST_GEN_ERROR_FATAL 1 1668 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 1669 #define ACPI_HEST_GEN_ERROR_NONE 3 1670 1671 /* Flags for validation_bits above */ 1672 1673 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 1674 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 1675 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 1676 1677 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 1678 1679 struct acpi_hest_ia_deferred_check { 1680 struct acpi_hest_header header; 1681 u16 reserved1; 1682 u8 flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1683 u8 enabled; 1684 u32 records_to_preallocate; 1685 u32 max_sections_per_record; 1686 struct acpi_hest_notify notify; 1687 u8 num_hardware_banks; 1688 u8 reserved2[3]; 1689 }; 1690 1691 /******************************************************************************* 1692 * 1693 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2) 1694 * Version 1 1695 * 1696 ******************************************************************************/ 1697 1698 struct acpi_table_hmat { 1699 struct acpi_table_header header; /* Common ACPI table header */ 1700 u32 reserved; 1701 }; 1702 1703 /* Values for HMAT structure types */ 1704 1705 enum acpi_hmat_type { 1706 ACPI_HMAT_TYPE_PROXIMITY = 0, /* Memory proximity domain attributes */ 1707 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 1708 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 1709 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 1710 }; 1711 1712 struct acpi_hmat_structure { 1713 u16 type; 1714 u16 reserved; 1715 u32 length; 1716 }; 1717 1718 /* 1719 * HMAT Structures, correspond to Type in struct acpi_hmat_structure 1720 */ 1721 1722 /* 0: Memory proximity domain attributes */ 1723 1724 struct acpi_hmat_proximity_domain { 1725 struct acpi_hmat_structure header; 1726 u16 flags; 1727 u16 reserved1; 1728 u32 processor_PD; /* Processor proximity domain */ 1729 u32 memory_PD; /* Memory proximity domain */ 1730 u32 reserved2; 1731 u64 reserved3; 1732 u64 reserved4; 1733 }; 1734 1735 /* Masks for Flags field above */ 1736 1737 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: processor_PD field is valid */ 1738 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: memory_PD field is valid */ 1739 #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */ 1740 1741 /* 1: System locality latency and bandwidth information */ 1742 1743 struct acpi_hmat_locality { 1744 struct acpi_hmat_structure header; 1745 u8 flags; 1746 u8 data_type; 1747 u8 min_transfer_size; 1748 u8 reserved1; 1749 u32 number_of_initiator_Pds; 1750 u32 number_of_target_Pds; 1751 u32 reserved2; 1752 u64 entry_base_unit; 1753 }; 1754 1755 /* Masks for Flags field above */ 1756 1757 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 1758 1759 /* Values for Memory Hierarchy flags */ 1760 1761 #define ACPI_HMAT_MEMORY 0 1762 #define ACPI_HMAT_LAST_LEVEL_CACHE 1 1763 #define ACPI_HMAT_1ST_LEVEL_CACHE 2 1764 #define ACPI_HMAT_2ND_LEVEL_CACHE 3 1765 #define ACPI_HMAT_3RD_LEVEL_CACHE 4 1766 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 1767 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 1768 1769 1770 /* Values for data_type field above */ 1771 1772 #define ACPI_HMAT_ACCESS_LATENCY 0 1773 #define ACPI_HMAT_READ_LATENCY 1 1774 #define ACPI_HMAT_WRITE_LATENCY 2 1775 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 1776 #define ACPI_HMAT_READ_BANDWIDTH 4 1777 #define ACPI_HMAT_WRITE_BANDWIDTH 5 1778 1779 /* 2: Memory side cache information */ 1780 1781 struct acpi_hmat_cache { 1782 struct acpi_hmat_structure header; 1783 u32 memory_PD; 1784 u32 reserved1; 1785 u64 cache_size; 1786 u32 cache_attributes; 1787 u16 reserved2; 1788 u16 number_of_SMBIOShandles; 1789 }; 1790 1791 /* Masks for cache_attributes field above */ 1792 1793 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 1794 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 1795 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 1796 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 1797 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 1798 1799 /* Values for cache associativity flag */ 1800 1801 #define ACPI_HMAT_CA_NONE (0) 1802 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 1803 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 1804 1805 /* Values for write policy flag */ 1806 1807 #define ACPI_HMAT_CP_NONE (0) 1808 #define ACPI_HMAT_CP_WB (1) 1809 #define ACPI_HMAT_CP_WT (2) 1810 1811 /******************************************************************************* 1812 * 1813 * HPET - High Precision Event Timer table 1814 * Version 1 1815 * 1816 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 1817 * Version 1.0a, October 2004 1818 * 1819 ******************************************************************************/ 1820 1821 struct acpi_table_hpet { 1822 struct acpi_table_header header; /* Common ACPI table header */ 1823 u32 id; /* Hardware ID of event timer block */ 1824 struct acpi_generic_address address; /* Address of event timer block */ 1825 u8 sequence; /* HPET sequence number */ 1826 u16 minimum_tick; /* Main counter min tick, periodic mode */ 1827 u8 flags; 1828 }; 1829 1830 /* Masks for Flags field above */ 1831 1832 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 1833 1834 /* Values for Page Protect flags */ 1835 1836 enum acpi_hpet_page_protect { 1837 ACPI_HPET_NO_PAGE_PROTECT = 0, 1838 ACPI_HPET_PAGE_PROTECT4 = 1, 1839 ACPI_HPET_PAGE_PROTECT64 = 2 1840 }; 1841 1842 /******************************************************************************* 1843 * 1844 * IBFT - Boot Firmware Table 1845 * Version 1 1846 * 1847 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 1848 * Specification", Version 1.01, March 1, 2007 1849 * 1850 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 1851 * Therefore, it is not currently supported by the disassembler. 1852 * 1853 ******************************************************************************/ 1854 1855 struct acpi_table_ibft { 1856 struct acpi_table_header header; /* Common ACPI table header */ 1857 u8 reserved[12]; 1858 }; 1859 1860 /* IBFT common subtable header */ 1861 1862 struct acpi_ibft_header { 1863 u8 type; 1864 u8 version; 1865 u16 length; 1866 u8 index; 1867 u8 flags; 1868 }; 1869 1870 /* Values for Type field above */ 1871 1872 enum acpi_ibft_type { 1873 ACPI_IBFT_TYPE_NOT_USED = 0, 1874 ACPI_IBFT_TYPE_CONTROL = 1, 1875 ACPI_IBFT_TYPE_INITIATOR = 2, 1876 ACPI_IBFT_TYPE_NIC = 3, 1877 ACPI_IBFT_TYPE_TARGET = 4, 1878 ACPI_IBFT_TYPE_EXTENSIONS = 5, 1879 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1880 }; 1881 1882 /* IBFT subtables */ 1883 1884 struct acpi_ibft_control { 1885 struct acpi_ibft_header header; 1886 u16 extensions; 1887 u16 initiator_offset; 1888 u16 nic0_offset; 1889 u16 target0_offset; 1890 u16 nic1_offset; 1891 u16 target1_offset; 1892 }; 1893 1894 struct acpi_ibft_initiator { 1895 struct acpi_ibft_header header; 1896 u8 sns_server[16]; 1897 u8 slp_server[16]; 1898 u8 primary_server[16]; 1899 u8 secondary_server[16]; 1900 u16 name_length; 1901 u16 name_offset; 1902 }; 1903 1904 struct acpi_ibft_nic { 1905 struct acpi_ibft_header header; 1906 u8 ip_address[16]; 1907 u8 subnet_mask_prefix; 1908 u8 origin; 1909 u8 gateway[16]; 1910 u8 primary_dns[16]; 1911 u8 secondary_dns[16]; 1912 u8 dhcp[16]; 1913 u16 vlan; 1914 u8 mac_address[6]; 1915 u16 pci_address; 1916 u16 name_length; 1917 u16 name_offset; 1918 }; 1919 1920 struct acpi_ibft_target { 1921 struct acpi_ibft_header header; 1922 u8 target_ip_address[16]; 1923 u16 target_ip_socket; 1924 u8 target_boot_lun[8]; 1925 u8 chap_type; 1926 u8 nic_association; 1927 u16 target_name_length; 1928 u16 target_name_offset; 1929 u16 chap_name_length; 1930 u16 chap_name_offset; 1931 u16 chap_secret_length; 1932 u16 chap_secret_offset; 1933 u16 reverse_chap_name_length; 1934 u16 reverse_chap_name_offset; 1935 u16 reverse_chap_secret_length; 1936 u16 reverse_chap_secret_offset; 1937 }; 1938 1939 /* Reset to default packing */ 1940 1941 #pragma pack() 1942 1943 #endif /* __ACTBL1_H__ */ 1944