1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Xen event channels 4 * 5 * Xen models interrupts with abstract event channels. Because each 6 * domain gets 1024 event channels, but NR_IRQ is not that large, we 7 * must dynamically map irqs<->event channels. The event channels 8 * interface with the rest of the kernel by defining a xen interrupt 9 * chip. When an event is received, it is mapped to an irq and sent 10 * through the normal interrupt processing path. 11 * 12 * There are four kinds of events which can be mapped to an event 13 * channel: 14 * 15 * 1. Inter-domain notifications. This includes all the virtual 16 * device events, since they're driven by front-ends in another domain 17 * (typically dom0). 18 * 2. VIRQs, typically used for timers. These are per-cpu events. 19 * 3. IPIs. 20 * 4. PIRQs - Hardware interrupts. 21 * 22 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 23 */ 24 25 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt 26 27 #include <linux/linkage.h> 28 #include <linux/interrupt.h> 29 #include <linux/irq.h> 30 #include <linux/moduleparam.h> 31 #include <linux/string.h> 32 #include <linux/memblock.h> 33 #include <linux/slab.h> 34 #include <linux/irqnr.h> 35 #include <linux/pci.h> 36 #include <linux/spinlock.h> 37 #include <linux/cpuhotplug.h> 38 #include <linux/atomic.h> 39 #include <linux/ktime.h> 40 41 #ifdef CONFIG_X86 42 #include <asm/desc.h> 43 #include <asm/ptrace.h> 44 #include <asm/idtentry.h> 45 #include <asm/irq.h> 46 #include <asm/io_apic.h> 47 #include <asm/i8259.h> 48 #include <asm/xen/pci.h> 49 #endif 50 #include <asm/sync_bitops.h> 51 #include <asm/xen/hypercall.h> 52 #include <asm/xen/hypervisor.h> 53 #include <xen/page.h> 54 55 #include <xen/xen.h> 56 #include <xen/hvm.h> 57 #include <xen/xen-ops.h> 58 #include <xen/events.h> 59 #include <xen/interface/xen.h> 60 #include <xen/interface/event_channel.h> 61 #include <xen/interface/hvm/hvm_op.h> 62 #include <xen/interface/hvm/params.h> 63 #include <xen/interface/physdev.h> 64 #include <xen/interface/sched.h> 65 #include <xen/interface/vcpu.h> 66 #include <xen/xenbus.h> 67 #include <asm/hw_irq.h> 68 69 #include "events_internal.h" 70 71 #undef MODULE_PARAM_PREFIX 72 #define MODULE_PARAM_PREFIX "xen." 73 74 /* Interrupt types. */ 75 enum xen_irq_type { 76 IRQT_UNBOUND = 0, 77 IRQT_PIRQ, 78 IRQT_VIRQ, 79 IRQT_IPI, 80 IRQT_EVTCHN 81 }; 82 83 /* 84 * Packed IRQ information: 85 * type - enum xen_irq_type 86 * event channel - irq->event channel mapping 87 * cpu - cpu this event channel is bound to 88 * index - type-specific information: 89 * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM 90 * guest, or GSI (real passthrough IRQ) of the device. 91 * VIRQ - virq number 92 * IPI - IPI vector 93 * EVTCHN - 94 */ 95 struct irq_info { 96 struct list_head list; 97 struct list_head eoi_list; 98 short refcnt; 99 u8 spurious_cnt; 100 u8 is_accounted; 101 short type; /* type: IRQT_* */ 102 u8 mask_reason; /* Why is event channel masked */ 103 #define EVT_MASK_REASON_EXPLICIT 0x01 104 #define EVT_MASK_REASON_TEMPORARY 0x02 105 #define EVT_MASK_REASON_EOI_PENDING 0x04 106 u8 is_active; /* Is event just being handled? */ 107 unsigned irq; 108 evtchn_port_t evtchn; /* event channel */ 109 unsigned short cpu; /* cpu bound */ 110 unsigned short eoi_cpu; /* EOI must happen on this cpu-1 */ 111 unsigned int irq_epoch; /* If eoi_cpu valid: irq_epoch of event */ 112 u64 eoi_time; /* Time in jiffies when to EOI. */ 113 raw_spinlock_t lock; 114 115 union { 116 unsigned short virq; 117 enum ipi_vector ipi; 118 struct { 119 unsigned short pirq; 120 unsigned short gsi; 121 unsigned char vector; 122 unsigned char flags; 123 uint16_t domid; 124 } pirq; 125 struct xenbus_device *interdomain; 126 } u; 127 }; 128 129 #define PIRQ_NEEDS_EOI (1 << 0) 130 #define PIRQ_SHAREABLE (1 << 1) 131 #define PIRQ_MSI_GROUP (1 << 2) 132 133 static uint __read_mostly event_loop_timeout = 2; 134 module_param(event_loop_timeout, uint, 0644); 135 136 static uint __read_mostly event_eoi_delay = 10; 137 module_param(event_eoi_delay, uint, 0644); 138 139 const struct evtchn_ops *evtchn_ops; 140 141 /* 142 * This lock protects updates to the following mapping and reference-count 143 * arrays. The lock does not need to be acquired to read the mapping tables. 144 */ 145 static DEFINE_MUTEX(irq_mapping_update_lock); 146 147 /* 148 * Lock protecting event handling loop against removing event channels. 149 * Adding of event channels is no issue as the associated IRQ becomes active 150 * only after everything is setup (before request_[threaded_]irq() the handler 151 * can't be entered for an event, as the event channel will be unmasked only 152 * then). 153 */ 154 static DEFINE_RWLOCK(evtchn_rwlock); 155 156 /* 157 * Lock hierarchy: 158 * 159 * irq_mapping_update_lock 160 * evtchn_rwlock 161 * IRQ-desc lock 162 * percpu eoi_list_lock 163 * irq_info->lock 164 */ 165 166 static LIST_HEAD(xen_irq_list_head); 167 168 /* IRQ <-> VIRQ mapping. */ 169 static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1}; 170 171 /* IRQ <-> IPI mapping */ 172 static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1}; 173 174 /* Event channel distribution data */ 175 static atomic_t channels_on_cpu[NR_CPUS]; 176 177 static int **evtchn_to_irq; 178 #ifdef CONFIG_X86 179 static unsigned long *pirq_eoi_map; 180 #endif 181 static bool (*pirq_needs_eoi)(unsigned irq); 182 183 #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq))) 184 #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq))) 185 #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq)) 186 187 /* Xen will never allocate port zero for any purpose. */ 188 #define VALID_EVTCHN(chn) ((chn) != 0) 189 190 static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY]; 191 192 static struct irq_chip xen_dynamic_chip; 193 static struct irq_chip xen_lateeoi_chip; 194 static struct irq_chip xen_percpu_chip; 195 static struct irq_chip xen_pirq_chip; 196 static void enable_dynirq(struct irq_data *data); 197 static void disable_dynirq(struct irq_data *data); 198 199 static DEFINE_PER_CPU(unsigned int, irq_epoch); 200 201 static void clear_evtchn_to_irq_row(unsigned row) 202 { 203 unsigned col; 204 205 for (col = 0; col < EVTCHN_PER_ROW; col++) 206 WRITE_ONCE(evtchn_to_irq[row][col], -1); 207 } 208 209 static void clear_evtchn_to_irq_all(void) 210 { 211 unsigned row; 212 213 for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) { 214 if (evtchn_to_irq[row] == NULL) 215 continue; 216 clear_evtchn_to_irq_row(row); 217 } 218 } 219 220 static int set_evtchn_to_irq(evtchn_port_t evtchn, unsigned int irq) 221 { 222 unsigned row; 223 unsigned col; 224 225 if (evtchn >= xen_evtchn_max_channels()) 226 return -EINVAL; 227 228 row = EVTCHN_ROW(evtchn); 229 col = EVTCHN_COL(evtchn); 230 231 if (evtchn_to_irq[row] == NULL) { 232 /* Unallocated irq entries return -1 anyway */ 233 if (irq == -1) 234 return 0; 235 236 evtchn_to_irq[row] = (int *)get_zeroed_page(GFP_KERNEL); 237 if (evtchn_to_irq[row] == NULL) 238 return -ENOMEM; 239 240 clear_evtchn_to_irq_row(row); 241 } 242 243 WRITE_ONCE(evtchn_to_irq[row][col], irq); 244 return 0; 245 } 246 247 int get_evtchn_to_irq(evtchn_port_t evtchn) 248 { 249 if (evtchn >= xen_evtchn_max_channels()) 250 return -1; 251 if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL) 252 return -1; 253 return READ_ONCE(evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)]); 254 } 255 256 /* Get info for IRQ */ 257 static struct irq_info *info_for_irq(unsigned irq) 258 { 259 if (irq < nr_legacy_irqs()) 260 return legacy_info_ptrs[irq]; 261 else 262 return irq_get_chip_data(irq); 263 } 264 265 static void set_info_for_irq(unsigned int irq, struct irq_info *info) 266 { 267 if (irq < nr_legacy_irqs()) 268 legacy_info_ptrs[irq] = info; 269 else 270 irq_set_chip_data(irq, info); 271 } 272 273 /* Per CPU channel accounting */ 274 static void channels_on_cpu_dec(struct irq_info *info) 275 { 276 if (!info->is_accounted) 277 return; 278 279 info->is_accounted = 0; 280 281 if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids)) 282 return; 283 284 WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], -1 , 0)); 285 } 286 287 static void channels_on_cpu_inc(struct irq_info *info) 288 { 289 if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids)) 290 return; 291 292 if (WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], 1, 293 INT_MAX))) 294 return; 295 296 info->is_accounted = 1; 297 } 298 299 /* Constructors for packed IRQ information. */ 300 static int xen_irq_info_common_setup(struct irq_info *info, 301 unsigned irq, 302 enum xen_irq_type type, 303 evtchn_port_t evtchn, 304 unsigned short cpu) 305 { 306 int ret; 307 308 BUG_ON(info->type != IRQT_UNBOUND && info->type != type); 309 310 info->type = type; 311 info->irq = irq; 312 info->evtchn = evtchn; 313 info->cpu = cpu; 314 info->mask_reason = EVT_MASK_REASON_EXPLICIT; 315 raw_spin_lock_init(&info->lock); 316 317 ret = set_evtchn_to_irq(evtchn, irq); 318 if (ret < 0) 319 return ret; 320 321 irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN); 322 323 return xen_evtchn_port_setup(evtchn); 324 } 325 326 static int xen_irq_info_evtchn_setup(unsigned irq, 327 evtchn_port_t evtchn, 328 struct xenbus_device *dev) 329 { 330 struct irq_info *info = info_for_irq(irq); 331 int ret; 332 333 ret = xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0); 334 info->u.interdomain = dev; 335 if (dev) 336 atomic_inc(&dev->event_channels); 337 338 return ret; 339 } 340 341 static int xen_irq_info_ipi_setup(unsigned cpu, 342 unsigned irq, 343 evtchn_port_t evtchn, 344 enum ipi_vector ipi) 345 { 346 struct irq_info *info = info_for_irq(irq); 347 348 info->u.ipi = ipi; 349 350 per_cpu(ipi_to_irq, cpu)[ipi] = irq; 351 352 return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0); 353 } 354 355 static int xen_irq_info_virq_setup(unsigned cpu, 356 unsigned irq, 357 evtchn_port_t evtchn, 358 unsigned virq) 359 { 360 struct irq_info *info = info_for_irq(irq); 361 362 info->u.virq = virq; 363 364 per_cpu(virq_to_irq, cpu)[virq] = irq; 365 366 return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0); 367 } 368 369 static int xen_irq_info_pirq_setup(unsigned irq, 370 evtchn_port_t evtchn, 371 unsigned pirq, 372 unsigned gsi, 373 uint16_t domid, 374 unsigned char flags) 375 { 376 struct irq_info *info = info_for_irq(irq); 377 378 info->u.pirq.pirq = pirq; 379 info->u.pirq.gsi = gsi; 380 info->u.pirq.domid = domid; 381 info->u.pirq.flags = flags; 382 383 return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0); 384 } 385 386 static void xen_irq_info_cleanup(struct irq_info *info) 387 { 388 set_evtchn_to_irq(info->evtchn, -1); 389 xen_evtchn_port_remove(info->evtchn, info->cpu); 390 info->evtchn = 0; 391 channels_on_cpu_dec(info); 392 } 393 394 /* 395 * Accessors for packed IRQ information. 396 */ 397 evtchn_port_t evtchn_from_irq(unsigned irq) 398 { 399 const struct irq_info *info = NULL; 400 401 if (likely(irq < nr_irqs)) 402 info = info_for_irq(irq); 403 if (!info) 404 return 0; 405 406 return info->evtchn; 407 } 408 409 unsigned int irq_from_evtchn(evtchn_port_t evtchn) 410 { 411 return get_evtchn_to_irq(evtchn); 412 } 413 EXPORT_SYMBOL_GPL(irq_from_evtchn); 414 415 int irq_from_virq(unsigned int cpu, unsigned int virq) 416 { 417 return per_cpu(virq_to_irq, cpu)[virq]; 418 } 419 420 static enum ipi_vector ipi_from_irq(unsigned irq) 421 { 422 struct irq_info *info = info_for_irq(irq); 423 424 BUG_ON(info == NULL); 425 BUG_ON(info->type != IRQT_IPI); 426 427 return info->u.ipi; 428 } 429 430 static unsigned virq_from_irq(unsigned irq) 431 { 432 struct irq_info *info = info_for_irq(irq); 433 434 BUG_ON(info == NULL); 435 BUG_ON(info->type != IRQT_VIRQ); 436 437 return info->u.virq; 438 } 439 440 static unsigned pirq_from_irq(unsigned irq) 441 { 442 struct irq_info *info = info_for_irq(irq); 443 444 BUG_ON(info == NULL); 445 BUG_ON(info->type != IRQT_PIRQ); 446 447 return info->u.pirq.pirq; 448 } 449 450 static enum xen_irq_type type_from_irq(unsigned irq) 451 { 452 return info_for_irq(irq)->type; 453 } 454 455 static unsigned cpu_from_irq(unsigned irq) 456 { 457 return info_for_irq(irq)->cpu; 458 } 459 460 unsigned int cpu_from_evtchn(evtchn_port_t evtchn) 461 { 462 int irq = get_evtchn_to_irq(evtchn); 463 unsigned ret = 0; 464 465 if (irq != -1) 466 ret = cpu_from_irq(irq); 467 468 return ret; 469 } 470 471 static void do_mask(struct irq_info *info, u8 reason) 472 { 473 unsigned long flags; 474 475 raw_spin_lock_irqsave(&info->lock, flags); 476 477 if (!info->mask_reason) 478 mask_evtchn(info->evtchn); 479 480 info->mask_reason |= reason; 481 482 raw_spin_unlock_irqrestore(&info->lock, flags); 483 } 484 485 static void do_unmask(struct irq_info *info, u8 reason) 486 { 487 unsigned long flags; 488 489 raw_spin_lock_irqsave(&info->lock, flags); 490 491 info->mask_reason &= ~reason; 492 493 if (!info->mask_reason) 494 unmask_evtchn(info->evtchn); 495 496 raw_spin_unlock_irqrestore(&info->lock, flags); 497 } 498 499 #ifdef CONFIG_X86 500 static bool pirq_check_eoi_map(unsigned irq) 501 { 502 return test_bit(pirq_from_irq(irq), pirq_eoi_map); 503 } 504 #endif 505 506 static bool pirq_needs_eoi_flag(unsigned irq) 507 { 508 struct irq_info *info = info_for_irq(irq); 509 BUG_ON(info->type != IRQT_PIRQ); 510 511 return info->u.pirq.flags & PIRQ_NEEDS_EOI; 512 } 513 514 static void bind_evtchn_to_cpu(evtchn_port_t evtchn, unsigned int cpu, 515 bool force_affinity) 516 { 517 int irq = get_evtchn_to_irq(evtchn); 518 struct irq_info *info = info_for_irq(irq); 519 520 BUG_ON(irq == -1); 521 522 if (IS_ENABLED(CONFIG_SMP) && force_affinity) { 523 cpumask_copy(irq_get_affinity_mask(irq), cpumask_of(cpu)); 524 cpumask_copy(irq_get_effective_affinity_mask(irq), 525 cpumask_of(cpu)); 526 } 527 528 xen_evtchn_port_bind_to_cpu(evtchn, cpu, info->cpu); 529 530 channels_on_cpu_dec(info); 531 info->cpu = cpu; 532 channels_on_cpu_inc(info); 533 } 534 535 /** 536 * notify_remote_via_irq - send event to remote end of event channel via irq 537 * @irq: irq of event channel to send event to 538 * 539 * Unlike notify_remote_via_evtchn(), this is safe to use across 540 * save/restore. Notifications on a broken connection are silently 541 * dropped. 542 */ 543 void notify_remote_via_irq(int irq) 544 { 545 evtchn_port_t evtchn = evtchn_from_irq(irq); 546 547 if (VALID_EVTCHN(evtchn)) 548 notify_remote_via_evtchn(evtchn); 549 } 550 EXPORT_SYMBOL_GPL(notify_remote_via_irq); 551 552 struct lateeoi_work { 553 struct delayed_work delayed; 554 spinlock_t eoi_list_lock; 555 struct list_head eoi_list; 556 }; 557 558 static DEFINE_PER_CPU(struct lateeoi_work, lateeoi); 559 560 static void lateeoi_list_del(struct irq_info *info) 561 { 562 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); 563 unsigned long flags; 564 565 spin_lock_irqsave(&eoi->eoi_list_lock, flags); 566 list_del_init(&info->eoi_list); 567 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags); 568 } 569 570 static void lateeoi_list_add(struct irq_info *info) 571 { 572 struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu); 573 struct irq_info *elem; 574 u64 now = get_jiffies_64(); 575 unsigned long delay; 576 unsigned long flags; 577 578 if (now < info->eoi_time) 579 delay = info->eoi_time - now; 580 else 581 delay = 1; 582 583 spin_lock_irqsave(&eoi->eoi_list_lock, flags); 584 585 if (list_empty(&eoi->eoi_list)) { 586 list_add(&info->eoi_list, &eoi->eoi_list); 587 mod_delayed_work_on(info->eoi_cpu, system_wq, 588 &eoi->delayed, delay); 589 } else { 590 list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) { 591 if (elem->eoi_time <= info->eoi_time) 592 break; 593 } 594 list_add(&info->eoi_list, &elem->eoi_list); 595 } 596 597 spin_unlock_irqrestore(&eoi->eoi_list_lock, flags); 598 } 599 600 static void xen_irq_lateeoi_locked(struct irq_info *info, bool spurious) 601 { 602 evtchn_port_t evtchn; 603 unsigned int cpu; 604 unsigned int delay = 0; 605 606 evtchn = info->evtchn; 607 if (!VALID_EVTCHN(evtchn) || !list_empty(&info->eoi_list)) 608 return; 609 610 if (spurious) { 611 struct xenbus_device *dev = info->u.interdomain; 612 unsigned int threshold = 1; 613 614 if (dev && dev->spurious_threshold) 615 threshold = dev->spurious_threshold; 616 617 if ((1 << info->spurious_cnt) < (HZ << 2)) { 618 if (info->spurious_cnt != 0xFF) 619 info->spurious_cnt++; 620 } 621 if (info->spurious_cnt > threshold) { 622 delay = 1 << (info->spurious_cnt - 1 - threshold); 623 if (delay > HZ) 624 delay = HZ; 625 if (!info->eoi_time) 626 info->eoi_cpu = smp_processor_id(); 627 info->eoi_time = get_jiffies_64() + delay; 628 if (dev) 629 atomic_add(delay, &dev->jiffies_eoi_delayed); 630 } 631 if (dev) 632 atomic_inc(&dev->spurious_events); 633 } else { 634 info->spurious_cnt = 0; 635 } 636 637 cpu = info->eoi_cpu; 638 if (info->eoi_time && 639 (info->irq_epoch == per_cpu(irq_epoch, cpu) || delay)) { 640 lateeoi_list_add(info); 641 return; 642 } 643 644 info->eoi_time = 0; 645 646 /* is_active hasn't been reset yet, do it now. */ 647 smp_store_release(&info->is_active, 0); 648 do_unmask(info, EVT_MASK_REASON_EOI_PENDING); 649 } 650 651 static void xen_irq_lateeoi_worker(struct work_struct *work) 652 { 653 struct lateeoi_work *eoi; 654 struct irq_info *info; 655 u64 now = get_jiffies_64(); 656 unsigned long flags; 657 658 eoi = container_of(to_delayed_work(work), struct lateeoi_work, delayed); 659 660 read_lock_irqsave(&evtchn_rwlock, flags); 661 662 while (true) { 663 spin_lock(&eoi->eoi_list_lock); 664 665 info = list_first_entry_or_null(&eoi->eoi_list, struct irq_info, 666 eoi_list); 667 668 if (info == NULL || now < info->eoi_time) { 669 spin_unlock(&eoi->eoi_list_lock); 670 break; 671 } 672 673 list_del_init(&info->eoi_list); 674 675 spin_unlock(&eoi->eoi_list_lock); 676 677 info->eoi_time = 0; 678 679 xen_irq_lateeoi_locked(info, false); 680 } 681 682 if (info) 683 mod_delayed_work_on(info->eoi_cpu, system_wq, 684 &eoi->delayed, info->eoi_time - now); 685 686 read_unlock_irqrestore(&evtchn_rwlock, flags); 687 } 688 689 static void xen_cpu_init_eoi(unsigned int cpu) 690 { 691 struct lateeoi_work *eoi = &per_cpu(lateeoi, cpu); 692 693 INIT_DELAYED_WORK(&eoi->delayed, xen_irq_lateeoi_worker); 694 spin_lock_init(&eoi->eoi_list_lock); 695 INIT_LIST_HEAD(&eoi->eoi_list); 696 } 697 698 void xen_irq_lateeoi(unsigned int irq, unsigned int eoi_flags) 699 { 700 struct irq_info *info; 701 unsigned long flags; 702 703 read_lock_irqsave(&evtchn_rwlock, flags); 704 705 info = info_for_irq(irq); 706 707 if (info) 708 xen_irq_lateeoi_locked(info, eoi_flags & XEN_EOI_FLAG_SPURIOUS); 709 710 read_unlock_irqrestore(&evtchn_rwlock, flags); 711 } 712 EXPORT_SYMBOL_GPL(xen_irq_lateeoi); 713 714 static void xen_irq_init(unsigned irq) 715 { 716 struct irq_info *info; 717 718 info = kzalloc(sizeof(*info), GFP_KERNEL); 719 if (info == NULL) 720 panic("Unable to allocate metadata for IRQ%d\n", irq); 721 722 info->type = IRQT_UNBOUND; 723 info->refcnt = -1; 724 725 set_info_for_irq(irq, info); 726 /* 727 * Interrupt affinity setting can be immediate. No point 728 * in delaying it until an interrupt is handled. 729 */ 730 irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); 731 732 INIT_LIST_HEAD(&info->eoi_list); 733 list_add_tail(&info->list, &xen_irq_list_head); 734 } 735 736 static int __must_check xen_allocate_irqs_dynamic(int nvec) 737 { 738 int i, irq = irq_alloc_descs(-1, 0, nvec, -1); 739 740 if (irq >= 0) { 741 for (i = 0; i < nvec; i++) 742 xen_irq_init(irq + i); 743 } 744 745 return irq; 746 } 747 748 static inline int __must_check xen_allocate_irq_dynamic(void) 749 { 750 751 return xen_allocate_irqs_dynamic(1); 752 } 753 754 static int __must_check xen_allocate_irq_gsi(unsigned gsi) 755 { 756 int irq; 757 758 /* 759 * A PV guest has no concept of a GSI (since it has no ACPI 760 * nor access to/knowledge of the physical APICs). Therefore 761 * all IRQs are dynamically allocated from the entire IRQ 762 * space. 763 */ 764 if (xen_pv_domain() && !xen_initial_domain()) 765 return xen_allocate_irq_dynamic(); 766 767 /* Legacy IRQ descriptors are already allocated by the arch. */ 768 if (gsi < nr_legacy_irqs()) 769 irq = gsi; 770 else 771 irq = irq_alloc_desc_at(gsi, -1); 772 773 xen_irq_init(irq); 774 775 return irq; 776 } 777 778 static void xen_free_irq(unsigned irq) 779 { 780 struct irq_info *info = info_for_irq(irq); 781 unsigned long flags; 782 783 if (WARN_ON(!info)) 784 return; 785 786 write_lock_irqsave(&evtchn_rwlock, flags); 787 788 if (!list_empty(&info->eoi_list)) 789 lateeoi_list_del(info); 790 791 list_del(&info->list); 792 793 set_info_for_irq(irq, NULL); 794 795 WARN_ON(info->refcnt > 0); 796 797 write_unlock_irqrestore(&evtchn_rwlock, flags); 798 799 kfree(info); 800 801 /* Legacy IRQ descriptors are managed by the arch. */ 802 if (irq < nr_legacy_irqs()) 803 return; 804 805 irq_free_desc(irq); 806 } 807 808 static void xen_evtchn_close(evtchn_port_t port) 809 { 810 struct evtchn_close close; 811 812 close.port = port; 813 if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) 814 BUG(); 815 } 816 817 /* Not called for lateeoi events. */ 818 static void event_handler_exit(struct irq_info *info) 819 { 820 smp_store_release(&info->is_active, 0); 821 clear_evtchn(info->evtchn); 822 } 823 824 static void pirq_query_unmask(int irq) 825 { 826 struct physdev_irq_status_query irq_status; 827 struct irq_info *info = info_for_irq(irq); 828 829 BUG_ON(info->type != IRQT_PIRQ); 830 831 irq_status.irq = pirq_from_irq(irq); 832 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) 833 irq_status.flags = 0; 834 835 info->u.pirq.flags &= ~PIRQ_NEEDS_EOI; 836 if (irq_status.flags & XENIRQSTAT_needs_eoi) 837 info->u.pirq.flags |= PIRQ_NEEDS_EOI; 838 } 839 840 static void eoi_pirq(struct irq_data *data) 841 { 842 struct irq_info *info = info_for_irq(data->irq); 843 evtchn_port_t evtchn = info ? info->evtchn : 0; 844 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) }; 845 int rc = 0; 846 847 if (!VALID_EVTCHN(evtchn)) 848 return; 849 850 event_handler_exit(info); 851 852 if (pirq_needs_eoi(data->irq)) { 853 rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi); 854 WARN_ON(rc); 855 } 856 } 857 858 static void mask_ack_pirq(struct irq_data *data) 859 { 860 disable_dynirq(data); 861 eoi_pirq(data); 862 } 863 864 static unsigned int __startup_pirq(unsigned int irq) 865 { 866 struct evtchn_bind_pirq bind_pirq; 867 struct irq_info *info = info_for_irq(irq); 868 evtchn_port_t evtchn = evtchn_from_irq(irq); 869 int rc; 870 871 BUG_ON(info->type != IRQT_PIRQ); 872 873 if (VALID_EVTCHN(evtchn)) 874 goto out; 875 876 bind_pirq.pirq = pirq_from_irq(irq); 877 /* NB. We are happy to share unless we are probing. */ 878 bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ? 879 BIND_PIRQ__WILL_SHARE : 0; 880 rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq); 881 if (rc != 0) { 882 pr_warn("Failed to obtain physical IRQ %d\n", irq); 883 return 0; 884 } 885 evtchn = bind_pirq.port; 886 887 pirq_query_unmask(irq); 888 889 rc = set_evtchn_to_irq(evtchn, irq); 890 if (rc) 891 goto err; 892 893 info->evtchn = evtchn; 894 bind_evtchn_to_cpu(evtchn, 0, false); 895 896 rc = xen_evtchn_port_setup(evtchn); 897 if (rc) 898 goto err; 899 900 out: 901 do_unmask(info, EVT_MASK_REASON_EXPLICIT); 902 903 eoi_pirq(irq_get_irq_data(irq)); 904 905 return 0; 906 907 err: 908 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc); 909 xen_evtchn_close(evtchn); 910 return 0; 911 } 912 913 static unsigned int startup_pirq(struct irq_data *data) 914 { 915 return __startup_pirq(data->irq); 916 } 917 918 static void shutdown_pirq(struct irq_data *data) 919 { 920 unsigned int irq = data->irq; 921 struct irq_info *info = info_for_irq(irq); 922 evtchn_port_t evtchn = evtchn_from_irq(irq); 923 924 BUG_ON(info->type != IRQT_PIRQ); 925 926 if (!VALID_EVTCHN(evtchn)) 927 return; 928 929 do_mask(info, EVT_MASK_REASON_EXPLICIT); 930 xen_evtchn_close(evtchn); 931 xen_irq_info_cleanup(info); 932 } 933 934 static void enable_pirq(struct irq_data *data) 935 { 936 enable_dynirq(data); 937 } 938 939 static void disable_pirq(struct irq_data *data) 940 { 941 disable_dynirq(data); 942 } 943 944 int xen_irq_from_gsi(unsigned gsi) 945 { 946 struct irq_info *info; 947 948 list_for_each_entry(info, &xen_irq_list_head, list) { 949 if (info->type != IRQT_PIRQ) 950 continue; 951 952 if (info->u.pirq.gsi == gsi) 953 return info->irq; 954 } 955 956 return -1; 957 } 958 EXPORT_SYMBOL_GPL(xen_irq_from_gsi); 959 960 static void __unbind_from_irq(unsigned int irq) 961 { 962 evtchn_port_t evtchn = evtchn_from_irq(irq); 963 struct irq_info *info = info_for_irq(irq); 964 965 if (info->refcnt > 0) { 966 info->refcnt--; 967 if (info->refcnt != 0) 968 return; 969 } 970 971 if (VALID_EVTCHN(evtchn)) { 972 unsigned int cpu = cpu_from_irq(irq); 973 struct xenbus_device *dev; 974 975 xen_evtchn_close(evtchn); 976 977 switch (type_from_irq(irq)) { 978 case IRQT_VIRQ: 979 per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1; 980 break; 981 case IRQT_IPI: 982 per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1; 983 break; 984 case IRQT_EVTCHN: 985 dev = info->u.interdomain; 986 if (dev) 987 atomic_dec(&dev->event_channels); 988 break; 989 default: 990 break; 991 } 992 993 xen_irq_info_cleanup(info); 994 } 995 996 xen_free_irq(irq); 997 } 998 999 /* 1000 * Do not make any assumptions regarding the relationship between the 1001 * IRQ number returned here and the Xen pirq argument. 1002 * 1003 * Note: We don't assign an event channel until the irq actually started 1004 * up. Return an existing irq if we've already got one for the gsi. 1005 * 1006 * Shareable implies level triggered, not shareable implies edge 1007 * triggered here. 1008 */ 1009 int xen_bind_pirq_gsi_to_irq(unsigned gsi, 1010 unsigned pirq, int shareable, char *name) 1011 { 1012 int irq = -1; 1013 struct physdev_irq irq_op; 1014 int ret; 1015 1016 mutex_lock(&irq_mapping_update_lock); 1017 1018 irq = xen_irq_from_gsi(gsi); 1019 if (irq != -1) { 1020 pr_info("%s: returning irq %d for gsi %u\n", 1021 __func__, irq, gsi); 1022 goto out; 1023 } 1024 1025 irq = xen_allocate_irq_gsi(gsi); 1026 if (irq < 0) 1027 goto out; 1028 1029 irq_op.irq = irq; 1030 irq_op.vector = 0; 1031 1032 /* Only the privileged domain can do this. For non-priv, the pcifront 1033 * driver provides a PCI bus that does the call to do exactly 1034 * this in the priv domain. */ 1035 if (xen_initial_domain() && 1036 HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) { 1037 xen_free_irq(irq); 1038 irq = -ENOSPC; 1039 goto out; 1040 } 1041 1042 ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF, 1043 shareable ? PIRQ_SHAREABLE : 0); 1044 if (ret < 0) { 1045 __unbind_from_irq(irq); 1046 irq = ret; 1047 goto out; 1048 } 1049 1050 pirq_query_unmask(irq); 1051 /* We try to use the handler with the appropriate semantic for the 1052 * type of interrupt: if the interrupt is an edge triggered 1053 * interrupt we use handle_edge_irq. 1054 * 1055 * On the other hand if the interrupt is level triggered we use 1056 * handle_fasteoi_irq like the native code does for this kind of 1057 * interrupts. 1058 * 1059 * Depending on the Xen version, pirq_needs_eoi might return true 1060 * not only for level triggered interrupts but for edge triggered 1061 * interrupts too. In any case Xen always honors the eoi mechanism, 1062 * not injecting any more pirqs of the same kind if the first one 1063 * hasn't received an eoi yet. Therefore using the fasteoi handler 1064 * is the right choice either way. 1065 */ 1066 if (shareable) 1067 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, 1068 handle_fasteoi_irq, name); 1069 else 1070 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, 1071 handle_edge_irq, name); 1072 1073 out: 1074 mutex_unlock(&irq_mapping_update_lock); 1075 1076 return irq; 1077 } 1078 1079 #ifdef CONFIG_PCI_MSI 1080 int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc) 1081 { 1082 int rc; 1083 struct physdev_get_free_pirq op_get_free_pirq; 1084 1085 op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI; 1086 rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq); 1087 1088 WARN_ONCE(rc == -ENOSYS, 1089 "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n"); 1090 1091 return rc ? -1 : op_get_free_pirq.pirq; 1092 } 1093 1094 int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc, 1095 int pirq, int nvec, const char *name, domid_t domid) 1096 { 1097 int i, irq, ret; 1098 1099 mutex_lock(&irq_mapping_update_lock); 1100 1101 irq = xen_allocate_irqs_dynamic(nvec); 1102 if (irq < 0) 1103 goto out; 1104 1105 for (i = 0; i < nvec; i++) { 1106 irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name); 1107 1108 ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid, 1109 i == 0 ? 0 : PIRQ_MSI_GROUP); 1110 if (ret < 0) 1111 goto error_irq; 1112 } 1113 1114 ret = irq_set_msi_desc(irq, msidesc); 1115 if (ret < 0) 1116 goto error_irq; 1117 out: 1118 mutex_unlock(&irq_mapping_update_lock); 1119 return irq; 1120 error_irq: 1121 while (nvec--) 1122 __unbind_from_irq(irq + nvec); 1123 mutex_unlock(&irq_mapping_update_lock); 1124 return ret; 1125 } 1126 #endif 1127 1128 int xen_destroy_irq(int irq) 1129 { 1130 struct physdev_unmap_pirq unmap_irq; 1131 struct irq_info *info = info_for_irq(irq); 1132 int rc = -ENOENT; 1133 1134 mutex_lock(&irq_mapping_update_lock); 1135 1136 /* 1137 * If trying to remove a vector in a MSI group different 1138 * than the first one skip the PIRQ unmap unless this vector 1139 * is the first one in the group. 1140 */ 1141 if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) { 1142 unmap_irq.pirq = info->u.pirq.pirq; 1143 unmap_irq.domid = info->u.pirq.domid; 1144 rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq); 1145 /* If another domain quits without making the pci_disable_msix 1146 * call, the Xen hypervisor takes care of freeing the PIRQs 1147 * (free_domain_pirqs). 1148 */ 1149 if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF)) 1150 pr_info("domain %d does not have %d anymore\n", 1151 info->u.pirq.domid, info->u.pirq.pirq); 1152 else if (rc) { 1153 pr_warn("unmap irq failed %d\n", rc); 1154 goto out; 1155 } 1156 } 1157 1158 xen_free_irq(irq); 1159 1160 out: 1161 mutex_unlock(&irq_mapping_update_lock); 1162 return rc; 1163 } 1164 1165 int xen_irq_from_pirq(unsigned pirq) 1166 { 1167 int irq; 1168 1169 struct irq_info *info; 1170 1171 mutex_lock(&irq_mapping_update_lock); 1172 1173 list_for_each_entry(info, &xen_irq_list_head, list) { 1174 if (info->type != IRQT_PIRQ) 1175 continue; 1176 irq = info->irq; 1177 if (info->u.pirq.pirq == pirq) 1178 goto out; 1179 } 1180 irq = -1; 1181 out: 1182 mutex_unlock(&irq_mapping_update_lock); 1183 1184 return irq; 1185 } 1186 1187 1188 int xen_pirq_from_irq(unsigned irq) 1189 { 1190 return pirq_from_irq(irq); 1191 } 1192 EXPORT_SYMBOL_GPL(xen_pirq_from_irq); 1193 1194 static int bind_evtchn_to_irq_chip(evtchn_port_t evtchn, struct irq_chip *chip, 1195 struct xenbus_device *dev) 1196 { 1197 int irq; 1198 int ret; 1199 1200 if (evtchn >= xen_evtchn_max_channels()) 1201 return -ENOMEM; 1202 1203 mutex_lock(&irq_mapping_update_lock); 1204 1205 irq = get_evtchn_to_irq(evtchn); 1206 1207 if (irq == -1) { 1208 irq = xen_allocate_irq_dynamic(); 1209 if (irq < 0) 1210 goto out; 1211 1212 irq_set_chip_and_handler_name(irq, chip, 1213 handle_edge_irq, "event"); 1214 1215 ret = xen_irq_info_evtchn_setup(irq, evtchn, dev); 1216 if (ret < 0) { 1217 __unbind_from_irq(irq); 1218 irq = ret; 1219 goto out; 1220 } 1221 /* 1222 * New interdomain events are initially bound to vCPU0 This 1223 * is required to setup the event channel in the first 1224 * place and also important for UP guests because the 1225 * affinity setting is not invoked on them so nothing would 1226 * bind the channel. 1227 */ 1228 bind_evtchn_to_cpu(evtchn, 0, false); 1229 } else { 1230 struct irq_info *info = info_for_irq(irq); 1231 WARN_ON(info == NULL || info->type != IRQT_EVTCHN); 1232 } 1233 1234 out: 1235 mutex_unlock(&irq_mapping_update_lock); 1236 1237 return irq; 1238 } 1239 1240 int bind_evtchn_to_irq(evtchn_port_t evtchn) 1241 { 1242 return bind_evtchn_to_irq_chip(evtchn, &xen_dynamic_chip, NULL); 1243 } 1244 EXPORT_SYMBOL_GPL(bind_evtchn_to_irq); 1245 1246 static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu) 1247 { 1248 struct evtchn_bind_ipi bind_ipi; 1249 evtchn_port_t evtchn; 1250 int ret, irq; 1251 1252 mutex_lock(&irq_mapping_update_lock); 1253 1254 irq = per_cpu(ipi_to_irq, cpu)[ipi]; 1255 1256 if (irq == -1) { 1257 irq = xen_allocate_irq_dynamic(); 1258 if (irq < 0) 1259 goto out; 1260 1261 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, 1262 handle_percpu_irq, "ipi"); 1263 1264 bind_ipi.vcpu = xen_vcpu_nr(cpu); 1265 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, 1266 &bind_ipi) != 0) 1267 BUG(); 1268 evtchn = bind_ipi.port; 1269 1270 ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi); 1271 if (ret < 0) { 1272 __unbind_from_irq(irq); 1273 irq = ret; 1274 goto out; 1275 } 1276 /* 1277 * Force the affinity mask to the target CPU so proc shows 1278 * the correct target. 1279 */ 1280 bind_evtchn_to_cpu(evtchn, cpu, true); 1281 } else { 1282 struct irq_info *info = info_for_irq(irq); 1283 WARN_ON(info == NULL || info->type != IRQT_IPI); 1284 } 1285 1286 out: 1287 mutex_unlock(&irq_mapping_update_lock); 1288 return irq; 1289 } 1290 1291 static int bind_interdomain_evtchn_to_irq_chip(struct xenbus_device *dev, 1292 evtchn_port_t remote_port, 1293 struct irq_chip *chip) 1294 { 1295 struct evtchn_bind_interdomain bind_interdomain; 1296 int err; 1297 1298 bind_interdomain.remote_dom = dev->otherend_id; 1299 bind_interdomain.remote_port = remote_port; 1300 1301 err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain, 1302 &bind_interdomain); 1303 1304 return err ? : bind_evtchn_to_irq_chip(bind_interdomain.local_port, 1305 chip, dev); 1306 } 1307 1308 int bind_interdomain_evtchn_to_irq_lateeoi(struct xenbus_device *dev, 1309 evtchn_port_t remote_port) 1310 { 1311 return bind_interdomain_evtchn_to_irq_chip(dev, remote_port, 1312 &xen_lateeoi_chip); 1313 } 1314 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq_lateeoi); 1315 1316 static int find_virq(unsigned int virq, unsigned int cpu, evtchn_port_t *evtchn) 1317 { 1318 struct evtchn_status status; 1319 evtchn_port_t port; 1320 int rc = -ENOENT; 1321 1322 memset(&status, 0, sizeof(status)); 1323 for (port = 0; port < xen_evtchn_max_channels(); port++) { 1324 status.dom = DOMID_SELF; 1325 status.port = port; 1326 rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status); 1327 if (rc < 0) 1328 continue; 1329 if (status.status != EVTCHNSTAT_virq) 1330 continue; 1331 if (status.u.virq == virq && status.vcpu == xen_vcpu_nr(cpu)) { 1332 *evtchn = port; 1333 break; 1334 } 1335 } 1336 return rc; 1337 } 1338 1339 /** 1340 * xen_evtchn_nr_channels - number of usable event channel ports 1341 * 1342 * This may be less than the maximum supported by the current 1343 * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum 1344 * supported. 1345 */ 1346 unsigned xen_evtchn_nr_channels(void) 1347 { 1348 return evtchn_ops->nr_channels(); 1349 } 1350 EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels); 1351 1352 int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu) 1353 { 1354 struct evtchn_bind_virq bind_virq; 1355 evtchn_port_t evtchn = 0; 1356 int irq, ret; 1357 1358 mutex_lock(&irq_mapping_update_lock); 1359 1360 irq = per_cpu(virq_to_irq, cpu)[virq]; 1361 1362 if (irq == -1) { 1363 irq = xen_allocate_irq_dynamic(); 1364 if (irq < 0) 1365 goto out; 1366 1367 if (percpu) 1368 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, 1369 handle_percpu_irq, "virq"); 1370 else 1371 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip, 1372 handle_edge_irq, "virq"); 1373 1374 bind_virq.virq = virq; 1375 bind_virq.vcpu = xen_vcpu_nr(cpu); 1376 ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, 1377 &bind_virq); 1378 if (ret == 0) 1379 evtchn = bind_virq.port; 1380 else { 1381 if (ret == -EEXIST) 1382 ret = find_virq(virq, cpu, &evtchn); 1383 BUG_ON(ret < 0); 1384 } 1385 1386 ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq); 1387 if (ret < 0) { 1388 __unbind_from_irq(irq); 1389 irq = ret; 1390 goto out; 1391 } 1392 1393 /* 1394 * Force the affinity mask for percpu interrupts so proc 1395 * shows the correct target. 1396 */ 1397 bind_evtchn_to_cpu(evtchn, cpu, percpu); 1398 } else { 1399 struct irq_info *info = info_for_irq(irq); 1400 WARN_ON(info == NULL || info->type != IRQT_VIRQ); 1401 } 1402 1403 out: 1404 mutex_unlock(&irq_mapping_update_lock); 1405 1406 return irq; 1407 } 1408 1409 static void unbind_from_irq(unsigned int irq) 1410 { 1411 mutex_lock(&irq_mapping_update_lock); 1412 __unbind_from_irq(irq); 1413 mutex_unlock(&irq_mapping_update_lock); 1414 } 1415 1416 static int bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn, 1417 irq_handler_t handler, 1418 unsigned long irqflags, 1419 const char *devname, void *dev_id, 1420 struct irq_chip *chip) 1421 { 1422 int irq, retval; 1423 1424 irq = bind_evtchn_to_irq_chip(evtchn, chip, NULL); 1425 if (irq < 0) 1426 return irq; 1427 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1428 if (retval != 0) { 1429 unbind_from_irq(irq); 1430 return retval; 1431 } 1432 1433 return irq; 1434 } 1435 1436 int bind_evtchn_to_irqhandler(evtchn_port_t evtchn, 1437 irq_handler_t handler, 1438 unsigned long irqflags, 1439 const char *devname, void *dev_id) 1440 { 1441 return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags, 1442 devname, dev_id, 1443 &xen_dynamic_chip); 1444 } 1445 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler); 1446 1447 int bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn, 1448 irq_handler_t handler, 1449 unsigned long irqflags, 1450 const char *devname, void *dev_id) 1451 { 1452 return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags, 1453 devname, dev_id, 1454 &xen_lateeoi_chip); 1455 } 1456 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler_lateeoi); 1457 1458 static int bind_interdomain_evtchn_to_irqhandler_chip( 1459 struct xenbus_device *dev, evtchn_port_t remote_port, 1460 irq_handler_t handler, unsigned long irqflags, 1461 const char *devname, void *dev_id, struct irq_chip *chip) 1462 { 1463 int irq, retval; 1464 1465 irq = bind_interdomain_evtchn_to_irq_chip(dev, remote_port, chip); 1466 if (irq < 0) 1467 return irq; 1468 1469 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1470 if (retval != 0) { 1471 unbind_from_irq(irq); 1472 return retval; 1473 } 1474 1475 return irq; 1476 } 1477 1478 int bind_interdomain_evtchn_to_irqhandler_lateeoi(struct xenbus_device *dev, 1479 evtchn_port_t remote_port, 1480 irq_handler_t handler, 1481 unsigned long irqflags, 1482 const char *devname, 1483 void *dev_id) 1484 { 1485 return bind_interdomain_evtchn_to_irqhandler_chip(dev, 1486 remote_port, handler, irqflags, devname, 1487 dev_id, &xen_lateeoi_chip); 1488 } 1489 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler_lateeoi); 1490 1491 int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu, 1492 irq_handler_t handler, 1493 unsigned long irqflags, const char *devname, void *dev_id) 1494 { 1495 int irq, retval; 1496 1497 irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU); 1498 if (irq < 0) 1499 return irq; 1500 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1501 if (retval != 0) { 1502 unbind_from_irq(irq); 1503 return retval; 1504 } 1505 1506 return irq; 1507 } 1508 EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler); 1509 1510 int bind_ipi_to_irqhandler(enum ipi_vector ipi, 1511 unsigned int cpu, 1512 irq_handler_t handler, 1513 unsigned long irqflags, 1514 const char *devname, 1515 void *dev_id) 1516 { 1517 int irq, retval; 1518 1519 irq = bind_ipi_to_irq(ipi, cpu); 1520 if (irq < 0) 1521 return irq; 1522 1523 irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME; 1524 retval = request_irq(irq, handler, irqflags, devname, dev_id); 1525 if (retval != 0) { 1526 unbind_from_irq(irq); 1527 return retval; 1528 } 1529 1530 return irq; 1531 } 1532 1533 void unbind_from_irqhandler(unsigned int irq, void *dev_id) 1534 { 1535 struct irq_info *info = info_for_irq(irq); 1536 1537 if (WARN_ON(!info)) 1538 return; 1539 free_irq(irq, dev_id); 1540 unbind_from_irq(irq); 1541 } 1542 EXPORT_SYMBOL_GPL(unbind_from_irqhandler); 1543 1544 /** 1545 * xen_set_irq_priority() - set an event channel priority. 1546 * @irq:irq bound to an event channel. 1547 * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN. 1548 */ 1549 int xen_set_irq_priority(unsigned irq, unsigned priority) 1550 { 1551 struct evtchn_set_priority set_priority; 1552 1553 set_priority.port = evtchn_from_irq(irq); 1554 set_priority.priority = priority; 1555 1556 return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority, 1557 &set_priority); 1558 } 1559 EXPORT_SYMBOL_GPL(xen_set_irq_priority); 1560 1561 int evtchn_make_refcounted(evtchn_port_t evtchn) 1562 { 1563 int irq = get_evtchn_to_irq(evtchn); 1564 struct irq_info *info; 1565 1566 if (irq == -1) 1567 return -ENOENT; 1568 1569 info = info_for_irq(irq); 1570 1571 if (!info) 1572 return -ENOENT; 1573 1574 WARN_ON(info->refcnt != -1); 1575 1576 info->refcnt = 1; 1577 1578 return 0; 1579 } 1580 EXPORT_SYMBOL_GPL(evtchn_make_refcounted); 1581 1582 int evtchn_get(evtchn_port_t evtchn) 1583 { 1584 int irq; 1585 struct irq_info *info; 1586 int err = -ENOENT; 1587 1588 if (evtchn >= xen_evtchn_max_channels()) 1589 return -EINVAL; 1590 1591 mutex_lock(&irq_mapping_update_lock); 1592 1593 irq = get_evtchn_to_irq(evtchn); 1594 if (irq == -1) 1595 goto done; 1596 1597 info = info_for_irq(irq); 1598 1599 if (!info) 1600 goto done; 1601 1602 err = -EINVAL; 1603 if (info->refcnt <= 0 || info->refcnt == SHRT_MAX) 1604 goto done; 1605 1606 info->refcnt++; 1607 err = 0; 1608 done: 1609 mutex_unlock(&irq_mapping_update_lock); 1610 1611 return err; 1612 } 1613 EXPORT_SYMBOL_GPL(evtchn_get); 1614 1615 void evtchn_put(evtchn_port_t evtchn) 1616 { 1617 int irq = get_evtchn_to_irq(evtchn); 1618 if (WARN_ON(irq == -1)) 1619 return; 1620 unbind_from_irq(irq); 1621 } 1622 EXPORT_SYMBOL_GPL(evtchn_put); 1623 1624 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector) 1625 { 1626 int irq; 1627 1628 #ifdef CONFIG_X86 1629 if (unlikely(vector == XEN_NMI_VECTOR)) { 1630 int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu), 1631 NULL); 1632 if (rc < 0) 1633 printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc); 1634 return; 1635 } 1636 #endif 1637 irq = per_cpu(ipi_to_irq, cpu)[vector]; 1638 BUG_ON(irq < 0); 1639 notify_remote_via_irq(irq); 1640 } 1641 1642 struct evtchn_loop_ctrl { 1643 ktime_t timeout; 1644 unsigned count; 1645 bool defer_eoi; 1646 }; 1647 1648 void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl) 1649 { 1650 int irq; 1651 struct irq_info *info; 1652 struct xenbus_device *dev; 1653 1654 irq = get_evtchn_to_irq(port); 1655 if (irq == -1) 1656 return; 1657 1658 /* 1659 * Check for timeout every 256 events. 1660 * We are setting the timeout value only after the first 256 1661 * events in order to not hurt the common case of few loop 1662 * iterations. The 256 is basically an arbitrary value. 1663 * 1664 * In case we are hitting the timeout we need to defer all further 1665 * EOIs in order to ensure to leave the event handling loop rather 1666 * sooner than later. 1667 */ 1668 if (!ctrl->defer_eoi && !(++ctrl->count & 0xff)) { 1669 ktime_t kt = ktime_get(); 1670 1671 if (!ctrl->timeout) { 1672 kt = ktime_add_ms(kt, 1673 jiffies_to_msecs(event_loop_timeout)); 1674 ctrl->timeout = kt; 1675 } else if (kt > ctrl->timeout) { 1676 ctrl->defer_eoi = true; 1677 } 1678 } 1679 1680 info = info_for_irq(irq); 1681 if (xchg_acquire(&info->is_active, 1)) 1682 return; 1683 1684 dev = (info->type == IRQT_EVTCHN) ? info->u.interdomain : NULL; 1685 if (dev) 1686 atomic_inc(&dev->events); 1687 1688 if (ctrl->defer_eoi) { 1689 info->eoi_cpu = smp_processor_id(); 1690 info->irq_epoch = __this_cpu_read(irq_epoch); 1691 info->eoi_time = get_jiffies_64() + event_eoi_delay; 1692 } 1693 1694 generic_handle_irq(irq); 1695 } 1696 1697 static void __xen_evtchn_do_upcall(void) 1698 { 1699 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 1700 int cpu = smp_processor_id(); 1701 struct evtchn_loop_ctrl ctrl = { 0 }; 1702 1703 read_lock(&evtchn_rwlock); 1704 1705 do { 1706 vcpu_info->evtchn_upcall_pending = 0; 1707 1708 xen_evtchn_handle_events(cpu, &ctrl); 1709 1710 BUG_ON(!irqs_disabled()); 1711 1712 virt_rmb(); /* Hypervisor can set upcall pending. */ 1713 1714 } while (vcpu_info->evtchn_upcall_pending); 1715 1716 read_unlock(&evtchn_rwlock); 1717 1718 /* 1719 * Increment irq_epoch only now to defer EOIs only for 1720 * xen_irq_lateeoi() invocations occurring from inside the loop 1721 * above. 1722 */ 1723 __this_cpu_inc(irq_epoch); 1724 } 1725 1726 void xen_evtchn_do_upcall(struct pt_regs *regs) 1727 { 1728 struct pt_regs *old_regs = set_irq_regs(regs); 1729 1730 irq_enter(); 1731 1732 __xen_evtchn_do_upcall(); 1733 1734 irq_exit(); 1735 set_irq_regs(old_regs); 1736 } 1737 1738 void xen_hvm_evtchn_do_upcall(void) 1739 { 1740 __xen_evtchn_do_upcall(); 1741 } 1742 EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall); 1743 1744 /* Rebind a new event channel to an existing irq. */ 1745 void rebind_evtchn_irq(evtchn_port_t evtchn, int irq) 1746 { 1747 struct irq_info *info = info_for_irq(irq); 1748 1749 if (WARN_ON(!info)) 1750 return; 1751 1752 /* Make sure the irq is masked, since the new event channel 1753 will also be masked. */ 1754 disable_irq(irq); 1755 1756 mutex_lock(&irq_mapping_update_lock); 1757 1758 /* After resume the irq<->evtchn mappings are all cleared out */ 1759 BUG_ON(get_evtchn_to_irq(evtchn) != -1); 1760 /* Expect irq to have been bound before, 1761 so there should be a proper type */ 1762 BUG_ON(info->type == IRQT_UNBOUND); 1763 1764 (void)xen_irq_info_evtchn_setup(irq, evtchn, NULL); 1765 1766 mutex_unlock(&irq_mapping_update_lock); 1767 1768 bind_evtchn_to_cpu(evtchn, info->cpu, false); 1769 1770 /* Unmask the event channel. */ 1771 enable_irq(irq); 1772 } 1773 1774 /* Rebind an evtchn so that it gets delivered to a specific cpu */ 1775 static int xen_rebind_evtchn_to_cpu(struct irq_info *info, unsigned int tcpu) 1776 { 1777 struct evtchn_bind_vcpu bind_vcpu; 1778 evtchn_port_t evtchn = info ? info->evtchn : 0; 1779 1780 if (!VALID_EVTCHN(evtchn)) 1781 return -1; 1782 1783 if (!xen_support_evtchn_rebind()) 1784 return -1; 1785 1786 /* Send future instances of this interrupt to other vcpu. */ 1787 bind_vcpu.port = evtchn; 1788 bind_vcpu.vcpu = xen_vcpu_nr(tcpu); 1789 1790 /* 1791 * Mask the event while changing the VCPU binding to prevent 1792 * it being delivered on an unexpected VCPU. 1793 */ 1794 do_mask(info, EVT_MASK_REASON_TEMPORARY); 1795 1796 /* 1797 * If this fails, it usually just indicates that we're dealing with a 1798 * virq or IPI channel, which don't actually need to be rebound. Ignore 1799 * it, but don't do the xenlinux-level rebind in that case. 1800 */ 1801 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0) 1802 bind_evtchn_to_cpu(evtchn, tcpu, false); 1803 1804 do_unmask(info, EVT_MASK_REASON_TEMPORARY); 1805 1806 return 0; 1807 } 1808 1809 /* 1810 * Find the CPU within @dest mask which has the least number of channels 1811 * assigned. This is not precise as the per cpu counts can be modified 1812 * concurrently. 1813 */ 1814 static unsigned int select_target_cpu(const struct cpumask *dest) 1815 { 1816 unsigned int cpu, best_cpu = UINT_MAX, minch = UINT_MAX; 1817 1818 for_each_cpu_and(cpu, dest, cpu_online_mask) { 1819 unsigned int curch = atomic_read(&channels_on_cpu[cpu]); 1820 1821 if (curch < minch) { 1822 minch = curch; 1823 best_cpu = cpu; 1824 } 1825 } 1826 1827 /* 1828 * Catch the unlikely case that dest contains no online CPUs. Can't 1829 * recurse. 1830 */ 1831 if (best_cpu == UINT_MAX) 1832 return select_target_cpu(cpu_online_mask); 1833 1834 return best_cpu; 1835 } 1836 1837 static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest, 1838 bool force) 1839 { 1840 unsigned int tcpu = select_target_cpu(dest); 1841 int ret; 1842 1843 ret = xen_rebind_evtchn_to_cpu(info_for_irq(data->irq), tcpu); 1844 if (!ret) 1845 irq_data_update_effective_affinity(data, cpumask_of(tcpu)); 1846 1847 return ret; 1848 } 1849 1850 static void enable_dynirq(struct irq_data *data) 1851 { 1852 struct irq_info *info = info_for_irq(data->irq); 1853 evtchn_port_t evtchn = info ? info->evtchn : 0; 1854 1855 if (VALID_EVTCHN(evtchn)) 1856 do_unmask(info, EVT_MASK_REASON_EXPLICIT); 1857 } 1858 1859 static void disable_dynirq(struct irq_data *data) 1860 { 1861 struct irq_info *info = info_for_irq(data->irq); 1862 evtchn_port_t evtchn = info ? info->evtchn : 0; 1863 1864 if (VALID_EVTCHN(evtchn)) 1865 do_mask(info, EVT_MASK_REASON_EXPLICIT); 1866 } 1867 1868 static void ack_dynirq(struct irq_data *data) 1869 { 1870 struct irq_info *info = info_for_irq(data->irq); 1871 evtchn_port_t evtchn = info ? info->evtchn : 0; 1872 1873 if (VALID_EVTCHN(evtchn)) 1874 event_handler_exit(info); 1875 } 1876 1877 static void mask_ack_dynirq(struct irq_data *data) 1878 { 1879 disable_dynirq(data); 1880 ack_dynirq(data); 1881 } 1882 1883 static void lateeoi_ack_dynirq(struct irq_data *data) 1884 { 1885 struct irq_info *info = info_for_irq(data->irq); 1886 evtchn_port_t evtchn = info ? info->evtchn : 0; 1887 1888 if (VALID_EVTCHN(evtchn)) { 1889 do_mask(info, EVT_MASK_REASON_EOI_PENDING); 1890 /* 1891 * Don't call event_handler_exit(). 1892 * Need to keep is_active non-zero in order to ignore re-raised 1893 * events after cpu affinity changes while a lateeoi is pending. 1894 */ 1895 clear_evtchn(evtchn); 1896 } 1897 } 1898 1899 static void lateeoi_mask_ack_dynirq(struct irq_data *data) 1900 { 1901 struct irq_info *info = info_for_irq(data->irq); 1902 evtchn_port_t evtchn = info ? info->evtchn : 0; 1903 1904 if (VALID_EVTCHN(evtchn)) { 1905 do_mask(info, EVT_MASK_REASON_EXPLICIT); 1906 event_handler_exit(info); 1907 } 1908 } 1909 1910 static int retrigger_dynirq(struct irq_data *data) 1911 { 1912 struct irq_info *info = info_for_irq(data->irq); 1913 evtchn_port_t evtchn = info ? info->evtchn : 0; 1914 1915 if (!VALID_EVTCHN(evtchn)) 1916 return 0; 1917 1918 do_mask(info, EVT_MASK_REASON_TEMPORARY); 1919 set_evtchn(evtchn); 1920 do_unmask(info, EVT_MASK_REASON_TEMPORARY); 1921 1922 return 1; 1923 } 1924 1925 static void restore_pirqs(void) 1926 { 1927 int pirq, rc, irq, gsi; 1928 struct physdev_map_pirq map_irq; 1929 struct irq_info *info; 1930 1931 list_for_each_entry(info, &xen_irq_list_head, list) { 1932 if (info->type != IRQT_PIRQ) 1933 continue; 1934 1935 pirq = info->u.pirq.pirq; 1936 gsi = info->u.pirq.gsi; 1937 irq = info->irq; 1938 1939 /* save/restore of PT devices doesn't work, so at this point the 1940 * only devices present are GSI based emulated devices */ 1941 if (!gsi) 1942 continue; 1943 1944 map_irq.domid = DOMID_SELF; 1945 map_irq.type = MAP_PIRQ_TYPE_GSI; 1946 map_irq.index = gsi; 1947 map_irq.pirq = pirq; 1948 1949 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); 1950 if (rc) { 1951 pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n", 1952 gsi, irq, pirq, rc); 1953 xen_free_irq(irq); 1954 continue; 1955 } 1956 1957 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq); 1958 1959 __startup_pirq(irq); 1960 } 1961 } 1962 1963 static void restore_cpu_virqs(unsigned int cpu) 1964 { 1965 struct evtchn_bind_virq bind_virq; 1966 evtchn_port_t evtchn; 1967 int virq, irq; 1968 1969 for (virq = 0; virq < NR_VIRQS; virq++) { 1970 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1) 1971 continue; 1972 1973 BUG_ON(virq_from_irq(irq) != virq); 1974 1975 /* Get a new binding from Xen. */ 1976 bind_virq.virq = virq; 1977 bind_virq.vcpu = xen_vcpu_nr(cpu); 1978 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, 1979 &bind_virq) != 0) 1980 BUG(); 1981 evtchn = bind_virq.port; 1982 1983 /* Record the new mapping. */ 1984 (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq); 1985 /* The affinity mask is still valid */ 1986 bind_evtchn_to_cpu(evtchn, cpu, false); 1987 } 1988 } 1989 1990 static void restore_cpu_ipis(unsigned int cpu) 1991 { 1992 struct evtchn_bind_ipi bind_ipi; 1993 evtchn_port_t evtchn; 1994 int ipi, irq; 1995 1996 for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) { 1997 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1) 1998 continue; 1999 2000 BUG_ON(ipi_from_irq(irq) != ipi); 2001 2002 /* Get a new binding from Xen. */ 2003 bind_ipi.vcpu = xen_vcpu_nr(cpu); 2004 if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, 2005 &bind_ipi) != 0) 2006 BUG(); 2007 evtchn = bind_ipi.port; 2008 2009 /* Record the new mapping. */ 2010 (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi); 2011 /* The affinity mask is still valid */ 2012 bind_evtchn_to_cpu(evtchn, cpu, false); 2013 } 2014 } 2015 2016 /* Clear an irq's pending state, in preparation for polling on it */ 2017 void xen_clear_irq_pending(int irq) 2018 { 2019 struct irq_info *info = info_for_irq(irq); 2020 evtchn_port_t evtchn = info ? info->evtchn : 0; 2021 2022 if (VALID_EVTCHN(evtchn)) 2023 event_handler_exit(info); 2024 } 2025 EXPORT_SYMBOL(xen_clear_irq_pending); 2026 void xen_set_irq_pending(int irq) 2027 { 2028 evtchn_port_t evtchn = evtchn_from_irq(irq); 2029 2030 if (VALID_EVTCHN(evtchn)) 2031 set_evtchn(evtchn); 2032 } 2033 2034 bool xen_test_irq_pending(int irq) 2035 { 2036 evtchn_port_t evtchn = evtchn_from_irq(irq); 2037 bool ret = false; 2038 2039 if (VALID_EVTCHN(evtchn)) 2040 ret = test_evtchn(evtchn); 2041 2042 return ret; 2043 } 2044 2045 /* Poll waiting for an irq to become pending with timeout. In the usual case, 2046 * the irq will be disabled so it won't deliver an interrupt. */ 2047 void xen_poll_irq_timeout(int irq, u64 timeout) 2048 { 2049 evtchn_port_t evtchn = evtchn_from_irq(irq); 2050 2051 if (VALID_EVTCHN(evtchn)) { 2052 struct sched_poll poll; 2053 2054 poll.nr_ports = 1; 2055 poll.timeout = timeout; 2056 set_xen_guest_handle(poll.ports, &evtchn); 2057 2058 if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0) 2059 BUG(); 2060 } 2061 } 2062 EXPORT_SYMBOL(xen_poll_irq_timeout); 2063 /* Poll waiting for an irq to become pending. In the usual case, the 2064 * irq will be disabled so it won't deliver an interrupt. */ 2065 void xen_poll_irq(int irq) 2066 { 2067 xen_poll_irq_timeout(irq, 0 /* no timeout */); 2068 } 2069 2070 /* Check whether the IRQ line is shared with other guests. */ 2071 int xen_test_irq_shared(int irq) 2072 { 2073 struct irq_info *info = info_for_irq(irq); 2074 struct physdev_irq_status_query irq_status; 2075 2076 if (WARN_ON(!info)) 2077 return -ENOENT; 2078 2079 irq_status.irq = info->u.pirq.pirq; 2080 2081 if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) 2082 return 0; 2083 return !(irq_status.flags & XENIRQSTAT_shared); 2084 } 2085 EXPORT_SYMBOL_GPL(xen_test_irq_shared); 2086 2087 void xen_irq_resume(void) 2088 { 2089 unsigned int cpu; 2090 struct irq_info *info; 2091 2092 /* New event-channel space is not 'live' yet. */ 2093 xen_evtchn_resume(); 2094 2095 /* No IRQ <-> event-channel mappings. */ 2096 list_for_each_entry(info, &xen_irq_list_head, list) { 2097 /* Zap event-channel binding */ 2098 info->evtchn = 0; 2099 /* Adjust accounting */ 2100 channels_on_cpu_dec(info); 2101 } 2102 2103 clear_evtchn_to_irq_all(); 2104 2105 for_each_possible_cpu(cpu) { 2106 restore_cpu_virqs(cpu); 2107 restore_cpu_ipis(cpu); 2108 } 2109 2110 restore_pirqs(); 2111 } 2112 2113 static struct irq_chip xen_dynamic_chip __read_mostly = { 2114 .name = "xen-dyn", 2115 2116 .irq_disable = disable_dynirq, 2117 .irq_mask = disable_dynirq, 2118 .irq_unmask = enable_dynirq, 2119 2120 .irq_ack = ack_dynirq, 2121 .irq_mask_ack = mask_ack_dynirq, 2122 2123 .irq_set_affinity = set_affinity_irq, 2124 .irq_retrigger = retrigger_dynirq, 2125 }; 2126 2127 static struct irq_chip xen_lateeoi_chip __read_mostly = { 2128 /* The chip name needs to contain "xen-dyn" for irqbalance to work. */ 2129 .name = "xen-dyn-lateeoi", 2130 2131 .irq_disable = disable_dynirq, 2132 .irq_mask = disable_dynirq, 2133 .irq_unmask = enable_dynirq, 2134 2135 .irq_ack = lateeoi_ack_dynirq, 2136 .irq_mask_ack = lateeoi_mask_ack_dynirq, 2137 2138 .irq_set_affinity = set_affinity_irq, 2139 .irq_retrigger = retrigger_dynirq, 2140 }; 2141 2142 static struct irq_chip xen_pirq_chip __read_mostly = { 2143 .name = "xen-pirq", 2144 2145 .irq_startup = startup_pirq, 2146 .irq_shutdown = shutdown_pirq, 2147 .irq_enable = enable_pirq, 2148 .irq_disable = disable_pirq, 2149 2150 .irq_mask = disable_dynirq, 2151 .irq_unmask = enable_dynirq, 2152 2153 .irq_ack = eoi_pirq, 2154 .irq_eoi = eoi_pirq, 2155 .irq_mask_ack = mask_ack_pirq, 2156 2157 .irq_set_affinity = set_affinity_irq, 2158 2159 .irq_retrigger = retrigger_dynirq, 2160 }; 2161 2162 static struct irq_chip xen_percpu_chip __read_mostly = { 2163 .name = "xen-percpu", 2164 2165 .irq_disable = disable_dynirq, 2166 .irq_mask = disable_dynirq, 2167 .irq_unmask = enable_dynirq, 2168 2169 .irq_ack = ack_dynirq, 2170 }; 2171 2172 #ifdef CONFIG_XEN_PVHVM 2173 /* Vector callbacks are better than PCI interrupts to receive event 2174 * channel notifications because we can receive vector callbacks on any 2175 * vcpu and we don't need PCI support or APIC interactions. */ 2176 void xen_setup_callback_vector(void) 2177 { 2178 uint64_t callback_via; 2179 2180 if (xen_have_vector_callback) { 2181 callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR); 2182 if (xen_set_callback_via(callback_via)) { 2183 pr_err("Request for Xen HVM callback vector failed\n"); 2184 xen_have_vector_callback = 0; 2185 } 2186 } 2187 } 2188 2189 static __init void xen_alloc_callback_vector(void) 2190 { 2191 if (!xen_have_vector_callback) 2192 return; 2193 2194 pr_info("Xen HVM callback vector for event delivery is enabled\n"); 2195 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_xen_hvm_callback); 2196 } 2197 #else 2198 void xen_setup_callback_vector(void) {} 2199 static inline void xen_alloc_callback_vector(void) {} 2200 #endif 2201 2202 bool xen_fifo_events = true; 2203 module_param_named(fifo_events, xen_fifo_events, bool, 0); 2204 2205 static int xen_evtchn_cpu_prepare(unsigned int cpu) 2206 { 2207 int ret = 0; 2208 2209 xen_cpu_init_eoi(cpu); 2210 2211 if (evtchn_ops->percpu_init) 2212 ret = evtchn_ops->percpu_init(cpu); 2213 2214 return ret; 2215 } 2216 2217 static int xen_evtchn_cpu_dead(unsigned int cpu) 2218 { 2219 int ret = 0; 2220 2221 if (evtchn_ops->percpu_deinit) 2222 ret = evtchn_ops->percpu_deinit(cpu); 2223 2224 return ret; 2225 } 2226 2227 void __init xen_init_IRQ(void) 2228 { 2229 int ret = -EINVAL; 2230 evtchn_port_t evtchn; 2231 2232 if (xen_fifo_events) 2233 ret = xen_evtchn_fifo_init(); 2234 if (ret < 0) { 2235 xen_evtchn_2l_init(); 2236 xen_fifo_events = false; 2237 } 2238 2239 xen_cpu_init_eoi(smp_processor_id()); 2240 2241 cpuhp_setup_state_nocalls(CPUHP_XEN_EVTCHN_PREPARE, 2242 "xen/evtchn:prepare", 2243 xen_evtchn_cpu_prepare, xen_evtchn_cpu_dead); 2244 2245 evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()), 2246 sizeof(*evtchn_to_irq), GFP_KERNEL); 2247 BUG_ON(!evtchn_to_irq); 2248 2249 /* No event channels are 'live' right now. */ 2250 for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++) 2251 mask_evtchn(evtchn); 2252 2253 pirq_needs_eoi = pirq_needs_eoi_flag; 2254 2255 #ifdef CONFIG_X86 2256 if (xen_pv_domain()) { 2257 if (xen_initial_domain()) 2258 pci_xen_initial_domain(); 2259 } 2260 if (xen_feature(XENFEAT_hvm_callback_vector)) { 2261 xen_setup_callback_vector(); 2262 xen_alloc_callback_vector(); 2263 } 2264 2265 if (xen_hvm_domain()) { 2266 native_init_IRQ(); 2267 /* pci_xen_hvm_init must be called after native_init_IRQ so that 2268 * __acpi_register_gsi can point at the right function */ 2269 pci_xen_hvm_init(); 2270 } else { 2271 int rc; 2272 struct physdev_pirq_eoi_gmfn eoi_gmfn; 2273 2274 pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO); 2275 eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map); 2276 rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn); 2277 if (rc != 0) { 2278 free_page((unsigned long) pirq_eoi_map); 2279 pirq_eoi_map = NULL; 2280 } else 2281 pirq_needs_eoi = pirq_check_eoi_map; 2282 } 2283 #endif 2284 } 2285