xref: /openbmc/linux/drivers/xen/events/events_base.c (revision 5497b23e)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Xen event channels
4  *
5  * Xen models interrupts with abstract event channels.  Because each
6  * domain gets 1024 event channels, but NR_IRQ is not that large, we
7  * must dynamically map irqs<->event channels.  The event channels
8  * interface with the rest of the kernel by defining a xen interrupt
9  * chip.  When an event is received, it is mapped to an irq and sent
10  * through the normal interrupt processing path.
11  *
12  * There are four kinds of events which can be mapped to an event
13  * channel:
14  *
15  * 1. Inter-domain notifications.  This includes all the virtual
16  *    device events, since they're driven by front-ends in another domain
17  *    (typically dom0).
18  * 2. VIRQs, typically used for timers.  These are per-cpu events.
19  * 3. IPIs.
20  * 4. PIRQs - Hardware interrupts.
21  *
22  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
23  */
24 
25 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
26 
27 #include <linux/linkage.h>
28 #include <linux/interrupt.h>
29 #include <linux/irq.h>
30 #include <linux/moduleparam.h>
31 #include <linux/string.h>
32 #include <linux/memblock.h>
33 #include <linux/slab.h>
34 #include <linux/irqnr.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/cpuhotplug.h>
38 #include <linux/atomic.h>
39 #include <linux/ktime.h>
40 
41 #ifdef CONFIG_X86
42 #include <asm/desc.h>
43 #include <asm/ptrace.h>
44 #include <asm/idtentry.h>
45 #include <asm/irq.h>
46 #include <asm/io_apic.h>
47 #include <asm/i8259.h>
48 #include <asm/xen/pci.h>
49 #endif
50 #include <asm/sync_bitops.h>
51 #include <asm/xen/hypercall.h>
52 #include <asm/xen/hypervisor.h>
53 #include <xen/page.h>
54 
55 #include <xen/xen.h>
56 #include <xen/hvm.h>
57 #include <xen/xen-ops.h>
58 #include <xen/events.h>
59 #include <xen/interface/xen.h>
60 #include <xen/interface/event_channel.h>
61 #include <xen/interface/hvm/hvm_op.h>
62 #include <xen/interface/hvm/params.h>
63 #include <xen/interface/physdev.h>
64 #include <xen/interface/sched.h>
65 #include <xen/interface/vcpu.h>
66 #include <xen/xenbus.h>
67 #include <asm/hw_irq.h>
68 
69 #include "events_internal.h"
70 
71 #undef MODULE_PARAM_PREFIX
72 #define MODULE_PARAM_PREFIX "xen."
73 
74 /* Interrupt types. */
75 enum xen_irq_type {
76 	IRQT_UNBOUND = 0,
77 	IRQT_PIRQ,
78 	IRQT_VIRQ,
79 	IRQT_IPI,
80 	IRQT_EVTCHN
81 };
82 
83 /*
84  * Packed IRQ information:
85  * type - enum xen_irq_type
86  * event channel - irq->event channel mapping
87  * cpu - cpu this event channel is bound to
88  * index - type-specific information:
89  *    PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
90  *           guest, or GSI (real passthrough IRQ) of the device.
91  *    VIRQ - virq number
92  *    IPI - IPI vector
93  *    EVTCHN -
94  */
95 struct irq_info {
96 	struct list_head list;
97 	struct list_head eoi_list;
98 	short refcnt;
99 	u8 spurious_cnt;
100 	u8 is_accounted;
101 	enum xen_irq_type type; /* type */
102 	unsigned irq;
103 	evtchn_port_t evtchn;   /* event channel */
104 	unsigned short cpu;     /* cpu bound */
105 	unsigned short eoi_cpu; /* EOI must happen on this cpu-1 */
106 	unsigned int irq_epoch; /* If eoi_cpu valid: irq_epoch of event */
107 	u64 eoi_time;           /* Time in jiffies when to EOI. */
108 
109 	union {
110 		unsigned short virq;
111 		enum ipi_vector ipi;
112 		struct {
113 			unsigned short pirq;
114 			unsigned short gsi;
115 			unsigned char vector;
116 			unsigned char flags;
117 			uint16_t domid;
118 		} pirq;
119 		struct xenbus_device *interdomain;
120 	} u;
121 };
122 
123 #define PIRQ_NEEDS_EOI	(1 << 0)
124 #define PIRQ_SHAREABLE	(1 << 1)
125 #define PIRQ_MSI_GROUP	(1 << 2)
126 
127 static uint __read_mostly event_loop_timeout = 2;
128 module_param(event_loop_timeout, uint, 0644);
129 
130 static uint __read_mostly event_eoi_delay = 10;
131 module_param(event_eoi_delay, uint, 0644);
132 
133 const struct evtchn_ops *evtchn_ops;
134 
135 /*
136  * This lock protects updates to the following mapping and reference-count
137  * arrays. The lock does not need to be acquired to read the mapping tables.
138  */
139 static DEFINE_MUTEX(irq_mapping_update_lock);
140 
141 /*
142  * Lock protecting event handling loop against removing event channels.
143  * Adding of event channels is no issue as the associated IRQ becomes active
144  * only after everything is setup (before request_[threaded_]irq() the handler
145  * can't be entered for an event, as the event channel will be unmasked only
146  * then).
147  */
148 static DEFINE_RWLOCK(evtchn_rwlock);
149 
150 /*
151  * Lock hierarchy:
152  *
153  * irq_mapping_update_lock
154  *   evtchn_rwlock
155  *     IRQ-desc lock
156  *       percpu eoi_list_lock
157  */
158 
159 static LIST_HEAD(xen_irq_list_head);
160 
161 /* IRQ <-> VIRQ mapping. */
162 static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
163 
164 /* IRQ <-> IPI mapping */
165 static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
166 
167 /* Event channel distribution data */
168 static atomic_t channels_on_cpu[NR_CPUS];
169 
170 static int **evtchn_to_irq;
171 #ifdef CONFIG_X86
172 static unsigned long *pirq_eoi_map;
173 #endif
174 static bool (*pirq_needs_eoi)(unsigned irq);
175 
176 #define EVTCHN_ROW(e)  (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
177 #define EVTCHN_COL(e)  (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
178 #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
179 
180 /* Xen will never allocate port zero for any purpose. */
181 #define VALID_EVTCHN(chn)	((chn) != 0)
182 
183 static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY];
184 
185 static struct irq_chip xen_dynamic_chip;
186 static struct irq_chip xen_lateeoi_chip;
187 static struct irq_chip xen_percpu_chip;
188 static struct irq_chip xen_pirq_chip;
189 static void enable_dynirq(struct irq_data *data);
190 static void disable_dynirq(struct irq_data *data);
191 
192 static DEFINE_PER_CPU(unsigned int, irq_epoch);
193 
194 static void clear_evtchn_to_irq_row(unsigned row)
195 {
196 	unsigned col;
197 
198 	for (col = 0; col < EVTCHN_PER_ROW; col++)
199 		WRITE_ONCE(evtchn_to_irq[row][col], -1);
200 }
201 
202 static void clear_evtchn_to_irq_all(void)
203 {
204 	unsigned row;
205 
206 	for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
207 		if (evtchn_to_irq[row] == NULL)
208 			continue;
209 		clear_evtchn_to_irq_row(row);
210 	}
211 }
212 
213 static int set_evtchn_to_irq(evtchn_port_t evtchn, unsigned int irq)
214 {
215 	unsigned row;
216 	unsigned col;
217 
218 	if (evtchn >= xen_evtchn_max_channels())
219 		return -EINVAL;
220 
221 	row = EVTCHN_ROW(evtchn);
222 	col = EVTCHN_COL(evtchn);
223 
224 	if (evtchn_to_irq[row] == NULL) {
225 		/* Unallocated irq entries return -1 anyway */
226 		if (irq == -1)
227 			return 0;
228 
229 		evtchn_to_irq[row] = (int *)get_zeroed_page(GFP_KERNEL);
230 		if (evtchn_to_irq[row] == NULL)
231 			return -ENOMEM;
232 
233 		clear_evtchn_to_irq_row(row);
234 	}
235 
236 	WRITE_ONCE(evtchn_to_irq[row][col], irq);
237 	return 0;
238 }
239 
240 int get_evtchn_to_irq(evtchn_port_t evtchn)
241 {
242 	if (evtchn >= xen_evtchn_max_channels())
243 		return -1;
244 	if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
245 		return -1;
246 	return READ_ONCE(evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)]);
247 }
248 
249 /* Get info for IRQ */
250 static struct irq_info *info_for_irq(unsigned irq)
251 {
252 	if (irq < nr_legacy_irqs())
253 		return legacy_info_ptrs[irq];
254 	else
255 		return irq_get_chip_data(irq);
256 }
257 
258 static void set_info_for_irq(unsigned int irq, struct irq_info *info)
259 {
260 	if (irq < nr_legacy_irqs())
261 		legacy_info_ptrs[irq] = info;
262 	else
263 		irq_set_chip_data(irq, info);
264 }
265 
266 /* Per CPU channel accounting */
267 static void channels_on_cpu_dec(struct irq_info *info)
268 {
269 	if (!info->is_accounted)
270 		return;
271 
272 	info->is_accounted = 0;
273 
274 	if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
275 		return;
276 
277 	WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], -1 , 0));
278 }
279 
280 static void channels_on_cpu_inc(struct irq_info *info)
281 {
282 	if (WARN_ON_ONCE(info->cpu >= nr_cpu_ids))
283 		return;
284 
285 	if (WARN_ON_ONCE(!atomic_add_unless(&channels_on_cpu[info->cpu], 1,
286 					    INT_MAX)))
287 		return;
288 
289 	info->is_accounted = 1;
290 }
291 
292 /* Constructors for packed IRQ information. */
293 static int xen_irq_info_common_setup(struct irq_info *info,
294 				     unsigned irq,
295 				     enum xen_irq_type type,
296 				     evtchn_port_t evtchn,
297 				     unsigned short cpu)
298 {
299 	int ret;
300 
301 	BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
302 
303 	info->type = type;
304 	info->irq = irq;
305 	info->evtchn = evtchn;
306 	info->cpu = cpu;
307 
308 	ret = set_evtchn_to_irq(evtchn, irq);
309 	if (ret < 0)
310 		return ret;
311 
312 	irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
313 
314 	return xen_evtchn_port_setup(evtchn);
315 }
316 
317 static int xen_irq_info_evtchn_setup(unsigned irq,
318 				     evtchn_port_t evtchn,
319 				     struct xenbus_device *dev)
320 {
321 	struct irq_info *info = info_for_irq(irq);
322 	int ret;
323 
324 	ret = xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0);
325 	info->u.interdomain = dev;
326 	if (dev)
327 		atomic_inc(&dev->event_channels);
328 
329 	return ret;
330 }
331 
332 static int xen_irq_info_ipi_setup(unsigned cpu,
333 				  unsigned irq,
334 				  evtchn_port_t evtchn,
335 				  enum ipi_vector ipi)
336 {
337 	struct irq_info *info = info_for_irq(irq);
338 
339 	info->u.ipi = ipi;
340 
341 	per_cpu(ipi_to_irq, cpu)[ipi] = irq;
342 
343 	return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0);
344 }
345 
346 static int xen_irq_info_virq_setup(unsigned cpu,
347 				   unsigned irq,
348 				   evtchn_port_t evtchn,
349 				   unsigned virq)
350 {
351 	struct irq_info *info = info_for_irq(irq);
352 
353 	info->u.virq = virq;
354 
355 	per_cpu(virq_to_irq, cpu)[virq] = irq;
356 
357 	return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0);
358 }
359 
360 static int xen_irq_info_pirq_setup(unsigned irq,
361 				   evtchn_port_t evtchn,
362 				   unsigned pirq,
363 				   unsigned gsi,
364 				   uint16_t domid,
365 				   unsigned char flags)
366 {
367 	struct irq_info *info = info_for_irq(irq);
368 
369 	info->u.pirq.pirq = pirq;
370 	info->u.pirq.gsi = gsi;
371 	info->u.pirq.domid = domid;
372 	info->u.pirq.flags = flags;
373 
374 	return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0);
375 }
376 
377 static void xen_irq_info_cleanup(struct irq_info *info)
378 {
379 	set_evtchn_to_irq(info->evtchn, -1);
380 	info->evtchn = 0;
381 	channels_on_cpu_dec(info);
382 }
383 
384 /*
385  * Accessors for packed IRQ information.
386  */
387 evtchn_port_t evtchn_from_irq(unsigned irq)
388 {
389 	const struct irq_info *info = NULL;
390 
391 	if (likely(irq < nr_irqs))
392 		info = info_for_irq(irq);
393 	if (!info)
394 		return 0;
395 
396 	return info->evtchn;
397 }
398 
399 unsigned int irq_from_evtchn(evtchn_port_t evtchn)
400 {
401 	return get_evtchn_to_irq(evtchn);
402 }
403 EXPORT_SYMBOL_GPL(irq_from_evtchn);
404 
405 int irq_from_virq(unsigned int cpu, unsigned int virq)
406 {
407 	return per_cpu(virq_to_irq, cpu)[virq];
408 }
409 
410 static enum ipi_vector ipi_from_irq(unsigned irq)
411 {
412 	struct irq_info *info = info_for_irq(irq);
413 
414 	BUG_ON(info == NULL);
415 	BUG_ON(info->type != IRQT_IPI);
416 
417 	return info->u.ipi;
418 }
419 
420 static unsigned virq_from_irq(unsigned irq)
421 {
422 	struct irq_info *info = info_for_irq(irq);
423 
424 	BUG_ON(info == NULL);
425 	BUG_ON(info->type != IRQT_VIRQ);
426 
427 	return info->u.virq;
428 }
429 
430 static unsigned pirq_from_irq(unsigned irq)
431 {
432 	struct irq_info *info = info_for_irq(irq);
433 
434 	BUG_ON(info == NULL);
435 	BUG_ON(info->type != IRQT_PIRQ);
436 
437 	return info->u.pirq.pirq;
438 }
439 
440 static enum xen_irq_type type_from_irq(unsigned irq)
441 {
442 	return info_for_irq(irq)->type;
443 }
444 
445 static unsigned cpu_from_irq(unsigned irq)
446 {
447 	return info_for_irq(irq)->cpu;
448 }
449 
450 unsigned int cpu_from_evtchn(evtchn_port_t evtchn)
451 {
452 	int irq = get_evtchn_to_irq(evtchn);
453 	unsigned ret = 0;
454 
455 	if (irq != -1)
456 		ret = cpu_from_irq(irq);
457 
458 	return ret;
459 }
460 
461 #ifdef CONFIG_X86
462 static bool pirq_check_eoi_map(unsigned irq)
463 {
464 	return test_bit(pirq_from_irq(irq), pirq_eoi_map);
465 }
466 #endif
467 
468 static bool pirq_needs_eoi_flag(unsigned irq)
469 {
470 	struct irq_info *info = info_for_irq(irq);
471 	BUG_ON(info->type != IRQT_PIRQ);
472 
473 	return info->u.pirq.flags & PIRQ_NEEDS_EOI;
474 }
475 
476 static void bind_evtchn_to_cpu(evtchn_port_t evtchn, unsigned int cpu,
477 			       bool force_affinity)
478 {
479 	int irq = get_evtchn_to_irq(evtchn);
480 	struct irq_info *info = info_for_irq(irq);
481 
482 	BUG_ON(irq == -1);
483 
484 	if (IS_ENABLED(CONFIG_SMP) && force_affinity) {
485 		cpumask_copy(irq_get_affinity_mask(irq), cpumask_of(cpu));
486 		cpumask_copy(irq_get_effective_affinity_mask(irq),
487 			     cpumask_of(cpu));
488 	}
489 
490 	xen_evtchn_port_bind_to_cpu(evtchn, cpu, info->cpu);
491 
492 	channels_on_cpu_dec(info);
493 	info->cpu = cpu;
494 	channels_on_cpu_inc(info);
495 }
496 
497 /**
498  * notify_remote_via_irq - send event to remote end of event channel via irq
499  * @irq: irq of event channel to send event to
500  *
501  * Unlike notify_remote_via_evtchn(), this is safe to use across
502  * save/restore. Notifications on a broken connection are silently
503  * dropped.
504  */
505 void notify_remote_via_irq(int irq)
506 {
507 	evtchn_port_t evtchn = evtchn_from_irq(irq);
508 
509 	if (VALID_EVTCHN(evtchn))
510 		notify_remote_via_evtchn(evtchn);
511 }
512 EXPORT_SYMBOL_GPL(notify_remote_via_irq);
513 
514 struct lateeoi_work {
515 	struct delayed_work delayed;
516 	spinlock_t eoi_list_lock;
517 	struct list_head eoi_list;
518 };
519 
520 static DEFINE_PER_CPU(struct lateeoi_work, lateeoi);
521 
522 static void lateeoi_list_del(struct irq_info *info)
523 {
524 	struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
525 	unsigned long flags;
526 
527 	spin_lock_irqsave(&eoi->eoi_list_lock, flags);
528 	list_del_init(&info->eoi_list);
529 	spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
530 }
531 
532 static void lateeoi_list_add(struct irq_info *info)
533 {
534 	struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
535 	struct irq_info *elem;
536 	u64 now = get_jiffies_64();
537 	unsigned long delay;
538 	unsigned long flags;
539 
540 	if (now < info->eoi_time)
541 		delay = info->eoi_time - now;
542 	else
543 		delay = 1;
544 
545 	spin_lock_irqsave(&eoi->eoi_list_lock, flags);
546 
547 	if (list_empty(&eoi->eoi_list)) {
548 		list_add(&info->eoi_list, &eoi->eoi_list);
549 		mod_delayed_work_on(info->eoi_cpu, system_wq,
550 				    &eoi->delayed, delay);
551 	} else {
552 		list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) {
553 			if (elem->eoi_time <= info->eoi_time)
554 				break;
555 		}
556 		list_add(&info->eoi_list, &elem->eoi_list);
557 	}
558 
559 	spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
560 }
561 
562 static void xen_irq_lateeoi_locked(struct irq_info *info, bool spurious)
563 {
564 	evtchn_port_t evtchn;
565 	unsigned int cpu;
566 	unsigned int delay = 0;
567 
568 	evtchn = info->evtchn;
569 	if (!VALID_EVTCHN(evtchn) || !list_empty(&info->eoi_list))
570 		return;
571 
572 	if (spurious) {
573 		struct xenbus_device *dev = info->u.interdomain;
574 		unsigned int threshold = 1;
575 
576 		if (dev && dev->spurious_threshold)
577 			threshold = dev->spurious_threshold;
578 
579 		if ((1 << info->spurious_cnt) < (HZ << 2)) {
580 			if (info->spurious_cnt != 0xFF)
581 				info->spurious_cnt++;
582 		}
583 		if (info->spurious_cnt > threshold) {
584 			delay = 1 << (info->spurious_cnt - 1 - threshold);
585 			if (delay > HZ)
586 				delay = HZ;
587 			if (!info->eoi_time)
588 				info->eoi_cpu = smp_processor_id();
589 			info->eoi_time = get_jiffies_64() + delay;
590 			if (dev)
591 				atomic_add(delay, &dev->jiffies_eoi_delayed);
592 		}
593 		if (dev)
594 			atomic_inc(&dev->spurious_events);
595 	} else {
596 		info->spurious_cnt = 0;
597 	}
598 
599 	cpu = info->eoi_cpu;
600 	if (info->eoi_time &&
601 	    (info->irq_epoch == per_cpu(irq_epoch, cpu) || delay)) {
602 		lateeoi_list_add(info);
603 		return;
604 	}
605 
606 	info->eoi_time = 0;
607 	unmask_evtchn(evtchn);
608 }
609 
610 static void xen_irq_lateeoi_worker(struct work_struct *work)
611 {
612 	struct lateeoi_work *eoi;
613 	struct irq_info *info;
614 	u64 now = get_jiffies_64();
615 	unsigned long flags;
616 
617 	eoi = container_of(to_delayed_work(work), struct lateeoi_work, delayed);
618 
619 	read_lock_irqsave(&evtchn_rwlock, flags);
620 
621 	while (true) {
622 		spin_lock(&eoi->eoi_list_lock);
623 
624 		info = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
625 						eoi_list);
626 
627 		if (info == NULL || now < info->eoi_time) {
628 			spin_unlock(&eoi->eoi_list_lock);
629 			break;
630 		}
631 
632 		list_del_init(&info->eoi_list);
633 
634 		spin_unlock(&eoi->eoi_list_lock);
635 
636 		info->eoi_time = 0;
637 
638 		xen_irq_lateeoi_locked(info, false);
639 	}
640 
641 	if (info)
642 		mod_delayed_work_on(info->eoi_cpu, system_wq,
643 				    &eoi->delayed, info->eoi_time - now);
644 
645 	read_unlock_irqrestore(&evtchn_rwlock, flags);
646 }
647 
648 static void xen_cpu_init_eoi(unsigned int cpu)
649 {
650 	struct lateeoi_work *eoi = &per_cpu(lateeoi, cpu);
651 
652 	INIT_DELAYED_WORK(&eoi->delayed, xen_irq_lateeoi_worker);
653 	spin_lock_init(&eoi->eoi_list_lock);
654 	INIT_LIST_HEAD(&eoi->eoi_list);
655 }
656 
657 void xen_irq_lateeoi(unsigned int irq, unsigned int eoi_flags)
658 {
659 	struct irq_info *info;
660 	unsigned long flags;
661 
662 	read_lock_irqsave(&evtchn_rwlock, flags);
663 
664 	info = info_for_irq(irq);
665 
666 	if (info)
667 		xen_irq_lateeoi_locked(info, eoi_flags & XEN_EOI_FLAG_SPURIOUS);
668 
669 	read_unlock_irqrestore(&evtchn_rwlock, flags);
670 }
671 EXPORT_SYMBOL_GPL(xen_irq_lateeoi);
672 
673 static void xen_irq_init(unsigned irq)
674 {
675 	struct irq_info *info;
676 
677 	info = kzalloc(sizeof(*info), GFP_KERNEL);
678 	if (info == NULL)
679 		panic("Unable to allocate metadata for IRQ%d\n", irq);
680 
681 	info->type = IRQT_UNBOUND;
682 	info->refcnt = -1;
683 
684 	set_info_for_irq(irq, info);
685 	/*
686 	 * Interrupt affinity setting can be immediate. No point
687 	 * in delaying it until an interrupt is handled.
688 	 */
689 	irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
690 
691 	INIT_LIST_HEAD(&info->eoi_list);
692 	list_add_tail(&info->list, &xen_irq_list_head);
693 }
694 
695 static int __must_check xen_allocate_irqs_dynamic(int nvec)
696 {
697 	int i, irq = irq_alloc_descs(-1, 0, nvec, -1);
698 
699 	if (irq >= 0) {
700 		for (i = 0; i < nvec; i++)
701 			xen_irq_init(irq + i);
702 	}
703 
704 	return irq;
705 }
706 
707 static inline int __must_check xen_allocate_irq_dynamic(void)
708 {
709 
710 	return xen_allocate_irqs_dynamic(1);
711 }
712 
713 static int __must_check xen_allocate_irq_gsi(unsigned gsi)
714 {
715 	int irq;
716 
717 	/*
718 	 * A PV guest has no concept of a GSI (since it has no ACPI
719 	 * nor access to/knowledge of the physical APICs). Therefore
720 	 * all IRQs are dynamically allocated from the entire IRQ
721 	 * space.
722 	 */
723 	if (xen_pv_domain() && !xen_initial_domain())
724 		return xen_allocate_irq_dynamic();
725 
726 	/* Legacy IRQ descriptors are already allocated by the arch. */
727 	if (gsi < nr_legacy_irqs())
728 		irq = gsi;
729 	else
730 		irq = irq_alloc_desc_at(gsi, -1);
731 
732 	xen_irq_init(irq);
733 
734 	return irq;
735 }
736 
737 static void xen_free_irq(unsigned irq)
738 {
739 	struct irq_info *info = info_for_irq(irq);
740 	unsigned long flags;
741 
742 	if (WARN_ON(!info))
743 		return;
744 
745 	write_lock_irqsave(&evtchn_rwlock, flags);
746 
747 	if (!list_empty(&info->eoi_list))
748 		lateeoi_list_del(info);
749 
750 	list_del(&info->list);
751 
752 	set_info_for_irq(irq, NULL);
753 
754 	WARN_ON(info->refcnt > 0);
755 
756 	write_unlock_irqrestore(&evtchn_rwlock, flags);
757 
758 	kfree(info);
759 
760 	/* Legacy IRQ descriptors are managed by the arch. */
761 	if (irq < nr_legacy_irqs())
762 		return;
763 
764 	irq_free_desc(irq);
765 }
766 
767 static void xen_evtchn_close(evtchn_port_t port)
768 {
769 	struct evtchn_close close;
770 
771 	close.port = port;
772 	if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
773 		BUG();
774 }
775 
776 static void pirq_query_unmask(int irq)
777 {
778 	struct physdev_irq_status_query irq_status;
779 	struct irq_info *info = info_for_irq(irq);
780 
781 	BUG_ON(info->type != IRQT_PIRQ);
782 
783 	irq_status.irq = pirq_from_irq(irq);
784 	if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
785 		irq_status.flags = 0;
786 
787 	info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
788 	if (irq_status.flags & XENIRQSTAT_needs_eoi)
789 		info->u.pirq.flags |= PIRQ_NEEDS_EOI;
790 }
791 
792 static void eoi_pirq(struct irq_data *data)
793 {
794 	evtchn_port_t evtchn = evtchn_from_irq(data->irq);
795 	struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
796 	int rc = 0;
797 
798 	if (!VALID_EVTCHN(evtchn))
799 		return;
800 
801 	clear_evtchn(evtchn);
802 
803 	if (pirq_needs_eoi(data->irq)) {
804 		rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
805 		WARN_ON(rc);
806 	}
807 }
808 
809 static void mask_ack_pirq(struct irq_data *data)
810 {
811 	disable_dynirq(data);
812 	eoi_pirq(data);
813 }
814 
815 static unsigned int __startup_pirq(unsigned int irq)
816 {
817 	struct evtchn_bind_pirq bind_pirq;
818 	struct irq_info *info = info_for_irq(irq);
819 	evtchn_port_t evtchn = evtchn_from_irq(irq);
820 	int rc;
821 
822 	BUG_ON(info->type != IRQT_PIRQ);
823 
824 	if (VALID_EVTCHN(evtchn))
825 		goto out;
826 
827 	bind_pirq.pirq = pirq_from_irq(irq);
828 	/* NB. We are happy to share unless we are probing. */
829 	bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
830 					BIND_PIRQ__WILL_SHARE : 0;
831 	rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
832 	if (rc != 0) {
833 		pr_warn("Failed to obtain physical IRQ %d\n", irq);
834 		return 0;
835 	}
836 	evtchn = bind_pirq.port;
837 
838 	pirq_query_unmask(irq);
839 
840 	rc = set_evtchn_to_irq(evtchn, irq);
841 	if (rc)
842 		goto err;
843 
844 	info->evtchn = evtchn;
845 	bind_evtchn_to_cpu(evtchn, 0, false);
846 
847 	rc = xen_evtchn_port_setup(evtchn);
848 	if (rc)
849 		goto err;
850 
851 out:
852 	unmask_evtchn(evtchn);
853 	eoi_pirq(irq_get_irq_data(irq));
854 
855 	return 0;
856 
857 err:
858 	pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc);
859 	xen_evtchn_close(evtchn);
860 	return 0;
861 }
862 
863 static unsigned int startup_pirq(struct irq_data *data)
864 {
865 	return __startup_pirq(data->irq);
866 }
867 
868 static void shutdown_pirq(struct irq_data *data)
869 {
870 	unsigned int irq = data->irq;
871 	struct irq_info *info = info_for_irq(irq);
872 	evtchn_port_t evtchn = evtchn_from_irq(irq);
873 
874 	BUG_ON(info->type != IRQT_PIRQ);
875 
876 	if (!VALID_EVTCHN(evtchn))
877 		return;
878 
879 	mask_evtchn(evtchn);
880 	xen_evtchn_close(evtchn);
881 	xen_irq_info_cleanup(info);
882 }
883 
884 static void enable_pirq(struct irq_data *data)
885 {
886 	enable_dynirq(data);
887 }
888 
889 static void disable_pirq(struct irq_data *data)
890 {
891 	disable_dynirq(data);
892 }
893 
894 int xen_irq_from_gsi(unsigned gsi)
895 {
896 	struct irq_info *info;
897 
898 	list_for_each_entry(info, &xen_irq_list_head, list) {
899 		if (info->type != IRQT_PIRQ)
900 			continue;
901 
902 		if (info->u.pirq.gsi == gsi)
903 			return info->irq;
904 	}
905 
906 	return -1;
907 }
908 EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
909 
910 static void __unbind_from_irq(unsigned int irq)
911 {
912 	evtchn_port_t evtchn = evtchn_from_irq(irq);
913 	struct irq_info *info = info_for_irq(irq);
914 
915 	if (info->refcnt > 0) {
916 		info->refcnt--;
917 		if (info->refcnt != 0)
918 			return;
919 	}
920 
921 	if (VALID_EVTCHN(evtchn)) {
922 		unsigned int cpu = cpu_from_irq(irq);
923 		struct xenbus_device *dev;
924 
925 		xen_evtchn_close(evtchn);
926 
927 		switch (type_from_irq(irq)) {
928 		case IRQT_VIRQ:
929 			per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1;
930 			break;
931 		case IRQT_IPI:
932 			per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1;
933 			break;
934 		case IRQT_EVTCHN:
935 			dev = info->u.interdomain;
936 			if (dev)
937 				atomic_dec(&dev->event_channels);
938 			break;
939 		default:
940 			break;
941 		}
942 
943 		xen_irq_info_cleanup(info);
944 	}
945 
946 	xen_free_irq(irq);
947 }
948 
949 /*
950  * Do not make any assumptions regarding the relationship between the
951  * IRQ number returned here and the Xen pirq argument.
952  *
953  * Note: We don't assign an event channel until the irq actually started
954  * up.  Return an existing irq if we've already got one for the gsi.
955  *
956  * Shareable implies level triggered, not shareable implies edge
957  * triggered here.
958  */
959 int xen_bind_pirq_gsi_to_irq(unsigned gsi,
960 			     unsigned pirq, int shareable, char *name)
961 {
962 	int irq = -1;
963 	struct physdev_irq irq_op;
964 	int ret;
965 
966 	mutex_lock(&irq_mapping_update_lock);
967 
968 	irq = xen_irq_from_gsi(gsi);
969 	if (irq != -1) {
970 		pr_info("%s: returning irq %d for gsi %u\n",
971 			__func__, irq, gsi);
972 		goto out;
973 	}
974 
975 	irq = xen_allocate_irq_gsi(gsi);
976 	if (irq < 0)
977 		goto out;
978 
979 	irq_op.irq = irq;
980 	irq_op.vector = 0;
981 
982 	/* Only the privileged domain can do this. For non-priv, the pcifront
983 	 * driver provides a PCI bus that does the call to do exactly
984 	 * this in the priv domain. */
985 	if (xen_initial_domain() &&
986 	    HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
987 		xen_free_irq(irq);
988 		irq = -ENOSPC;
989 		goto out;
990 	}
991 
992 	ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF,
993 			       shareable ? PIRQ_SHAREABLE : 0);
994 	if (ret < 0) {
995 		__unbind_from_irq(irq);
996 		irq = ret;
997 		goto out;
998 	}
999 
1000 	pirq_query_unmask(irq);
1001 	/* We try to use the handler with the appropriate semantic for the
1002 	 * type of interrupt: if the interrupt is an edge triggered
1003 	 * interrupt we use handle_edge_irq.
1004 	 *
1005 	 * On the other hand if the interrupt is level triggered we use
1006 	 * handle_fasteoi_irq like the native code does for this kind of
1007 	 * interrupts.
1008 	 *
1009 	 * Depending on the Xen version, pirq_needs_eoi might return true
1010 	 * not only for level triggered interrupts but for edge triggered
1011 	 * interrupts too. In any case Xen always honors the eoi mechanism,
1012 	 * not injecting any more pirqs of the same kind if the first one
1013 	 * hasn't received an eoi yet. Therefore using the fasteoi handler
1014 	 * is the right choice either way.
1015 	 */
1016 	if (shareable)
1017 		irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
1018 				handle_fasteoi_irq, name);
1019 	else
1020 		irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
1021 				handle_edge_irq, name);
1022 
1023 out:
1024 	mutex_unlock(&irq_mapping_update_lock);
1025 
1026 	return irq;
1027 }
1028 
1029 #ifdef CONFIG_PCI_MSI
1030 int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
1031 {
1032 	int rc;
1033 	struct physdev_get_free_pirq op_get_free_pirq;
1034 
1035 	op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
1036 	rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
1037 
1038 	WARN_ONCE(rc == -ENOSYS,
1039 		  "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
1040 
1041 	return rc ? -1 : op_get_free_pirq.pirq;
1042 }
1043 
1044 int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
1045 			     int pirq, int nvec, const char *name, domid_t domid)
1046 {
1047 	int i, irq, ret;
1048 
1049 	mutex_lock(&irq_mapping_update_lock);
1050 
1051 	irq = xen_allocate_irqs_dynamic(nvec);
1052 	if (irq < 0)
1053 		goto out;
1054 
1055 	for (i = 0; i < nvec; i++) {
1056 		irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name);
1057 
1058 		ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid,
1059 					      i == 0 ? 0 : PIRQ_MSI_GROUP);
1060 		if (ret < 0)
1061 			goto error_irq;
1062 	}
1063 
1064 	ret = irq_set_msi_desc(irq, msidesc);
1065 	if (ret < 0)
1066 		goto error_irq;
1067 out:
1068 	mutex_unlock(&irq_mapping_update_lock);
1069 	return irq;
1070 error_irq:
1071 	while (nvec--)
1072 		__unbind_from_irq(irq + nvec);
1073 	mutex_unlock(&irq_mapping_update_lock);
1074 	return ret;
1075 }
1076 #endif
1077 
1078 int xen_destroy_irq(int irq)
1079 {
1080 	struct physdev_unmap_pirq unmap_irq;
1081 	struct irq_info *info = info_for_irq(irq);
1082 	int rc = -ENOENT;
1083 
1084 	mutex_lock(&irq_mapping_update_lock);
1085 
1086 	/*
1087 	 * If trying to remove a vector in a MSI group different
1088 	 * than the first one skip the PIRQ unmap unless this vector
1089 	 * is the first one in the group.
1090 	 */
1091 	if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) {
1092 		unmap_irq.pirq = info->u.pirq.pirq;
1093 		unmap_irq.domid = info->u.pirq.domid;
1094 		rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
1095 		/* If another domain quits without making the pci_disable_msix
1096 		 * call, the Xen hypervisor takes care of freeing the PIRQs
1097 		 * (free_domain_pirqs).
1098 		 */
1099 		if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
1100 			pr_info("domain %d does not have %d anymore\n",
1101 				info->u.pirq.domid, info->u.pirq.pirq);
1102 		else if (rc) {
1103 			pr_warn("unmap irq failed %d\n", rc);
1104 			goto out;
1105 		}
1106 	}
1107 
1108 	xen_free_irq(irq);
1109 
1110 out:
1111 	mutex_unlock(&irq_mapping_update_lock);
1112 	return rc;
1113 }
1114 
1115 int xen_irq_from_pirq(unsigned pirq)
1116 {
1117 	int irq;
1118 
1119 	struct irq_info *info;
1120 
1121 	mutex_lock(&irq_mapping_update_lock);
1122 
1123 	list_for_each_entry(info, &xen_irq_list_head, list) {
1124 		if (info->type != IRQT_PIRQ)
1125 			continue;
1126 		irq = info->irq;
1127 		if (info->u.pirq.pirq == pirq)
1128 			goto out;
1129 	}
1130 	irq = -1;
1131 out:
1132 	mutex_unlock(&irq_mapping_update_lock);
1133 
1134 	return irq;
1135 }
1136 
1137 
1138 int xen_pirq_from_irq(unsigned irq)
1139 {
1140 	return pirq_from_irq(irq);
1141 }
1142 EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
1143 
1144 static int bind_evtchn_to_irq_chip(evtchn_port_t evtchn, struct irq_chip *chip,
1145 				   struct xenbus_device *dev)
1146 {
1147 	int irq;
1148 	int ret;
1149 
1150 	if (evtchn >= xen_evtchn_max_channels())
1151 		return -ENOMEM;
1152 
1153 	mutex_lock(&irq_mapping_update_lock);
1154 
1155 	irq = get_evtchn_to_irq(evtchn);
1156 
1157 	if (irq == -1) {
1158 		irq = xen_allocate_irq_dynamic();
1159 		if (irq < 0)
1160 			goto out;
1161 
1162 		irq_set_chip_and_handler_name(irq, chip,
1163 					      handle_edge_irq, "event");
1164 
1165 		ret = xen_irq_info_evtchn_setup(irq, evtchn, dev);
1166 		if (ret < 0) {
1167 			__unbind_from_irq(irq);
1168 			irq = ret;
1169 			goto out;
1170 		}
1171 		/*
1172 		 * New interdomain events are initially bound to vCPU0 This
1173 		 * is required to setup the event channel in the first
1174 		 * place and also important for UP guests because the
1175 		 * affinity setting is not invoked on them so nothing would
1176 		 * bind the channel.
1177 		 */
1178 		bind_evtchn_to_cpu(evtchn, 0, false);
1179 	} else {
1180 		struct irq_info *info = info_for_irq(irq);
1181 		WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
1182 	}
1183 
1184 out:
1185 	mutex_unlock(&irq_mapping_update_lock);
1186 
1187 	return irq;
1188 }
1189 
1190 int bind_evtchn_to_irq(evtchn_port_t evtchn)
1191 {
1192 	return bind_evtchn_to_irq_chip(evtchn, &xen_dynamic_chip, NULL);
1193 }
1194 EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
1195 
1196 static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
1197 {
1198 	struct evtchn_bind_ipi bind_ipi;
1199 	evtchn_port_t evtchn;
1200 	int ret, irq;
1201 
1202 	mutex_lock(&irq_mapping_update_lock);
1203 
1204 	irq = per_cpu(ipi_to_irq, cpu)[ipi];
1205 
1206 	if (irq == -1) {
1207 		irq = xen_allocate_irq_dynamic();
1208 		if (irq < 0)
1209 			goto out;
1210 
1211 		irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
1212 					      handle_percpu_irq, "ipi");
1213 
1214 		bind_ipi.vcpu = xen_vcpu_nr(cpu);
1215 		if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1216 						&bind_ipi) != 0)
1217 			BUG();
1218 		evtchn = bind_ipi.port;
1219 
1220 		ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
1221 		if (ret < 0) {
1222 			__unbind_from_irq(irq);
1223 			irq = ret;
1224 			goto out;
1225 		}
1226 		/*
1227 		 * Force the affinity mask to the target CPU so proc shows
1228 		 * the correct target.
1229 		 */
1230 		bind_evtchn_to_cpu(evtchn, cpu, true);
1231 	} else {
1232 		struct irq_info *info = info_for_irq(irq);
1233 		WARN_ON(info == NULL || info->type != IRQT_IPI);
1234 	}
1235 
1236  out:
1237 	mutex_unlock(&irq_mapping_update_lock);
1238 	return irq;
1239 }
1240 
1241 static int bind_interdomain_evtchn_to_irq_chip(struct xenbus_device *dev,
1242 					       evtchn_port_t remote_port,
1243 					       struct irq_chip *chip)
1244 {
1245 	struct evtchn_bind_interdomain bind_interdomain;
1246 	int err;
1247 
1248 	bind_interdomain.remote_dom  = dev->otherend_id;
1249 	bind_interdomain.remote_port = remote_port;
1250 
1251 	err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
1252 					  &bind_interdomain);
1253 
1254 	return err ? : bind_evtchn_to_irq_chip(bind_interdomain.local_port,
1255 					       chip, dev);
1256 }
1257 
1258 int bind_interdomain_evtchn_to_irq_lateeoi(struct xenbus_device *dev,
1259 					   evtchn_port_t remote_port)
1260 {
1261 	return bind_interdomain_evtchn_to_irq_chip(dev, remote_port,
1262 						   &xen_lateeoi_chip);
1263 }
1264 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq_lateeoi);
1265 
1266 static int find_virq(unsigned int virq, unsigned int cpu, evtchn_port_t *evtchn)
1267 {
1268 	struct evtchn_status status;
1269 	evtchn_port_t port;
1270 	int rc = -ENOENT;
1271 
1272 	memset(&status, 0, sizeof(status));
1273 	for (port = 0; port < xen_evtchn_max_channels(); port++) {
1274 		status.dom = DOMID_SELF;
1275 		status.port = port;
1276 		rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
1277 		if (rc < 0)
1278 			continue;
1279 		if (status.status != EVTCHNSTAT_virq)
1280 			continue;
1281 		if (status.u.virq == virq && status.vcpu == xen_vcpu_nr(cpu)) {
1282 			*evtchn = port;
1283 			break;
1284 		}
1285 	}
1286 	return rc;
1287 }
1288 
1289 /**
1290  * xen_evtchn_nr_channels - number of usable event channel ports
1291  *
1292  * This may be less than the maximum supported by the current
1293  * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
1294  * supported.
1295  */
1296 unsigned xen_evtchn_nr_channels(void)
1297 {
1298         return evtchn_ops->nr_channels();
1299 }
1300 EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
1301 
1302 int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
1303 {
1304 	struct evtchn_bind_virq bind_virq;
1305 	evtchn_port_t evtchn = 0;
1306 	int irq, ret;
1307 
1308 	mutex_lock(&irq_mapping_update_lock);
1309 
1310 	irq = per_cpu(virq_to_irq, cpu)[virq];
1311 
1312 	if (irq == -1) {
1313 		irq = xen_allocate_irq_dynamic();
1314 		if (irq < 0)
1315 			goto out;
1316 
1317 		if (percpu)
1318 			irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
1319 						      handle_percpu_irq, "virq");
1320 		else
1321 			irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
1322 						      handle_edge_irq, "virq");
1323 
1324 		bind_virq.virq = virq;
1325 		bind_virq.vcpu = xen_vcpu_nr(cpu);
1326 		ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1327 						&bind_virq);
1328 		if (ret == 0)
1329 			evtchn = bind_virq.port;
1330 		else {
1331 			if (ret == -EEXIST)
1332 				ret = find_virq(virq, cpu, &evtchn);
1333 			BUG_ON(ret < 0);
1334 		}
1335 
1336 		ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
1337 		if (ret < 0) {
1338 			__unbind_from_irq(irq);
1339 			irq = ret;
1340 			goto out;
1341 		}
1342 
1343 		/*
1344 		 * Force the affinity mask for percpu interrupts so proc
1345 		 * shows the correct target.
1346 		 */
1347 		bind_evtchn_to_cpu(evtchn, cpu, percpu);
1348 	} else {
1349 		struct irq_info *info = info_for_irq(irq);
1350 		WARN_ON(info == NULL || info->type != IRQT_VIRQ);
1351 	}
1352 
1353 out:
1354 	mutex_unlock(&irq_mapping_update_lock);
1355 
1356 	return irq;
1357 }
1358 
1359 static void unbind_from_irq(unsigned int irq)
1360 {
1361 	mutex_lock(&irq_mapping_update_lock);
1362 	__unbind_from_irq(irq);
1363 	mutex_unlock(&irq_mapping_update_lock);
1364 }
1365 
1366 static int bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn,
1367 					  irq_handler_t handler,
1368 					  unsigned long irqflags,
1369 					  const char *devname, void *dev_id,
1370 					  struct irq_chip *chip)
1371 {
1372 	int irq, retval;
1373 
1374 	irq = bind_evtchn_to_irq_chip(evtchn, chip, NULL);
1375 	if (irq < 0)
1376 		return irq;
1377 	retval = request_irq(irq, handler, irqflags, devname, dev_id);
1378 	if (retval != 0) {
1379 		unbind_from_irq(irq);
1380 		return retval;
1381 	}
1382 
1383 	return irq;
1384 }
1385 
1386 int bind_evtchn_to_irqhandler(evtchn_port_t evtchn,
1387 			      irq_handler_t handler,
1388 			      unsigned long irqflags,
1389 			      const char *devname, void *dev_id)
1390 {
1391 	return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
1392 					      devname, dev_id,
1393 					      &xen_dynamic_chip);
1394 }
1395 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
1396 
1397 int bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn,
1398 				      irq_handler_t handler,
1399 				      unsigned long irqflags,
1400 				      const char *devname, void *dev_id)
1401 {
1402 	return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
1403 					      devname, dev_id,
1404 					      &xen_lateeoi_chip);
1405 }
1406 EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler_lateeoi);
1407 
1408 static int bind_interdomain_evtchn_to_irqhandler_chip(
1409 		struct xenbus_device *dev, evtchn_port_t remote_port,
1410 		irq_handler_t handler, unsigned long irqflags,
1411 		const char *devname, void *dev_id, struct irq_chip *chip)
1412 {
1413 	int irq, retval;
1414 
1415 	irq = bind_interdomain_evtchn_to_irq_chip(dev, remote_port, chip);
1416 	if (irq < 0)
1417 		return irq;
1418 
1419 	retval = request_irq(irq, handler, irqflags, devname, dev_id);
1420 	if (retval != 0) {
1421 		unbind_from_irq(irq);
1422 		return retval;
1423 	}
1424 
1425 	return irq;
1426 }
1427 
1428 int bind_interdomain_evtchn_to_irqhandler_lateeoi(struct xenbus_device *dev,
1429 						  evtchn_port_t remote_port,
1430 						  irq_handler_t handler,
1431 						  unsigned long irqflags,
1432 						  const char *devname,
1433 						  void *dev_id)
1434 {
1435 	return bind_interdomain_evtchn_to_irqhandler_chip(dev,
1436 				remote_port, handler, irqflags, devname,
1437 				dev_id, &xen_lateeoi_chip);
1438 }
1439 EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler_lateeoi);
1440 
1441 int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
1442 			    irq_handler_t handler,
1443 			    unsigned long irqflags, const char *devname, void *dev_id)
1444 {
1445 	int irq, retval;
1446 
1447 	irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
1448 	if (irq < 0)
1449 		return irq;
1450 	retval = request_irq(irq, handler, irqflags, devname, dev_id);
1451 	if (retval != 0) {
1452 		unbind_from_irq(irq);
1453 		return retval;
1454 	}
1455 
1456 	return irq;
1457 }
1458 EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
1459 
1460 int bind_ipi_to_irqhandler(enum ipi_vector ipi,
1461 			   unsigned int cpu,
1462 			   irq_handler_t handler,
1463 			   unsigned long irqflags,
1464 			   const char *devname,
1465 			   void *dev_id)
1466 {
1467 	int irq, retval;
1468 
1469 	irq = bind_ipi_to_irq(ipi, cpu);
1470 	if (irq < 0)
1471 		return irq;
1472 
1473 	irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
1474 	retval = request_irq(irq, handler, irqflags, devname, dev_id);
1475 	if (retval != 0) {
1476 		unbind_from_irq(irq);
1477 		return retval;
1478 	}
1479 
1480 	return irq;
1481 }
1482 
1483 void unbind_from_irqhandler(unsigned int irq, void *dev_id)
1484 {
1485 	struct irq_info *info = info_for_irq(irq);
1486 
1487 	if (WARN_ON(!info))
1488 		return;
1489 	free_irq(irq, dev_id);
1490 	unbind_from_irq(irq);
1491 }
1492 EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
1493 
1494 /**
1495  * xen_set_irq_priority() - set an event channel priority.
1496  * @irq:irq bound to an event channel.
1497  * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
1498  */
1499 int xen_set_irq_priority(unsigned irq, unsigned priority)
1500 {
1501 	struct evtchn_set_priority set_priority;
1502 
1503 	set_priority.port = evtchn_from_irq(irq);
1504 	set_priority.priority = priority;
1505 
1506 	return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
1507 					   &set_priority);
1508 }
1509 EXPORT_SYMBOL_GPL(xen_set_irq_priority);
1510 
1511 int evtchn_make_refcounted(evtchn_port_t evtchn)
1512 {
1513 	int irq = get_evtchn_to_irq(evtchn);
1514 	struct irq_info *info;
1515 
1516 	if (irq == -1)
1517 		return -ENOENT;
1518 
1519 	info = info_for_irq(irq);
1520 
1521 	if (!info)
1522 		return -ENOENT;
1523 
1524 	WARN_ON(info->refcnt != -1);
1525 
1526 	info->refcnt = 1;
1527 
1528 	return 0;
1529 }
1530 EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
1531 
1532 int evtchn_get(evtchn_port_t evtchn)
1533 {
1534 	int irq;
1535 	struct irq_info *info;
1536 	int err = -ENOENT;
1537 
1538 	if (evtchn >= xen_evtchn_max_channels())
1539 		return -EINVAL;
1540 
1541 	mutex_lock(&irq_mapping_update_lock);
1542 
1543 	irq = get_evtchn_to_irq(evtchn);
1544 	if (irq == -1)
1545 		goto done;
1546 
1547 	info = info_for_irq(irq);
1548 
1549 	if (!info)
1550 		goto done;
1551 
1552 	err = -EINVAL;
1553 	if (info->refcnt <= 0 || info->refcnt == SHRT_MAX)
1554 		goto done;
1555 
1556 	info->refcnt++;
1557 	err = 0;
1558  done:
1559 	mutex_unlock(&irq_mapping_update_lock);
1560 
1561 	return err;
1562 }
1563 EXPORT_SYMBOL_GPL(evtchn_get);
1564 
1565 void evtchn_put(evtchn_port_t evtchn)
1566 {
1567 	int irq = get_evtchn_to_irq(evtchn);
1568 	if (WARN_ON(irq == -1))
1569 		return;
1570 	unbind_from_irq(irq);
1571 }
1572 EXPORT_SYMBOL_GPL(evtchn_put);
1573 
1574 void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
1575 {
1576 	int irq;
1577 
1578 #ifdef CONFIG_X86
1579 	if (unlikely(vector == XEN_NMI_VECTOR)) {
1580 		int rc =  HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu),
1581 					     NULL);
1582 		if (rc < 0)
1583 			printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
1584 		return;
1585 	}
1586 #endif
1587 	irq = per_cpu(ipi_to_irq, cpu)[vector];
1588 	BUG_ON(irq < 0);
1589 	notify_remote_via_irq(irq);
1590 }
1591 
1592 struct evtchn_loop_ctrl {
1593 	ktime_t timeout;
1594 	unsigned count;
1595 	bool defer_eoi;
1596 };
1597 
1598 void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl)
1599 {
1600 	int irq;
1601 	struct irq_info *info;
1602 	struct xenbus_device *dev;
1603 
1604 	irq = get_evtchn_to_irq(port);
1605 	if (irq == -1)
1606 		return;
1607 
1608 	/*
1609 	 * Check for timeout every 256 events.
1610 	 * We are setting the timeout value only after the first 256
1611 	 * events in order to not hurt the common case of few loop
1612 	 * iterations. The 256 is basically an arbitrary value.
1613 	 *
1614 	 * In case we are hitting the timeout we need to defer all further
1615 	 * EOIs in order to ensure to leave the event handling loop rather
1616 	 * sooner than later.
1617 	 */
1618 	if (!ctrl->defer_eoi && !(++ctrl->count & 0xff)) {
1619 		ktime_t kt = ktime_get();
1620 
1621 		if (!ctrl->timeout) {
1622 			kt = ktime_add_ms(kt,
1623 					  jiffies_to_msecs(event_loop_timeout));
1624 			ctrl->timeout = kt;
1625 		} else if (kt > ctrl->timeout) {
1626 			ctrl->defer_eoi = true;
1627 		}
1628 	}
1629 
1630 	info = info_for_irq(irq);
1631 
1632 	dev = (info->type == IRQT_EVTCHN) ? info->u.interdomain : NULL;
1633 	if (dev)
1634 		atomic_inc(&dev->events);
1635 
1636 	if (ctrl->defer_eoi) {
1637 		info->eoi_cpu = smp_processor_id();
1638 		info->irq_epoch = __this_cpu_read(irq_epoch);
1639 		info->eoi_time = get_jiffies_64() + event_eoi_delay;
1640 	}
1641 
1642 	generic_handle_irq(irq);
1643 }
1644 
1645 static void __xen_evtchn_do_upcall(void)
1646 {
1647 	struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
1648 	int cpu = smp_processor_id();
1649 	struct evtchn_loop_ctrl ctrl = { 0 };
1650 
1651 	read_lock(&evtchn_rwlock);
1652 
1653 	do {
1654 		vcpu_info->evtchn_upcall_pending = 0;
1655 
1656 		xen_evtchn_handle_events(cpu, &ctrl);
1657 
1658 		BUG_ON(!irqs_disabled());
1659 
1660 		virt_rmb(); /* Hypervisor can set upcall pending. */
1661 
1662 	} while (vcpu_info->evtchn_upcall_pending);
1663 
1664 	read_unlock(&evtchn_rwlock);
1665 
1666 	/*
1667 	 * Increment irq_epoch only now to defer EOIs only for
1668 	 * xen_irq_lateeoi() invocations occurring from inside the loop
1669 	 * above.
1670 	 */
1671 	__this_cpu_inc(irq_epoch);
1672 }
1673 
1674 void xen_evtchn_do_upcall(struct pt_regs *regs)
1675 {
1676 	struct pt_regs *old_regs = set_irq_regs(regs);
1677 
1678 	irq_enter();
1679 
1680 	__xen_evtchn_do_upcall();
1681 
1682 	irq_exit();
1683 	set_irq_regs(old_regs);
1684 }
1685 
1686 void xen_hvm_evtchn_do_upcall(void)
1687 {
1688 	__xen_evtchn_do_upcall();
1689 }
1690 EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
1691 
1692 /* Rebind a new event channel to an existing irq. */
1693 void rebind_evtchn_irq(evtchn_port_t evtchn, int irq)
1694 {
1695 	struct irq_info *info = info_for_irq(irq);
1696 
1697 	if (WARN_ON(!info))
1698 		return;
1699 
1700 	/* Make sure the irq is masked, since the new event channel
1701 	   will also be masked. */
1702 	disable_irq(irq);
1703 
1704 	mutex_lock(&irq_mapping_update_lock);
1705 
1706 	/* After resume the irq<->evtchn mappings are all cleared out */
1707 	BUG_ON(get_evtchn_to_irq(evtchn) != -1);
1708 	/* Expect irq to have been bound before,
1709 	   so there should be a proper type */
1710 	BUG_ON(info->type == IRQT_UNBOUND);
1711 
1712 	(void)xen_irq_info_evtchn_setup(irq, evtchn, NULL);
1713 
1714 	mutex_unlock(&irq_mapping_update_lock);
1715 
1716 	bind_evtchn_to_cpu(evtchn, info->cpu, false);
1717 
1718 	/* Unmask the event channel. */
1719 	enable_irq(irq);
1720 }
1721 
1722 /* Rebind an evtchn so that it gets delivered to a specific cpu */
1723 static int xen_rebind_evtchn_to_cpu(evtchn_port_t evtchn, unsigned int tcpu)
1724 {
1725 	struct evtchn_bind_vcpu bind_vcpu;
1726 	int masked;
1727 
1728 	if (!VALID_EVTCHN(evtchn))
1729 		return -1;
1730 
1731 	if (!xen_support_evtchn_rebind())
1732 		return -1;
1733 
1734 	/* Send future instances of this interrupt to other vcpu. */
1735 	bind_vcpu.port = evtchn;
1736 	bind_vcpu.vcpu = xen_vcpu_nr(tcpu);
1737 
1738 	/*
1739 	 * Mask the event while changing the VCPU binding to prevent
1740 	 * it being delivered on an unexpected VCPU.
1741 	 */
1742 	masked = test_and_set_mask(evtchn);
1743 
1744 	/*
1745 	 * If this fails, it usually just indicates that we're dealing with a
1746 	 * virq or IPI channel, which don't actually need to be rebound. Ignore
1747 	 * it, but don't do the xenlinux-level rebind in that case.
1748 	 */
1749 	if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
1750 		bind_evtchn_to_cpu(evtchn, tcpu, false);
1751 
1752 	if (!masked)
1753 		unmask_evtchn(evtchn);
1754 
1755 	return 0;
1756 }
1757 
1758 /*
1759  * Find the CPU within @dest mask which has the least number of channels
1760  * assigned. This is not precise as the per cpu counts can be modified
1761  * concurrently.
1762  */
1763 static unsigned int select_target_cpu(const struct cpumask *dest)
1764 {
1765 	unsigned int cpu, best_cpu = UINT_MAX, minch = UINT_MAX;
1766 
1767 	for_each_cpu_and(cpu, dest, cpu_online_mask) {
1768 		unsigned int curch = atomic_read(&channels_on_cpu[cpu]);
1769 
1770 		if (curch < minch) {
1771 			minch = curch;
1772 			best_cpu = cpu;
1773 		}
1774 	}
1775 
1776 	/*
1777 	 * Catch the unlikely case that dest contains no online CPUs. Can't
1778 	 * recurse.
1779 	 */
1780 	if (best_cpu == UINT_MAX)
1781 		return select_target_cpu(cpu_online_mask);
1782 
1783 	return best_cpu;
1784 }
1785 
1786 static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
1787 			    bool force)
1788 {
1789 	unsigned int tcpu = select_target_cpu(dest);
1790 	int ret;
1791 
1792 	ret = xen_rebind_evtchn_to_cpu(evtchn_from_irq(data->irq), tcpu);
1793 	if (!ret)
1794 		irq_data_update_effective_affinity(data, cpumask_of(tcpu));
1795 
1796 	return ret;
1797 }
1798 
1799 static void enable_dynirq(struct irq_data *data)
1800 {
1801 	evtchn_port_t evtchn = evtchn_from_irq(data->irq);
1802 
1803 	if (VALID_EVTCHN(evtchn))
1804 		unmask_evtchn(evtchn);
1805 }
1806 
1807 static void disable_dynirq(struct irq_data *data)
1808 {
1809 	evtchn_port_t evtchn = evtchn_from_irq(data->irq);
1810 
1811 	if (VALID_EVTCHN(evtchn))
1812 		mask_evtchn(evtchn);
1813 }
1814 
1815 static void ack_dynirq(struct irq_data *data)
1816 {
1817 	evtchn_port_t evtchn = evtchn_from_irq(data->irq);
1818 
1819 	if (!VALID_EVTCHN(evtchn))
1820 		return;
1821 
1822 	clear_evtchn(evtchn);
1823 }
1824 
1825 static void mask_ack_dynirq(struct irq_data *data)
1826 {
1827 	disable_dynirq(data);
1828 	ack_dynirq(data);
1829 }
1830 
1831 static int retrigger_dynirq(struct irq_data *data)
1832 {
1833 	evtchn_port_t evtchn = evtchn_from_irq(data->irq);
1834 	int masked;
1835 
1836 	if (!VALID_EVTCHN(evtchn))
1837 		return 0;
1838 
1839 	masked = test_and_set_mask(evtchn);
1840 	set_evtchn(evtchn);
1841 	if (!masked)
1842 		unmask_evtchn(evtchn);
1843 
1844 	return 1;
1845 }
1846 
1847 static void restore_pirqs(void)
1848 {
1849 	int pirq, rc, irq, gsi;
1850 	struct physdev_map_pirq map_irq;
1851 	struct irq_info *info;
1852 
1853 	list_for_each_entry(info, &xen_irq_list_head, list) {
1854 		if (info->type != IRQT_PIRQ)
1855 			continue;
1856 
1857 		pirq = info->u.pirq.pirq;
1858 		gsi = info->u.pirq.gsi;
1859 		irq = info->irq;
1860 
1861 		/* save/restore of PT devices doesn't work, so at this point the
1862 		 * only devices present are GSI based emulated devices */
1863 		if (!gsi)
1864 			continue;
1865 
1866 		map_irq.domid = DOMID_SELF;
1867 		map_irq.type = MAP_PIRQ_TYPE_GSI;
1868 		map_irq.index = gsi;
1869 		map_irq.pirq = pirq;
1870 
1871 		rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
1872 		if (rc) {
1873 			pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
1874 				gsi, irq, pirq, rc);
1875 			xen_free_irq(irq);
1876 			continue;
1877 		}
1878 
1879 		printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
1880 
1881 		__startup_pirq(irq);
1882 	}
1883 }
1884 
1885 static void restore_cpu_virqs(unsigned int cpu)
1886 {
1887 	struct evtchn_bind_virq bind_virq;
1888 	evtchn_port_t evtchn;
1889 	int virq, irq;
1890 
1891 	for (virq = 0; virq < NR_VIRQS; virq++) {
1892 		if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
1893 			continue;
1894 
1895 		BUG_ON(virq_from_irq(irq) != virq);
1896 
1897 		/* Get a new binding from Xen. */
1898 		bind_virq.virq = virq;
1899 		bind_virq.vcpu = xen_vcpu_nr(cpu);
1900 		if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
1901 						&bind_virq) != 0)
1902 			BUG();
1903 		evtchn = bind_virq.port;
1904 
1905 		/* Record the new mapping. */
1906 		(void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
1907 		/* The affinity mask is still valid */
1908 		bind_evtchn_to_cpu(evtchn, cpu, false);
1909 	}
1910 }
1911 
1912 static void restore_cpu_ipis(unsigned int cpu)
1913 {
1914 	struct evtchn_bind_ipi bind_ipi;
1915 	evtchn_port_t evtchn;
1916 	int ipi, irq;
1917 
1918 	for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
1919 		if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
1920 			continue;
1921 
1922 		BUG_ON(ipi_from_irq(irq) != ipi);
1923 
1924 		/* Get a new binding from Xen. */
1925 		bind_ipi.vcpu = xen_vcpu_nr(cpu);
1926 		if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
1927 						&bind_ipi) != 0)
1928 			BUG();
1929 		evtchn = bind_ipi.port;
1930 
1931 		/* Record the new mapping. */
1932 		(void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
1933 		/* The affinity mask is still valid */
1934 		bind_evtchn_to_cpu(evtchn, cpu, false);
1935 	}
1936 }
1937 
1938 /* Clear an irq's pending state, in preparation for polling on it */
1939 void xen_clear_irq_pending(int irq)
1940 {
1941 	evtchn_port_t evtchn = evtchn_from_irq(irq);
1942 
1943 	if (VALID_EVTCHN(evtchn))
1944 		clear_evtchn(evtchn);
1945 }
1946 EXPORT_SYMBOL(xen_clear_irq_pending);
1947 void xen_set_irq_pending(int irq)
1948 {
1949 	evtchn_port_t evtchn = evtchn_from_irq(irq);
1950 
1951 	if (VALID_EVTCHN(evtchn))
1952 		set_evtchn(evtchn);
1953 }
1954 
1955 bool xen_test_irq_pending(int irq)
1956 {
1957 	evtchn_port_t evtchn = evtchn_from_irq(irq);
1958 	bool ret = false;
1959 
1960 	if (VALID_EVTCHN(evtchn))
1961 		ret = test_evtchn(evtchn);
1962 
1963 	return ret;
1964 }
1965 
1966 /* Poll waiting for an irq to become pending with timeout.  In the usual case,
1967  * the irq will be disabled so it won't deliver an interrupt. */
1968 void xen_poll_irq_timeout(int irq, u64 timeout)
1969 {
1970 	evtchn_port_t evtchn = evtchn_from_irq(irq);
1971 
1972 	if (VALID_EVTCHN(evtchn)) {
1973 		struct sched_poll poll;
1974 
1975 		poll.nr_ports = 1;
1976 		poll.timeout = timeout;
1977 		set_xen_guest_handle(poll.ports, &evtchn);
1978 
1979 		if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
1980 			BUG();
1981 	}
1982 }
1983 EXPORT_SYMBOL(xen_poll_irq_timeout);
1984 /* Poll waiting for an irq to become pending.  In the usual case, the
1985  * irq will be disabled so it won't deliver an interrupt. */
1986 void xen_poll_irq(int irq)
1987 {
1988 	xen_poll_irq_timeout(irq, 0 /* no timeout */);
1989 }
1990 
1991 /* Check whether the IRQ line is shared with other guests. */
1992 int xen_test_irq_shared(int irq)
1993 {
1994 	struct irq_info *info = info_for_irq(irq);
1995 	struct physdev_irq_status_query irq_status;
1996 
1997 	if (WARN_ON(!info))
1998 		return -ENOENT;
1999 
2000 	irq_status.irq = info->u.pirq.pirq;
2001 
2002 	if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
2003 		return 0;
2004 	return !(irq_status.flags & XENIRQSTAT_shared);
2005 }
2006 EXPORT_SYMBOL_GPL(xen_test_irq_shared);
2007 
2008 void xen_irq_resume(void)
2009 {
2010 	unsigned int cpu;
2011 	struct irq_info *info;
2012 
2013 	/* New event-channel space is not 'live' yet. */
2014 	xen_evtchn_resume();
2015 
2016 	/* No IRQ <-> event-channel mappings. */
2017 	list_for_each_entry(info, &xen_irq_list_head, list) {
2018 		/* Zap event-channel binding */
2019 		info->evtchn = 0;
2020 		/* Adjust accounting */
2021 		channels_on_cpu_dec(info);
2022 	}
2023 
2024 	clear_evtchn_to_irq_all();
2025 
2026 	for_each_possible_cpu(cpu) {
2027 		restore_cpu_virqs(cpu);
2028 		restore_cpu_ipis(cpu);
2029 	}
2030 
2031 	restore_pirqs();
2032 }
2033 
2034 static struct irq_chip xen_dynamic_chip __read_mostly = {
2035 	.name			= "xen-dyn",
2036 
2037 	.irq_disable		= disable_dynirq,
2038 	.irq_mask		= disable_dynirq,
2039 	.irq_unmask		= enable_dynirq,
2040 
2041 	.irq_ack		= ack_dynirq,
2042 	.irq_mask_ack		= mask_ack_dynirq,
2043 
2044 	.irq_set_affinity	= set_affinity_irq,
2045 	.irq_retrigger		= retrigger_dynirq,
2046 };
2047 
2048 static struct irq_chip xen_lateeoi_chip __read_mostly = {
2049 	/* The chip name needs to contain "xen-dyn" for irqbalance to work. */
2050 	.name			= "xen-dyn-lateeoi",
2051 
2052 	.irq_disable		= disable_dynirq,
2053 	.irq_mask		= disable_dynirq,
2054 	.irq_unmask		= enable_dynirq,
2055 
2056 	.irq_ack		= mask_ack_dynirq,
2057 	.irq_mask_ack		= mask_ack_dynirq,
2058 
2059 	.irq_set_affinity	= set_affinity_irq,
2060 	.irq_retrigger		= retrigger_dynirq,
2061 };
2062 
2063 static struct irq_chip xen_pirq_chip __read_mostly = {
2064 	.name			= "xen-pirq",
2065 
2066 	.irq_startup		= startup_pirq,
2067 	.irq_shutdown		= shutdown_pirq,
2068 	.irq_enable		= enable_pirq,
2069 	.irq_disable		= disable_pirq,
2070 
2071 	.irq_mask		= disable_dynirq,
2072 	.irq_unmask		= enable_dynirq,
2073 
2074 	.irq_ack		= eoi_pirq,
2075 	.irq_eoi		= eoi_pirq,
2076 	.irq_mask_ack		= mask_ack_pirq,
2077 
2078 	.irq_set_affinity	= set_affinity_irq,
2079 
2080 	.irq_retrigger		= retrigger_dynirq,
2081 };
2082 
2083 static struct irq_chip xen_percpu_chip __read_mostly = {
2084 	.name			= "xen-percpu",
2085 
2086 	.irq_disable		= disable_dynirq,
2087 	.irq_mask		= disable_dynirq,
2088 	.irq_unmask		= enable_dynirq,
2089 
2090 	.irq_ack		= ack_dynirq,
2091 };
2092 
2093 #ifdef CONFIG_XEN_PVHVM
2094 /* Vector callbacks are better than PCI interrupts to receive event
2095  * channel notifications because we can receive vector callbacks on any
2096  * vcpu and we don't need PCI support or APIC interactions. */
2097 void xen_setup_callback_vector(void)
2098 {
2099 	uint64_t callback_via;
2100 
2101 	if (xen_have_vector_callback) {
2102 		callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
2103 		if (xen_set_callback_via(callback_via)) {
2104 			pr_err("Request for Xen HVM callback vector failed\n");
2105 			xen_have_vector_callback = 0;
2106 		}
2107 	}
2108 }
2109 
2110 static __init void xen_alloc_callback_vector(void)
2111 {
2112 	if (!xen_have_vector_callback)
2113 		return;
2114 
2115 	pr_info("Xen HVM callback vector for event delivery is enabled\n");
2116 	alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_xen_hvm_callback);
2117 }
2118 #else
2119 void xen_setup_callback_vector(void) {}
2120 static inline void xen_alloc_callback_vector(void) {}
2121 #endif
2122 
2123 bool xen_fifo_events = true;
2124 module_param_named(fifo_events, xen_fifo_events, bool, 0);
2125 
2126 static int xen_evtchn_cpu_prepare(unsigned int cpu)
2127 {
2128 	int ret = 0;
2129 
2130 	xen_cpu_init_eoi(cpu);
2131 
2132 	if (evtchn_ops->percpu_init)
2133 		ret = evtchn_ops->percpu_init(cpu);
2134 
2135 	return ret;
2136 }
2137 
2138 static int xen_evtchn_cpu_dead(unsigned int cpu)
2139 {
2140 	int ret = 0;
2141 
2142 	if (evtchn_ops->percpu_deinit)
2143 		ret = evtchn_ops->percpu_deinit(cpu);
2144 
2145 	return ret;
2146 }
2147 
2148 void __init xen_init_IRQ(void)
2149 {
2150 	int ret = -EINVAL;
2151 	evtchn_port_t evtchn;
2152 
2153 	if (xen_fifo_events)
2154 		ret = xen_evtchn_fifo_init();
2155 	if (ret < 0) {
2156 		xen_evtchn_2l_init();
2157 		xen_fifo_events = false;
2158 	}
2159 
2160 	xen_cpu_init_eoi(smp_processor_id());
2161 
2162 	cpuhp_setup_state_nocalls(CPUHP_XEN_EVTCHN_PREPARE,
2163 				  "xen/evtchn:prepare",
2164 				  xen_evtchn_cpu_prepare, xen_evtchn_cpu_dead);
2165 
2166 	evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()),
2167 				sizeof(*evtchn_to_irq), GFP_KERNEL);
2168 	BUG_ON(!evtchn_to_irq);
2169 
2170 	/* No event channels are 'live' right now. */
2171 	for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
2172 		mask_evtchn(evtchn);
2173 
2174 	pirq_needs_eoi = pirq_needs_eoi_flag;
2175 
2176 #ifdef CONFIG_X86
2177 	if (xen_pv_domain()) {
2178 		if (xen_initial_domain())
2179 			pci_xen_initial_domain();
2180 	}
2181 	if (xen_feature(XENFEAT_hvm_callback_vector)) {
2182 		xen_setup_callback_vector();
2183 		xen_alloc_callback_vector();
2184 	}
2185 
2186 	if (xen_hvm_domain()) {
2187 		native_init_IRQ();
2188 		/* pci_xen_hvm_init must be called after native_init_IRQ so that
2189 		 * __acpi_register_gsi can point at the right function */
2190 		pci_xen_hvm_init();
2191 	} else {
2192 		int rc;
2193 		struct physdev_pirq_eoi_gmfn eoi_gmfn;
2194 
2195 		pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
2196 		eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map);
2197 		rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
2198 		if (rc != 0) {
2199 			free_page((unsigned long) pirq_eoi_map);
2200 			pirq_eoi_map = NULL;
2201 		} else
2202 			pirq_needs_eoi = pirq_check_eoi_map;
2203 	}
2204 #endif
2205 }
2206