1 /* 2 * Xen event channels (2-level ABI) 3 * 4 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 5 */ 6 7 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt 8 9 #include <linux/linkage.h> 10 #include <linux/interrupt.h> 11 #include <linux/irq.h> 12 13 #include <asm/sync_bitops.h> 14 #include <asm/xen/hypercall.h> 15 #include <asm/xen/hypervisor.h> 16 17 #include <xen/xen.h> 18 #include <xen/xen-ops.h> 19 #include <xen/events.h> 20 #include <xen/interface/xen.h> 21 #include <xen/interface/event_channel.h> 22 23 #include "events_internal.h" 24 25 /* 26 * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be 27 * careful to only use bitops which allow for this (e.g 28 * test_bit/find_first_bit and friends but not __ffs) and to pass 29 * BITS_PER_EVTCHN_WORD as the bitmask length. 30 */ 31 #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8) 32 /* 33 * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t 34 * array. Primarily to avoid long lines (hence the terse name). 35 */ 36 #define BM(x) (unsigned long *)(x) 37 /* Find the first set bit in a evtchn mask */ 38 #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD) 39 40 static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD], 41 cpu_evtchn_mask); 42 43 static unsigned evtchn_2l_max_channels(void) 44 { 45 return EVTCHN_2L_NR_CHANNELS; 46 } 47 48 static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu) 49 { 50 clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu))); 51 set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu))); 52 } 53 54 static void evtchn_2l_clear_pending(unsigned port) 55 { 56 struct shared_info *s = HYPERVISOR_shared_info; 57 sync_clear_bit(port, BM(&s->evtchn_pending[0])); 58 } 59 60 static void evtchn_2l_set_pending(unsigned port) 61 { 62 struct shared_info *s = HYPERVISOR_shared_info; 63 sync_set_bit(port, BM(&s->evtchn_pending[0])); 64 } 65 66 static bool evtchn_2l_is_pending(unsigned port) 67 { 68 struct shared_info *s = HYPERVISOR_shared_info; 69 return sync_test_bit(port, BM(&s->evtchn_pending[0])); 70 } 71 72 static bool evtchn_2l_test_and_set_mask(unsigned port) 73 { 74 struct shared_info *s = HYPERVISOR_shared_info; 75 return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0])); 76 } 77 78 static void evtchn_2l_mask(unsigned port) 79 { 80 struct shared_info *s = HYPERVISOR_shared_info; 81 sync_set_bit(port, BM(&s->evtchn_mask[0])); 82 } 83 84 static void evtchn_2l_unmask(unsigned port) 85 { 86 struct shared_info *s = HYPERVISOR_shared_info; 87 unsigned int cpu = get_cpu(); 88 int do_hypercall = 0, evtchn_pending = 0; 89 90 BUG_ON(!irqs_disabled()); 91 92 if (unlikely((cpu != cpu_from_evtchn(port)))) 93 do_hypercall = 1; 94 else { 95 /* 96 * Need to clear the mask before checking pending to 97 * avoid a race with an event becoming pending. 98 * 99 * EVTCHNOP_unmask will only trigger an upcall if the 100 * mask bit was set, so if a hypercall is needed 101 * remask the event. 102 */ 103 sync_clear_bit(port, BM(&s->evtchn_mask[0])); 104 evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0])); 105 106 if (unlikely(evtchn_pending && xen_hvm_domain())) { 107 sync_set_bit(port, BM(&s->evtchn_mask[0])); 108 do_hypercall = 1; 109 } 110 } 111 112 /* Slow path (hypercall) if this is a non-local port or if this is 113 * an hvm domain and an event is pending (hvm domains don't have 114 * their own implementation of irq_enable). */ 115 if (do_hypercall) { 116 struct evtchn_unmask unmask = { .port = port }; 117 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask); 118 } else { 119 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 120 121 /* 122 * The following is basically the equivalent of 123 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose 124 * the interrupt edge' if the channel is masked. 125 */ 126 if (evtchn_pending && 127 !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD, 128 BM(&vcpu_info->evtchn_pending_sel))) 129 vcpu_info->evtchn_upcall_pending = 1; 130 } 131 132 put_cpu(); 133 } 134 135 static DEFINE_PER_CPU(unsigned int, current_word_idx); 136 static DEFINE_PER_CPU(unsigned int, current_bit_idx); 137 138 /* 139 * Mask out the i least significant bits of w 140 */ 141 #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i)) 142 143 static inline xen_ulong_t active_evtchns(unsigned int cpu, 144 struct shared_info *sh, 145 unsigned int idx) 146 { 147 return sh->evtchn_pending[idx] & 148 per_cpu(cpu_evtchn_mask, cpu)[idx] & 149 ~sh->evtchn_mask[idx]; 150 } 151 152 /* 153 * Search the CPU's pending events bitmasks. For each one found, map 154 * the event number to an irq, and feed it into do_IRQ() for handling. 155 * 156 * Xen uses a two-level bitmap to speed searching. The first level is 157 * a bitset of words which contain pending event bits. The second 158 * level is a bitset of pending events themselves. 159 */ 160 static void evtchn_2l_handle_events(unsigned cpu) 161 { 162 int irq; 163 xen_ulong_t pending_words; 164 xen_ulong_t pending_bits; 165 int start_word_idx, start_bit_idx; 166 int word_idx, bit_idx; 167 int i; 168 struct shared_info *s = HYPERVISOR_shared_info; 169 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 170 171 /* Timer interrupt has highest priority. */ 172 irq = irq_from_virq(cpu, VIRQ_TIMER); 173 if (irq != -1) { 174 unsigned int evtchn = evtchn_from_irq(irq); 175 word_idx = evtchn / BITS_PER_LONG; 176 bit_idx = evtchn % BITS_PER_LONG; 177 if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx)) 178 generic_handle_irq(irq); 179 } 180 181 /* 182 * Master flag must be cleared /before/ clearing 183 * selector flag. xchg_xen_ulong must contain an 184 * appropriate barrier. 185 */ 186 pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0); 187 188 start_word_idx = __this_cpu_read(current_word_idx); 189 start_bit_idx = __this_cpu_read(current_bit_idx); 190 191 word_idx = start_word_idx; 192 193 for (i = 0; pending_words != 0; i++) { 194 xen_ulong_t words; 195 196 words = MASK_LSBS(pending_words, word_idx); 197 198 /* 199 * If we masked out all events, wrap to beginning. 200 */ 201 if (words == 0) { 202 word_idx = 0; 203 bit_idx = 0; 204 continue; 205 } 206 word_idx = EVTCHN_FIRST_BIT(words); 207 208 pending_bits = active_evtchns(cpu, s, word_idx); 209 bit_idx = 0; /* usually scan entire word from start */ 210 /* 211 * We scan the starting word in two parts. 212 * 213 * 1st time: start in the middle, scanning the 214 * upper bits. 215 * 216 * 2nd time: scan the whole word (not just the 217 * parts skipped in the first pass) -- if an 218 * event in the previously scanned bits is 219 * pending again it would just be scanned on 220 * the next loop anyway. 221 */ 222 if (word_idx == start_word_idx) { 223 if (i == 0) 224 bit_idx = start_bit_idx; 225 } 226 227 do { 228 xen_ulong_t bits; 229 int port; 230 231 bits = MASK_LSBS(pending_bits, bit_idx); 232 233 /* If we masked out all events, move on. */ 234 if (bits == 0) 235 break; 236 237 bit_idx = EVTCHN_FIRST_BIT(bits); 238 239 /* Process port. */ 240 port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx; 241 irq = get_evtchn_to_irq(port); 242 243 if (irq != -1) 244 generic_handle_irq(irq); 245 246 bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD; 247 248 /* Next caller starts at last processed + 1 */ 249 __this_cpu_write(current_word_idx, 250 bit_idx ? word_idx : 251 (word_idx+1) % BITS_PER_EVTCHN_WORD); 252 __this_cpu_write(current_bit_idx, bit_idx); 253 } while (bit_idx != 0); 254 255 /* Scan start_l1i twice; all others once. */ 256 if ((word_idx != start_word_idx) || (i != 0)) 257 pending_words &= ~(1UL << word_idx); 258 259 word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD; 260 } 261 } 262 263 irqreturn_t xen_debug_interrupt(int irq, void *dev_id) 264 { 265 struct shared_info *sh = HYPERVISOR_shared_info; 266 int cpu = smp_processor_id(); 267 xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu); 268 int i; 269 unsigned long flags; 270 static DEFINE_SPINLOCK(debug_lock); 271 struct vcpu_info *v; 272 273 spin_lock_irqsave(&debug_lock, flags); 274 275 printk("\nvcpu %d\n ", cpu); 276 277 for_each_online_cpu(i) { 278 int pending; 279 v = per_cpu(xen_vcpu, i); 280 pending = (get_irq_regs() && i == cpu) 281 ? xen_irqs_disabled(get_irq_regs()) 282 : v->evtchn_upcall_mask; 283 printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i, 284 pending, v->evtchn_upcall_pending, 285 (int)(sizeof(v->evtchn_pending_sel)*2), 286 v->evtchn_pending_sel); 287 } 288 v = per_cpu(xen_vcpu, cpu); 289 290 printk("\npending:\n "); 291 for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--) 292 printk("%0*"PRI_xen_ulong"%s", 293 (int)sizeof(sh->evtchn_pending[0])*2, 294 sh->evtchn_pending[i], 295 i % 8 == 0 ? "\n " : " "); 296 printk("\nglobal mask:\n "); 297 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) 298 printk("%0*"PRI_xen_ulong"%s", 299 (int)(sizeof(sh->evtchn_mask[0])*2), 300 sh->evtchn_mask[i], 301 i % 8 == 0 ? "\n " : " "); 302 303 printk("\nglobally unmasked:\n "); 304 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) 305 printk("%0*"PRI_xen_ulong"%s", 306 (int)(sizeof(sh->evtchn_mask[0])*2), 307 sh->evtchn_pending[i] & ~sh->evtchn_mask[i], 308 i % 8 == 0 ? "\n " : " "); 309 310 printk("\nlocal cpu%d mask:\n ", cpu); 311 for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--) 312 printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2), 313 cpu_evtchn[i], 314 i % 8 == 0 ? "\n " : " "); 315 316 printk("\nlocally unmasked:\n "); 317 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) { 318 xen_ulong_t pending = sh->evtchn_pending[i] 319 & ~sh->evtchn_mask[i] 320 & cpu_evtchn[i]; 321 printk("%0*"PRI_xen_ulong"%s", 322 (int)(sizeof(sh->evtchn_mask[0])*2), 323 pending, i % 8 == 0 ? "\n " : " "); 324 } 325 326 printk("\npending list:\n"); 327 for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) { 328 if (sync_test_bit(i, BM(sh->evtchn_pending))) { 329 int word_idx = i / BITS_PER_EVTCHN_WORD; 330 printk(" %d: event %d -> irq %d%s%s%s\n", 331 cpu_from_evtchn(i), i, 332 get_evtchn_to_irq(i), 333 sync_test_bit(word_idx, BM(&v->evtchn_pending_sel)) 334 ? "" : " l2-clear", 335 !sync_test_bit(i, BM(sh->evtchn_mask)) 336 ? "" : " globally-masked", 337 sync_test_bit(i, BM(cpu_evtchn)) 338 ? "" : " locally-masked"); 339 } 340 } 341 342 spin_unlock_irqrestore(&debug_lock, flags); 343 344 return IRQ_HANDLED; 345 } 346 347 static void evtchn_2l_resume(void) 348 { 349 int i; 350 351 for_each_online_cpu(i) 352 memset(per_cpu(cpu_evtchn_mask, i), 0, sizeof(xen_ulong_t) * 353 EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD); 354 } 355 356 static const struct evtchn_ops evtchn_ops_2l = { 357 .max_channels = evtchn_2l_max_channels, 358 .nr_channels = evtchn_2l_max_channels, 359 .bind_to_cpu = evtchn_2l_bind_to_cpu, 360 .clear_pending = evtchn_2l_clear_pending, 361 .set_pending = evtchn_2l_set_pending, 362 .is_pending = evtchn_2l_is_pending, 363 .test_and_set_mask = evtchn_2l_test_and_set_mask, 364 .mask = evtchn_2l_mask, 365 .unmask = evtchn_2l_unmask, 366 .handle_events = evtchn_2l_handle_events, 367 .resume = evtchn_2l_resume, 368 }; 369 370 void __init xen_evtchn_2l_init(void) 371 { 372 pr_info("Using 2-level ABI\n"); 373 evtchn_ops = &evtchn_ops_2l; 374 } 375