1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xen event channels (2-level ABI) 4 * 5 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 6 */ 7 8 #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt 9 10 #include <linux/linkage.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 14 #include <asm/sync_bitops.h> 15 #include <asm/xen/hypercall.h> 16 #include <asm/xen/hypervisor.h> 17 18 #include <xen/xen.h> 19 #include <xen/xen-ops.h> 20 #include <xen/events.h> 21 #include <xen/interface/xen.h> 22 #include <xen/interface/event_channel.h> 23 24 #include "events_internal.h" 25 26 /* 27 * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be 28 * careful to only use bitops which allow for this (e.g 29 * test_bit/find_first_bit and friends but not __ffs) and to pass 30 * BITS_PER_EVTCHN_WORD as the bitmask length. 31 */ 32 #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8) 33 /* 34 * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t 35 * array. Primarily to avoid long lines (hence the terse name). 36 */ 37 #define BM(x) (unsigned long *)(x) 38 /* Find the first set bit in a evtchn mask */ 39 #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD) 40 41 #define EVTCHN_MASK_SIZE (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD) 42 43 static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_MASK_SIZE], cpu_evtchn_mask); 44 45 static unsigned evtchn_2l_max_channels(void) 46 { 47 return EVTCHN_2L_NR_CHANNELS; 48 } 49 50 static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu) 51 { 52 clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu))); 53 set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu))); 54 } 55 56 static void evtchn_2l_clear_pending(evtchn_port_t port) 57 { 58 struct shared_info *s = HYPERVISOR_shared_info; 59 sync_clear_bit(port, BM(&s->evtchn_pending[0])); 60 } 61 62 static void evtchn_2l_set_pending(evtchn_port_t port) 63 { 64 struct shared_info *s = HYPERVISOR_shared_info; 65 sync_set_bit(port, BM(&s->evtchn_pending[0])); 66 } 67 68 static bool evtchn_2l_is_pending(evtchn_port_t port) 69 { 70 struct shared_info *s = HYPERVISOR_shared_info; 71 return sync_test_bit(port, BM(&s->evtchn_pending[0])); 72 } 73 74 static bool evtchn_2l_test_and_set_mask(evtchn_port_t port) 75 { 76 struct shared_info *s = HYPERVISOR_shared_info; 77 return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0])); 78 } 79 80 static void evtchn_2l_mask(evtchn_port_t port) 81 { 82 struct shared_info *s = HYPERVISOR_shared_info; 83 sync_set_bit(port, BM(&s->evtchn_mask[0])); 84 } 85 86 static void evtchn_2l_unmask(evtchn_port_t port) 87 { 88 struct shared_info *s = HYPERVISOR_shared_info; 89 unsigned int cpu = get_cpu(); 90 int do_hypercall = 0, evtchn_pending = 0; 91 92 BUG_ON(!irqs_disabled()); 93 94 smp_wmb(); /* All writes before unmask must be visible. */ 95 96 if (unlikely((cpu != cpu_from_evtchn(port)))) 97 do_hypercall = 1; 98 else { 99 /* 100 * Need to clear the mask before checking pending to 101 * avoid a race with an event becoming pending. 102 * 103 * EVTCHNOP_unmask will only trigger an upcall if the 104 * mask bit was set, so if a hypercall is needed 105 * remask the event. 106 */ 107 sync_clear_bit(port, BM(&s->evtchn_mask[0])); 108 evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0])); 109 110 if (unlikely(evtchn_pending && xen_hvm_domain())) { 111 sync_set_bit(port, BM(&s->evtchn_mask[0])); 112 do_hypercall = 1; 113 } 114 } 115 116 /* Slow path (hypercall) if this is a non-local port or if this is 117 * an hvm domain and an event is pending (hvm domains don't have 118 * their own implementation of irq_enable). */ 119 if (do_hypercall) { 120 struct evtchn_unmask unmask = { .port = port }; 121 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask); 122 } else { 123 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 124 125 /* 126 * The following is basically the equivalent of 127 * 'hw_resend_irq'. Just like a real IO-APIC we 'lose 128 * the interrupt edge' if the channel is masked. 129 */ 130 if (evtchn_pending && 131 !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD, 132 BM(&vcpu_info->evtchn_pending_sel))) 133 vcpu_info->evtchn_upcall_pending = 1; 134 } 135 136 put_cpu(); 137 } 138 139 static DEFINE_PER_CPU(unsigned int, current_word_idx); 140 static DEFINE_PER_CPU(unsigned int, current_bit_idx); 141 142 /* 143 * Mask out the i least significant bits of w 144 */ 145 #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i)) 146 147 static inline xen_ulong_t active_evtchns(unsigned int cpu, 148 struct shared_info *sh, 149 unsigned int idx) 150 { 151 return sh->evtchn_pending[idx] & 152 per_cpu(cpu_evtchn_mask, cpu)[idx] & 153 ~sh->evtchn_mask[idx]; 154 } 155 156 /* 157 * Search the CPU's pending events bitmasks. For each one found, map 158 * the event number to an irq, and feed it into do_IRQ() for handling. 159 * 160 * Xen uses a two-level bitmap to speed searching. The first level is 161 * a bitset of words which contain pending event bits. The second 162 * level is a bitset of pending events themselves. 163 */ 164 static void evtchn_2l_handle_events(unsigned cpu) 165 { 166 int irq; 167 xen_ulong_t pending_words; 168 xen_ulong_t pending_bits; 169 int start_word_idx, start_bit_idx; 170 int word_idx, bit_idx; 171 int i; 172 struct shared_info *s = HYPERVISOR_shared_info; 173 struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); 174 175 /* Timer interrupt has highest priority. */ 176 irq = irq_from_virq(cpu, VIRQ_TIMER); 177 if (irq != -1) { 178 evtchn_port_t evtchn = evtchn_from_irq(irq); 179 word_idx = evtchn / BITS_PER_LONG; 180 bit_idx = evtchn % BITS_PER_LONG; 181 if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx)) 182 generic_handle_irq(irq); 183 } 184 185 /* 186 * Master flag must be cleared /before/ clearing 187 * selector flag. xchg_xen_ulong must contain an 188 * appropriate barrier. 189 */ 190 pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0); 191 192 start_word_idx = __this_cpu_read(current_word_idx); 193 start_bit_idx = __this_cpu_read(current_bit_idx); 194 195 word_idx = start_word_idx; 196 197 for (i = 0; pending_words != 0; i++) { 198 xen_ulong_t words; 199 200 words = MASK_LSBS(pending_words, word_idx); 201 202 /* 203 * If we masked out all events, wrap to beginning. 204 */ 205 if (words == 0) { 206 word_idx = 0; 207 bit_idx = 0; 208 continue; 209 } 210 word_idx = EVTCHN_FIRST_BIT(words); 211 212 pending_bits = active_evtchns(cpu, s, word_idx); 213 bit_idx = 0; /* usually scan entire word from start */ 214 /* 215 * We scan the starting word in two parts. 216 * 217 * 1st time: start in the middle, scanning the 218 * upper bits. 219 * 220 * 2nd time: scan the whole word (not just the 221 * parts skipped in the first pass) -- if an 222 * event in the previously scanned bits is 223 * pending again it would just be scanned on 224 * the next loop anyway. 225 */ 226 if (word_idx == start_word_idx) { 227 if (i == 0) 228 bit_idx = start_bit_idx; 229 } 230 231 do { 232 xen_ulong_t bits; 233 evtchn_port_t port; 234 235 bits = MASK_LSBS(pending_bits, bit_idx); 236 237 /* If we masked out all events, move on. */ 238 if (bits == 0) 239 break; 240 241 bit_idx = EVTCHN_FIRST_BIT(bits); 242 243 /* Process port. */ 244 port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx; 245 irq = get_evtchn_to_irq(port); 246 247 if (irq != -1) 248 generic_handle_irq(irq); 249 250 bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD; 251 252 /* Next caller starts at last processed + 1 */ 253 __this_cpu_write(current_word_idx, 254 bit_idx ? word_idx : 255 (word_idx+1) % BITS_PER_EVTCHN_WORD); 256 __this_cpu_write(current_bit_idx, bit_idx); 257 } while (bit_idx != 0); 258 259 /* Scan start_l1i twice; all others once. */ 260 if ((word_idx != start_word_idx) || (i != 0)) 261 pending_words &= ~(1UL << word_idx); 262 263 word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD; 264 } 265 } 266 267 irqreturn_t xen_debug_interrupt(int irq, void *dev_id) 268 { 269 struct shared_info *sh = HYPERVISOR_shared_info; 270 int cpu = smp_processor_id(); 271 xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu); 272 int i; 273 unsigned long flags; 274 static DEFINE_SPINLOCK(debug_lock); 275 struct vcpu_info *v; 276 277 spin_lock_irqsave(&debug_lock, flags); 278 279 printk("\nvcpu %d\n ", cpu); 280 281 for_each_online_cpu(i) { 282 int pending; 283 v = per_cpu(xen_vcpu, i); 284 pending = (get_irq_regs() && i == cpu) 285 ? xen_irqs_disabled(get_irq_regs()) 286 : v->evtchn_upcall_mask; 287 printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i, 288 pending, v->evtchn_upcall_pending, 289 (int)(sizeof(v->evtchn_pending_sel)*2), 290 v->evtchn_pending_sel); 291 } 292 v = per_cpu(xen_vcpu, cpu); 293 294 printk("\npending:\n "); 295 for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--) 296 printk("%0*"PRI_xen_ulong"%s", 297 (int)sizeof(sh->evtchn_pending[0])*2, 298 sh->evtchn_pending[i], 299 i % 8 == 0 ? "\n " : " "); 300 printk("\nglobal mask:\n "); 301 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) 302 printk("%0*"PRI_xen_ulong"%s", 303 (int)(sizeof(sh->evtchn_mask[0])*2), 304 sh->evtchn_mask[i], 305 i % 8 == 0 ? "\n " : " "); 306 307 printk("\nglobally unmasked:\n "); 308 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) 309 printk("%0*"PRI_xen_ulong"%s", 310 (int)(sizeof(sh->evtchn_mask[0])*2), 311 sh->evtchn_pending[i] & ~sh->evtchn_mask[i], 312 i % 8 == 0 ? "\n " : " "); 313 314 printk("\nlocal cpu%d mask:\n ", cpu); 315 for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--) 316 printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2), 317 cpu_evtchn[i], 318 i % 8 == 0 ? "\n " : " "); 319 320 printk("\nlocally unmasked:\n "); 321 for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) { 322 xen_ulong_t pending = sh->evtchn_pending[i] 323 & ~sh->evtchn_mask[i] 324 & cpu_evtchn[i]; 325 printk("%0*"PRI_xen_ulong"%s", 326 (int)(sizeof(sh->evtchn_mask[0])*2), 327 pending, i % 8 == 0 ? "\n " : " "); 328 } 329 330 printk("\npending list:\n"); 331 for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) { 332 if (sync_test_bit(i, BM(sh->evtchn_pending))) { 333 int word_idx = i / BITS_PER_EVTCHN_WORD; 334 printk(" %d: event %d -> irq %d%s%s%s\n", 335 cpu_from_evtchn(i), i, 336 get_evtchn_to_irq(i), 337 sync_test_bit(word_idx, BM(&v->evtchn_pending_sel)) 338 ? "" : " l2-clear", 339 !sync_test_bit(i, BM(sh->evtchn_mask)) 340 ? "" : " globally-masked", 341 sync_test_bit(i, BM(cpu_evtchn)) 342 ? "" : " locally-masked"); 343 } 344 } 345 346 spin_unlock_irqrestore(&debug_lock, flags); 347 348 return IRQ_HANDLED; 349 } 350 351 static void evtchn_2l_resume(void) 352 { 353 int i; 354 355 for_each_online_cpu(i) 356 memset(per_cpu(cpu_evtchn_mask, i), 0, sizeof(xen_ulong_t) * 357 EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD); 358 } 359 360 static const struct evtchn_ops evtchn_ops_2l = { 361 .max_channels = evtchn_2l_max_channels, 362 .nr_channels = evtchn_2l_max_channels, 363 .bind_to_cpu = evtchn_2l_bind_to_cpu, 364 .clear_pending = evtchn_2l_clear_pending, 365 .set_pending = evtchn_2l_set_pending, 366 .is_pending = evtchn_2l_is_pending, 367 .test_and_set_mask = evtchn_2l_test_and_set_mask, 368 .mask = evtchn_2l_mask, 369 .unmask = evtchn_2l_unmask, 370 .handle_events = evtchn_2l_handle_events, 371 .resume = evtchn_2l_resume, 372 }; 373 374 void __init xen_evtchn_2l_init(void) 375 { 376 pr_info("Using 2-level ABI\n"); 377 evtchn_ops = &evtchn_ops_2l; 378 } 379