1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2015 Zodiac Inflight Innovations 4 * 5 * Author: Martyn Welch <martyn.welch@collabora.co.uk> 6 * 7 * Based on twl4030_wdt.c by Timo Kokkonen <timo.t.kokkonen at nokia.com>: 8 * 9 * Copyright (C) Nokia Corporation 10 */ 11 12 #include <linux/delay.h> 13 #include <linux/i2c.h> 14 #include <linux/ihex.h> 15 #include <linux/firmware.h> 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/slab.h> 19 #include <linux/sysfs.h> 20 #include <linux/types.h> 21 #include <linux/version.h> 22 #include <linux/watchdog.h> 23 24 #define ZIIRAVE_TIMEOUT_MIN 3 25 #define ZIIRAVE_TIMEOUT_MAX 255 26 27 #define ZIIRAVE_PING_VALUE 0x0 28 29 #define ZIIRAVE_STATE_INITIAL 0x0 30 #define ZIIRAVE_STATE_OFF 0x1 31 #define ZIIRAVE_STATE_ON 0x2 32 33 #define ZIIRAVE_FW_NAME "ziirave_wdt.fw" 34 35 static char *ziirave_reasons[] = {"power cycle", "hw watchdog", NULL, NULL, 36 "host request", NULL, "illegal configuration", 37 "illegal instruction", "illegal trap", 38 "unknown"}; 39 40 #define ZIIRAVE_WDT_FIRM_VER_MAJOR 0x1 41 #define ZIIRAVE_WDT_BOOT_VER_MAJOR 0x3 42 #define ZIIRAVE_WDT_RESET_REASON 0x5 43 #define ZIIRAVE_WDT_STATE 0x6 44 #define ZIIRAVE_WDT_TIMEOUT 0x7 45 #define ZIIRAVE_WDT_TIME_LEFT 0x8 46 #define ZIIRAVE_WDT_PING 0x9 47 #define ZIIRAVE_WDT_RESET_DURATION 0xa 48 49 #define ZIIRAVE_FIRM_PKT_TOTAL_SIZE 20 50 #define ZIIRAVE_FIRM_PKT_DATA_SIZE 16 51 #define ZIIRAVE_FIRM_FLASH_MEMORY_START 0x1600 52 #define ZIIRAVE_FIRM_FLASH_MEMORY_END 0x2bbf 53 54 /* Received and ready for next Download packet. */ 55 #define ZIIRAVE_FIRM_DOWNLOAD_ACK 1 56 /* Currently writing to flash. Retry Download status in a moment! */ 57 #define ZIIRAVE_FIRM_DOWNLOAD_BUSY 2 58 59 /* Wait for ACK timeout in ms */ 60 #define ZIIRAVE_FIRM_WAIT_FOR_ACK_TIMEOUT 50 61 62 /* Firmware commands */ 63 #define ZIIRAVE_CMD_DOWNLOAD_START 0x10 64 #define ZIIRAVE_CMD_DOWNLOAD_END 0x11 65 #define ZIIRAVE_CMD_DOWNLOAD_SET_READ_ADDR 0x12 66 #define ZIIRAVE_CMD_DOWNLOAD_READ_BYTE 0x13 67 #define ZIIRAVE_CMD_RESET_PROCESSOR 0x0b 68 #define ZIIRAVE_CMD_JUMP_TO_BOOTLOADER 0x0c 69 #define ZIIRAVE_CMD_DOWNLOAD_PACKET 0x0e 70 71 struct ziirave_wdt_rev { 72 unsigned char major; 73 unsigned char minor; 74 }; 75 76 struct ziirave_wdt_data { 77 struct mutex sysfs_mutex; 78 struct watchdog_device wdd; 79 struct ziirave_wdt_rev bootloader_rev; 80 struct ziirave_wdt_rev firmware_rev; 81 int reset_reason; 82 }; 83 84 static int wdt_timeout; 85 module_param(wdt_timeout, int, 0); 86 MODULE_PARM_DESC(wdt_timeout, "Watchdog timeout in seconds"); 87 88 static int reset_duration; 89 module_param(reset_duration, int, 0); 90 MODULE_PARM_DESC(reset_duration, 91 "Watchdog reset pulse duration in milliseconds"); 92 93 static bool nowayout = WATCHDOG_NOWAYOUT; 94 module_param(nowayout, bool, 0); 95 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started default=" 96 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 97 98 static int ziirave_wdt_revision(struct i2c_client *client, 99 struct ziirave_wdt_rev *rev, u8 command) 100 { 101 int ret; 102 103 ret = i2c_smbus_read_byte_data(client, command); 104 if (ret < 0) 105 return ret; 106 107 rev->major = ret; 108 109 ret = i2c_smbus_read_byte_data(client, command + 1); 110 if (ret < 0) 111 return ret; 112 113 rev->minor = ret; 114 115 return 0; 116 } 117 118 static int ziirave_wdt_set_state(struct watchdog_device *wdd, int state) 119 { 120 struct i2c_client *client = to_i2c_client(wdd->parent); 121 122 return i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_STATE, state); 123 } 124 125 static int ziirave_wdt_start(struct watchdog_device *wdd) 126 { 127 return ziirave_wdt_set_state(wdd, ZIIRAVE_STATE_ON); 128 } 129 130 static int ziirave_wdt_stop(struct watchdog_device *wdd) 131 { 132 return ziirave_wdt_set_state(wdd, ZIIRAVE_STATE_OFF); 133 } 134 135 static int ziirave_wdt_ping(struct watchdog_device *wdd) 136 { 137 struct i2c_client *client = to_i2c_client(wdd->parent); 138 139 return i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_PING, 140 ZIIRAVE_PING_VALUE); 141 } 142 143 static int ziirave_wdt_set_timeout(struct watchdog_device *wdd, 144 unsigned int timeout) 145 { 146 struct i2c_client *client = to_i2c_client(wdd->parent); 147 int ret; 148 149 ret = i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_TIMEOUT, timeout); 150 if (!ret) 151 wdd->timeout = timeout; 152 153 return ret; 154 } 155 156 static unsigned int ziirave_wdt_get_timeleft(struct watchdog_device *wdd) 157 { 158 struct i2c_client *client = to_i2c_client(wdd->parent); 159 int ret; 160 161 ret = i2c_smbus_read_byte_data(client, ZIIRAVE_WDT_TIME_LEFT); 162 if (ret < 0) 163 ret = 0; 164 165 return ret; 166 } 167 168 static int ziirave_firm_wait_for_ack(struct watchdog_device *wdd) 169 { 170 struct i2c_client *client = to_i2c_client(wdd->parent); 171 int ret; 172 unsigned long timeout; 173 174 timeout = jiffies + msecs_to_jiffies(ZIIRAVE_FIRM_WAIT_FOR_ACK_TIMEOUT); 175 do { 176 if (time_after(jiffies, timeout)) 177 return -ETIMEDOUT; 178 179 usleep_range(5000, 10000); 180 181 ret = i2c_smbus_read_byte(client); 182 if (ret < 0) { 183 dev_err(&client->dev, "Failed to read byte\n"); 184 return ret; 185 } 186 } while (ret == ZIIRAVE_FIRM_DOWNLOAD_BUSY); 187 188 return ret == ZIIRAVE_FIRM_DOWNLOAD_ACK ? 0 : -EIO; 189 } 190 191 static int ziirave_firm_set_read_addr(struct watchdog_device *wdd, u16 addr) 192 { 193 struct i2c_client *client = to_i2c_client(wdd->parent); 194 u8 address[2]; 195 196 address[0] = addr & 0xff; 197 address[1] = (addr >> 8) & 0xff; 198 199 return i2c_smbus_write_block_data(client, 200 ZIIRAVE_CMD_DOWNLOAD_SET_READ_ADDR, 201 ARRAY_SIZE(address), address); 202 } 203 204 static int ziirave_firm_write_block_data(struct watchdog_device *wdd, 205 u8 command, u8 length, const u8 *data, 206 bool wait_for_ack) 207 { 208 struct i2c_client *client = to_i2c_client(wdd->parent); 209 int ret; 210 211 ret = i2c_smbus_write_block_data(client, command, length, data); 212 if (ret) { 213 dev_err(&client->dev, 214 "Failed to send command 0x%02x: %d\n", command, ret); 215 return ret; 216 } 217 218 if (wait_for_ack) 219 ret = ziirave_firm_wait_for_ack(wdd); 220 221 return ret; 222 } 223 224 static int ziirave_firm_write_byte(struct watchdog_device *wdd, u8 command, 225 u8 byte, bool wait_for_ack) 226 { 227 return ziirave_firm_write_block_data(wdd, command, 1, &byte, 228 wait_for_ack); 229 } 230 231 /* 232 * ziirave_firm_write_pkt() - Build and write a firmware packet 233 * 234 * A packet to send to the firmware is composed by following bytes: 235 * Length | Addr0 | Addr1 | Data0 .. Data15 | Checksum | 236 * Where, 237 * Length: A data byte containing the length of the data. 238 * Addr0: Low byte of the address. 239 * Addr1: High byte of the address. 240 * Data0 .. Data15: Array of 16 bytes of data. 241 * Checksum: Checksum byte to verify data integrity. 242 */ 243 static int ziirave_firm_write_pkt(struct watchdog_device *wdd, 244 const struct ihex_binrec *rec) 245 { 246 struct i2c_client *client = to_i2c_client(wdd->parent); 247 u8 i, checksum = 0, packet[ZIIRAVE_FIRM_PKT_TOTAL_SIZE]; 248 int ret; 249 u16 addr; 250 251 memset(packet, 0, ARRAY_SIZE(packet)); 252 253 /* Packet length */ 254 packet[0] = (u8)be16_to_cpu(rec->len); 255 /* Packet address */ 256 addr = (be32_to_cpu(rec->addr) & 0xffff) >> 1; 257 packet[1] = addr & 0xff; 258 packet[2] = (addr & 0xff00) >> 8; 259 260 /* Packet data */ 261 if (be16_to_cpu(rec->len) > ZIIRAVE_FIRM_PKT_DATA_SIZE) 262 return -EMSGSIZE; 263 memcpy(packet + 3, rec->data, be16_to_cpu(rec->len)); 264 265 /* Packet checksum */ 266 for (i = 0; i < ZIIRAVE_FIRM_PKT_TOTAL_SIZE - 1; i++) 267 checksum += packet[i]; 268 packet[ZIIRAVE_FIRM_PKT_TOTAL_SIZE - 1] = checksum; 269 270 ret = ziirave_firm_write_block_data(wdd, ZIIRAVE_CMD_DOWNLOAD_PACKET, 271 ARRAY_SIZE(packet), packet, true); 272 if (ret) 273 dev_err(&client->dev, 274 "Failed to write firmware packet at address 0x%04x: %d\n", 275 addr, ret); 276 277 return ret; 278 } 279 280 static int ziirave_firm_verify(struct watchdog_device *wdd, 281 const struct firmware *fw) 282 { 283 struct i2c_client *client = to_i2c_client(wdd->parent); 284 const struct ihex_binrec *rec; 285 int i, ret; 286 u8 data[ZIIRAVE_FIRM_PKT_DATA_SIZE]; 287 u16 addr; 288 289 for (rec = (void *)fw->data; rec; rec = ihex_next_binrec(rec)) { 290 /* Zero length marks end of records */ 291 if (!be16_to_cpu(rec->len)) 292 break; 293 294 addr = (be32_to_cpu(rec->addr) & 0xffff) >> 1; 295 if (addr < ZIIRAVE_FIRM_FLASH_MEMORY_START || 296 addr > ZIIRAVE_FIRM_FLASH_MEMORY_END) 297 continue; 298 299 ret = ziirave_firm_set_read_addr(wdd, addr); 300 if (ret) { 301 dev_err(&client->dev, 302 "Failed to send SET_READ_ADDR command: %d\n", 303 ret); 304 return ret; 305 } 306 307 for (i = 0; i < ARRAY_SIZE(data); i++) { 308 ret = i2c_smbus_read_byte_data(client, 309 ZIIRAVE_CMD_DOWNLOAD_READ_BYTE); 310 if (ret < 0) { 311 dev_err(&client->dev, 312 "Failed to READ DATA: %d\n", ret); 313 return ret; 314 } 315 data[i] = ret; 316 } 317 318 if (memcmp(data, rec->data, be16_to_cpu(rec->len))) { 319 dev_err(&client->dev, 320 "Firmware mismatch at address 0x%04x\n", addr); 321 return -EINVAL; 322 } 323 } 324 325 return 0; 326 } 327 328 static int ziirave_firm_upload(struct watchdog_device *wdd, 329 const struct firmware *fw) 330 { 331 struct i2c_client *client = to_i2c_client(wdd->parent); 332 int ret, words_till_page_break; 333 const struct ihex_binrec *rec; 334 struct ihex_binrec *rec_new; 335 336 ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_JUMP_TO_BOOTLOADER, 1, 337 false); 338 if (ret) 339 return ret; 340 341 msleep(500); 342 343 ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_DOWNLOAD_START, 1, true); 344 if (ret) 345 return ret; 346 347 msleep(500); 348 349 for (rec = (void *)fw->data; rec; rec = ihex_next_binrec(rec)) { 350 /* Zero length marks end of records */ 351 if (!be16_to_cpu(rec->len)) 352 break; 353 354 /* Check max data size */ 355 if (be16_to_cpu(rec->len) > ZIIRAVE_FIRM_PKT_DATA_SIZE) { 356 dev_err(&client->dev, "Firmware packet too long (%d)\n", 357 be16_to_cpu(rec->len)); 358 return -EMSGSIZE; 359 } 360 361 /* Calculate words till page break */ 362 words_till_page_break = (64 - ((be32_to_cpu(rec->addr) >> 1) & 363 0x3f)); 364 if ((be16_to_cpu(rec->len) >> 1) > words_till_page_break) { 365 /* 366 * Data in passes page boundary, so we need to split in 367 * two blocks of data. Create a packet with the first 368 * block of data. 369 */ 370 rec_new = kzalloc(sizeof(struct ihex_binrec) + 371 (words_till_page_break << 1), 372 GFP_KERNEL); 373 if (!rec_new) 374 return -ENOMEM; 375 376 rec_new->len = cpu_to_be16(words_till_page_break << 1); 377 rec_new->addr = rec->addr; 378 memcpy(rec_new->data, rec->data, 379 be16_to_cpu(rec_new->len)); 380 381 ret = ziirave_firm_write_pkt(wdd, rec_new); 382 kfree(rec_new); 383 if (ret) 384 return ret; 385 386 /* Create a packet with the second block of data */ 387 rec_new = kzalloc(sizeof(struct ihex_binrec) + 388 be16_to_cpu(rec->len) - 389 (words_till_page_break << 1), 390 GFP_KERNEL); 391 if (!rec_new) 392 return -ENOMEM; 393 394 /* Remaining bytes */ 395 rec_new->len = rec->len - 396 cpu_to_be16(words_till_page_break << 1); 397 398 rec_new->addr = cpu_to_be32(be32_to_cpu(rec->addr) + 399 (words_till_page_break << 1)); 400 401 memcpy(rec_new->data, 402 rec->data + (words_till_page_break << 1), 403 be16_to_cpu(rec_new->len)); 404 405 ret = ziirave_firm_write_pkt(wdd, rec_new); 406 kfree(rec_new); 407 if (ret) 408 return ret; 409 } else { 410 ret = ziirave_firm_write_pkt(wdd, rec); 411 if (ret) 412 return ret; 413 } 414 } 415 416 /* For end of download, the length field will be set to 0 */ 417 rec_new = kzalloc(sizeof(struct ihex_binrec) + 1, GFP_KERNEL); 418 if (!rec_new) 419 return -ENOMEM; 420 421 ret = ziirave_firm_write_pkt(wdd, rec_new); 422 kfree(rec_new); 423 if (ret) { 424 dev_err(&client->dev, "Failed to send EMPTY packet: %d\n", ret); 425 return ret; 426 } 427 428 /* This sleep seems to be required */ 429 msleep(20); 430 431 /* Start firmware verification */ 432 ret = ziirave_firm_verify(wdd, fw); 433 if (ret) { 434 dev_err(&client->dev, 435 "Failed to verify firmware: %d\n", ret); 436 return ret; 437 } 438 439 /* End download operation */ 440 ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_DOWNLOAD_END, 1, false); 441 if (ret) 442 return ret; 443 444 /* Reset the processor */ 445 ret = ziirave_firm_write_byte(wdd, ZIIRAVE_CMD_RESET_PROCESSOR, 1, 446 false); 447 if (ret) 448 return ret; 449 450 msleep(500); 451 452 return 0; 453 } 454 455 static const struct watchdog_info ziirave_wdt_info = { 456 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, 457 .identity = "Zodiac RAVE Watchdog", 458 }; 459 460 static const struct watchdog_ops ziirave_wdt_ops = { 461 .owner = THIS_MODULE, 462 .start = ziirave_wdt_start, 463 .stop = ziirave_wdt_stop, 464 .ping = ziirave_wdt_ping, 465 .set_timeout = ziirave_wdt_set_timeout, 466 .get_timeleft = ziirave_wdt_get_timeleft, 467 }; 468 469 static ssize_t ziirave_wdt_sysfs_show_firm(struct device *dev, 470 struct device_attribute *attr, 471 char *buf) 472 { 473 struct i2c_client *client = to_i2c_client(dev->parent); 474 struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client); 475 int ret; 476 477 ret = mutex_lock_interruptible(&w_priv->sysfs_mutex); 478 if (ret) 479 return ret; 480 481 ret = sprintf(buf, "02.%02u.%02u", w_priv->firmware_rev.major, 482 w_priv->firmware_rev.minor); 483 484 mutex_unlock(&w_priv->sysfs_mutex); 485 486 return ret; 487 } 488 489 static DEVICE_ATTR(firmware_version, S_IRUGO, ziirave_wdt_sysfs_show_firm, 490 NULL); 491 492 static ssize_t ziirave_wdt_sysfs_show_boot(struct device *dev, 493 struct device_attribute *attr, 494 char *buf) 495 { 496 struct i2c_client *client = to_i2c_client(dev->parent); 497 struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client); 498 int ret; 499 500 ret = mutex_lock_interruptible(&w_priv->sysfs_mutex); 501 if (ret) 502 return ret; 503 504 ret = sprintf(buf, "01.%02u.%02u", w_priv->bootloader_rev.major, 505 w_priv->bootloader_rev.minor); 506 507 mutex_unlock(&w_priv->sysfs_mutex); 508 509 return ret; 510 } 511 512 static DEVICE_ATTR(bootloader_version, S_IRUGO, ziirave_wdt_sysfs_show_boot, 513 NULL); 514 515 static ssize_t ziirave_wdt_sysfs_show_reason(struct device *dev, 516 struct device_attribute *attr, 517 char *buf) 518 { 519 struct i2c_client *client = to_i2c_client(dev->parent); 520 struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client); 521 int ret; 522 523 ret = mutex_lock_interruptible(&w_priv->sysfs_mutex); 524 if (ret) 525 return ret; 526 527 ret = sprintf(buf, "%s", ziirave_reasons[w_priv->reset_reason]); 528 529 mutex_unlock(&w_priv->sysfs_mutex); 530 531 return ret; 532 } 533 534 static DEVICE_ATTR(reset_reason, S_IRUGO, ziirave_wdt_sysfs_show_reason, 535 NULL); 536 537 static ssize_t ziirave_wdt_sysfs_store_firm(struct device *dev, 538 struct device_attribute *attr, 539 const char *buf, size_t count) 540 { 541 struct i2c_client *client = to_i2c_client(dev->parent); 542 struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client); 543 const struct firmware *fw; 544 int err; 545 546 err = request_ihex_firmware(&fw, ZIIRAVE_FW_NAME, dev); 547 if (err) { 548 dev_err(&client->dev, "Failed to request ihex firmware\n"); 549 return err; 550 } 551 552 err = mutex_lock_interruptible(&w_priv->sysfs_mutex); 553 if (err) 554 goto release_firmware; 555 556 err = ziirave_firm_upload(&w_priv->wdd, fw); 557 if (err) { 558 dev_err(&client->dev, "The firmware update failed: %d\n", err); 559 goto unlock_mutex; 560 } 561 562 /* Update firmware version */ 563 err = ziirave_wdt_revision(client, &w_priv->firmware_rev, 564 ZIIRAVE_WDT_FIRM_VER_MAJOR); 565 if (err) { 566 dev_err(&client->dev, "Failed to read firmware version: %d\n", 567 err); 568 goto unlock_mutex; 569 } 570 571 dev_info(&client->dev, "Firmware updated to version 02.%02u.%02u\n", 572 w_priv->firmware_rev.major, w_priv->firmware_rev.minor); 573 574 /* Restore the watchdog timeout */ 575 err = ziirave_wdt_set_timeout(&w_priv->wdd, w_priv->wdd.timeout); 576 if (err) 577 dev_err(&client->dev, "Failed to set timeout: %d\n", err); 578 579 unlock_mutex: 580 mutex_unlock(&w_priv->sysfs_mutex); 581 582 release_firmware: 583 release_firmware(fw); 584 585 return err ? err : count; 586 } 587 588 static DEVICE_ATTR(update_firmware, S_IWUSR, NULL, 589 ziirave_wdt_sysfs_store_firm); 590 591 static struct attribute *ziirave_wdt_attrs[] = { 592 &dev_attr_firmware_version.attr, 593 &dev_attr_bootloader_version.attr, 594 &dev_attr_reset_reason.attr, 595 &dev_attr_update_firmware.attr, 596 NULL 597 }; 598 ATTRIBUTE_GROUPS(ziirave_wdt); 599 600 static int ziirave_wdt_init_duration(struct i2c_client *client) 601 { 602 int ret; 603 604 if (!reset_duration) { 605 /* See if the reset pulse duration is provided in an of_node */ 606 if (!client->dev.of_node) 607 ret = -ENODEV; 608 else 609 ret = of_property_read_u32(client->dev.of_node, 610 "reset-duration-ms", 611 &reset_duration); 612 if (ret) { 613 dev_info(&client->dev, 614 "Unable to set reset pulse duration, using default\n"); 615 return 0; 616 } 617 } 618 619 if (reset_duration < 1 || reset_duration > 255) 620 return -EINVAL; 621 622 dev_info(&client->dev, "Setting reset duration to %dms", 623 reset_duration); 624 625 return i2c_smbus_write_byte_data(client, ZIIRAVE_WDT_RESET_DURATION, 626 reset_duration); 627 } 628 629 static int ziirave_wdt_probe(struct i2c_client *client, 630 const struct i2c_device_id *id) 631 { 632 int ret; 633 struct ziirave_wdt_data *w_priv; 634 int val; 635 636 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) 637 return -ENODEV; 638 639 w_priv = devm_kzalloc(&client->dev, sizeof(*w_priv), GFP_KERNEL); 640 if (!w_priv) 641 return -ENOMEM; 642 643 mutex_init(&w_priv->sysfs_mutex); 644 645 w_priv->wdd.info = &ziirave_wdt_info; 646 w_priv->wdd.ops = &ziirave_wdt_ops; 647 w_priv->wdd.min_timeout = ZIIRAVE_TIMEOUT_MIN; 648 w_priv->wdd.max_timeout = ZIIRAVE_TIMEOUT_MAX; 649 w_priv->wdd.parent = &client->dev; 650 w_priv->wdd.groups = ziirave_wdt_groups; 651 652 watchdog_init_timeout(&w_priv->wdd, wdt_timeout, &client->dev); 653 654 /* 655 * The default value set in the watchdog should be perfectly valid, so 656 * pass that in if we haven't provided one via the module parameter or 657 * of property. 658 */ 659 if (w_priv->wdd.timeout == 0) { 660 val = i2c_smbus_read_byte_data(client, ZIIRAVE_WDT_TIMEOUT); 661 if (val < 0) 662 return val; 663 664 if (val < ZIIRAVE_TIMEOUT_MIN) 665 return -ENODEV; 666 667 w_priv->wdd.timeout = val; 668 } else { 669 ret = ziirave_wdt_set_timeout(&w_priv->wdd, 670 w_priv->wdd.timeout); 671 if (ret) 672 return ret; 673 674 dev_info(&client->dev, "Timeout set to %ds.", 675 w_priv->wdd.timeout); 676 } 677 678 watchdog_set_nowayout(&w_priv->wdd, nowayout); 679 680 i2c_set_clientdata(client, w_priv); 681 682 /* If in unconfigured state, set to stopped */ 683 val = i2c_smbus_read_byte_data(client, ZIIRAVE_WDT_STATE); 684 if (val < 0) 685 return val; 686 687 if (val == ZIIRAVE_STATE_INITIAL) 688 ziirave_wdt_stop(&w_priv->wdd); 689 690 ret = ziirave_wdt_init_duration(client); 691 if (ret) 692 return ret; 693 694 ret = ziirave_wdt_revision(client, &w_priv->firmware_rev, 695 ZIIRAVE_WDT_FIRM_VER_MAJOR); 696 if (ret) 697 return ret; 698 699 ret = ziirave_wdt_revision(client, &w_priv->bootloader_rev, 700 ZIIRAVE_WDT_BOOT_VER_MAJOR); 701 if (ret) 702 return ret; 703 704 w_priv->reset_reason = i2c_smbus_read_byte_data(client, 705 ZIIRAVE_WDT_RESET_REASON); 706 if (w_priv->reset_reason < 0) 707 return w_priv->reset_reason; 708 709 if (w_priv->reset_reason >= ARRAY_SIZE(ziirave_reasons) || 710 !ziirave_reasons[w_priv->reset_reason]) 711 return -ENODEV; 712 713 ret = watchdog_register_device(&w_priv->wdd); 714 715 return ret; 716 } 717 718 static int ziirave_wdt_remove(struct i2c_client *client) 719 { 720 struct ziirave_wdt_data *w_priv = i2c_get_clientdata(client); 721 722 watchdog_unregister_device(&w_priv->wdd); 723 724 return 0; 725 } 726 727 static const struct i2c_device_id ziirave_wdt_id[] = { 728 { "rave-wdt", 0 }, 729 { } 730 }; 731 MODULE_DEVICE_TABLE(i2c, ziirave_wdt_id); 732 733 static const struct of_device_id zrv_wdt_of_match[] = { 734 { .compatible = "zii,rave-wdt", }, 735 { }, 736 }; 737 MODULE_DEVICE_TABLE(of, zrv_wdt_of_match); 738 739 static struct i2c_driver ziirave_wdt_driver = { 740 .driver = { 741 .name = "ziirave_wdt", 742 .of_match_table = zrv_wdt_of_match, 743 }, 744 .probe = ziirave_wdt_probe, 745 .remove = ziirave_wdt_remove, 746 .id_table = ziirave_wdt_id, 747 }; 748 749 module_i2c_driver(ziirave_wdt_driver); 750 751 MODULE_AUTHOR("Martyn Welch <martyn.welch@collabora.co.uk"); 752 MODULE_DESCRIPTION("Zodiac Aerospace RAVE Switch Watchdog Processor Driver"); 753 MODULE_LICENSE("GPL"); 754