1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * ST's LPC Watchdog 4 * 5 * Copyright (C) 2014 STMicroelectronics -- All Rights Reserved 6 * 7 * Author: David Paris <david.paris@st.com> for STMicroelectronics 8 * Lee Jones <lee.jones@linaro.org> for STMicroelectronics 9 */ 10 11 #include <linux/clk.h> 12 #include <linux/init.h> 13 #include <linux/io.h> 14 #include <linux/kernel.h> 15 #include <linux/mfd/syscon.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_platform.h> 19 #include <linux/platform_device.h> 20 #include <linux/regmap.h> 21 #include <linux/watchdog.h> 22 23 #include <dt-bindings/mfd/st-lpc.h> 24 25 /* Low Power Alarm */ 26 #define LPC_LPA_LSB_OFF 0x410 27 #define LPC_LPA_START_OFF 0x418 28 29 /* LPC as WDT */ 30 #define LPC_WDT_OFF 0x510 31 32 static struct watchdog_device st_wdog_dev; 33 34 struct st_wdog_syscfg { 35 unsigned int reset_type_reg; 36 unsigned int reset_type_mask; 37 unsigned int enable_reg; 38 unsigned int enable_mask; 39 }; 40 41 struct st_wdog { 42 void __iomem *base; 43 struct device *dev; 44 struct regmap *regmap; 45 struct st_wdog_syscfg *syscfg; 46 struct clk *clk; 47 unsigned long clkrate; 48 bool warm_reset; 49 }; 50 51 static struct st_wdog_syscfg stih407_syscfg = { 52 .enable_reg = 0x204, 53 .enable_mask = BIT(19), 54 }; 55 56 static const struct of_device_id st_wdog_match[] = { 57 { 58 .compatible = "st,stih407-lpc", 59 .data = &stih407_syscfg, 60 }, 61 {}, 62 }; 63 MODULE_DEVICE_TABLE(of, st_wdog_match); 64 65 static void st_wdog_setup(struct st_wdog *st_wdog, bool enable) 66 { 67 /* Type of watchdog reset - 0: Cold 1: Warm */ 68 if (st_wdog->syscfg->reset_type_reg) 69 regmap_update_bits(st_wdog->regmap, 70 st_wdog->syscfg->reset_type_reg, 71 st_wdog->syscfg->reset_type_mask, 72 st_wdog->warm_reset); 73 74 /* Mask/unmask watchdog reset */ 75 regmap_update_bits(st_wdog->regmap, 76 st_wdog->syscfg->enable_reg, 77 st_wdog->syscfg->enable_mask, 78 enable ? 0 : st_wdog->syscfg->enable_mask); 79 } 80 81 static void st_wdog_load_timer(struct st_wdog *st_wdog, unsigned int timeout) 82 { 83 unsigned long clkrate = st_wdog->clkrate; 84 85 writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF); 86 writel_relaxed(1, st_wdog->base + LPC_LPA_START_OFF); 87 } 88 89 static int st_wdog_start(struct watchdog_device *wdd) 90 { 91 struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); 92 93 writel_relaxed(1, st_wdog->base + LPC_WDT_OFF); 94 95 return 0; 96 } 97 98 static int st_wdog_stop(struct watchdog_device *wdd) 99 { 100 struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); 101 102 writel_relaxed(0, st_wdog->base + LPC_WDT_OFF); 103 104 return 0; 105 } 106 107 static int st_wdog_set_timeout(struct watchdog_device *wdd, 108 unsigned int timeout) 109 { 110 struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); 111 112 wdd->timeout = timeout; 113 st_wdog_load_timer(st_wdog, timeout); 114 115 return 0; 116 } 117 118 static int st_wdog_keepalive(struct watchdog_device *wdd) 119 { 120 struct st_wdog *st_wdog = watchdog_get_drvdata(wdd); 121 122 st_wdog_load_timer(st_wdog, wdd->timeout); 123 124 return 0; 125 } 126 127 static const struct watchdog_info st_wdog_info = { 128 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 129 .identity = "ST LPC WDT", 130 }; 131 132 static const struct watchdog_ops st_wdog_ops = { 133 .owner = THIS_MODULE, 134 .start = st_wdog_start, 135 .stop = st_wdog_stop, 136 .ping = st_wdog_keepalive, 137 .set_timeout = st_wdog_set_timeout, 138 }; 139 140 static struct watchdog_device st_wdog_dev = { 141 .info = &st_wdog_info, 142 .ops = &st_wdog_ops, 143 }; 144 145 static int st_wdog_probe(struct platform_device *pdev) 146 { 147 const struct of_device_id *match; 148 struct device_node *np = pdev->dev.of_node; 149 struct st_wdog *st_wdog; 150 struct regmap *regmap; 151 struct resource *res; 152 struct clk *clk; 153 void __iomem *base; 154 uint32_t mode; 155 int ret; 156 157 ret = of_property_read_u32(np, "st,lpc-mode", &mode); 158 if (ret) { 159 dev_err(&pdev->dev, "An LPC mode must be provided\n"); 160 return -EINVAL; 161 } 162 163 /* LPC can either run as a Clocksource or in RTC or WDT mode */ 164 if (mode != ST_LPC_MODE_WDT) 165 return -ENODEV; 166 167 st_wdog = devm_kzalloc(&pdev->dev, sizeof(*st_wdog), GFP_KERNEL); 168 if (!st_wdog) 169 return -ENOMEM; 170 171 match = of_match_device(st_wdog_match, &pdev->dev); 172 if (!match) { 173 dev_err(&pdev->dev, "Couldn't match device\n"); 174 return -ENODEV; 175 } 176 st_wdog->syscfg = (struct st_wdog_syscfg *)match->data; 177 178 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 179 base = devm_ioremap_resource(&pdev->dev, res); 180 if (IS_ERR(base)) 181 return PTR_ERR(base); 182 183 regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); 184 if (IS_ERR(regmap)) { 185 dev_err(&pdev->dev, "No syscfg phandle specified\n"); 186 return PTR_ERR(regmap); 187 } 188 189 clk = devm_clk_get(&pdev->dev, NULL); 190 if (IS_ERR(clk)) { 191 dev_err(&pdev->dev, "Unable to request clock\n"); 192 return PTR_ERR(clk); 193 } 194 195 st_wdog->dev = &pdev->dev; 196 st_wdog->base = base; 197 st_wdog->clk = clk; 198 st_wdog->regmap = regmap; 199 st_wdog->warm_reset = of_property_read_bool(np, "st,warm_reset"); 200 st_wdog->clkrate = clk_get_rate(st_wdog->clk); 201 202 if (!st_wdog->clkrate) { 203 dev_err(&pdev->dev, "Unable to fetch clock rate\n"); 204 return -EINVAL; 205 } 206 st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate; 207 st_wdog_dev.parent = &pdev->dev; 208 209 ret = clk_prepare_enable(clk); 210 if (ret) { 211 dev_err(&pdev->dev, "Unable to enable clock\n"); 212 return ret; 213 } 214 215 watchdog_set_drvdata(&st_wdog_dev, st_wdog); 216 watchdog_set_nowayout(&st_wdog_dev, WATCHDOG_NOWAYOUT); 217 218 /* Init Watchdog timeout with value in DT */ 219 ret = watchdog_init_timeout(&st_wdog_dev, 0, &pdev->dev); 220 if (ret) { 221 dev_err(&pdev->dev, "Unable to initialise watchdog timeout\n"); 222 clk_disable_unprepare(clk); 223 return ret; 224 } 225 226 ret = watchdog_register_device(&st_wdog_dev); 227 if (ret) { 228 dev_err(&pdev->dev, "Unable to register watchdog\n"); 229 clk_disable_unprepare(clk); 230 return ret; 231 } 232 233 st_wdog_setup(st_wdog, true); 234 235 dev_info(&pdev->dev, "LPC Watchdog driver registered, reset type is %s", 236 st_wdog->warm_reset ? "warm" : "cold"); 237 238 return ret; 239 } 240 241 static int st_wdog_remove(struct platform_device *pdev) 242 { 243 struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev); 244 245 st_wdog_setup(st_wdog, false); 246 watchdog_unregister_device(&st_wdog_dev); 247 clk_disable_unprepare(st_wdog->clk); 248 249 return 0; 250 } 251 252 #ifdef CONFIG_PM_SLEEP 253 static int st_wdog_suspend(struct device *dev) 254 { 255 struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev); 256 257 if (watchdog_active(&st_wdog_dev)) 258 st_wdog_stop(&st_wdog_dev); 259 260 st_wdog_setup(st_wdog, false); 261 262 clk_disable(st_wdog->clk); 263 264 return 0; 265 } 266 267 static int st_wdog_resume(struct device *dev) 268 { 269 struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev); 270 int ret; 271 272 ret = clk_enable(st_wdog->clk); 273 if (ret) { 274 dev_err(dev, "Unable to re-enable clock\n"); 275 watchdog_unregister_device(&st_wdog_dev); 276 clk_unprepare(st_wdog->clk); 277 return ret; 278 } 279 280 st_wdog_setup(st_wdog, true); 281 282 if (watchdog_active(&st_wdog_dev)) { 283 st_wdog_load_timer(st_wdog, st_wdog_dev.timeout); 284 st_wdog_start(&st_wdog_dev); 285 } 286 287 return 0; 288 } 289 #endif 290 291 static SIMPLE_DEV_PM_OPS(st_wdog_pm_ops, 292 st_wdog_suspend, 293 st_wdog_resume); 294 295 static struct platform_driver st_wdog_driver = { 296 .driver = { 297 .name = "st-lpc-wdt", 298 .pm = &st_wdog_pm_ops, 299 .of_match_table = st_wdog_match, 300 }, 301 .probe = st_wdog_probe, 302 .remove = st_wdog_remove, 303 }; 304 module_platform_driver(st_wdog_driver); 305 306 MODULE_AUTHOR("David Paris <david.paris@st.com>"); 307 MODULE_DESCRIPTION("ST LPC Watchdog Driver"); 308 MODULE_LICENSE("GPL"); 309