1 /* 2 * drivers/char/watchdog/sp805-wdt.c 3 * 4 * Watchdog driver for ARM SP805 watchdog module 5 * 6 * Copyright (C) 2010 ST Microelectronics 7 * Viresh Kumar <vireshk@kernel.org> 8 * 9 * This file is licensed under the terms of the GNU General Public 10 * License version 2 or later. This program is licensed "as is" without any 11 * warranty of any kind, whether express or implied. 12 */ 13 14 #include <linux/device.h> 15 #include <linux/resource.h> 16 #include <linux/amba/bus.h> 17 #include <linux/bitops.h> 18 #include <linux/clk.h> 19 #include <linux/io.h> 20 #include <linux/ioport.h> 21 #include <linux/kernel.h> 22 #include <linux/math64.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/pm.h> 26 #include <linux/slab.h> 27 #include <linux/spinlock.h> 28 #include <linux/types.h> 29 #include <linux/watchdog.h> 30 31 /* default timeout in seconds */ 32 #define DEFAULT_TIMEOUT 60 33 34 #define MODULE_NAME "sp805-wdt" 35 36 /* watchdog register offsets and masks */ 37 #define WDTLOAD 0x000 38 #define LOAD_MIN 0x00000001 39 #define LOAD_MAX 0xFFFFFFFF 40 #define WDTVALUE 0x004 41 #define WDTCONTROL 0x008 42 /* control register masks */ 43 #define INT_ENABLE (1 << 0) 44 #define RESET_ENABLE (1 << 1) 45 #define WDTINTCLR 0x00C 46 #define WDTRIS 0x010 47 #define WDTMIS 0x014 48 #define INT_MASK (1 << 0) 49 #define WDTLOCK 0xC00 50 #define UNLOCK 0x1ACCE551 51 #define LOCK 0x00000001 52 53 /** 54 * struct sp805_wdt: sp805 wdt device structure 55 * @wdd: instance of struct watchdog_device 56 * @lock: spin lock protecting dev structure and io access 57 * @base: base address of wdt 58 * @clk: clock structure of wdt 59 * @adev: amba device structure of wdt 60 * @status: current status of wdt 61 * @load_val: load value to be set for current timeout 62 */ 63 struct sp805_wdt { 64 struct watchdog_device wdd; 65 spinlock_t lock; 66 void __iomem *base; 67 struct clk *clk; 68 struct amba_device *adev; 69 unsigned int load_val; 70 }; 71 72 static bool nowayout = WATCHDOG_NOWAYOUT; 73 module_param(nowayout, bool, 0); 74 MODULE_PARM_DESC(nowayout, 75 "Set to 1 to keep watchdog running after device release"); 76 77 /* This routine finds load value that will reset system in required timout */ 78 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout) 79 { 80 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 81 u64 load, rate; 82 83 rate = clk_get_rate(wdt->clk); 84 85 /* 86 * sp805 runs counter with given value twice, after the end of first 87 * counter it gives an interrupt and then starts counter again. If 88 * interrupt already occurred then it resets the system. This is why 89 * load is half of what should be required. 90 */ 91 load = div_u64(rate, 2) * timeout - 1; 92 93 load = (load > LOAD_MAX) ? LOAD_MAX : load; 94 load = (load < LOAD_MIN) ? LOAD_MIN : load; 95 96 spin_lock(&wdt->lock); 97 wdt->load_val = load; 98 /* roundup timeout to closest positive integer value */ 99 wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate); 100 spin_unlock(&wdt->lock); 101 102 return 0; 103 } 104 105 /* returns number of seconds left for reset to occur */ 106 static unsigned int wdt_timeleft(struct watchdog_device *wdd) 107 { 108 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 109 u64 load, rate; 110 111 rate = clk_get_rate(wdt->clk); 112 113 spin_lock(&wdt->lock); 114 load = readl_relaxed(wdt->base + WDTVALUE); 115 116 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */ 117 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK)) 118 load += wdt->load_val + 1; 119 spin_unlock(&wdt->lock); 120 121 return div_u64(load, rate); 122 } 123 124 static int wdt_config(struct watchdog_device *wdd, bool ping) 125 { 126 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 127 int ret; 128 129 if (!ping) { 130 131 ret = clk_prepare_enable(wdt->clk); 132 if (ret) { 133 dev_err(&wdt->adev->dev, "clock enable fail"); 134 return ret; 135 } 136 } 137 138 spin_lock(&wdt->lock); 139 140 writel_relaxed(UNLOCK, wdt->base + WDTLOCK); 141 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD); 142 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR); 143 144 if (!ping) 145 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + 146 WDTCONTROL); 147 148 writel_relaxed(LOCK, wdt->base + WDTLOCK); 149 150 /* Flush posted writes. */ 151 readl_relaxed(wdt->base + WDTLOCK); 152 spin_unlock(&wdt->lock); 153 154 return 0; 155 } 156 157 static int wdt_ping(struct watchdog_device *wdd) 158 { 159 return wdt_config(wdd, true); 160 } 161 162 /* enables watchdog timers reset */ 163 static int wdt_enable(struct watchdog_device *wdd) 164 { 165 return wdt_config(wdd, false); 166 } 167 168 /* disables watchdog timers reset */ 169 static int wdt_disable(struct watchdog_device *wdd) 170 { 171 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 172 173 spin_lock(&wdt->lock); 174 175 writel_relaxed(UNLOCK, wdt->base + WDTLOCK); 176 writel_relaxed(0, wdt->base + WDTCONTROL); 177 writel_relaxed(LOCK, wdt->base + WDTLOCK); 178 179 /* Flush posted writes. */ 180 readl_relaxed(wdt->base + WDTLOCK); 181 spin_unlock(&wdt->lock); 182 183 clk_disable_unprepare(wdt->clk); 184 185 return 0; 186 } 187 188 static const struct watchdog_info wdt_info = { 189 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 190 .identity = MODULE_NAME, 191 }; 192 193 static const struct watchdog_ops wdt_ops = { 194 .owner = THIS_MODULE, 195 .start = wdt_enable, 196 .stop = wdt_disable, 197 .ping = wdt_ping, 198 .set_timeout = wdt_setload, 199 .get_timeleft = wdt_timeleft, 200 }; 201 202 static int 203 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id) 204 { 205 struct sp805_wdt *wdt; 206 int ret = 0; 207 208 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL); 209 if (!wdt) { 210 ret = -ENOMEM; 211 goto err; 212 } 213 214 wdt->base = devm_ioremap_resource(&adev->dev, &adev->res); 215 if (IS_ERR(wdt->base)) 216 return PTR_ERR(wdt->base); 217 218 wdt->clk = devm_clk_get(&adev->dev, NULL); 219 if (IS_ERR(wdt->clk)) { 220 dev_warn(&adev->dev, "Clock not found\n"); 221 ret = PTR_ERR(wdt->clk); 222 goto err; 223 } 224 225 wdt->adev = adev; 226 wdt->wdd.info = &wdt_info; 227 wdt->wdd.ops = &wdt_ops; 228 wdt->wdd.parent = &adev->dev; 229 230 spin_lock_init(&wdt->lock); 231 watchdog_set_nowayout(&wdt->wdd, nowayout); 232 watchdog_set_drvdata(&wdt->wdd, wdt); 233 wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT); 234 235 ret = watchdog_register_device(&wdt->wdd); 236 if (ret) { 237 dev_err(&adev->dev, "watchdog_register_device() failed: %d\n", 238 ret); 239 goto err; 240 } 241 amba_set_drvdata(adev, wdt); 242 243 dev_info(&adev->dev, "registration successful\n"); 244 return 0; 245 246 err: 247 dev_err(&adev->dev, "Probe Failed!!!\n"); 248 return ret; 249 } 250 251 static int sp805_wdt_remove(struct amba_device *adev) 252 { 253 struct sp805_wdt *wdt = amba_get_drvdata(adev); 254 255 watchdog_unregister_device(&wdt->wdd); 256 watchdog_set_drvdata(&wdt->wdd, NULL); 257 258 return 0; 259 } 260 261 static int __maybe_unused sp805_wdt_suspend(struct device *dev) 262 { 263 struct sp805_wdt *wdt = dev_get_drvdata(dev); 264 265 if (watchdog_active(&wdt->wdd)) 266 return wdt_disable(&wdt->wdd); 267 268 return 0; 269 } 270 271 static int __maybe_unused sp805_wdt_resume(struct device *dev) 272 { 273 struct sp805_wdt *wdt = dev_get_drvdata(dev); 274 275 if (watchdog_active(&wdt->wdd)) 276 return wdt_enable(&wdt->wdd); 277 278 return 0; 279 } 280 281 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend, 282 sp805_wdt_resume); 283 284 static const struct amba_id sp805_wdt_ids[] = { 285 { 286 .id = 0x00141805, 287 .mask = 0x00ffffff, 288 }, 289 { 0, 0 }, 290 }; 291 292 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids); 293 294 static struct amba_driver sp805_wdt_driver = { 295 .drv = { 296 .name = MODULE_NAME, 297 .pm = &sp805_wdt_dev_pm_ops, 298 }, 299 .id_table = sp805_wdt_ids, 300 .probe = sp805_wdt_probe, 301 .remove = sp805_wdt_remove, 302 }; 303 304 module_amba_driver(sp805_wdt_driver); 305 306 MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>"); 307 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver"); 308 MODULE_LICENSE("GPL"); 309