1 /* 2 * drivers/char/watchdog/sp805-wdt.c 3 * 4 * Watchdog driver for ARM SP805 watchdog module 5 * 6 * Copyright (C) 2010 ST Microelectronics 7 * Viresh Kumar <vireshk@kernel.org> 8 * 9 * This file is licensed under the terms of the GNU General Public 10 * License version 2 or later. This program is licensed "as is" without any 11 * warranty of any kind, whether express or implied. 12 */ 13 14 #include <linux/device.h> 15 #include <linux/resource.h> 16 #include <linux/amba/bus.h> 17 #include <linux/bitops.h> 18 #include <linux/clk.h> 19 #include <linux/io.h> 20 #include <linux/ioport.h> 21 #include <linux/kernel.h> 22 #include <linux/math64.h> 23 #include <linux/module.h> 24 #include <linux/moduleparam.h> 25 #include <linux/pm.h> 26 #include <linux/property.h> 27 #include <linux/slab.h> 28 #include <linux/spinlock.h> 29 #include <linux/types.h> 30 #include <linux/watchdog.h> 31 32 /* default timeout in seconds */ 33 #define DEFAULT_TIMEOUT 60 34 35 #define MODULE_NAME "sp805-wdt" 36 37 /* watchdog register offsets and masks */ 38 #define WDTLOAD 0x000 39 #define LOAD_MIN 0x00000001 40 #define LOAD_MAX 0xFFFFFFFF 41 #define WDTVALUE 0x004 42 #define WDTCONTROL 0x008 43 /* control register masks */ 44 #define INT_ENABLE (1 << 0) 45 #define RESET_ENABLE (1 << 1) 46 #define ENABLE_MASK (INT_ENABLE | RESET_ENABLE) 47 #define WDTINTCLR 0x00C 48 #define WDTRIS 0x010 49 #define WDTMIS 0x014 50 #define INT_MASK (1 << 0) 51 #define WDTLOCK 0xC00 52 #define UNLOCK 0x1ACCE551 53 #define LOCK 0x00000001 54 55 /** 56 * struct sp805_wdt: sp805 wdt device structure 57 * @wdd: instance of struct watchdog_device 58 * @lock: spin lock protecting dev structure and io access 59 * @base: base address of wdt 60 * @clk: (optional) clock structure of wdt 61 * @rate: (optional) clock rate when provided via properties 62 * @adev: amba device structure of wdt 63 * @status: current status of wdt 64 * @load_val: load value to be set for current timeout 65 */ 66 struct sp805_wdt { 67 struct watchdog_device wdd; 68 spinlock_t lock; 69 void __iomem *base; 70 struct clk *clk; 71 u64 rate; 72 struct amba_device *adev; 73 unsigned int load_val; 74 }; 75 76 static bool nowayout = WATCHDOG_NOWAYOUT; 77 module_param(nowayout, bool, 0); 78 MODULE_PARM_DESC(nowayout, 79 "Set to 1 to keep watchdog running after device release"); 80 81 /* returns true if wdt is running; otherwise returns false */ 82 static bool wdt_is_running(struct watchdog_device *wdd) 83 { 84 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 85 u32 wdtcontrol = readl_relaxed(wdt->base + WDTCONTROL); 86 87 return (wdtcontrol & ENABLE_MASK) == ENABLE_MASK; 88 } 89 90 /* This routine finds load value that will reset system in required timout */ 91 static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout) 92 { 93 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 94 u64 load, rate; 95 96 rate = wdt->rate; 97 98 /* 99 * sp805 runs counter with given value twice, after the end of first 100 * counter it gives an interrupt and then starts counter again. If 101 * interrupt already occurred then it resets the system. This is why 102 * load is half of what should be required. 103 */ 104 load = div_u64(rate, 2) * timeout - 1; 105 106 load = (load > LOAD_MAX) ? LOAD_MAX : load; 107 load = (load < LOAD_MIN) ? LOAD_MIN : load; 108 109 spin_lock(&wdt->lock); 110 wdt->load_val = load; 111 /* roundup timeout to closest positive integer value */ 112 wdd->timeout = div_u64((load + 1) * 2 + (rate / 2), rate); 113 spin_unlock(&wdt->lock); 114 115 return 0; 116 } 117 118 /* returns number of seconds left for reset to occur */ 119 static unsigned int wdt_timeleft(struct watchdog_device *wdd) 120 { 121 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 122 u64 load; 123 124 spin_lock(&wdt->lock); 125 load = readl_relaxed(wdt->base + WDTVALUE); 126 127 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */ 128 if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK)) 129 load += wdt->load_val + 1; 130 spin_unlock(&wdt->lock); 131 132 return div_u64(load, wdt->rate); 133 } 134 135 static int 136 wdt_restart(struct watchdog_device *wdd, unsigned long mode, void *cmd) 137 { 138 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 139 140 writel_relaxed(UNLOCK, wdt->base + WDTLOCK); 141 writel_relaxed(0, wdt->base + WDTCONTROL); 142 writel_relaxed(0, wdt->base + WDTLOAD); 143 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL); 144 145 /* Flush posted writes. */ 146 readl_relaxed(wdt->base + WDTLOCK); 147 148 return 0; 149 } 150 151 static int wdt_config(struct watchdog_device *wdd, bool ping) 152 { 153 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 154 int ret; 155 156 if (!ping) { 157 158 ret = clk_prepare_enable(wdt->clk); 159 if (ret) { 160 dev_err(&wdt->adev->dev, "clock enable fail"); 161 return ret; 162 } 163 } 164 165 spin_lock(&wdt->lock); 166 167 writel_relaxed(UNLOCK, wdt->base + WDTLOCK); 168 writel_relaxed(wdt->load_val, wdt->base + WDTLOAD); 169 writel_relaxed(INT_MASK, wdt->base + WDTINTCLR); 170 171 if (!ping) 172 writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + 173 WDTCONTROL); 174 175 writel_relaxed(LOCK, wdt->base + WDTLOCK); 176 177 /* Flush posted writes. */ 178 readl_relaxed(wdt->base + WDTLOCK); 179 spin_unlock(&wdt->lock); 180 181 return 0; 182 } 183 184 static int wdt_ping(struct watchdog_device *wdd) 185 { 186 return wdt_config(wdd, true); 187 } 188 189 /* enables watchdog timers reset */ 190 static int wdt_enable(struct watchdog_device *wdd) 191 { 192 return wdt_config(wdd, false); 193 } 194 195 /* disables watchdog timers reset */ 196 static int wdt_disable(struct watchdog_device *wdd) 197 { 198 struct sp805_wdt *wdt = watchdog_get_drvdata(wdd); 199 200 spin_lock(&wdt->lock); 201 202 writel_relaxed(UNLOCK, wdt->base + WDTLOCK); 203 writel_relaxed(0, wdt->base + WDTCONTROL); 204 writel_relaxed(LOCK, wdt->base + WDTLOCK); 205 206 /* Flush posted writes. */ 207 readl_relaxed(wdt->base + WDTLOCK); 208 spin_unlock(&wdt->lock); 209 210 clk_disable_unprepare(wdt->clk); 211 212 return 0; 213 } 214 215 static const struct watchdog_info wdt_info = { 216 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, 217 .identity = MODULE_NAME, 218 }; 219 220 static const struct watchdog_ops wdt_ops = { 221 .owner = THIS_MODULE, 222 .start = wdt_enable, 223 .stop = wdt_disable, 224 .ping = wdt_ping, 225 .set_timeout = wdt_setload, 226 .get_timeleft = wdt_timeleft, 227 .restart = wdt_restart, 228 }; 229 230 static int 231 sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id) 232 { 233 struct sp805_wdt *wdt; 234 u64 rate = 0; 235 int ret = 0; 236 237 wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL); 238 if (!wdt) { 239 ret = -ENOMEM; 240 goto err; 241 } 242 243 wdt->base = devm_ioremap_resource(&adev->dev, &adev->res); 244 if (IS_ERR(wdt->base)) 245 return PTR_ERR(wdt->base); 246 247 /* 248 * When driver probe with ACPI device, clock devices 249 * are not available, so watchdog rate get from 250 * clock-frequency property given in _DSD object. 251 */ 252 device_property_read_u64(&adev->dev, "clock-frequency", &rate); 253 254 wdt->clk = devm_clk_get_optional(&adev->dev, NULL); 255 if (IS_ERR(wdt->clk)) 256 return dev_err_probe(&adev->dev, PTR_ERR(wdt->clk), "Clock not found\n"); 257 258 wdt->rate = clk_get_rate(wdt->clk); 259 if (!wdt->rate) 260 wdt->rate = rate; 261 if (!wdt->rate) { 262 dev_err(&adev->dev, "no clock-frequency property\n"); 263 return -ENODEV; 264 } 265 266 wdt->adev = adev; 267 wdt->wdd.info = &wdt_info; 268 wdt->wdd.ops = &wdt_ops; 269 wdt->wdd.parent = &adev->dev; 270 271 spin_lock_init(&wdt->lock); 272 watchdog_set_nowayout(&wdt->wdd, nowayout); 273 watchdog_set_drvdata(&wdt->wdd, wdt); 274 watchdog_set_restart_priority(&wdt->wdd, 128); 275 276 /* 277 * If 'timeout-sec' devicetree property is specified, use that. 278 * Otherwise, use DEFAULT_TIMEOUT 279 */ 280 wdt->wdd.timeout = DEFAULT_TIMEOUT; 281 watchdog_init_timeout(&wdt->wdd, 0, &adev->dev); 282 wdt_setload(&wdt->wdd, wdt->wdd.timeout); 283 284 /* 285 * If HW is already running, enable/reset the wdt and set the running 286 * bit to tell the wdt subsystem 287 */ 288 if (wdt_is_running(&wdt->wdd)) { 289 wdt_enable(&wdt->wdd); 290 set_bit(WDOG_HW_RUNNING, &wdt->wdd.status); 291 } 292 293 watchdog_stop_on_reboot(&wdt->wdd); 294 ret = watchdog_register_device(&wdt->wdd); 295 if (ret) 296 goto err; 297 amba_set_drvdata(adev, wdt); 298 299 dev_info(&adev->dev, "registration successful\n"); 300 return 0; 301 302 err: 303 dev_err(&adev->dev, "Probe Failed!!!\n"); 304 return ret; 305 } 306 307 static void sp805_wdt_remove(struct amba_device *adev) 308 { 309 struct sp805_wdt *wdt = amba_get_drvdata(adev); 310 311 watchdog_unregister_device(&wdt->wdd); 312 watchdog_set_drvdata(&wdt->wdd, NULL); 313 } 314 315 static int __maybe_unused sp805_wdt_suspend(struct device *dev) 316 { 317 struct sp805_wdt *wdt = dev_get_drvdata(dev); 318 319 if (watchdog_active(&wdt->wdd)) 320 return wdt_disable(&wdt->wdd); 321 322 return 0; 323 } 324 325 static int __maybe_unused sp805_wdt_resume(struct device *dev) 326 { 327 struct sp805_wdt *wdt = dev_get_drvdata(dev); 328 329 if (watchdog_active(&wdt->wdd)) 330 return wdt_enable(&wdt->wdd); 331 332 return 0; 333 } 334 335 static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend, 336 sp805_wdt_resume); 337 338 static const struct amba_id sp805_wdt_ids[] = { 339 { 340 .id = 0x00141805, 341 .mask = 0x00ffffff, 342 }, 343 { 0, 0 }, 344 }; 345 346 MODULE_DEVICE_TABLE(amba, sp805_wdt_ids); 347 348 static struct amba_driver sp805_wdt_driver = { 349 .drv = { 350 .name = MODULE_NAME, 351 .pm = &sp805_wdt_dev_pm_ops, 352 }, 353 .id_table = sp805_wdt_ids, 354 .probe = sp805_wdt_probe, 355 .remove = sp805_wdt_remove, 356 }; 357 358 module_amba_driver(sp805_wdt_driver); 359 360 MODULE_AUTHOR("Viresh Kumar <vireshk@kernel.org>"); 361 MODULE_DESCRIPTION("ARM SP805 Watchdog Driver"); 362 MODULE_LICENSE("GPL"); 363