xref: /openbmc/linux/drivers/watchdog/rt2880_wdt.c (revision 31af04cd)
1 /*
2  * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
3  *
4  * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
5  * Copyright (C) 2013 John Crispin <john@phrozen.org>
6  *
7  * This driver was based on: drivers/watchdog/softdog.c
8  *
9  * This program is free software; you can redistribute it and/or modify it
10  * under the terms of the GNU General Public License version 2 as published
11  * by the Free Software Foundation.
12  */
13 
14 #include <linux/clk.h>
15 #include <linux/reset.h>
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/watchdog.h>
19 #include <linux/moduleparam.h>
20 #include <linux/platform_device.h>
21 #include <linux/mod_devicetable.h>
22 
23 #include <asm/mach-ralink/ralink_regs.h>
24 
25 #define SYSC_RSTSTAT			0x38
26 #define WDT_RST_CAUSE			BIT(1)
27 
28 #define RALINK_WDT_TIMEOUT		30
29 #define RALINK_WDT_PRESCALE		65536
30 
31 #define TIMER_REG_TMR1LOAD		0x00
32 #define TIMER_REG_TMR1CTL		0x08
33 
34 #define TMRSTAT_TMR1RST			BIT(5)
35 
36 #define TMR1CTL_ENABLE			BIT(7)
37 #define TMR1CTL_MODE_SHIFT		4
38 #define TMR1CTL_MODE_MASK		0x3
39 #define TMR1CTL_MODE_FREE_RUNNING	0x0
40 #define TMR1CTL_MODE_PERIODIC		0x1
41 #define TMR1CTL_MODE_TIMEOUT		0x2
42 #define TMR1CTL_MODE_WDT		0x3
43 #define TMR1CTL_PRESCALE_MASK		0xf
44 #define TMR1CTL_PRESCALE_65536		0xf
45 
46 static struct clk *rt288x_wdt_clk;
47 static unsigned long rt288x_wdt_freq;
48 static void __iomem *rt288x_wdt_base;
49 static struct reset_control *rt288x_wdt_reset;
50 
51 static bool nowayout = WATCHDOG_NOWAYOUT;
52 module_param(nowayout, bool, 0);
53 MODULE_PARM_DESC(nowayout,
54 		"Watchdog cannot be stopped once started (default="
55 		__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
56 
57 static inline void rt_wdt_w32(unsigned reg, u32 val)
58 {
59 	iowrite32(val, rt288x_wdt_base + reg);
60 }
61 
62 static inline u32 rt_wdt_r32(unsigned reg)
63 {
64 	return ioread32(rt288x_wdt_base + reg);
65 }
66 
67 static int rt288x_wdt_ping(struct watchdog_device *w)
68 {
69 	rt_wdt_w32(TIMER_REG_TMR1LOAD, w->timeout * rt288x_wdt_freq);
70 
71 	return 0;
72 }
73 
74 static int rt288x_wdt_start(struct watchdog_device *w)
75 {
76 	u32 t;
77 
78 	t = rt_wdt_r32(TIMER_REG_TMR1CTL);
79 	t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT |
80 		TMR1CTL_PRESCALE_MASK);
81 	t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT |
82 		TMR1CTL_PRESCALE_65536);
83 	rt_wdt_w32(TIMER_REG_TMR1CTL, t);
84 
85 	rt288x_wdt_ping(w);
86 
87 	t = rt_wdt_r32(TIMER_REG_TMR1CTL);
88 	t |= TMR1CTL_ENABLE;
89 	rt_wdt_w32(TIMER_REG_TMR1CTL, t);
90 
91 	return 0;
92 }
93 
94 static int rt288x_wdt_stop(struct watchdog_device *w)
95 {
96 	u32 t;
97 
98 	rt288x_wdt_ping(w);
99 
100 	t = rt_wdt_r32(TIMER_REG_TMR1CTL);
101 	t &= ~TMR1CTL_ENABLE;
102 	rt_wdt_w32(TIMER_REG_TMR1CTL, t);
103 
104 	return 0;
105 }
106 
107 static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
108 {
109 	w->timeout = t;
110 	rt288x_wdt_ping(w);
111 
112 	return 0;
113 }
114 
115 static int rt288x_wdt_bootcause(void)
116 {
117 	if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
118 		return WDIOF_CARDRESET;
119 
120 	return 0;
121 }
122 
123 static const struct watchdog_info rt288x_wdt_info = {
124 	.identity = "Ralink Watchdog",
125 	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
126 };
127 
128 static const struct watchdog_ops rt288x_wdt_ops = {
129 	.owner = THIS_MODULE,
130 	.start = rt288x_wdt_start,
131 	.stop = rt288x_wdt_stop,
132 	.ping = rt288x_wdt_ping,
133 	.set_timeout = rt288x_wdt_set_timeout,
134 };
135 
136 static struct watchdog_device rt288x_wdt_dev = {
137 	.info = &rt288x_wdt_info,
138 	.ops = &rt288x_wdt_ops,
139 	.min_timeout = 1,
140 };
141 
142 static int rt288x_wdt_probe(struct platform_device *pdev)
143 {
144 	struct resource *res;
145 	int ret;
146 
147 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
148 	rt288x_wdt_base = devm_ioremap_resource(&pdev->dev, res);
149 	if (IS_ERR(rt288x_wdt_base))
150 		return PTR_ERR(rt288x_wdt_base);
151 
152 	rt288x_wdt_clk = devm_clk_get(&pdev->dev, NULL);
153 	if (IS_ERR(rt288x_wdt_clk))
154 		return PTR_ERR(rt288x_wdt_clk);
155 
156 	rt288x_wdt_reset = devm_reset_control_get_exclusive(&pdev->dev, NULL);
157 	if (!IS_ERR(rt288x_wdt_reset))
158 		reset_control_deassert(rt288x_wdt_reset);
159 
160 	rt288x_wdt_freq = clk_get_rate(rt288x_wdt_clk) / RALINK_WDT_PRESCALE;
161 
162 	rt288x_wdt_dev.bootstatus = rt288x_wdt_bootcause();
163 	rt288x_wdt_dev.max_timeout = (0xfffful / rt288x_wdt_freq);
164 	rt288x_wdt_dev.parent = &pdev->dev;
165 
166 	watchdog_init_timeout(&rt288x_wdt_dev, rt288x_wdt_dev.max_timeout,
167 			      &pdev->dev);
168 	watchdog_set_nowayout(&rt288x_wdt_dev, nowayout);
169 
170 	ret = watchdog_register_device(&rt288x_wdt_dev);
171 	if (!ret)
172 		dev_info(&pdev->dev, "Initialized\n");
173 
174 	return 0;
175 }
176 
177 static int rt288x_wdt_remove(struct platform_device *pdev)
178 {
179 	watchdog_unregister_device(&rt288x_wdt_dev);
180 
181 	return 0;
182 }
183 
184 static void rt288x_wdt_shutdown(struct platform_device *pdev)
185 {
186 	rt288x_wdt_stop(&rt288x_wdt_dev);
187 }
188 
189 static const struct of_device_id rt288x_wdt_match[] = {
190 	{ .compatible = "ralink,rt2880-wdt" },
191 	{},
192 };
193 MODULE_DEVICE_TABLE(of, rt288x_wdt_match);
194 
195 static struct platform_driver rt288x_wdt_driver = {
196 	.probe		= rt288x_wdt_probe,
197 	.remove		= rt288x_wdt_remove,
198 	.shutdown	= rt288x_wdt_shutdown,
199 	.driver		= {
200 		.name		= KBUILD_MODNAME,
201 		.of_match_table	= rt288x_wdt_match,
202 	},
203 };
204 
205 module_platform_driver(rt288x_wdt_driver);
206 
207 MODULE_DESCRIPTION("MediaTek/Ralink RT288x/RT3xxx hardware watchdog driver");
208 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
209 MODULE_LICENSE("GPL v2");
210