1 /* 2 * drivers/watchdog/orion_wdt.c 3 * 4 * Watchdog driver for Orion/Kirkwood processors 5 * 6 * Author: Sylver Bruneau <sylver.bruneau@googlemail.com> 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14 15 #include <linux/module.h> 16 #include <linux/moduleparam.h> 17 #include <linux/types.h> 18 #include <linux/kernel.h> 19 #include <linux/platform_device.h> 20 #include <linux/watchdog.h> 21 #include <linux/interrupt.h> 22 #include <linux/io.h> 23 #include <linux/clk.h> 24 #include <linux/err.h> 25 #include <linux/of.h> 26 #include <linux/of_device.h> 27 28 /* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */ 29 #define ORION_RSTOUT_MASK_OFFSET 0x20108 30 31 /* Internal registers can be configured at any 1 MiB aligned address */ 32 #define INTERNAL_REGS_MASK ~(SZ_1M - 1) 33 34 /* 35 * Watchdog timer block registers. 36 */ 37 #define TIMER_CTRL 0x0000 38 #define TIMER_A370_STATUS 0x04 39 40 #define WDT_MAX_CYCLE_COUNT 0xffffffff 41 42 #define WDT_A370_RATIO_MASK(v) ((v) << 16) 43 #define WDT_A370_RATIO_SHIFT 5 44 #define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT) 45 46 #define WDT_AXP_FIXED_ENABLE_BIT BIT(10) 47 #define WDT_A370_EXPIRED BIT(31) 48 49 static bool nowayout = WATCHDOG_NOWAYOUT; 50 static int heartbeat = -1; /* module parameter (seconds) */ 51 52 struct orion_watchdog; 53 54 struct orion_watchdog_data { 55 int wdt_counter_offset; 56 int wdt_enable_bit; 57 int rstout_enable_bit; 58 int rstout_mask_bit; 59 int (*clock_init)(struct platform_device *, 60 struct orion_watchdog *); 61 int (*enabled)(struct orion_watchdog *); 62 int (*start)(struct watchdog_device *); 63 int (*stop)(struct watchdog_device *); 64 }; 65 66 struct orion_watchdog { 67 struct watchdog_device wdt; 68 void __iomem *reg; 69 void __iomem *rstout; 70 void __iomem *rstout_mask; 71 unsigned long clk_rate; 72 struct clk *clk; 73 const struct orion_watchdog_data *data; 74 }; 75 76 static int orion_wdt_clock_init(struct platform_device *pdev, 77 struct orion_watchdog *dev) 78 { 79 int ret; 80 81 dev->clk = clk_get(&pdev->dev, NULL); 82 if (IS_ERR(dev->clk)) 83 return PTR_ERR(dev->clk); 84 ret = clk_prepare_enable(dev->clk); 85 if (ret) { 86 clk_put(dev->clk); 87 return ret; 88 } 89 90 dev->clk_rate = clk_get_rate(dev->clk); 91 return 0; 92 } 93 94 static int armada370_wdt_clock_init(struct platform_device *pdev, 95 struct orion_watchdog *dev) 96 { 97 int ret; 98 99 dev->clk = clk_get(&pdev->dev, NULL); 100 if (IS_ERR(dev->clk)) 101 return PTR_ERR(dev->clk); 102 ret = clk_prepare_enable(dev->clk); 103 if (ret) { 104 clk_put(dev->clk); 105 return ret; 106 } 107 108 /* Setup watchdog input clock */ 109 atomic_io_modify(dev->reg + TIMER_CTRL, 110 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT), 111 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT)); 112 113 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; 114 return 0; 115 } 116 117 static int armada375_wdt_clock_init(struct platform_device *pdev, 118 struct orion_watchdog *dev) 119 { 120 int ret; 121 122 dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed"); 123 if (!IS_ERR(dev->clk)) { 124 ret = clk_prepare_enable(dev->clk); 125 if (ret) { 126 clk_put(dev->clk); 127 return ret; 128 } 129 130 atomic_io_modify(dev->reg + TIMER_CTRL, 131 WDT_AXP_FIXED_ENABLE_BIT, 132 WDT_AXP_FIXED_ENABLE_BIT); 133 dev->clk_rate = clk_get_rate(dev->clk); 134 135 return 0; 136 } 137 138 /* Mandatory fallback for proper devicetree backward compatibility */ 139 dev->clk = clk_get(&pdev->dev, NULL); 140 if (IS_ERR(dev->clk)) 141 return PTR_ERR(dev->clk); 142 143 ret = clk_prepare_enable(dev->clk); 144 if (ret) { 145 clk_put(dev->clk); 146 return ret; 147 } 148 149 atomic_io_modify(dev->reg + TIMER_CTRL, 150 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT), 151 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT)); 152 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; 153 154 return 0; 155 } 156 157 static int armadaxp_wdt_clock_init(struct platform_device *pdev, 158 struct orion_watchdog *dev) 159 { 160 int ret; 161 162 dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed"); 163 if (IS_ERR(dev->clk)) 164 return PTR_ERR(dev->clk); 165 ret = clk_prepare_enable(dev->clk); 166 if (ret) { 167 clk_put(dev->clk); 168 return ret; 169 } 170 171 /* Enable the fixed watchdog clock input */ 172 atomic_io_modify(dev->reg + TIMER_CTRL, 173 WDT_AXP_FIXED_ENABLE_BIT, 174 WDT_AXP_FIXED_ENABLE_BIT); 175 176 dev->clk_rate = clk_get_rate(dev->clk); 177 return 0; 178 } 179 180 static int orion_wdt_ping(struct watchdog_device *wdt_dev) 181 { 182 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 183 /* Reload watchdog duration */ 184 writel(dev->clk_rate * wdt_dev->timeout, 185 dev->reg + dev->data->wdt_counter_offset); 186 return 0; 187 } 188 189 static int armada375_start(struct watchdog_device *wdt_dev) 190 { 191 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 192 u32 reg; 193 194 /* Set watchdog duration */ 195 writel(dev->clk_rate * wdt_dev->timeout, 196 dev->reg + dev->data->wdt_counter_offset); 197 198 /* Clear the watchdog expiration bit */ 199 atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); 200 201 /* Enable watchdog timer */ 202 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 203 dev->data->wdt_enable_bit); 204 205 /* Enable reset on watchdog */ 206 reg = readl(dev->rstout); 207 reg |= dev->data->rstout_enable_bit; 208 writel(reg, dev->rstout); 209 210 atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, 0); 211 return 0; 212 } 213 214 static int armada370_start(struct watchdog_device *wdt_dev) 215 { 216 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 217 u32 reg; 218 219 /* Set watchdog duration */ 220 writel(dev->clk_rate * wdt_dev->timeout, 221 dev->reg + dev->data->wdt_counter_offset); 222 223 /* Clear the watchdog expiration bit */ 224 atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); 225 226 /* Enable watchdog timer */ 227 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 228 dev->data->wdt_enable_bit); 229 230 /* Enable reset on watchdog */ 231 reg = readl(dev->rstout); 232 reg |= dev->data->rstout_enable_bit; 233 writel(reg, dev->rstout); 234 return 0; 235 } 236 237 static int orion_start(struct watchdog_device *wdt_dev) 238 { 239 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 240 241 /* Set watchdog duration */ 242 writel(dev->clk_rate * wdt_dev->timeout, 243 dev->reg + dev->data->wdt_counter_offset); 244 245 /* Enable watchdog timer */ 246 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 247 dev->data->wdt_enable_bit); 248 249 /* Enable reset on watchdog */ 250 atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 251 dev->data->rstout_enable_bit); 252 253 return 0; 254 } 255 256 static int orion_wdt_start(struct watchdog_device *wdt_dev) 257 { 258 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 259 260 /* There are some per-SoC quirks to handle */ 261 return dev->data->start(wdt_dev); 262 } 263 264 static int orion_stop(struct watchdog_device *wdt_dev) 265 { 266 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 267 268 /* Disable reset on watchdog */ 269 atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0); 270 271 /* Disable watchdog timer */ 272 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); 273 274 return 0; 275 } 276 277 static int armada375_stop(struct watchdog_device *wdt_dev) 278 { 279 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 280 u32 reg; 281 282 /* Disable reset on watchdog */ 283 atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, 284 dev->data->rstout_mask_bit); 285 reg = readl(dev->rstout); 286 reg &= ~dev->data->rstout_enable_bit; 287 writel(reg, dev->rstout); 288 289 /* Disable watchdog timer */ 290 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); 291 292 return 0; 293 } 294 295 static int armada370_stop(struct watchdog_device *wdt_dev) 296 { 297 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 298 u32 reg; 299 300 /* Disable reset on watchdog */ 301 reg = readl(dev->rstout); 302 reg &= ~dev->data->rstout_enable_bit; 303 writel(reg, dev->rstout); 304 305 /* Disable watchdog timer */ 306 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); 307 308 return 0; 309 } 310 311 static int orion_wdt_stop(struct watchdog_device *wdt_dev) 312 { 313 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 314 315 return dev->data->stop(wdt_dev); 316 } 317 318 static int orion_enabled(struct orion_watchdog *dev) 319 { 320 bool enabled, running; 321 322 enabled = readl(dev->rstout) & dev->data->rstout_enable_bit; 323 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; 324 325 return enabled && running; 326 } 327 328 static int armada375_enabled(struct orion_watchdog *dev) 329 { 330 bool masked, enabled, running; 331 332 masked = readl(dev->rstout_mask) & dev->data->rstout_mask_bit; 333 enabled = readl(dev->rstout) & dev->data->rstout_enable_bit; 334 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; 335 336 return !masked && enabled && running; 337 } 338 339 static int orion_wdt_enabled(struct watchdog_device *wdt_dev) 340 { 341 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 342 343 return dev->data->enabled(dev); 344 } 345 346 static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev) 347 { 348 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 349 return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate; 350 } 351 352 static const struct watchdog_info orion_wdt_info = { 353 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, 354 .identity = "Orion Watchdog", 355 }; 356 357 static const struct watchdog_ops orion_wdt_ops = { 358 .owner = THIS_MODULE, 359 .start = orion_wdt_start, 360 .stop = orion_wdt_stop, 361 .ping = orion_wdt_ping, 362 .get_timeleft = orion_wdt_get_timeleft, 363 }; 364 365 static irqreturn_t orion_wdt_irq(int irq, void *devid) 366 { 367 panic("Watchdog Timeout"); 368 return IRQ_HANDLED; 369 } 370 371 /* 372 * The original devicetree binding for this driver specified only 373 * one memory resource, so in order to keep DT backwards compatibility 374 * we try to fallback to a hardcoded register address, if the resource 375 * is missing from the devicetree. 376 */ 377 static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev, 378 phys_addr_t internal_regs) 379 { 380 struct resource *res; 381 phys_addr_t rstout; 382 383 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 384 if (res) 385 return devm_ioremap(&pdev->dev, res->start, 386 resource_size(res)); 387 388 rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET; 389 390 WARN(1, FW_BUG "falling back to hardcoded RSTOUT reg %pa\n", &rstout); 391 return devm_ioremap(&pdev->dev, rstout, 0x4); 392 } 393 394 static const struct orion_watchdog_data orion_data = { 395 .rstout_enable_bit = BIT(1), 396 .wdt_enable_bit = BIT(4), 397 .wdt_counter_offset = 0x24, 398 .clock_init = orion_wdt_clock_init, 399 .enabled = orion_enabled, 400 .start = orion_start, 401 .stop = orion_stop, 402 }; 403 404 static const struct orion_watchdog_data armada370_data = { 405 .rstout_enable_bit = BIT(8), 406 .wdt_enable_bit = BIT(8), 407 .wdt_counter_offset = 0x34, 408 .clock_init = armada370_wdt_clock_init, 409 .enabled = orion_enabled, 410 .start = armada370_start, 411 .stop = armada370_stop, 412 }; 413 414 static const struct orion_watchdog_data armadaxp_data = { 415 .rstout_enable_bit = BIT(8), 416 .wdt_enable_bit = BIT(8), 417 .wdt_counter_offset = 0x34, 418 .clock_init = armadaxp_wdt_clock_init, 419 .enabled = orion_enabled, 420 .start = armada370_start, 421 .stop = armada370_stop, 422 }; 423 424 static const struct orion_watchdog_data armada375_data = { 425 .rstout_enable_bit = BIT(8), 426 .rstout_mask_bit = BIT(10), 427 .wdt_enable_bit = BIT(8), 428 .wdt_counter_offset = 0x34, 429 .clock_init = armada375_wdt_clock_init, 430 .enabled = armada375_enabled, 431 .start = armada375_start, 432 .stop = armada375_stop, 433 }; 434 435 static const struct orion_watchdog_data armada380_data = { 436 .rstout_enable_bit = BIT(8), 437 .rstout_mask_bit = BIT(10), 438 .wdt_enable_bit = BIT(8), 439 .wdt_counter_offset = 0x34, 440 .clock_init = armadaxp_wdt_clock_init, 441 .enabled = armada375_enabled, 442 .start = armada375_start, 443 .stop = armada375_stop, 444 }; 445 446 static const struct of_device_id orion_wdt_of_match_table[] = { 447 { 448 .compatible = "marvell,orion-wdt", 449 .data = &orion_data, 450 }, 451 { 452 .compatible = "marvell,armada-370-wdt", 453 .data = &armada370_data, 454 }, 455 { 456 .compatible = "marvell,armada-xp-wdt", 457 .data = &armadaxp_data, 458 }, 459 { 460 .compatible = "marvell,armada-375-wdt", 461 .data = &armada375_data, 462 }, 463 { 464 .compatible = "marvell,armada-380-wdt", 465 .data = &armada380_data, 466 }, 467 {}, 468 }; 469 MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table); 470 471 static int orion_wdt_get_regs(struct platform_device *pdev, 472 struct orion_watchdog *dev) 473 { 474 struct device_node *node = pdev->dev.of_node; 475 struct resource *res; 476 477 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 478 if (!res) 479 return -ENODEV; 480 dev->reg = devm_ioremap(&pdev->dev, res->start, 481 resource_size(res)); 482 if (!dev->reg) 483 return -ENOMEM; 484 485 /* Each supported compatible has some RSTOUT register quirk */ 486 if (of_device_is_compatible(node, "marvell,orion-wdt")) { 487 488 dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start & 489 INTERNAL_REGS_MASK); 490 if (!dev->rstout) 491 return -ENODEV; 492 493 } else if (of_device_is_compatible(node, "marvell,armada-370-wdt") || 494 of_device_is_compatible(node, "marvell,armada-xp-wdt")) { 495 496 /* Dedicated RSTOUT register, can be requested. */ 497 dev->rstout = devm_platform_ioremap_resource(pdev, 1); 498 if (IS_ERR(dev->rstout)) 499 return PTR_ERR(dev->rstout); 500 501 } else if (of_device_is_compatible(node, "marvell,armada-375-wdt") || 502 of_device_is_compatible(node, "marvell,armada-380-wdt")) { 503 504 /* Dedicated RSTOUT register, can be requested. */ 505 dev->rstout = devm_platform_ioremap_resource(pdev, 1); 506 if (IS_ERR(dev->rstout)) 507 return PTR_ERR(dev->rstout); 508 509 res = platform_get_resource(pdev, IORESOURCE_MEM, 2); 510 if (!res) 511 return -ENODEV; 512 dev->rstout_mask = devm_ioremap(&pdev->dev, res->start, 513 resource_size(res)); 514 if (!dev->rstout_mask) 515 return -ENOMEM; 516 517 } else { 518 return -ENODEV; 519 } 520 521 return 0; 522 } 523 524 static int orion_wdt_probe(struct platform_device *pdev) 525 { 526 struct orion_watchdog *dev; 527 const struct of_device_id *match; 528 unsigned int wdt_max_duration; /* (seconds) */ 529 int ret, irq; 530 531 dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog), 532 GFP_KERNEL); 533 if (!dev) 534 return -ENOMEM; 535 536 match = of_match_device(orion_wdt_of_match_table, &pdev->dev); 537 if (!match) 538 /* Default legacy match */ 539 match = &orion_wdt_of_match_table[0]; 540 541 dev->wdt.info = &orion_wdt_info; 542 dev->wdt.ops = &orion_wdt_ops; 543 dev->wdt.min_timeout = 1; 544 dev->data = match->data; 545 546 ret = orion_wdt_get_regs(pdev, dev); 547 if (ret) 548 return ret; 549 550 ret = dev->data->clock_init(pdev, dev); 551 if (ret) { 552 dev_err(&pdev->dev, "cannot initialize clock\n"); 553 return ret; 554 } 555 556 wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate; 557 558 dev->wdt.timeout = wdt_max_duration; 559 dev->wdt.max_timeout = wdt_max_duration; 560 dev->wdt.parent = &pdev->dev; 561 watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev); 562 563 platform_set_drvdata(pdev, &dev->wdt); 564 watchdog_set_drvdata(&dev->wdt, dev); 565 566 /* 567 * Let's make sure the watchdog is fully stopped, unless it's 568 * explicitly enabled. This may be the case if the module was 569 * removed and re-inserted, or if the bootloader explicitly 570 * set a running watchdog before booting the kernel. 571 */ 572 if (!orion_wdt_enabled(&dev->wdt)) 573 orion_wdt_stop(&dev->wdt); 574 else 575 set_bit(WDOG_HW_RUNNING, &dev->wdt.status); 576 577 /* Request the IRQ only after the watchdog is disabled */ 578 irq = platform_get_irq(pdev, 0); 579 if (irq > 0) { 580 /* 581 * Not all supported platforms specify an interrupt for the 582 * watchdog, so let's make it optional. 583 */ 584 ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0, 585 pdev->name, dev); 586 if (ret < 0) { 587 dev_err(&pdev->dev, "failed to request IRQ\n"); 588 goto disable_clk; 589 } 590 } 591 592 watchdog_set_nowayout(&dev->wdt, nowayout); 593 ret = watchdog_register_device(&dev->wdt); 594 if (ret) 595 goto disable_clk; 596 597 pr_info("Initial timeout %d sec%s\n", 598 dev->wdt.timeout, nowayout ? ", nowayout" : ""); 599 return 0; 600 601 disable_clk: 602 clk_disable_unprepare(dev->clk); 603 clk_put(dev->clk); 604 return ret; 605 } 606 607 static int orion_wdt_remove(struct platform_device *pdev) 608 { 609 struct watchdog_device *wdt_dev = platform_get_drvdata(pdev); 610 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); 611 612 watchdog_unregister_device(wdt_dev); 613 clk_disable_unprepare(dev->clk); 614 clk_put(dev->clk); 615 return 0; 616 } 617 618 static void orion_wdt_shutdown(struct platform_device *pdev) 619 { 620 struct watchdog_device *wdt_dev = platform_get_drvdata(pdev); 621 orion_wdt_stop(wdt_dev); 622 } 623 624 static struct platform_driver orion_wdt_driver = { 625 .probe = orion_wdt_probe, 626 .remove = orion_wdt_remove, 627 .shutdown = orion_wdt_shutdown, 628 .driver = { 629 .name = "orion_wdt", 630 .of_match_table = orion_wdt_of_match_table, 631 }, 632 }; 633 634 module_platform_driver(orion_wdt_driver); 635 636 MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>"); 637 MODULE_DESCRIPTION("Orion Processor Watchdog"); 638 639 module_param(heartbeat, int, 0); 640 MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds"); 641 642 module_param(nowayout, bool, 0); 643 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 644 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 645 646 MODULE_LICENSE("GPL v2"); 647 MODULE_ALIAS("platform:orion_wdt"); 648