1 /* 2 * omap_wdt.c 3 * 4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog 5 * 6 * Author: MontaVista Software, Inc. 7 * <gdavis@mvista.com> or <source@mvista.com> 8 * 9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the 10 * terms of the GNU General Public License version 2. This program is 11 * licensed "as is" without any warranty of any kind, whether express 12 * or implied. 13 * 14 * History: 15 * 16 * 20030527: George G. Davis <gdavis@mvista.com> 17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c 18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu> 19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk> 20 * 21 * Copyright (c) 2004 Texas Instruments. 22 * 1. Modified to support OMAP1610 32-KHz watchdog timer 23 * 2. Ported to 2.6 kernel 24 * 25 * Copyright (c) 2005 David Brownell 26 * Use the driver model and standard identifiers; handle bigger timeouts. 27 */ 28 29 #include <linux/module.h> 30 #include <linux/types.h> 31 #include <linux/kernel.h> 32 #include <linux/fs.h> 33 #include <linux/mm.h> 34 #include <linux/miscdevice.h> 35 #include <linux/watchdog.h> 36 #include <linux/reboot.h> 37 #include <linux/init.h> 38 #include <linux/err.h> 39 #include <linux/platform_device.h> 40 #include <linux/moduleparam.h> 41 #include <linux/clk.h> 42 #include <linux/bitops.h> 43 #include <linux/io.h> 44 #include <linux/uaccess.h> 45 #include <mach/hardware.h> 46 #include <mach/prcm.h> 47 48 #include "omap_wdt.h" 49 50 static struct platform_device *omap_wdt_dev; 51 52 static unsigned timer_margin; 53 module_param(timer_margin, uint, 0); 54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); 55 56 static unsigned int wdt_trgr_pattern = 0x1234; 57 static spinlock_t wdt_lock; 58 59 struct omap_wdt_dev { 60 void __iomem *base; /* physical */ 61 struct device *dev; 62 int omap_wdt_users; 63 struct clk *ick; 64 struct clk *fck; 65 struct resource *mem; 66 struct miscdevice omap_wdt_miscdev; 67 }; 68 69 static void omap_wdt_ping(struct omap_wdt_dev *wdev) 70 { 71 void __iomem *base = wdev->base; 72 73 /* wait for posted write to complete */ 74 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) 75 cpu_relax(); 76 77 wdt_trgr_pattern = ~wdt_trgr_pattern; 78 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR)); 79 80 /* wait for posted write to complete */ 81 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08) 82 cpu_relax(); 83 /* reloaded WCRR from WLDR */ 84 } 85 86 static void omap_wdt_enable(struct omap_wdt_dev *wdev) 87 { 88 void __iomem *base = wdev->base; 89 90 /* Sequence to enable the watchdog */ 91 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR); 92 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) 93 cpu_relax(); 94 95 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR); 96 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10) 97 cpu_relax(); 98 } 99 100 static void omap_wdt_disable(struct omap_wdt_dev *wdev) 101 { 102 void __iomem *base = wdev->base; 103 104 /* sequence required to disable watchdog */ 105 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 106 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) 107 cpu_relax(); 108 109 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 110 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10) 111 cpu_relax(); 112 } 113 114 static void omap_wdt_adjust_timeout(unsigned new_timeout) 115 { 116 if (new_timeout < TIMER_MARGIN_MIN) 117 new_timeout = TIMER_MARGIN_DEFAULT; 118 if (new_timeout > TIMER_MARGIN_MAX) 119 new_timeout = TIMER_MARGIN_MAX; 120 timer_margin = new_timeout; 121 } 122 123 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev) 124 { 125 u32 pre_margin = GET_WLDR_VAL(timer_margin); 126 void __iomem *base = wdev->base; 127 128 /* just count up at 32 KHz */ 129 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) 130 cpu_relax(); 131 132 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR); 133 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04) 134 cpu_relax(); 135 } 136 137 /* 138 * Allow only one task to hold it open 139 */ 140 static int omap_wdt_open(struct inode *inode, struct file *file) 141 { 142 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev); 143 void __iomem *base = wdev->base; 144 145 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users))) 146 return -EBUSY; 147 148 clk_enable(wdev->ick); /* Enable the interface clock */ 149 clk_enable(wdev->fck); /* Enable the functional clock */ 150 151 /* initialize prescaler */ 152 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) 153 cpu_relax(); 154 155 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL); 156 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01) 157 cpu_relax(); 158 159 file->private_data = (void *) wdev; 160 161 omap_wdt_set_timeout(wdev); 162 omap_wdt_enable(wdev); 163 164 return nonseekable_open(inode, file); 165 } 166 167 static int omap_wdt_release(struct inode *inode, struct file *file) 168 { 169 struct omap_wdt_dev *wdev = file->private_data; 170 171 /* 172 * Shut off the timer unless NOWAYOUT is defined. 173 */ 174 #ifndef CONFIG_WATCHDOG_NOWAYOUT 175 176 omap_wdt_disable(wdev); 177 178 clk_disable(wdev->ick); 179 clk_disable(wdev->fck); 180 #else 181 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); 182 #endif 183 wdev->omap_wdt_users = 0; 184 185 return 0; 186 } 187 188 static ssize_t omap_wdt_write(struct file *file, const char __user *data, 189 size_t len, loff_t *ppos) 190 { 191 struct omap_wdt_dev *wdev = file->private_data; 192 193 /* Refresh LOAD_TIME. */ 194 if (len) { 195 spin_lock(&wdt_lock); 196 omap_wdt_ping(wdev); 197 spin_unlock(&wdt_lock); 198 } 199 return len; 200 } 201 202 static long omap_wdt_ioctl(struct file *file, unsigned int cmd, 203 unsigned long arg) 204 { 205 struct omap_wdt_dev *wdev; 206 int new_margin; 207 static const struct watchdog_info ident = { 208 .identity = "OMAP Watchdog", 209 .options = WDIOF_SETTIMEOUT, 210 .firmware_version = 0, 211 }; 212 213 wdev = file->private_data; 214 215 switch (cmd) { 216 case WDIOC_GETSUPPORT: 217 return copy_to_user((struct watchdog_info __user *)arg, &ident, 218 sizeof(ident)); 219 case WDIOC_GETSTATUS: 220 return put_user(0, (int __user *)arg); 221 case WDIOC_GETBOOTSTATUS: 222 if (cpu_is_omap16xx()) 223 return put_user(__raw_readw(ARM_SYSST), 224 (int __user *)arg); 225 if (cpu_is_omap24xx()) 226 return put_user(omap_prcm_get_reset_sources(), 227 (int __user *)arg); 228 case WDIOC_KEEPALIVE: 229 spin_lock(&wdt_lock); 230 omap_wdt_ping(wdev); 231 spin_unlock(&wdt_lock); 232 return 0; 233 case WDIOC_SETTIMEOUT: 234 if (get_user(new_margin, (int __user *)arg)) 235 return -EFAULT; 236 omap_wdt_adjust_timeout(new_margin); 237 238 spin_lock(&wdt_lock); 239 omap_wdt_disable(wdev); 240 omap_wdt_set_timeout(wdev); 241 omap_wdt_enable(wdev); 242 243 omap_wdt_ping(wdev); 244 spin_unlock(&wdt_lock); 245 /* Fall */ 246 case WDIOC_GETTIMEOUT: 247 return put_user(timer_margin, (int __user *)arg); 248 default: 249 return -ENOTTY; 250 } 251 } 252 253 static const struct file_operations omap_wdt_fops = { 254 .owner = THIS_MODULE, 255 .write = omap_wdt_write, 256 .unlocked_ioctl = omap_wdt_ioctl, 257 .open = omap_wdt_open, 258 .release = omap_wdt_release, 259 }; 260 261 static int __devinit omap_wdt_probe(struct platform_device *pdev) 262 { 263 struct resource *res, *mem; 264 struct omap_wdt_dev *wdev; 265 int ret; 266 267 /* reserve static register mappings */ 268 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 269 if (!res) { 270 ret = -ENOENT; 271 goto err_get_resource; 272 } 273 274 if (omap_wdt_dev) { 275 ret = -EBUSY; 276 goto err_busy; 277 } 278 279 mem = request_mem_region(res->start, res->end - res->start + 1, 280 pdev->name); 281 if (!mem) { 282 ret = -EBUSY; 283 goto err_busy; 284 } 285 286 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL); 287 if (!wdev) { 288 ret = -ENOMEM; 289 goto err_kzalloc; 290 } 291 292 wdev->omap_wdt_users = 0; 293 wdev->mem = mem; 294 295 wdev->ick = clk_get(&pdev->dev, "ick"); 296 if (IS_ERR(wdev->ick)) { 297 ret = PTR_ERR(wdev->ick); 298 wdev->ick = NULL; 299 goto err_clk; 300 } 301 wdev->fck = clk_get(&pdev->dev, "fck"); 302 if (IS_ERR(wdev->fck)) { 303 ret = PTR_ERR(wdev->fck); 304 wdev->fck = NULL; 305 goto err_clk; 306 } 307 308 wdev->base = ioremap(res->start, res->end - res->start + 1); 309 if (!wdev->base) { 310 ret = -ENOMEM; 311 goto err_ioremap; 312 } 313 314 platform_set_drvdata(pdev, wdev); 315 316 omap_wdt_disable(wdev); 317 omap_wdt_adjust_timeout(timer_margin); 318 319 wdev->omap_wdt_miscdev.parent = &pdev->dev; 320 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR; 321 wdev->omap_wdt_miscdev.name = "watchdog"; 322 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops; 323 324 ret = misc_register(&(wdev->omap_wdt_miscdev)); 325 if (ret) 326 goto err_misc; 327 328 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n", 329 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, 330 timer_margin); 331 332 /* autogate OCP interface clock */ 333 __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG); 334 335 omap_wdt_dev = pdev; 336 337 return 0; 338 339 err_misc: 340 platform_set_drvdata(pdev, NULL); 341 iounmap(wdev->base); 342 343 err_ioremap: 344 wdev->base = NULL; 345 346 err_clk: 347 if (wdev->ick) 348 clk_put(wdev->ick); 349 if (wdev->fck) 350 clk_put(wdev->fck); 351 kfree(wdev); 352 353 err_kzalloc: 354 release_mem_region(res->start, res->end - res->start + 1); 355 356 err_busy: 357 err_get_resource: 358 359 return ret; 360 } 361 362 static void omap_wdt_shutdown(struct platform_device *pdev) 363 { 364 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 365 366 if (wdev->omap_wdt_users) 367 omap_wdt_disable(wdev); 368 } 369 370 static int __devexit omap_wdt_remove(struct platform_device *pdev) 371 { 372 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 373 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 374 375 if (!res) 376 return -ENOENT; 377 378 misc_deregister(&(wdev->omap_wdt_miscdev)); 379 release_mem_region(res->start, res->end - res->start + 1); 380 platform_set_drvdata(pdev, NULL); 381 382 clk_put(wdev->ick); 383 clk_put(wdev->fck); 384 iounmap(wdev->base); 385 386 kfree(wdev); 387 omap_wdt_dev = NULL; 388 389 return 0; 390 } 391 392 #ifdef CONFIG_PM 393 394 /* REVISIT ... not clear this is the best way to handle system suspend; and 395 * it's very inappropriate for selective device suspend (e.g. suspending this 396 * through sysfs rather than by stopping the watchdog daemon). Also, this 397 * may not play well enough with NOWAYOUT... 398 */ 399 400 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) 401 { 402 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 403 404 if (wdev->omap_wdt_users) 405 omap_wdt_disable(wdev); 406 407 return 0; 408 } 409 410 static int omap_wdt_resume(struct platform_device *pdev) 411 { 412 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 413 414 if (wdev->omap_wdt_users) { 415 omap_wdt_enable(wdev); 416 omap_wdt_ping(wdev); 417 } 418 419 return 0; 420 } 421 422 #else 423 #define omap_wdt_suspend NULL 424 #define omap_wdt_resume NULL 425 #endif 426 427 static struct platform_driver omap_wdt_driver = { 428 .probe = omap_wdt_probe, 429 .remove = __devexit_p(omap_wdt_remove), 430 .shutdown = omap_wdt_shutdown, 431 .suspend = omap_wdt_suspend, 432 .resume = omap_wdt_resume, 433 .driver = { 434 .owner = THIS_MODULE, 435 .name = "omap_wdt", 436 }, 437 }; 438 439 static int __init omap_wdt_init(void) 440 { 441 spin_lock_init(&wdt_lock); 442 return platform_driver_register(&omap_wdt_driver); 443 } 444 445 static void __exit omap_wdt_exit(void) 446 { 447 platform_driver_unregister(&omap_wdt_driver); 448 } 449 450 module_init(omap_wdt_init); 451 module_exit(omap_wdt_exit); 452 453 MODULE_AUTHOR("George G. Davis"); 454 MODULE_LICENSE("GPL"); 455 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 456 MODULE_ALIAS("platform:omap_wdt"); 457