1 /* 2 * linux/drivers/char/watchdog/omap_wdt.c 3 * 4 * Watchdog driver for the TI OMAP 16xx & 24xx 32KHz (non-secure) watchdog 5 * 6 * Author: MontaVista Software, Inc. 7 * <gdavis@mvista.com> or <source@mvista.com> 8 * 9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the 10 * terms of the GNU General Public License version 2. This program is 11 * licensed "as is" without any warranty of any kind, whether express 12 * or implied. 13 * 14 * History: 15 * 16 * 20030527: George G. Davis <gdavis@mvista.com> 17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c 18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu> 19 * Based on SoftDog driver by Alan Cox <alan@redhat.com> 20 * 21 * Copyright (c) 2004 Texas Instruments. 22 * 1. Modified to support OMAP1610 32-KHz watchdog timer 23 * 2. Ported to 2.6 kernel 24 * 25 * Copyright (c) 2005 David Brownell 26 * Use the driver model and standard identifiers; handle bigger timeouts. 27 */ 28 29 #include <linux/module.h> 30 #include <linux/types.h> 31 #include <linux/kernel.h> 32 #include <linux/fs.h> 33 #include <linux/mm.h> 34 #include <linux/miscdevice.h> 35 #include <linux/watchdog.h> 36 #include <linux/reboot.h> 37 #include <linux/init.h> 38 #include <linux/err.h> 39 #include <linux/platform_device.h> 40 #include <linux/moduleparam.h> 41 #include <linux/clk.h> 42 #include <linux/bitops.h> 43 #include <linux/io.h> 44 #include <linux/uaccess.h> 45 #include <mach/hardware.h> 46 #include <mach/prcm.h> 47 48 #include "omap_wdt.h" 49 50 static unsigned timer_margin; 51 module_param(timer_margin, uint, 0); 52 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); 53 54 static int omap_wdt_users; 55 static struct clk *armwdt_ck; 56 static struct clk *mpu_wdt_ick; 57 static struct clk *mpu_wdt_fck; 58 59 static unsigned int wdt_trgr_pattern = 0x1234; 60 static spinlock_t wdt_lock; 61 62 static void omap_wdt_ping(void) 63 { 64 /* wait for posted write to complete */ 65 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) 66 cpu_relax(); 67 wdt_trgr_pattern = ~wdt_trgr_pattern; 68 omap_writel(wdt_trgr_pattern, (OMAP_WATCHDOG_TGR)); 69 /* wait for posted write to complete */ 70 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x08) 71 cpu_relax(); 72 /* reloaded WCRR from WLDR */ 73 } 74 75 static void omap_wdt_enable(void) 76 { 77 /* Sequence to enable the watchdog */ 78 omap_writel(0xBBBB, OMAP_WATCHDOG_SPR); 79 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) 80 cpu_relax(); 81 omap_writel(0x4444, OMAP_WATCHDOG_SPR); 82 while ((omap_readl(OMAP_WATCHDOG_WPS)) & 0x10) 83 cpu_relax(); 84 } 85 86 static void omap_wdt_disable(void) 87 { 88 /* sequence required to disable watchdog */ 89 omap_writel(0xAAAA, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 90 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) 91 cpu_relax(); 92 omap_writel(0x5555, OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 93 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x10) 94 cpu_relax(); 95 } 96 97 static void omap_wdt_adjust_timeout(unsigned new_timeout) 98 { 99 if (new_timeout < TIMER_MARGIN_MIN) 100 new_timeout = TIMER_MARGIN_DEFAULT; 101 if (new_timeout > TIMER_MARGIN_MAX) 102 new_timeout = TIMER_MARGIN_MAX; 103 timer_margin = new_timeout; 104 } 105 106 static void omap_wdt_set_timeout(void) 107 { 108 u32 pre_margin = GET_WLDR_VAL(timer_margin); 109 110 /* just count up at 32 KHz */ 111 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) 112 cpu_relax(); 113 omap_writel(pre_margin, OMAP_WATCHDOG_LDR); 114 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x04) 115 cpu_relax(); 116 } 117 118 /* 119 * Allow only one task to hold it open 120 */ 121 122 static int omap_wdt_open(struct inode *inode, struct file *file) 123 { 124 if (test_and_set_bit(1, (unsigned long *)&omap_wdt_users)) 125 return -EBUSY; 126 127 if (cpu_is_omap16xx()) 128 clk_enable(armwdt_ck); /* Enable the clock */ 129 130 if (cpu_is_omap24xx()) { 131 clk_enable(mpu_wdt_ick); /* Enable the interface clock */ 132 clk_enable(mpu_wdt_fck); /* Enable the functional clock */ 133 } 134 135 /* initialize prescaler */ 136 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) 137 cpu_relax(); 138 omap_writel((1 << 5) | (PTV << 2), OMAP_WATCHDOG_CNTRL); 139 while (omap_readl(OMAP_WATCHDOG_WPS) & 0x01) 140 cpu_relax(); 141 142 omap_wdt_set_timeout(); 143 omap_wdt_enable(); 144 return nonseekable_open(inode, file); 145 } 146 147 static int omap_wdt_release(struct inode *inode, struct file *file) 148 { 149 /* 150 * Shut off the timer unless NOWAYOUT is defined. 151 */ 152 #ifndef CONFIG_WATCHDOG_NOWAYOUT 153 omap_wdt_disable(); 154 155 if (cpu_is_omap16xx()) { 156 clk_disable(armwdt_ck); /* Disable the clock */ 157 clk_put(armwdt_ck); 158 armwdt_ck = NULL; 159 } 160 161 if (cpu_is_omap24xx()) { 162 clk_disable(mpu_wdt_ick); /* Disable the clock */ 163 clk_disable(mpu_wdt_fck); /* Disable the clock */ 164 clk_put(mpu_wdt_ick); 165 clk_put(mpu_wdt_fck); 166 mpu_wdt_ick = NULL; 167 mpu_wdt_fck = NULL; 168 } 169 #else 170 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n"); 171 #endif 172 omap_wdt_users = 0; 173 return 0; 174 } 175 176 static ssize_t omap_wdt_write(struct file *file, const char __user *data, 177 size_t len, loff_t *ppos) 178 { 179 /* Refresh LOAD_TIME. */ 180 if (len) { 181 spin_lock(&wdt_lock); 182 omap_wdt_ping(); 183 spin_unlock(&wdt_lock); 184 } 185 return len; 186 } 187 188 static long omap_wdt_ioctl(struct file *file, unsigned int cmd, 189 unsigned long arg) 190 { 191 int new_margin; 192 static const struct watchdog_info ident = { 193 .identity = "OMAP Watchdog", 194 .options = WDIOF_SETTIMEOUT, 195 .firmware_version = 0, 196 }; 197 198 switch (cmd) { 199 case WDIOC_GETSUPPORT: 200 return copy_to_user((struct watchdog_info __user *)arg, &ident, 201 sizeof(ident)); 202 case WDIOC_GETSTATUS: 203 return put_user(0, (int __user *)arg); 204 case WDIOC_GETBOOTSTATUS: 205 if (cpu_is_omap16xx()) 206 return put_user(omap_readw(ARM_SYSST), 207 (int __user *)arg); 208 if (cpu_is_omap24xx()) 209 return put_user(omap_prcm_get_reset_sources(), 210 (int __user *)arg); 211 case WDIOC_KEEPALIVE: 212 spin_lock(&wdt_lock); 213 omap_wdt_ping(); 214 spin_unlock(&wdt_lock); 215 return 0; 216 case WDIOC_SETTIMEOUT: 217 if (get_user(new_margin, (int __user *)arg)) 218 return -EFAULT; 219 omap_wdt_adjust_timeout(new_margin); 220 221 spin_lock(&wdt_lock); 222 omap_wdt_disable(); 223 omap_wdt_set_timeout(); 224 omap_wdt_enable(); 225 226 omap_wdt_ping(); 227 spin_unlock(&wdt_lock); 228 /* Fall */ 229 case WDIOC_GETTIMEOUT: 230 return put_user(timer_margin, (int __user *)arg); 231 default: 232 return -ENOTTY; 233 } 234 } 235 236 static const struct file_operations omap_wdt_fops = { 237 .owner = THIS_MODULE, 238 .write = omap_wdt_write, 239 .unlocked_ioctl = omap_wdt_ioctl, 240 .open = omap_wdt_open, 241 .release = omap_wdt_release, 242 }; 243 244 static struct miscdevice omap_wdt_miscdev = { 245 .minor = WATCHDOG_MINOR, 246 .name = "watchdog", 247 .fops = &omap_wdt_fops, 248 }; 249 250 static int __init omap_wdt_probe(struct platform_device *pdev) 251 { 252 struct resource *res, *mem; 253 int ret; 254 255 /* reserve static register mappings */ 256 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 257 if (!res) 258 return -ENOENT; 259 260 mem = request_mem_region(res->start, res->end - res->start + 1, 261 pdev->name); 262 if (mem == NULL) 263 return -EBUSY; 264 265 platform_set_drvdata(pdev, mem); 266 267 omap_wdt_users = 0; 268 269 if (cpu_is_omap16xx()) { 270 armwdt_ck = clk_get(&pdev->dev, "armwdt_ck"); 271 if (IS_ERR(armwdt_ck)) { 272 ret = PTR_ERR(armwdt_ck); 273 armwdt_ck = NULL; 274 goto fail; 275 } 276 } 277 278 if (cpu_is_omap24xx()) { 279 mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick"); 280 if (IS_ERR(mpu_wdt_ick)) { 281 ret = PTR_ERR(mpu_wdt_ick); 282 mpu_wdt_ick = NULL; 283 goto fail; 284 } 285 mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck"); 286 if (IS_ERR(mpu_wdt_fck)) { 287 ret = PTR_ERR(mpu_wdt_fck); 288 mpu_wdt_fck = NULL; 289 goto fail; 290 } 291 } 292 293 omap_wdt_disable(); 294 omap_wdt_adjust_timeout(timer_margin); 295 296 omap_wdt_miscdev.parent = &pdev->dev; 297 ret = misc_register(&omap_wdt_miscdev); 298 if (ret) 299 goto fail; 300 301 pr_info("OMAP Watchdog Timer: initial timeout %d sec\n", timer_margin); 302 303 /* autogate OCP interface clock */ 304 omap_writel(0x01, OMAP_WATCHDOG_SYS_CONFIG); 305 return 0; 306 307 fail: 308 if (armwdt_ck) 309 clk_put(armwdt_ck); 310 if (mpu_wdt_ick) 311 clk_put(mpu_wdt_ick); 312 if (mpu_wdt_fck) 313 clk_put(mpu_wdt_fck); 314 release_resource(mem); 315 return ret; 316 } 317 318 static void omap_wdt_shutdown(struct platform_device *pdev) 319 { 320 omap_wdt_disable(); 321 } 322 323 static int omap_wdt_remove(struct platform_device *pdev) 324 { 325 struct resource *mem = platform_get_drvdata(pdev); 326 misc_deregister(&omap_wdt_miscdev); 327 release_resource(mem); 328 if (armwdt_ck) 329 clk_put(armwdt_ck); 330 if (mpu_wdt_ick) 331 clk_put(mpu_wdt_ick); 332 if (mpu_wdt_fck) 333 clk_put(mpu_wdt_fck); 334 return 0; 335 } 336 337 #ifdef CONFIG_PM 338 339 /* REVISIT ... not clear this is the best way to handle system suspend; and 340 * it's very inappropriate for selective device suspend (e.g. suspending this 341 * through sysfs rather than by stopping the watchdog daemon). Also, this 342 * may not play well enough with NOWAYOUT... 343 */ 344 345 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) 346 { 347 if (omap_wdt_users) 348 omap_wdt_disable(); 349 return 0; 350 } 351 352 static int omap_wdt_resume(struct platform_device *pdev) 353 { 354 if (omap_wdt_users) { 355 omap_wdt_enable(); 356 omap_wdt_ping(); 357 } 358 return 0; 359 } 360 361 #else 362 #define omap_wdt_suspend NULL 363 #define omap_wdt_resume NULL 364 #endif 365 366 static struct platform_driver omap_wdt_driver = { 367 .probe = omap_wdt_probe, 368 .remove = omap_wdt_remove, 369 .shutdown = omap_wdt_shutdown, 370 .suspend = omap_wdt_suspend, 371 .resume = omap_wdt_resume, 372 .driver = { 373 .owner = THIS_MODULE, 374 .name = "omap_wdt", 375 }, 376 }; 377 378 static int __init omap_wdt_init(void) 379 { 380 spin_lock_init(&wdt_lock); 381 return platform_driver_register(&omap_wdt_driver); 382 } 383 384 static void __exit omap_wdt_exit(void) 385 { 386 platform_driver_unregister(&omap_wdt_driver); 387 } 388 389 module_init(omap_wdt_init); 390 module_exit(omap_wdt_exit); 391 392 MODULE_AUTHOR("George G. Davis"); 393 MODULE_LICENSE("GPL"); 394 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); 395 MODULE_ALIAS("platform:omap_wdt"); 396