1 /* 2 * omap_wdt.c 3 * 4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog 5 * 6 * Author: MontaVista Software, Inc. 7 * <gdavis@mvista.com> or <source@mvista.com> 8 * 9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the 10 * terms of the GNU General Public License version 2. This program is 11 * licensed "as is" without any warranty of any kind, whether express 12 * or implied. 13 * 14 * History: 15 * 16 * 20030527: George G. Davis <gdavis@mvista.com> 17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c 18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu> 19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk> 20 * 21 * Copyright (c) 2004 Texas Instruments. 22 * 1. Modified to support OMAP1610 32-KHz watchdog timer 23 * 2. Ported to 2.6 kernel 24 * 25 * Copyright (c) 2005 David Brownell 26 * Use the driver model and standard identifiers; handle bigger timeouts. 27 */ 28 29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 30 31 #include <linux/module.h> 32 #include <linux/mod_devicetable.h> 33 #include <linux/types.h> 34 #include <linux/kernel.h> 35 #include <linux/mm.h> 36 #include <linux/watchdog.h> 37 #include <linux/reboot.h> 38 #include <linux/err.h> 39 #include <linux/platform_device.h> 40 #include <linux/moduleparam.h> 41 #include <linux/io.h> 42 #include <linux/slab.h> 43 #include <linux/pm_runtime.h> 44 #include <linux/platform_data/omap-wd-timer.h> 45 46 #include "omap_wdt.h" 47 48 static bool nowayout = WATCHDOG_NOWAYOUT; 49 module_param(nowayout, bool, 0); 50 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started " 51 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 52 53 static unsigned timer_margin; 54 module_param(timer_margin, uint, 0); 55 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)"); 56 57 #define to_omap_wdt_dev(_wdog) container_of(_wdog, struct omap_wdt_dev, wdog) 58 59 static bool early_enable; 60 module_param(early_enable, bool, 0); 61 MODULE_PARM_DESC(early_enable, 62 "Watchdog is started on module insertion (default=0)"); 63 64 struct omap_wdt_dev { 65 struct watchdog_device wdog; 66 void __iomem *base; /* physical */ 67 struct device *dev; 68 bool omap_wdt_users; 69 int wdt_trgr_pattern; 70 struct mutex lock; /* to avoid races with PM */ 71 }; 72 73 static void omap_wdt_reload(struct omap_wdt_dev *wdev) 74 { 75 void __iomem *base = wdev->base; 76 77 /* wait for posted write to complete */ 78 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08) 79 cpu_relax(); 80 81 wdev->wdt_trgr_pattern = ~wdev->wdt_trgr_pattern; 82 writel_relaxed(wdev->wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR)); 83 84 /* wait for posted write to complete */ 85 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x08) 86 cpu_relax(); 87 /* reloaded WCRR from WLDR */ 88 } 89 90 static void omap_wdt_enable(struct omap_wdt_dev *wdev) 91 { 92 void __iomem *base = wdev->base; 93 94 /* Sequence to enable the watchdog */ 95 writel_relaxed(0xBBBB, base + OMAP_WATCHDOG_SPR); 96 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10) 97 cpu_relax(); 98 99 writel_relaxed(0x4444, base + OMAP_WATCHDOG_SPR); 100 while ((readl_relaxed(base + OMAP_WATCHDOG_WPS)) & 0x10) 101 cpu_relax(); 102 } 103 104 static void omap_wdt_disable(struct omap_wdt_dev *wdev) 105 { 106 void __iomem *base = wdev->base; 107 108 /* sequence required to disable watchdog */ 109 writel_relaxed(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 110 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10) 111 cpu_relax(); 112 113 writel_relaxed(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */ 114 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x10) 115 cpu_relax(); 116 } 117 118 static void omap_wdt_set_timer(struct omap_wdt_dev *wdev, 119 unsigned int timeout) 120 { 121 u32 pre_margin = GET_WLDR_VAL(timeout); 122 void __iomem *base = wdev->base; 123 124 /* just count up at 32 KHz */ 125 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04) 126 cpu_relax(); 127 128 writel_relaxed(pre_margin, base + OMAP_WATCHDOG_LDR); 129 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x04) 130 cpu_relax(); 131 } 132 133 static int omap_wdt_start(struct watchdog_device *wdog) 134 { 135 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog); 136 void __iomem *base = wdev->base; 137 138 mutex_lock(&wdev->lock); 139 140 wdev->omap_wdt_users = true; 141 142 pm_runtime_get_sync(wdev->dev); 143 144 /* 145 * Make sure the watchdog is disabled. This is unfortunately required 146 * because writing to various registers with the watchdog running has no 147 * effect. 148 */ 149 omap_wdt_disable(wdev); 150 151 /* initialize prescaler */ 152 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01) 153 cpu_relax(); 154 155 writel_relaxed((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL); 156 while (readl_relaxed(base + OMAP_WATCHDOG_WPS) & 0x01) 157 cpu_relax(); 158 159 omap_wdt_set_timer(wdev, wdog->timeout); 160 omap_wdt_reload(wdev); /* trigger loading of new timeout value */ 161 omap_wdt_enable(wdev); 162 163 mutex_unlock(&wdev->lock); 164 165 return 0; 166 } 167 168 static int omap_wdt_stop(struct watchdog_device *wdog) 169 { 170 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog); 171 172 mutex_lock(&wdev->lock); 173 omap_wdt_disable(wdev); 174 pm_runtime_put_sync(wdev->dev); 175 wdev->omap_wdt_users = false; 176 mutex_unlock(&wdev->lock); 177 return 0; 178 } 179 180 static int omap_wdt_ping(struct watchdog_device *wdog) 181 { 182 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog); 183 184 mutex_lock(&wdev->lock); 185 omap_wdt_reload(wdev); 186 mutex_unlock(&wdev->lock); 187 188 return 0; 189 } 190 191 static int omap_wdt_set_timeout(struct watchdog_device *wdog, 192 unsigned int timeout) 193 { 194 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog); 195 196 mutex_lock(&wdev->lock); 197 omap_wdt_disable(wdev); 198 omap_wdt_set_timer(wdev, timeout); 199 omap_wdt_enable(wdev); 200 omap_wdt_reload(wdev); 201 wdog->timeout = timeout; 202 mutex_unlock(&wdev->lock); 203 204 return 0; 205 } 206 207 static unsigned int omap_wdt_get_timeleft(struct watchdog_device *wdog) 208 { 209 struct omap_wdt_dev *wdev = to_omap_wdt_dev(wdog); 210 void __iomem *base = wdev->base; 211 u32 value; 212 213 value = readl_relaxed(base + OMAP_WATCHDOG_CRR); 214 return GET_WCCR_SECS(value); 215 } 216 217 static const struct watchdog_info omap_wdt_info = { 218 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, 219 .identity = "OMAP Watchdog", 220 }; 221 222 static const struct watchdog_ops omap_wdt_ops = { 223 .owner = THIS_MODULE, 224 .start = omap_wdt_start, 225 .stop = omap_wdt_stop, 226 .ping = omap_wdt_ping, 227 .set_timeout = omap_wdt_set_timeout, 228 .get_timeleft = omap_wdt_get_timeleft, 229 }; 230 231 static int omap_wdt_probe(struct platform_device *pdev) 232 { 233 struct omap_wd_timer_platform_data *pdata = dev_get_platdata(&pdev->dev); 234 struct resource *res; 235 struct omap_wdt_dev *wdev; 236 int ret; 237 238 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL); 239 if (!wdev) 240 return -ENOMEM; 241 242 wdev->omap_wdt_users = false; 243 wdev->dev = &pdev->dev; 244 wdev->wdt_trgr_pattern = 0x1234; 245 mutex_init(&wdev->lock); 246 247 /* reserve static register mappings */ 248 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 249 wdev->base = devm_ioremap_resource(&pdev->dev, res); 250 if (IS_ERR(wdev->base)) 251 return PTR_ERR(wdev->base); 252 253 wdev->wdog.info = &omap_wdt_info; 254 wdev->wdog.ops = &omap_wdt_ops; 255 wdev->wdog.min_timeout = TIMER_MARGIN_MIN; 256 wdev->wdog.max_timeout = TIMER_MARGIN_MAX; 257 wdev->wdog.timeout = TIMER_MARGIN_DEFAULT; 258 wdev->wdog.parent = &pdev->dev; 259 260 watchdog_init_timeout(&wdev->wdog, timer_margin, &pdev->dev); 261 262 watchdog_set_nowayout(&wdev->wdog, nowayout); 263 264 platform_set_drvdata(pdev, wdev); 265 266 pm_runtime_enable(wdev->dev); 267 pm_runtime_get_sync(wdev->dev); 268 269 if (pdata && pdata->read_reset_sources) { 270 u32 rs = pdata->read_reset_sources(); 271 if (rs & (1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT)) 272 wdev->wdog.bootstatus = WDIOF_CARDRESET; 273 } 274 275 if (!early_enable) 276 omap_wdt_disable(wdev); 277 278 ret = watchdog_register_device(&wdev->wdog); 279 if (ret) { 280 pm_runtime_disable(wdev->dev); 281 return ret; 282 } 283 284 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n", 285 readl_relaxed(wdev->base + OMAP_WATCHDOG_REV) & 0xFF, 286 wdev->wdog.timeout); 287 288 if (early_enable) 289 omap_wdt_start(&wdev->wdog); 290 291 pm_runtime_put(wdev->dev); 292 293 return 0; 294 } 295 296 static void omap_wdt_shutdown(struct platform_device *pdev) 297 { 298 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 299 300 mutex_lock(&wdev->lock); 301 if (wdev->omap_wdt_users) { 302 omap_wdt_disable(wdev); 303 pm_runtime_put_sync(wdev->dev); 304 } 305 mutex_unlock(&wdev->lock); 306 } 307 308 static int omap_wdt_remove(struct platform_device *pdev) 309 { 310 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 311 312 pm_runtime_disable(wdev->dev); 313 watchdog_unregister_device(&wdev->wdog); 314 315 return 0; 316 } 317 318 #ifdef CONFIG_PM 319 320 /* REVISIT ... not clear this is the best way to handle system suspend; and 321 * it's very inappropriate for selective device suspend (e.g. suspending this 322 * through sysfs rather than by stopping the watchdog daemon). Also, this 323 * may not play well enough with NOWAYOUT... 324 */ 325 326 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state) 327 { 328 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 329 330 mutex_lock(&wdev->lock); 331 if (wdev->omap_wdt_users) { 332 omap_wdt_disable(wdev); 333 pm_runtime_put_sync(wdev->dev); 334 } 335 mutex_unlock(&wdev->lock); 336 337 return 0; 338 } 339 340 static int omap_wdt_resume(struct platform_device *pdev) 341 { 342 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev); 343 344 mutex_lock(&wdev->lock); 345 if (wdev->omap_wdt_users) { 346 pm_runtime_get_sync(wdev->dev); 347 omap_wdt_enable(wdev); 348 omap_wdt_reload(wdev); 349 } 350 mutex_unlock(&wdev->lock); 351 352 return 0; 353 } 354 355 #else 356 #define omap_wdt_suspend NULL 357 #define omap_wdt_resume NULL 358 #endif 359 360 static const struct of_device_id omap_wdt_of_match[] = { 361 { .compatible = "ti,omap3-wdt", }, 362 {}, 363 }; 364 MODULE_DEVICE_TABLE(of, omap_wdt_of_match); 365 366 static struct platform_driver omap_wdt_driver = { 367 .probe = omap_wdt_probe, 368 .remove = omap_wdt_remove, 369 .shutdown = omap_wdt_shutdown, 370 .suspend = omap_wdt_suspend, 371 .resume = omap_wdt_resume, 372 .driver = { 373 .name = "omap_wdt", 374 .of_match_table = omap_wdt_of_match, 375 }, 376 }; 377 378 module_platform_driver(omap_wdt_driver); 379 380 MODULE_AUTHOR("George G. Davis"); 381 MODULE_LICENSE("GPL"); 382 MODULE_ALIAS("platform:omap_wdt"); 383