xref: /openbmc/linux/drivers/watchdog/mtk_wdt.c (revision 293d5b43)
1 /*
2  * Mediatek Watchdog Driver
3  *
4  * Copyright (C) 2014 Matthias Brugger
5  *
6  * Matthias Brugger <matthias.bgg@gmail.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * Based on sunxi_wdt.c
19  */
20 
21 #include <linux/err.h>
22 #include <linux/init.h>
23 #include <linux/io.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/of.h>
28 #include <linux/platform_device.h>
29 #include <linux/types.h>
30 #include <linux/watchdog.h>
31 #include <linux/delay.h>
32 
33 #define WDT_MAX_TIMEOUT		31
34 #define WDT_MIN_TIMEOUT		1
35 #define WDT_LENGTH_TIMEOUT(n)	((n) << 5)
36 
37 #define WDT_LENGTH		0x04
38 #define WDT_LENGTH_KEY		0x8
39 
40 #define WDT_RST			0x08
41 #define WDT_RST_RELOAD		0x1971
42 
43 #define WDT_MODE		0x00
44 #define WDT_MODE_EN		(1 << 0)
45 #define WDT_MODE_EXT_POL_LOW	(0 << 1)
46 #define WDT_MODE_EXT_POL_HIGH	(1 << 1)
47 #define WDT_MODE_EXRST_EN	(1 << 2)
48 #define WDT_MODE_IRQ_EN		(1 << 3)
49 #define WDT_MODE_AUTO_START	(1 << 4)
50 #define WDT_MODE_DUAL_EN	(1 << 6)
51 #define WDT_MODE_KEY		0x22000000
52 
53 #define WDT_SWRST		0x14
54 #define WDT_SWRST_KEY		0x1209
55 
56 #define DRV_NAME		"mtk-wdt"
57 #define DRV_VERSION		"1.0"
58 
59 static bool nowayout = WATCHDOG_NOWAYOUT;
60 static unsigned int timeout = WDT_MAX_TIMEOUT;
61 
62 struct mtk_wdt_dev {
63 	struct watchdog_device wdt_dev;
64 	void __iomem *wdt_base;
65 };
66 
67 static int mtk_wdt_restart(struct watchdog_device *wdt_dev,
68 			   unsigned long action, void *data)
69 {
70 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
71 	void __iomem *wdt_base;
72 
73 	wdt_base = mtk_wdt->wdt_base;
74 
75 	while (1) {
76 		writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
77 		mdelay(5);
78 	}
79 
80 	return 0;
81 }
82 
83 static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
84 {
85 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
86 	void __iomem *wdt_base = mtk_wdt->wdt_base;
87 
88 	iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
89 
90 	return 0;
91 }
92 
93 static int mtk_wdt_set_timeout(struct watchdog_device *wdt_dev,
94 				unsigned int timeout)
95 {
96 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
97 	void __iomem *wdt_base = mtk_wdt->wdt_base;
98 	u32 reg;
99 
100 	wdt_dev->timeout = timeout;
101 
102 	/*
103 	 * One bit is the value of 512 ticks
104 	 * The clock has 32 KHz
105 	 */
106 	reg = WDT_LENGTH_TIMEOUT(timeout << 6) | WDT_LENGTH_KEY;
107 	iowrite32(reg, wdt_base + WDT_LENGTH);
108 
109 	mtk_wdt_ping(wdt_dev);
110 
111 	return 0;
112 }
113 
114 static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
115 {
116 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
117 	void __iomem *wdt_base = mtk_wdt->wdt_base;
118 	u32 reg;
119 
120 	reg = readl(wdt_base + WDT_MODE);
121 	reg &= ~WDT_MODE_EN;
122 	reg |= WDT_MODE_KEY;
123 	iowrite32(reg, wdt_base + WDT_MODE);
124 
125 	return 0;
126 }
127 
128 static int mtk_wdt_start(struct watchdog_device *wdt_dev)
129 {
130 	u32 reg;
131 	struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
132 	void __iomem *wdt_base = mtk_wdt->wdt_base;
133 	int ret;
134 
135 	ret = mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
136 	if (ret < 0)
137 		return ret;
138 
139 	reg = ioread32(wdt_base + WDT_MODE);
140 	reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
141 	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
142 	iowrite32(reg, wdt_base + WDT_MODE);
143 
144 	return 0;
145 }
146 
147 static const struct watchdog_info mtk_wdt_info = {
148 	.identity	= DRV_NAME,
149 	.options	= WDIOF_SETTIMEOUT |
150 			  WDIOF_KEEPALIVEPING |
151 			  WDIOF_MAGICCLOSE,
152 };
153 
154 static const struct watchdog_ops mtk_wdt_ops = {
155 	.owner		= THIS_MODULE,
156 	.start		= mtk_wdt_start,
157 	.stop		= mtk_wdt_stop,
158 	.ping		= mtk_wdt_ping,
159 	.set_timeout	= mtk_wdt_set_timeout,
160 	.restart	= mtk_wdt_restart,
161 };
162 
163 static int mtk_wdt_probe(struct platform_device *pdev)
164 {
165 	struct mtk_wdt_dev *mtk_wdt;
166 	struct resource *res;
167 	int err;
168 
169 	mtk_wdt = devm_kzalloc(&pdev->dev, sizeof(*mtk_wdt), GFP_KERNEL);
170 	if (!mtk_wdt)
171 		return -ENOMEM;
172 
173 	platform_set_drvdata(pdev, mtk_wdt);
174 
175 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
176 	mtk_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
177 	if (IS_ERR(mtk_wdt->wdt_base))
178 		return PTR_ERR(mtk_wdt->wdt_base);
179 
180 	mtk_wdt->wdt_dev.info = &mtk_wdt_info;
181 	mtk_wdt->wdt_dev.ops = &mtk_wdt_ops;
182 	mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
183 	mtk_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
184 	mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
185 	mtk_wdt->wdt_dev.parent = &pdev->dev;
186 
187 	watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, &pdev->dev);
188 	watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
189 	watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
190 
191 	watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
192 
193 	mtk_wdt_stop(&mtk_wdt->wdt_dev);
194 
195 	err = watchdog_register_device(&mtk_wdt->wdt_dev);
196 	if (unlikely(err))
197 		return err;
198 
199 	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
200 			mtk_wdt->wdt_dev.timeout, nowayout);
201 
202 	return 0;
203 }
204 
205 static void mtk_wdt_shutdown(struct platform_device *pdev)
206 {
207 	struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
208 
209 	if (watchdog_active(&mtk_wdt->wdt_dev))
210 		mtk_wdt_stop(&mtk_wdt->wdt_dev);
211 }
212 
213 static int mtk_wdt_remove(struct platform_device *pdev)
214 {
215 	struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
216 
217 	watchdog_unregister_device(&mtk_wdt->wdt_dev);
218 
219 	return 0;
220 }
221 
222 #ifdef CONFIG_PM_SLEEP
223 static int mtk_wdt_suspend(struct device *dev)
224 {
225 	struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
226 
227 	if (watchdog_active(&mtk_wdt->wdt_dev))
228 		mtk_wdt_stop(&mtk_wdt->wdt_dev);
229 
230 	return 0;
231 }
232 
233 static int mtk_wdt_resume(struct device *dev)
234 {
235 	struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
236 
237 	if (watchdog_active(&mtk_wdt->wdt_dev)) {
238 		mtk_wdt_start(&mtk_wdt->wdt_dev);
239 		mtk_wdt_ping(&mtk_wdt->wdt_dev);
240 	}
241 
242 	return 0;
243 }
244 #endif
245 
246 static const struct of_device_id mtk_wdt_dt_ids[] = {
247 	{ .compatible = "mediatek,mt6589-wdt" },
248 	{ /* sentinel */ }
249 };
250 MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
251 
252 static const struct dev_pm_ops mtk_wdt_pm_ops = {
253 	SET_SYSTEM_SLEEP_PM_OPS(mtk_wdt_suspend,
254 				mtk_wdt_resume)
255 };
256 
257 static struct platform_driver mtk_wdt_driver = {
258 	.probe		= mtk_wdt_probe,
259 	.remove		= mtk_wdt_remove,
260 	.shutdown	= mtk_wdt_shutdown,
261 	.driver		= {
262 		.name		= DRV_NAME,
263 		.pm		= &mtk_wdt_pm_ops,
264 		.of_match_table	= mtk_wdt_dt_ids,
265 	},
266 };
267 
268 module_platform_driver(mtk_wdt_driver);
269 
270 module_param(timeout, uint, 0);
271 MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
272 
273 module_param(nowayout, bool, 0);
274 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
275 			__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
276 
277 MODULE_LICENSE("GPL");
278 MODULE_AUTHOR("Matthias Brugger <matthias.bgg@gmail.com>");
279 MODULE_DESCRIPTION("Mediatek WatchDog Timer Driver");
280 MODULE_VERSION(DRV_VERSION);
281