1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Watchdog Timer Driver
4 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
5 *
6 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
7 *
8 * Based on softdog.c by Alan Cox,
9 * 83977f_wdt.c by Jose Goncalves,
10 * it87.c by Chris Gauthron, Jean Delvare
11 *
12 * Data-sheets: Publicly available at the ITE website
13 * http://www.ite.com.tw/
14 *
15 * Support of the watchdog timers, which are available on
16 * IT8607, IT8620, IT8622, IT8625, IT8628, IT8655, IT8665, IT8686,
17 * IT8702, IT8712, IT8716, IT8718, IT8720, IT8721, IT8726, IT8728,
18 * IT8772, IT8783 and IT8784.
19 */
20
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
23 #include <linux/init.h>
24 #include <linux/io.h>
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/types.h>
29 #include <linux/watchdog.h>
30
31 #define WATCHDOG_NAME "IT87 WDT"
32
33 /* Defaults for Module Parameter */
34 #define DEFAULT_TIMEOUT 60
35 #define DEFAULT_TESTMODE 0
36 #define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
37
38 /* IO Ports */
39 #define REG 0x2e
40 #define VAL 0x2f
41
42 /* Logical device Numbers LDN */
43 #define GPIO 0x07
44
45 /* Configuration Registers and Functions */
46 #define LDNREG 0x07
47 #define CHIPID 0x20
48 #define CHIPREV 0x22
49
50 /* Chip Id numbers */
51 #define NO_DEV_ID 0xffff
52 #define IT8607_ID 0x8607
53 #define IT8620_ID 0x8620
54 #define IT8622_ID 0x8622
55 #define IT8625_ID 0x8625
56 #define IT8628_ID 0x8628
57 #define IT8655_ID 0x8655
58 #define IT8665_ID 0x8665
59 #define IT8686_ID 0x8686
60 #define IT8702_ID 0x8702
61 #define IT8705_ID 0x8705
62 #define IT8712_ID 0x8712
63 #define IT8716_ID 0x8716
64 #define IT8718_ID 0x8718
65 #define IT8720_ID 0x8720
66 #define IT8721_ID 0x8721
67 #define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
68 #define IT8728_ID 0x8728
69 #define IT8772_ID 0x8772
70 #define IT8783_ID 0x8783
71 #define IT8784_ID 0x8784
72 #define IT8786_ID 0x8786
73
74 /* GPIO Configuration Registers LDN=0x07 */
75 #define WDTCTRL 0x71
76 #define WDTCFG 0x72
77 #define WDTVALLSB 0x73
78 #define WDTVALMSB 0x74
79
80 /* GPIO Bits WDTCFG */
81 #define WDT_TOV1 0x80
82 #define WDT_KRST 0x40
83 #define WDT_TOVE 0x20
84 #define WDT_PWROK 0x10 /* not in it8721 */
85 #define WDT_INT_MASK 0x0f
86
87 static unsigned int max_units, chip_type;
88
89 static unsigned int timeout = DEFAULT_TIMEOUT;
90 static int testmode = DEFAULT_TESTMODE;
91 static bool nowayout = DEFAULT_NOWAYOUT;
92
93 module_param(timeout, int, 0);
94 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
95 __MODULE_STRING(DEFAULT_TIMEOUT));
96 module_param(testmode, int, 0);
97 MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
98 __MODULE_STRING(DEFAULT_TESTMODE));
99 module_param(nowayout, bool, 0);
100 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
101 __MODULE_STRING(WATCHDOG_NOWAYOUT));
102
103 /* Superio Chip */
104
superio_enter(void)105 static inline int superio_enter(void)
106 {
107 /*
108 * Try to reserve REG and REG + 1 for exclusive access.
109 */
110 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
111 return -EBUSY;
112
113 outb(0x87, REG);
114 outb(0x01, REG);
115 outb(0x55, REG);
116 outb(0x55, REG);
117 return 0;
118 }
119
superio_exit(void)120 static inline void superio_exit(void)
121 {
122 outb(0x02, REG);
123 outb(0x02, VAL);
124 release_region(REG, 2);
125 }
126
superio_select(int ldn)127 static inline void superio_select(int ldn)
128 {
129 outb(LDNREG, REG);
130 outb(ldn, VAL);
131 }
132
superio_inb(int reg)133 static inline int superio_inb(int reg)
134 {
135 outb(reg, REG);
136 return inb(VAL);
137 }
138
superio_outb(int val,int reg)139 static inline void superio_outb(int val, int reg)
140 {
141 outb(reg, REG);
142 outb(val, VAL);
143 }
144
superio_inw(int reg)145 static inline int superio_inw(int reg)
146 {
147 int val;
148 outb(reg++, REG);
149 val = inb(VAL) << 8;
150 outb(reg, REG);
151 val |= inb(VAL);
152 return val;
153 }
154
155 /* Internal function, should be called after superio_select(GPIO) */
_wdt_update_timeout(unsigned int t)156 static void _wdt_update_timeout(unsigned int t)
157 {
158 unsigned char cfg = WDT_KRST;
159
160 if (testmode)
161 cfg = 0;
162
163 if (t <= max_units)
164 cfg |= WDT_TOV1;
165 else
166 t /= 60;
167
168 if (chip_type != IT8721_ID)
169 cfg |= WDT_PWROK;
170
171 superio_outb(cfg, WDTCFG);
172 superio_outb(t, WDTVALLSB);
173 if (max_units > 255)
174 superio_outb(t >> 8, WDTVALMSB);
175 }
176
wdt_update_timeout(unsigned int t)177 static int wdt_update_timeout(unsigned int t)
178 {
179 int ret;
180
181 ret = superio_enter();
182 if (ret)
183 return ret;
184
185 superio_select(GPIO);
186 _wdt_update_timeout(t);
187 superio_exit();
188
189 return 0;
190 }
191
wdt_round_time(int t)192 static int wdt_round_time(int t)
193 {
194 t += 59;
195 t -= t % 60;
196 return t;
197 }
198
199 /* watchdog timer handling */
200
wdt_start(struct watchdog_device * wdd)201 static int wdt_start(struct watchdog_device *wdd)
202 {
203 return wdt_update_timeout(wdd->timeout);
204 }
205
wdt_stop(struct watchdog_device * wdd)206 static int wdt_stop(struct watchdog_device *wdd)
207 {
208 return wdt_update_timeout(0);
209 }
210
211 /**
212 * wdt_set_timeout - set a new timeout value with watchdog ioctl
213 * @t: timeout value in seconds
214 *
215 * The hardware device has a 8 or 16 bit watchdog timer (depends on
216 * chip version) that can be configured to count seconds or minutes.
217 *
218 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
219 */
220
wdt_set_timeout(struct watchdog_device * wdd,unsigned int t)221 static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
222 {
223 int ret = 0;
224
225 if (t > max_units)
226 t = wdt_round_time(t);
227
228 wdd->timeout = t;
229
230 if (watchdog_hw_running(wdd))
231 ret = wdt_update_timeout(t);
232
233 return ret;
234 }
235
236 static const struct watchdog_info ident = {
237 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
238 .firmware_version = 1,
239 .identity = WATCHDOG_NAME,
240 };
241
242 static const struct watchdog_ops wdt_ops = {
243 .owner = THIS_MODULE,
244 .start = wdt_start,
245 .stop = wdt_stop,
246 .set_timeout = wdt_set_timeout,
247 };
248
249 static struct watchdog_device wdt_dev = {
250 .info = &ident,
251 .ops = &wdt_ops,
252 .min_timeout = 1,
253 };
254
it87_wdt_init(void)255 static int __init it87_wdt_init(void)
256 {
257 u8 chip_rev;
258 u8 ctrl;
259 int rc;
260
261 rc = superio_enter();
262 if (rc)
263 return rc;
264
265 chip_type = superio_inw(CHIPID);
266 chip_rev = superio_inb(CHIPREV) & 0x0f;
267 superio_exit();
268
269 switch (chip_type) {
270 case IT8702_ID:
271 max_units = 255;
272 break;
273 case IT8712_ID:
274 max_units = (chip_rev < 8) ? 255 : 65535;
275 break;
276 case IT8716_ID:
277 case IT8726_ID:
278 max_units = 65535;
279 break;
280 case IT8607_ID:
281 case IT8620_ID:
282 case IT8622_ID:
283 case IT8625_ID:
284 case IT8628_ID:
285 case IT8655_ID:
286 case IT8665_ID:
287 case IT8686_ID:
288 case IT8718_ID:
289 case IT8720_ID:
290 case IT8721_ID:
291 case IT8728_ID:
292 case IT8772_ID:
293 case IT8783_ID:
294 case IT8784_ID:
295 case IT8786_ID:
296 max_units = 65535;
297 break;
298 case IT8705_ID:
299 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
300 chip_type, chip_rev);
301 return -ENODEV;
302 case NO_DEV_ID:
303 pr_err("no device\n");
304 return -ENODEV;
305 default:
306 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
307 chip_type, chip_rev);
308 return -ENODEV;
309 }
310
311 rc = superio_enter();
312 if (rc)
313 return rc;
314
315 superio_select(GPIO);
316 superio_outb(WDT_TOV1, WDTCFG);
317
318 switch (chip_type) {
319 case IT8784_ID:
320 case IT8786_ID:
321 ctrl = superio_inb(WDTCTRL);
322 ctrl &= 0x08;
323 superio_outb(ctrl, WDTCTRL);
324 break;
325 default:
326 superio_outb(0x00, WDTCTRL);
327 }
328
329 superio_exit();
330
331 if (timeout < 1 || timeout > max_units * 60) {
332 timeout = DEFAULT_TIMEOUT;
333 pr_warn("Timeout value out of range, use default %d sec\n",
334 DEFAULT_TIMEOUT);
335 }
336
337 if (timeout > max_units)
338 timeout = wdt_round_time(timeout);
339
340 wdt_dev.timeout = timeout;
341 wdt_dev.max_timeout = max_units * 60;
342
343 watchdog_stop_on_reboot(&wdt_dev);
344 rc = watchdog_register_device(&wdt_dev);
345 if (rc) {
346 pr_err("Cannot register watchdog device (err=%d)\n", rc);
347 return rc;
348 }
349
350 pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
351 chip_type, chip_rev, timeout, nowayout, testmode);
352
353 return 0;
354 }
355
it87_wdt_exit(void)356 static void __exit it87_wdt_exit(void)
357 {
358 watchdog_unregister_device(&wdt_dev);
359 }
360
361 module_init(it87_wdt_init);
362 module_exit(it87_wdt_exit);
363
364 MODULE_AUTHOR("Oliver Schuster");
365 MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
366 MODULE_LICENSE("GPL");
367