xref: /openbmc/linux/drivers/watchdog/imx2_wdt.c (revision a8a28aff)
1 /*
2  * Watchdog driver for IMX2 and later processors
3  *
4  *  Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
5  *  Copyright (C) 2014 Freescale Semiconductor, Inc.
6  *
7  * some parts adapted by similar drivers from Darius Augulis and Vladimir
8  * Zapolskiy, additional improvements by Wim Van Sebroeck.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
15  *
16  *			MX1:		MX2+:
17  *			----		-----
18  * Registers:		32-bit		16-bit
19  * Stopable timer:	Yes		No
20  * Need to enable clk:	No		Yes
21  * Halt on suspend:	Manual		Can be automatic
22  */
23 
24 #include <linux/clk.h>
25 #include <linux/init.h>
26 #include <linux/io.h>
27 #include <linux/jiffies.h>
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/moduleparam.h>
31 #include <linux/platform_device.h>
32 #include <linux/regmap.h>
33 #include <linux/timer.h>
34 #include <linux/watchdog.h>
35 
36 #define DRIVER_NAME "imx2-wdt"
37 
38 #define IMX2_WDT_WCR		0x00		/* Control Register */
39 #define IMX2_WDT_WCR_WT		(0xFF << 8)	/* -> Watchdog Timeout Field */
40 #define IMX2_WDT_WCR_WRE	(1 << 3)	/* -> WDOG Reset Enable */
41 #define IMX2_WDT_WCR_WDE	(1 << 2)	/* -> Watchdog Enable */
42 #define IMX2_WDT_WCR_WDZST	(1 << 0)	/* -> Watchdog timer Suspend */
43 
44 #define IMX2_WDT_WSR		0x02		/* Service Register */
45 #define IMX2_WDT_SEQ1		0x5555		/* -> service sequence 1 */
46 #define IMX2_WDT_SEQ2		0xAAAA		/* -> service sequence 2 */
47 
48 #define IMX2_WDT_WRSR		0x04		/* Reset Status Register */
49 #define IMX2_WDT_WRSR_TOUT	(1 << 1)	/* -> Reset due to Timeout */
50 
51 #define IMX2_WDT_MAX_TIME	128
52 #define IMX2_WDT_DEFAULT_TIME	60		/* in seconds */
53 
54 #define WDOG_SEC_TO_COUNT(s)	((s * 2 - 1) << 8)
55 
56 struct imx2_wdt_device {
57 	struct clk *clk;
58 	struct regmap *regmap;
59 	struct timer_list timer;	/* Pings the watchdog when closed */
60 	struct watchdog_device wdog;
61 };
62 
63 static bool nowayout = WATCHDOG_NOWAYOUT;
64 module_param(nowayout, bool, 0);
65 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
66 				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
67 
68 
69 static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
70 module_param(timeout, uint, 0);
71 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
72 				__MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
73 
74 static const struct watchdog_info imx2_wdt_info = {
75 	.identity = "imx2+ watchdog",
76 	.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
77 };
78 
79 static inline void imx2_wdt_setup(struct watchdog_device *wdog)
80 {
81 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
82 	u32 val;
83 
84 	regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
85 
86 	/* Suspend timer in low power mode, write once-only */
87 	val |= IMX2_WDT_WCR_WDZST;
88 	/* Strip the old watchdog Time-Out value */
89 	val &= ~IMX2_WDT_WCR_WT;
90 	/* Generate reset if WDOG times out */
91 	val &= ~IMX2_WDT_WCR_WRE;
92 	/* Keep Watchdog Disabled */
93 	val &= ~IMX2_WDT_WCR_WDE;
94 	/* Set the watchdog's Time-Out value */
95 	val |= WDOG_SEC_TO_COUNT(wdog->timeout);
96 
97 	regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
98 
99 	/* enable the watchdog */
100 	val |= IMX2_WDT_WCR_WDE;
101 	regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
102 }
103 
104 static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
105 {
106 	u32 val;
107 
108 	regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
109 
110 	return val & IMX2_WDT_WCR_WDE;
111 }
112 
113 static int imx2_wdt_ping(struct watchdog_device *wdog)
114 {
115 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
116 
117 	regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
118 	regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
119 	return 0;
120 }
121 
122 static void imx2_wdt_timer_ping(unsigned long arg)
123 {
124 	struct watchdog_device *wdog = (struct watchdog_device *)arg;
125 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
126 
127 	/* ping it every wdog->timeout / 2 seconds to prevent reboot */
128 	imx2_wdt_ping(wdog);
129 	mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2);
130 }
131 
132 static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
133 				unsigned int new_timeout)
134 {
135 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
136 
137 	regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
138 			   WDOG_SEC_TO_COUNT(new_timeout));
139 	return 0;
140 }
141 
142 static int imx2_wdt_start(struct watchdog_device *wdog)
143 {
144 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
145 
146 	if (imx2_wdt_is_running(wdev)) {
147 		/* delete the timer that pings the watchdog after close */
148 		del_timer_sync(&wdev->timer);
149 		imx2_wdt_set_timeout(wdog, wdog->timeout);
150 	} else
151 		imx2_wdt_setup(wdog);
152 
153 	return imx2_wdt_ping(wdog);
154 }
155 
156 static int imx2_wdt_stop(struct watchdog_device *wdog)
157 {
158 	/*
159 	 * We don't need a clk_disable, it cannot be disabled once started.
160 	 * We use a timer to ping the watchdog while /dev/watchdog is closed
161 	 */
162 	imx2_wdt_timer_ping((unsigned long)wdog);
163 	return 0;
164 }
165 
166 static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog)
167 {
168 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
169 
170 	if (imx2_wdt_is_running(wdev)) {
171 		imx2_wdt_set_timeout(wdog, wdog->timeout);
172 		imx2_wdt_timer_ping((unsigned long)wdog);
173 	}
174 }
175 
176 static struct watchdog_ops imx2_wdt_ops = {
177 	.owner = THIS_MODULE,
178 	.start = imx2_wdt_start,
179 	.stop = imx2_wdt_stop,
180 	.ping = imx2_wdt_ping,
181 	.set_timeout = imx2_wdt_set_timeout,
182 };
183 
184 static struct regmap_config imx2_wdt_regmap_config = {
185 	.reg_bits = 16,
186 	.reg_stride = 2,
187 	.val_bits = 16,
188 	.max_register = 0x8,
189 };
190 
191 static int __init imx2_wdt_probe(struct platform_device *pdev)
192 {
193 	struct imx2_wdt_device *wdev;
194 	struct watchdog_device *wdog;
195 	struct resource *res;
196 	void __iomem *base;
197 	int ret;
198 	u32 val;
199 
200 	wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
201 	if (!wdev)
202 		return -ENOMEM;
203 
204 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
205 	base = devm_ioremap_resource(&pdev->dev, res);
206 	if (IS_ERR(base))
207 		return PTR_ERR(base);
208 
209 	wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
210 						 &imx2_wdt_regmap_config);
211 	if (IS_ERR(wdev->regmap)) {
212 		dev_err(&pdev->dev, "regmap init failed\n");
213 		return PTR_ERR(wdev->regmap);
214 	}
215 
216 	wdev->clk = devm_clk_get(&pdev->dev, NULL);
217 	if (IS_ERR(wdev->clk)) {
218 		dev_err(&pdev->dev, "can't get Watchdog clock\n");
219 		return PTR_ERR(wdev->clk);
220 	}
221 
222 	wdog			= &wdev->wdog;
223 	wdog->info		= &imx2_wdt_info;
224 	wdog->ops		= &imx2_wdt_ops;
225 	wdog->min_timeout	= 1;
226 	wdog->max_timeout	= IMX2_WDT_MAX_TIME;
227 
228 	clk_prepare_enable(wdev->clk);
229 
230 	regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
231 	wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
232 
233 	wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
234 	if (wdog->timeout != timeout)
235 		dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
236 			 timeout, wdog->timeout);
237 
238 	platform_set_drvdata(pdev, wdog);
239 	watchdog_set_drvdata(wdog, wdev);
240 	watchdog_set_nowayout(wdog, nowayout);
241 	watchdog_init_timeout(wdog, timeout, &pdev->dev);
242 
243 	setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog);
244 
245 	imx2_wdt_ping_if_active(wdog);
246 
247 	ret = watchdog_register_device(wdog);
248 	if (ret) {
249 		dev_err(&pdev->dev, "cannot register watchdog device\n");
250 		return ret;
251 	}
252 
253 	dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
254 		 wdog->timeout, nowayout);
255 
256 	return 0;
257 }
258 
259 static int __exit imx2_wdt_remove(struct platform_device *pdev)
260 {
261 	struct watchdog_device *wdog = platform_get_drvdata(pdev);
262 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
263 
264 	watchdog_unregister_device(wdog);
265 
266 	if (imx2_wdt_is_running(wdev)) {
267 		del_timer_sync(&wdev->timer);
268 		imx2_wdt_ping(wdog);
269 		dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
270 	}
271 	return 0;
272 }
273 
274 static void imx2_wdt_shutdown(struct platform_device *pdev)
275 {
276 	struct watchdog_device *wdog = platform_get_drvdata(pdev);
277 	struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
278 
279 	if (imx2_wdt_is_running(wdev)) {
280 		/*
281 		 * We are running, we need to delete the timer but will
282 		 * give max timeout before reboot will take place
283 		 */
284 		del_timer_sync(&wdev->timer);
285 		imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
286 		imx2_wdt_ping(wdog);
287 		dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
288 	}
289 }
290 
291 static const struct of_device_id imx2_wdt_dt_ids[] = {
292 	{ .compatible = "fsl,imx21-wdt", },
293 	{ /* sentinel */ }
294 };
295 MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
296 
297 static struct platform_driver imx2_wdt_driver = {
298 	.remove		= __exit_p(imx2_wdt_remove),
299 	.shutdown	= imx2_wdt_shutdown,
300 	.driver		= {
301 		.name	= DRIVER_NAME,
302 		.owner	= THIS_MODULE,
303 		.of_match_table = imx2_wdt_dt_ids,
304 	},
305 };
306 
307 module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
308 
309 MODULE_AUTHOR("Wolfram Sang");
310 MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
311 MODULE_LICENSE("GPL v2");
312 MODULE_ALIAS("platform:" DRIVER_NAME);
313