1 /* 2 * Watchdog driver for IMX2 and later processors 3 * 4 * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de> 5 * 6 * some parts adapted by similar drivers from Darius Augulis and Vladimir 7 * Zapolskiy, additional improvements by Wim Van Sebroeck. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License version 2 as published by 11 * the Free Software Foundation. 12 * 13 * NOTE: MX1 has a slightly different Watchdog than MX2 and later: 14 * 15 * MX1: MX2+: 16 * ---- ----- 17 * Registers: 32-bit 16-bit 18 * Stopable timer: Yes No 19 * Need to enable clk: No Yes 20 * Halt on suspend: Manual Can be automatic 21 */ 22 23 #include <linux/init.h> 24 #include <linux/kernel.h> 25 #include <linux/miscdevice.h> 26 #include <linux/module.h> 27 #include <linux/moduleparam.h> 28 #include <linux/platform_device.h> 29 #include <linux/watchdog.h> 30 #include <linux/clk.h> 31 #include <linux/fs.h> 32 #include <linux/io.h> 33 #include <linux/uaccess.h> 34 #include <linux/timer.h> 35 #include <linux/jiffies.h> 36 37 #define DRIVER_NAME "imx2-wdt" 38 39 #define IMX2_WDT_WCR 0x00 /* Control Register */ 40 #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */ 41 #define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */ 42 #define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */ 43 44 #define IMX2_WDT_WSR 0x02 /* Service Register */ 45 #define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */ 46 #define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */ 47 48 #define IMX2_WDT_WRSR 0x04 /* Reset Status Register */ 49 #define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */ 50 51 #define IMX2_WDT_MAX_TIME 128 52 #define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */ 53 54 #define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8) 55 56 #define IMX2_WDT_STATUS_OPEN 0 57 #define IMX2_WDT_STATUS_STARTED 1 58 #define IMX2_WDT_EXPECT_CLOSE 2 59 60 static struct { 61 struct clk *clk; 62 void __iomem *base; 63 unsigned timeout; 64 unsigned long status; 65 struct timer_list timer; /* Pings the watchdog when closed */ 66 } imx2_wdt; 67 68 static struct miscdevice imx2_wdt_miscdev; 69 70 static bool nowayout = WATCHDOG_NOWAYOUT; 71 module_param(nowayout, bool, 0); 72 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 73 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 74 75 76 static unsigned timeout = IMX2_WDT_DEFAULT_TIME; 77 module_param(timeout, uint, 0); 78 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default=" 79 __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")"); 80 81 static const struct watchdog_info imx2_wdt_info = { 82 .identity = "imx2+ watchdog", 83 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, 84 }; 85 86 static inline void imx2_wdt_setup(void) 87 { 88 u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR); 89 90 /* Strip the old watchdog Time-Out value */ 91 val &= ~IMX2_WDT_WCR_WT; 92 /* Generate reset if WDOG times out */ 93 val &= ~IMX2_WDT_WCR_WRE; 94 /* Keep Watchdog Disabled */ 95 val &= ~IMX2_WDT_WCR_WDE; 96 /* Set the watchdog's Time-Out value */ 97 val |= WDOG_SEC_TO_COUNT(imx2_wdt.timeout); 98 99 __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR); 100 101 /* enable the watchdog */ 102 val |= IMX2_WDT_WCR_WDE; 103 __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR); 104 } 105 106 static inline void imx2_wdt_ping(void) 107 { 108 __raw_writew(IMX2_WDT_SEQ1, imx2_wdt.base + IMX2_WDT_WSR); 109 __raw_writew(IMX2_WDT_SEQ2, imx2_wdt.base + IMX2_WDT_WSR); 110 } 111 112 static void imx2_wdt_timer_ping(unsigned long arg) 113 { 114 /* ping it every imx2_wdt.timeout / 2 seconds to prevent reboot */ 115 imx2_wdt_ping(); 116 mod_timer(&imx2_wdt.timer, jiffies + imx2_wdt.timeout * HZ / 2); 117 } 118 119 static void imx2_wdt_start(void) 120 { 121 if (!test_and_set_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) { 122 /* at our first start we enable clock and do initialisations */ 123 clk_prepare_enable(imx2_wdt.clk); 124 125 imx2_wdt_setup(); 126 } else /* delete the timer that pings the watchdog after close */ 127 del_timer_sync(&imx2_wdt.timer); 128 129 /* Watchdog is enabled - time to reload the timeout value */ 130 imx2_wdt_ping(); 131 } 132 133 static void imx2_wdt_stop(void) 134 { 135 /* we don't need a clk_disable, it cannot be disabled once started. 136 * We use a timer to ping the watchdog while /dev/watchdog is closed */ 137 imx2_wdt_timer_ping(0); 138 } 139 140 static void imx2_wdt_set_timeout(int new_timeout) 141 { 142 u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR); 143 144 /* set the new timeout value in the WSR */ 145 val &= ~IMX2_WDT_WCR_WT; 146 val |= WDOG_SEC_TO_COUNT(new_timeout); 147 __raw_writew(val, imx2_wdt.base + IMX2_WDT_WCR); 148 } 149 150 static int imx2_wdt_open(struct inode *inode, struct file *file) 151 { 152 if (test_and_set_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status)) 153 return -EBUSY; 154 155 imx2_wdt_start(); 156 return nonseekable_open(inode, file); 157 } 158 159 static int imx2_wdt_close(struct inode *inode, struct file *file) 160 { 161 if (test_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status) && !nowayout) 162 imx2_wdt_stop(); 163 else { 164 dev_crit(imx2_wdt_miscdev.parent, 165 "Unexpected close: Expect reboot!\n"); 166 imx2_wdt_ping(); 167 } 168 169 clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status); 170 clear_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status); 171 return 0; 172 } 173 174 static long imx2_wdt_ioctl(struct file *file, unsigned int cmd, 175 unsigned long arg) 176 { 177 void __user *argp = (void __user *)arg; 178 int __user *p = argp; 179 int new_value; 180 u16 val; 181 182 switch (cmd) { 183 case WDIOC_GETSUPPORT: 184 return copy_to_user(argp, &imx2_wdt_info, 185 sizeof(struct watchdog_info)) ? -EFAULT : 0; 186 187 case WDIOC_GETSTATUS: 188 return put_user(0, p); 189 190 case WDIOC_GETBOOTSTATUS: 191 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WRSR); 192 new_value = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0; 193 return put_user(new_value, p); 194 195 case WDIOC_KEEPALIVE: 196 imx2_wdt_ping(); 197 return 0; 198 199 case WDIOC_SETTIMEOUT: 200 if (get_user(new_value, p)) 201 return -EFAULT; 202 if ((new_value < 1) || (new_value > IMX2_WDT_MAX_TIME)) 203 return -EINVAL; 204 imx2_wdt_set_timeout(new_value); 205 imx2_wdt.timeout = new_value; 206 imx2_wdt_ping(); 207 208 /* Fallthrough to return current value */ 209 case WDIOC_GETTIMEOUT: 210 return put_user(imx2_wdt.timeout, p); 211 212 default: 213 return -ENOTTY; 214 } 215 } 216 217 static ssize_t imx2_wdt_write(struct file *file, const char __user *data, 218 size_t len, loff_t *ppos) 219 { 220 size_t i; 221 char c; 222 223 if (len == 0) /* Can we see this even ? */ 224 return 0; 225 226 clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status); 227 /* scan to see whether or not we got the magic character */ 228 for (i = 0; i != len; i++) { 229 if (get_user(c, data + i)) 230 return -EFAULT; 231 if (c == 'V') 232 set_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status); 233 } 234 235 imx2_wdt_ping(); 236 return len; 237 } 238 239 static const struct file_operations imx2_wdt_fops = { 240 .owner = THIS_MODULE, 241 .llseek = no_llseek, 242 .unlocked_ioctl = imx2_wdt_ioctl, 243 .open = imx2_wdt_open, 244 .release = imx2_wdt_close, 245 .write = imx2_wdt_write, 246 }; 247 248 static struct miscdevice imx2_wdt_miscdev = { 249 .minor = WATCHDOG_MINOR, 250 .name = "watchdog", 251 .fops = &imx2_wdt_fops, 252 }; 253 254 static int __init imx2_wdt_probe(struct platform_device *pdev) 255 { 256 int ret; 257 struct resource *res; 258 259 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 260 imx2_wdt.base = devm_ioremap_resource(&pdev->dev, res); 261 if (IS_ERR(imx2_wdt.base)) 262 return PTR_ERR(imx2_wdt.base); 263 264 imx2_wdt.clk = devm_clk_get(&pdev->dev, NULL); 265 if (IS_ERR(imx2_wdt.clk)) { 266 dev_err(&pdev->dev, "can't get Watchdog clock\n"); 267 return PTR_ERR(imx2_wdt.clk); 268 } 269 270 imx2_wdt.timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME); 271 if (imx2_wdt.timeout != timeout) 272 dev_warn(&pdev->dev, "Initial timeout out of range! " 273 "Clamped from %u to %u\n", timeout, imx2_wdt.timeout); 274 275 setup_timer(&imx2_wdt.timer, imx2_wdt_timer_ping, 0); 276 277 imx2_wdt_miscdev.parent = &pdev->dev; 278 ret = misc_register(&imx2_wdt_miscdev); 279 if (ret) 280 goto fail; 281 282 dev_info(&pdev->dev, 283 "IMX2+ Watchdog Timer enabled. timeout=%ds (nowayout=%d)\n", 284 imx2_wdt.timeout, nowayout); 285 return 0; 286 287 fail: 288 imx2_wdt_miscdev.parent = NULL; 289 return ret; 290 } 291 292 static int __exit imx2_wdt_remove(struct platform_device *pdev) 293 { 294 misc_deregister(&imx2_wdt_miscdev); 295 296 if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) { 297 del_timer_sync(&imx2_wdt.timer); 298 299 dev_crit(imx2_wdt_miscdev.parent, 300 "Device removed: Expect reboot!\n"); 301 } 302 303 imx2_wdt_miscdev.parent = NULL; 304 return 0; 305 } 306 307 static void imx2_wdt_shutdown(struct platform_device *pdev) 308 { 309 if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) { 310 /* we are running, we need to delete the timer but will give 311 * max timeout before reboot will take place */ 312 del_timer_sync(&imx2_wdt.timer); 313 imx2_wdt_set_timeout(IMX2_WDT_MAX_TIME); 314 imx2_wdt_ping(); 315 316 dev_crit(imx2_wdt_miscdev.parent, 317 "Device shutdown: Expect reboot!\n"); 318 } 319 } 320 321 static const struct of_device_id imx2_wdt_dt_ids[] = { 322 { .compatible = "fsl,imx21-wdt", }, 323 { /* sentinel */ } 324 }; 325 MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids); 326 327 static struct platform_driver imx2_wdt_driver = { 328 .remove = __exit_p(imx2_wdt_remove), 329 .shutdown = imx2_wdt_shutdown, 330 .driver = { 331 .name = DRIVER_NAME, 332 .owner = THIS_MODULE, 333 .of_match_table = imx2_wdt_dt_ids, 334 }, 335 }; 336 337 module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe); 338 339 MODULE_AUTHOR("Wolfram Sang"); 340 MODULE_DESCRIPTION("Watchdog driver for IMX2 and later"); 341 MODULE_LICENSE("GPL v2"); 342 MODULE_ALIAS("platform:" DRIVER_NAME); 343