1 /* 2 * Watchdog driver for IMX2 and later processors 3 * 4 * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de> 5 * Copyright (C) 2014 Freescale Semiconductor, Inc. 6 * 7 * some parts adapted by similar drivers from Darius Augulis and Vladimir 8 * Zapolskiy, additional improvements by Wim Van Sebroeck. 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License version 2 as published by 12 * the Free Software Foundation. 13 * 14 * NOTE: MX1 has a slightly different Watchdog than MX2 and later: 15 * 16 * MX1: MX2+: 17 * ---- ----- 18 * Registers: 32-bit 16-bit 19 * Stopable timer: Yes No 20 * Need to enable clk: No Yes 21 * Halt on suspend: Manual Can be automatic 22 */ 23 24 #include <linux/clk.h> 25 #include <linux/init.h> 26 #include <linux/io.h> 27 #include <linux/jiffies.h> 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/moduleparam.h> 31 #include <linux/of_address.h> 32 #include <linux/platform_device.h> 33 #include <linux/regmap.h> 34 #include <linux/timer.h> 35 #include <linux/watchdog.h> 36 37 #define DRIVER_NAME "imx2-wdt" 38 39 #define IMX2_WDT_WCR 0x00 /* Control Register */ 40 #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */ 41 #define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */ 42 #define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */ 43 #define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */ 44 45 #define IMX2_WDT_WSR 0x02 /* Service Register */ 46 #define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */ 47 #define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */ 48 49 #define IMX2_WDT_WRSR 0x04 /* Reset Status Register */ 50 #define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */ 51 52 #define IMX2_WDT_MAX_TIME 128 53 #define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */ 54 55 #define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8) 56 57 struct imx2_wdt_device { 58 struct clk *clk; 59 struct regmap *regmap; 60 struct timer_list timer; /* Pings the watchdog when closed */ 61 struct watchdog_device wdog; 62 }; 63 64 static bool nowayout = WATCHDOG_NOWAYOUT; 65 module_param(nowayout, bool, 0); 66 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" 67 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); 68 69 70 static unsigned timeout = IMX2_WDT_DEFAULT_TIME; 71 module_param(timeout, uint, 0); 72 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default=" 73 __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")"); 74 75 static const struct watchdog_info imx2_wdt_info = { 76 .identity = "imx2+ watchdog", 77 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, 78 }; 79 80 static inline void imx2_wdt_setup(struct watchdog_device *wdog) 81 { 82 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 83 u32 val; 84 85 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val); 86 87 /* Suspend timer in low power mode, write once-only */ 88 val |= IMX2_WDT_WCR_WDZST; 89 /* Strip the old watchdog Time-Out value */ 90 val &= ~IMX2_WDT_WCR_WT; 91 /* Generate reset if WDOG times out */ 92 val &= ~IMX2_WDT_WCR_WRE; 93 /* Keep Watchdog Disabled */ 94 val &= ~IMX2_WDT_WCR_WDE; 95 /* Set the watchdog's Time-Out value */ 96 val |= WDOG_SEC_TO_COUNT(wdog->timeout); 97 98 regmap_write(wdev->regmap, IMX2_WDT_WCR, val); 99 100 /* enable the watchdog */ 101 val |= IMX2_WDT_WCR_WDE; 102 regmap_write(wdev->regmap, IMX2_WDT_WCR, val); 103 } 104 105 static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev) 106 { 107 u32 val; 108 109 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val); 110 111 return val & IMX2_WDT_WCR_WDE; 112 } 113 114 static int imx2_wdt_ping(struct watchdog_device *wdog) 115 { 116 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 117 118 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1); 119 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2); 120 return 0; 121 } 122 123 static void imx2_wdt_timer_ping(unsigned long arg) 124 { 125 struct watchdog_device *wdog = (struct watchdog_device *)arg; 126 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 127 128 /* ping it every wdog->timeout / 2 seconds to prevent reboot */ 129 imx2_wdt_ping(wdog); 130 mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2); 131 } 132 133 static int imx2_wdt_set_timeout(struct watchdog_device *wdog, 134 unsigned int new_timeout) 135 { 136 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 137 138 regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT, 139 WDOG_SEC_TO_COUNT(new_timeout)); 140 return 0; 141 } 142 143 static int imx2_wdt_start(struct watchdog_device *wdog) 144 { 145 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 146 147 if (imx2_wdt_is_running(wdev)) { 148 /* delete the timer that pings the watchdog after close */ 149 del_timer_sync(&wdev->timer); 150 imx2_wdt_set_timeout(wdog, wdog->timeout); 151 } else 152 imx2_wdt_setup(wdog); 153 154 return imx2_wdt_ping(wdog); 155 } 156 157 static int imx2_wdt_stop(struct watchdog_device *wdog) 158 { 159 /* 160 * We don't need a clk_disable, it cannot be disabled once started. 161 * We use a timer to ping the watchdog while /dev/watchdog is closed 162 */ 163 imx2_wdt_timer_ping((unsigned long)wdog); 164 return 0; 165 } 166 167 static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog) 168 { 169 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 170 171 if (imx2_wdt_is_running(wdev)) { 172 imx2_wdt_set_timeout(wdog, wdog->timeout); 173 imx2_wdt_timer_ping((unsigned long)wdog); 174 } 175 } 176 177 static struct watchdog_ops imx2_wdt_ops = { 178 .owner = THIS_MODULE, 179 .start = imx2_wdt_start, 180 .stop = imx2_wdt_stop, 181 .ping = imx2_wdt_ping, 182 .set_timeout = imx2_wdt_set_timeout, 183 }; 184 185 static struct regmap_config imx2_wdt_regmap_config = { 186 .reg_bits = 16, 187 .reg_stride = 2, 188 .val_bits = 16, 189 .max_register = 0x8, 190 }; 191 192 static int __init imx2_wdt_probe(struct platform_device *pdev) 193 { 194 struct device_node *np = pdev->dev.of_node; 195 struct imx2_wdt_device *wdev; 196 struct watchdog_device *wdog; 197 struct resource *res; 198 void __iomem *base; 199 bool big_endian; 200 int ret; 201 u32 val; 202 203 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL); 204 if (!wdev) 205 return -ENOMEM; 206 207 big_endian = of_property_read_bool(np, "big-endian"); 208 if (big_endian) 209 imx2_wdt_regmap_config.val_format_endian = REGMAP_ENDIAN_BIG; 210 211 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 212 base = devm_ioremap_resource(&pdev->dev, res); 213 if (IS_ERR(base)) 214 return PTR_ERR(base); 215 216 wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base, 217 &imx2_wdt_regmap_config); 218 if (IS_ERR(wdev->regmap)) { 219 dev_err(&pdev->dev, "regmap init failed\n"); 220 return PTR_ERR(wdev->regmap); 221 } 222 223 wdev->clk = devm_clk_get(&pdev->dev, NULL); 224 if (IS_ERR(wdev->clk)) { 225 dev_err(&pdev->dev, "can't get Watchdog clock\n"); 226 return PTR_ERR(wdev->clk); 227 } 228 229 wdog = &wdev->wdog; 230 wdog->info = &imx2_wdt_info; 231 wdog->ops = &imx2_wdt_ops; 232 wdog->min_timeout = 1; 233 wdog->max_timeout = IMX2_WDT_MAX_TIME; 234 235 clk_prepare_enable(wdev->clk); 236 237 regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val); 238 wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0; 239 240 wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME); 241 if (wdog->timeout != timeout) 242 dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n", 243 timeout, wdog->timeout); 244 245 platform_set_drvdata(pdev, wdog); 246 watchdog_set_drvdata(wdog, wdev); 247 watchdog_set_nowayout(wdog, nowayout); 248 watchdog_init_timeout(wdog, timeout, &pdev->dev); 249 250 setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog); 251 252 imx2_wdt_ping_if_active(wdog); 253 254 ret = watchdog_register_device(wdog); 255 if (ret) { 256 dev_err(&pdev->dev, "cannot register watchdog device\n"); 257 return ret; 258 } 259 260 dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n", 261 wdog->timeout, nowayout); 262 263 return 0; 264 } 265 266 static int __exit imx2_wdt_remove(struct platform_device *pdev) 267 { 268 struct watchdog_device *wdog = platform_get_drvdata(pdev); 269 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 270 271 watchdog_unregister_device(wdog); 272 273 if (imx2_wdt_is_running(wdev)) { 274 del_timer_sync(&wdev->timer); 275 imx2_wdt_ping(wdog); 276 dev_crit(&pdev->dev, "Device removed: Expect reboot!\n"); 277 } 278 return 0; 279 } 280 281 static void imx2_wdt_shutdown(struct platform_device *pdev) 282 { 283 struct watchdog_device *wdog = platform_get_drvdata(pdev); 284 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog); 285 286 if (imx2_wdt_is_running(wdev)) { 287 /* 288 * We are running, we need to delete the timer but will 289 * give max timeout before reboot will take place 290 */ 291 del_timer_sync(&wdev->timer); 292 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME); 293 imx2_wdt_ping(wdog); 294 dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n"); 295 } 296 } 297 298 static const struct of_device_id imx2_wdt_dt_ids[] = { 299 { .compatible = "fsl,imx21-wdt", }, 300 { /* sentinel */ } 301 }; 302 MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids); 303 304 static struct platform_driver imx2_wdt_driver = { 305 .remove = __exit_p(imx2_wdt_remove), 306 .shutdown = imx2_wdt_shutdown, 307 .driver = { 308 .name = DRIVER_NAME, 309 .owner = THIS_MODULE, 310 .of_match_table = imx2_wdt_dt_ids, 311 }, 312 }; 313 314 module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe); 315 316 MODULE_AUTHOR("Wolfram Sang"); 317 MODULE_DESCRIPTION("Watchdog driver for IMX2 and later"); 318 MODULE_LICENSE("GPL v2"); 319 MODULE_ALIAS("platform:" DRIVER_NAME); 320