1 /* 2 * intel TCO vendor specific watchdog driver support 3 * 4 * (c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 * 11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor 12 * provide warranty for any of this software. This material is 13 * provided "AS-IS" and at no charge. 14 */ 15 16 /* 17 * Includes, defines, variables, module parameters, ... 18 */ 19 20 /* Module and version information */ 21 #define DRV_NAME "iTCO_vendor_support" 22 #define DRV_VERSION "1.03" 23 #define PFX DRV_NAME ": " 24 25 /* Includes */ 26 #include <linux/module.h> /* For module specific items */ 27 #include <linux/moduleparam.h> /* For new moduleparam's */ 28 #include <linux/types.h> /* For standard types (like size_t) */ 29 #include <linux/errno.h> /* For the -ENODEV/... values */ 30 #include <linux/kernel.h> /* For printk/panic/... */ 31 #include <linux/init.h> /* For __init/__exit/... */ 32 #include <linux/ioport.h> /* For io-port access */ 33 #include <linux/io.h> /* For inb/outb/... */ 34 35 #include "iTCO_vendor.h" 36 37 /* iTCO defines */ 38 #define SMI_EN acpibase + 0x30 /* SMI Control and Enable Register */ 39 #define TCOBASE acpibase + 0x60 /* TCO base address */ 40 #define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */ 41 42 /* List of vendor support modes */ 43 /* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */ 44 #define SUPERMICRO_OLD_BOARD 1 45 /* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */ 46 #define SUPERMICRO_NEW_BOARD 2 47 48 static int vendorsupport; 49 module_param(vendorsupport, int, 0); 50 MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=" 51 "0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+"); 52 53 /* 54 * Vendor Specific Support 55 */ 56 57 /* 58 * Vendor Support: 1 59 * Board: Super Micro Computer Inc. 370SSE+-OEM1/P3TSSE 60 * iTCO chipset: ICH2 61 * 62 * Code contributed by: R. Seretny <lkpatches@paypc.com> 63 * Documentation obtained by R. Seretny from SuperMicro Technical Support 64 * 65 * To enable Watchdog function: 66 * BIOS setup -> Power -> TCO Logic SMI Enable -> Within5Minutes 67 * This setting enables SMI to clear the watchdog expired flag. 68 * If BIOS or CPU fail which may cause SMI hang, then system will 69 * reboot. When application starts to use watchdog function, 70 * application has to take over the control from SMI. 71 * 72 * For P3TSSE, J36 jumper needs to be removed to enable the Watchdog 73 * function. 74 * 75 * Note: The system will reboot when Expire Flag is set TWICE. 76 * So, if the watchdog timer is 20 seconds, then the maximum hang 77 * time is about 40 seconds, and the minimum hang time is about 78 * 20.6 seconds. 79 */ 80 81 static void supermicro_old_pre_start(unsigned long acpibase) 82 { 83 unsigned long val32; 84 85 /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */ 86 val32 = inl(SMI_EN); 87 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */ 88 outl(val32, SMI_EN); /* Needed to activate watchdog */ 89 } 90 91 static void supermicro_old_pre_stop(unsigned long acpibase) 92 { 93 unsigned long val32; 94 95 /* Bit 13: TCO_EN -> 1 = Enables the TCO logic to generate SMI# */ 96 val32 = inl(SMI_EN); 97 val32 |= 0x00002000; /* Turn on SMI clearing watchdog */ 98 outl(val32, SMI_EN); /* Needed to deactivate watchdog */ 99 } 100 101 static void supermicro_old_pre_keepalive(unsigned long acpibase) 102 { 103 /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */ 104 /* Clear "Expire Flag" (Bit 3 of TC01_STS register) */ 105 outb(0x08, TCO1_STS); 106 } 107 108 /* 109 * Vendor Support: 2 110 * Board: Super Micro Computer Inc. P4SBx, P4DPx 111 * iTCO chipset: ICH4 112 * 113 * Code contributed by: R. Seretny <lkpatches@paypc.com> 114 * Documentation obtained by R. Seretny from SuperMicro Technical Support 115 * 116 * To enable Watchdog function: 117 * 1. BIOS 118 * For P4SBx: 119 * BIOS setup -> Advanced -> Integrated Peripherals -> Watch Dog Feature 120 * For P4DPx: 121 * BIOS setup -> Advanced -> I/O Device Configuration -> Watch Dog 122 * This setting enables or disables Watchdog function. When enabled, the 123 * default watchdog timer is set to be 5 minutes (about 4m35s). It is 124 * enough to load and run the OS. The application (service or driver) has 125 * to take over the control once OS is running up and before watchdog 126 * expires. 127 * 128 * 2. JUMPER 129 * For P4SBx: JP39 130 * For P4DPx: JP37 131 * This jumper is used for safety. Closed is enabled. This jumper 132 * prevents user enables watchdog in BIOS by accident. 133 * 134 * To enable Watch Dog function, both BIOS and JUMPER must be enabled. 135 * 136 * The documentation lists motherboards P4SBx and P4DPx series as of 137 * 20-March-2002. However, this code works flawlessly with much newer 138 * motherboards, such as my X6DHR-8G2 (SuperServer 6014H-82). 139 * 140 * The original iTCO driver as written does not actually reset the 141 * watchdog timer on these machines, as a result they reboot after five 142 * minutes. 143 * 144 * NOTE: You may leave the Watchdog function disabled in the SuperMicro 145 * BIOS to avoid a "boot-race"... This driver will enable watchdog 146 * functionality even if it's disabled in the BIOS once the /dev/watchdog 147 * file is opened. 148 */ 149 150 /* I/O Port's */ 151 #define SM_REGINDEX 0x2e /* SuperMicro ICH4+ Register Index */ 152 #define SM_DATAIO 0x2f /* SuperMicro ICH4+ Register Data I/O */ 153 154 /* Control Register's */ 155 #define SM_CTLPAGESW 0x07 /* SuperMicro ICH4+ Control Page Switch */ 156 #define SM_CTLPAGE 0x08 /* SuperMicro ICH4+ Control Page Num */ 157 158 #define SM_WATCHENABLE 0x30 /* Watchdog enable: Bit 0: 0=off, 1=on */ 159 160 #define SM_WATCHPAGE 0x87 /* Watchdog unlock control page */ 161 162 #define SM_ENDWATCH 0xAA /* Watchdog lock control page */ 163 164 #define SM_COUNTMODE 0xf5 /* Watchdog count mode select */ 165 /* (Bit 3: 0 = seconds, 1 = minutes */ 166 167 #define SM_WATCHTIMER 0xf6 /* 8-bits, Watchdog timer counter (RW) */ 168 169 #define SM_RESETCONTROL 0xf7 /* Watchdog reset control */ 170 /* Bit 6: timer is reset by kbd interrupt */ 171 /* Bit 7: timer is reset by mouse interrupt */ 172 173 static void supermicro_new_unlock_watchdog(void) 174 { 175 /* Write 0x87 to port 0x2e twice */ 176 outb(SM_WATCHPAGE, SM_REGINDEX); 177 outb(SM_WATCHPAGE, SM_REGINDEX); 178 /* Switch to watchdog control page */ 179 outb(SM_CTLPAGESW, SM_REGINDEX); 180 outb(SM_CTLPAGE, SM_DATAIO); 181 } 182 183 static void supermicro_new_lock_watchdog(void) 184 { 185 outb(SM_ENDWATCH, SM_REGINDEX); 186 } 187 188 static void supermicro_new_pre_start(unsigned int heartbeat) 189 { 190 unsigned int val; 191 192 supermicro_new_unlock_watchdog(); 193 194 /* Watchdog timer setting needs to be in seconds*/ 195 outb(SM_COUNTMODE, SM_REGINDEX); 196 val = inb(SM_DATAIO); 197 val &= 0xF7; 198 outb(val, SM_DATAIO); 199 200 /* Write heartbeat interval to WDOG */ 201 outb(SM_WATCHTIMER, SM_REGINDEX); 202 outb((heartbeat & 255), SM_DATAIO); 203 204 /* Make sure keyboard/mouse interrupts don't interfere */ 205 outb(SM_RESETCONTROL, SM_REGINDEX); 206 val = inb(SM_DATAIO); 207 val &= 0x3f; 208 outb(val, SM_DATAIO); 209 210 /* enable watchdog by setting bit 0 of Watchdog Enable to 1 */ 211 outb(SM_WATCHENABLE, SM_REGINDEX); 212 val = inb(SM_DATAIO); 213 val |= 0x01; 214 outb(val, SM_DATAIO); 215 216 supermicro_new_lock_watchdog(); 217 } 218 219 static void supermicro_new_pre_stop(void) 220 { 221 unsigned int val; 222 223 supermicro_new_unlock_watchdog(); 224 225 /* disable watchdog by setting bit 0 of Watchdog Enable to 0 */ 226 outb(SM_WATCHENABLE, SM_REGINDEX); 227 val = inb(SM_DATAIO); 228 val &= 0xFE; 229 outb(val, SM_DATAIO); 230 231 supermicro_new_lock_watchdog(); 232 } 233 234 static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat) 235 { 236 supermicro_new_unlock_watchdog(); 237 238 /* reset watchdog timeout to heartveat value */ 239 outb(SM_WATCHTIMER, SM_REGINDEX); 240 outb((heartbeat & 255), SM_DATAIO); 241 242 supermicro_new_lock_watchdog(); 243 } 244 245 /* 246 * Generic Support Functions 247 */ 248 249 void iTCO_vendor_pre_start(unsigned long acpibase, 250 unsigned int heartbeat) 251 { 252 if (vendorsupport == SUPERMICRO_OLD_BOARD) 253 supermicro_old_pre_start(acpibase); 254 else if (vendorsupport == SUPERMICRO_NEW_BOARD) 255 supermicro_new_pre_start(heartbeat); 256 } 257 EXPORT_SYMBOL(iTCO_vendor_pre_start); 258 259 void iTCO_vendor_pre_stop(unsigned long acpibase) 260 { 261 if (vendorsupport == SUPERMICRO_OLD_BOARD) 262 supermicro_old_pre_stop(acpibase); 263 else if (vendorsupport == SUPERMICRO_NEW_BOARD) 264 supermicro_new_pre_stop(); 265 } 266 EXPORT_SYMBOL(iTCO_vendor_pre_stop); 267 268 void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat) 269 { 270 if (vendorsupport == SUPERMICRO_OLD_BOARD) 271 supermicro_old_pre_keepalive(acpibase); 272 else if (vendorsupport == SUPERMICRO_NEW_BOARD) 273 supermicro_new_pre_set_heartbeat(heartbeat); 274 } 275 EXPORT_SYMBOL(iTCO_vendor_pre_keepalive); 276 277 void iTCO_vendor_pre_set_heartbeat(unsigned int heartbeat) 278 { 279 if (vendorsupport == SUPERMICRO_NEW_BOARD) 280 supermicro_new_pre_set_heartbeat(heartbeat); 281 } 282 EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat); 283 284 int iTCO_vendor_check_noreboot_on(void) 285 { 286 switch (vendorsupport) { 287 case SUPERMICRO_OLD_BOARD: 288 return 0; 289 default: 290 return 1; 291 } 292 } 293 EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on); 294 295 static int __init iTCO_vendor_init_module(void) 296 { 297 printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport); 298 return 0; 299 } 300 301 static void __exit iTCO_vendor_exit_module(void) 302 { 303 printk(KERN_INFO PFX "Module Unloaded\n"); 304 } 305 306 module_init(iTCO_vendor_init_module); 307 module_exit(iTCO_vendor_exit_module); 308 309 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>, " 310 "R. Seretny <lkpatches@paypc.com>"); 311 MODULE_DESCRIPTION("Intel TCO Vendor Specific WatchDog Timer Driver Support"); 312 MODULE_VERSION(DRV_VERSION); 313 MODULE_LICENSE("GPL"); 314 315