1b7e04f8cSWim Van Sebroeck /*
2b7e04f8cSWim Van Sebroeck  *	intel TCO vendor specific watchdog driver support
3b7e04f8cSWim Van Sebroeck  *
4b7e04f8cSWim Van Sebroeck  *	(c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>.
5b7e04f8cSWim Van Sebroeck  *
6b7e04f8cSWim Van Sebroeck  *	This program is free software; you can redistribute it and/or
7b7e04f8cSWim Van Sebroeck  *	modify it under the terms of the GNU General Public License
8b7e04f8cSWim Van Sebroeck  *	as published by the Free Software Foundation; either version
9b7e04f8cSWim Van Sebroeck  *	2 of the License, or (at your option) any later version.
10b7e04f8cSWim Van Sebroeck  *
11b7e04f8cSWim Van Sebroeck  *	Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12b7e04f8cSWim Van Sebroeck  *	provide warranty for any of this software. This material is
13b7e04f8cSWim Van Sebroeck  *	provided "AS-IS" and at no charge.
14b7e04f8cSWim Van Sebroeck  */
15b7e04f8cSWim Van Sebroeck 
16b7e04f8cSWim Van Sebroeck /*
17b7e04f8cSWim Van Sebroeck  *	Includes, defines, variables, module parameters, ...
18b7e04f8cSWim Van Sebroeck  */
19b7e04f8cSWim Van Sebroeck 
20b7e04f8cSWim Van Sebroeck /* Module and version information */
21b7e04f8cSWim Van Sebroeck #define DRV_NAME        "iTCO_vendor_support"
22b7e04f8cSWim Van Sebroeck #define DRV_VERSION     "1.01"
23b7e04f8cSWim Van Sebroeck #define DRV_RELDATE     "11-Nov-2006"
24b7e04f8cSWim Van Sebroeck #define PFX		DRV_NAME ": "
25b7e04f8cSWim Van Sebroeck 
26b7e04f8cSWim Van Sebroeck /* Includes */
27b7e04f8cSWim Van Sebroeck #include <linux/module.h>		/* For module specific items */
28b7e04f8cSWim Van Sebroeck #include <linux/moduleparam.h>		/* For new moduleparam's */
29b7e04f8cSWim Van Sebroeck #include <linux/types.h>		/* For standard types (like size_t) */
30b7e04f8cSWim Van Sebroeck #include <linux/errno.h>		/* For the -ENODEV/... values */
31b7e04f8cSWim Van Sebroeck #include <linux/kernel.h>		/* For printk/panic/... */
32b7e04f8cSWim Van Sebroeck #include <linux/init.h>			/* For __init/__exit/... */
33b7e04f8cSWim Van Sebroeck #include <linux/ioport.h>		/* For io-port access */
34b7e04f8cSWim Van Sebroeck 
35b7e04f8cSWim Van Sebroeck #include <asm/io.h>			/* For inb/outb/... */
36b7e04f8cSWim Van Sebroeck 
37b7e04f8cSWim Van Sebroeck /* iTCO defines */
38b7e04f8cSWim Van Sebroeck #define	SMI_EN		acpibase + 0x30	/* SMI Control and Enable Register */
39b7e04f8cSWim Van Sebroeck #define	TCOBASE		acpibase + 0x60	/* TCO base address		*/
40b7e04f8cSWim Van Sebroeck #define	TCO1_STS	TCOBASE + 0x04	/* TCO1 Status Register		*/
41b7e04f8cSWim Van Sebroeck 
42b7e04f8cSWim Van Sebroeck /* List of vendor support modes */
43b7e04f8cSWim Van Sebroeck #define SUPERMICRO_OLD_BOARD	1	/* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
44b7e04f8cSWim Van Sebroeck #define SUPERMICRO_NEW_BOARD	2	/* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
45b7e04f8cSWim Van Sebroeck 
46b7e04f8cSWim Van Sebroeck static int vendorsupport = 0;
47b7e04f8cSWim Van Sebroeck module_param(vendorsupport, int, 0);
48b7e04f8cSWim Van Sebroeck MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+");
49b7e04f8cSWim Van Sebroeck 
50b7e04f8cSWim Van Sebroeck /*
51b7e04f8cSWim Van Sebroeck  *	Vendor Specific Support
52b7e04f8cSWim Van Sebroeck  */
53b7e04f8cSWim Van Sebroeck 
54b7e04f8cSWim Van Sebroeck /*
55b7e04f8cSWim Van Sebroeck  *	Vendor Support: 1
56b7e04f8cSWim Van Sebroeck  *	Board: Super Micro Computer Inc. 370SSE+-OEM1/P3TSSE
57b7e04f8cSWim Van Sebroeck  *	iTCO chipset: ICH2
58b7e04f8cSWim Van Sebroeck  *
59b7e04f8cSWim Van Sebroeck  *	Code contributed by: R. Seretny <lkpatches@paypc.com>
60b7e04f8cSWim Van Sebroeck  *	Documentation obtained by R. Seretny from SuperMicro Technical Support
61b7e04f8cSWim Van Sebroeck  *
62b7e04f8cSWim Van Sebroeck  *	To enable Watchdog function:
63b7e04f8cSWim Van Sebroeck  *	    BIOS setup -> Power -> TCO Logic SMI Enable -> Within5Minutes
64b7e04f8cSWim Van Sebroeck  *	    This setting enables SMI to clear the watchdog expired flag.
65b7e04f8cSWim Van Sebroeck  *	    If BIOS or CPU fail which may cause SMI hang, then system will
66b7e04f8cSWim Van Sebroeck  *	    reboot. When application starts to use watchdog function,
67b7e04f8cSWim Van Sebroeck  *	    application has to take over the control from SMI.
68b7e04f8cSWim Van Sebroeck  *
69b7e04f8cSWim Van Sebroeck  *	    For P3TSSE, J36 jumper needs to be removed to enable the Watchdog
70b7e04f8cSWim Van Sebroeck  *	    function.
71b7e04f8cSWim Van Sebroeck  *
72b7e04f8cSWim Van Sebroeck  *	    Note: The system will reboot when Expire Flag is set TWICE.
73b7e04f8cSWim Van Sebroeck  *	    So, if the watchdog timer is 20 seconds, then the maximum hang
74b7e04f8cSWim Van Sebroeck  *	    time is about 40 seconds, and the minimum hang time is about
75b7e04f8cSWim Van Sebroeck  *	    20.6 seconds.
76b7e04f8cSWim Van Sebroeck  */
77b7e04f8cSWim Van Sebroeck 
78b7e04f8cSWim Van Sebroeck static void supermicro_old_pre_start(unsigned long acpibase)
79b7e04f8cSWim Van Sebroeck {
80b7e04f8cSWim Van Sebroeck 	unsigned long val32;
81b7e04f8cSWim Van Sebroeck 
82b7e04f8cSWim Van Sebroeck 	val32 = inl(SMI_EN);
83b7e04f8cSWim Van Sebroeck 	val32 &= 0xffffdfff;	/* Turn off SMI clearing watchdog */
84b7e04f8cSWim Van Sebroeck 	outl(val32, SMI_EN);	/* Needed to activate watchdog */
85b7e04f8cSWim Van Sebroeck }
86b7e04f8cSWim Van Sebroeck 
87b7e04f8cSWim Van Sebroeck static void supermicro_old_pre_stop(unsigned long acpibase)
88b7e04f8cSWim Van Sebroeck {
89b7e04f8cSWim Van Sebroeck 	unsigned long val32;
90b7e04f8cSWim Van Sebroeck 
91b7e04f8cSWim Van Sebroeck 	val32 = inl(SMI_EN);
92b7e04f8cSWim Van Sebroeck 	val32 &= 0x00002000;	/* Turn on SMI clearing watchdog */
93b7e04f8cSWim Van Sebroeck 	outl(val32, SMI_EN);	/* Needed to deactivate watchdog */
94b7e04f8cSWim Van Sebroeck }
95b7e04f8cSWim Van Sebroeck 
96b7e04f8cSWim Van Sebroeck static void supermicro_old_pre_keepalive(unsigned long acpibase)
97b7e04f8cSWim Van Sebroeck {
98b7e04f8cSWim Van Sebroeck 	/* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
99b7e04f8cSWim Van Sebroeck 	/* Clear "Expire Flag" (Bit 3 of TC01_STS register) */
100b7e04f8cSWim Van Sebroeck 	outb(0x08, TCO1_STS);
101b7e04f8cSWim Van Sebroeck }
102b7e04f8cSWim Van Sebroeck 
103b7e04f8cSWim Van Sebroeck /*
104b7e04f8cSWim Van Sebroeck  *	Vendor Support: 2
105b7e04f8cSWim Van Sebroeck  *	Board: Super Micro Computer Inc. P4SBx, P4DPx
106b7e04f8cSWim Van Sebroeck  *	iTCO chipset: ICH4
107b7e04f8cSWim Van Sebroeck  *
108b7e04f8cSWim Van Sebroeck  *	Code contributed by: R. Seretny <lkpatches@paypc.com>
109b7e04f8cSWim Van Sebroeck  *	Documentation obtained by R. Seretny from SuperMicro Technical Support
110b7e04f8cSWim Van Sebroeck  *
111b7e04f8cSWim Van Sebroeck  *	To enable Watchdog function:
112b7e04f8cSWim Van Sebroeck  *	 1. BIOS
113b7e04f8cSWim Van Sebroeck  *	  For P4SBx:
114b7e04f8cSWim Van Sebroeck  *	  BIOS setup -> Advanced -> Integrated Peripherals -> Watch Dog Feature
115b7e04f8cSWim Van Sebroeck  *	  For P4DPx:
116b7e04f8cSWim Van Sebroeck  *	  BIOS setup -> Advanced -> I/O Device Configuration -> Watch Dog
117b7e04f8cSWim Van Sebroeck  *	 This setting enables or disables Watchdog function. When enabled, the
118b7e04f8cSWim Van Sebroeck  *	 default watchdog timer is set to be 5 minutes (about 4’35”). It is
119b7e04f8cSWim Van Sebroeck  *	 enough to load and run the OS. The application (service or driver) has
120b7e04f8cSWim Van Sebroeck  *	 to take over the control once OS is running up and before watchdog
121b7e04f8cSWim Van Sebroeck  *	 expires.
122b7e04f8cSWim Van Sebroeck  *
123b7e04f8cSWim Van Sebroeck  *	 2. JUMPER
124b7e04f8cSWim Van Sebroeck  *	  For P4SBx: JP39
125b7e04f8cSWim Van Sebroeck  *	  For P4DPx: JP37
126b7e04f8cSWim Van Sebroeck  *	  This jumper is used for safety.  Closed is enabled. This jumper
127b7e04f8cSWim Van Sebroeck  *	  prevents user enables watchdog in BIOS by accident.
128b7e04f8cSWim Van Sebroeck  *
129b7e04f8cSWim Van Sebroeck  *	 To enable Watch Dog function, both BIOS and JUMPER must be enabled.
130b7e04f8cSWim Van Sebroeck  *
131b7e04f8cSWim Van Sebroeck  *	The documentation lists motherboards P4SBx and P4DPx series as of
132b7e04f8cSWim Van Sebroeck  *	20-March-2002. However, this code works flawlessly with much newer
133b7e04f8cSWim Van Sebroeck  *	motherboards, such as my X6DHR-8G2 (SuperServer 6014H-82).
134b7e04f8cSWim Van Sebroeck  *
135b7e04f8cSWim Van Sebroeck  *	The original iTCO driver as written does not actually reset the
136b7e04f8cSWim Van Sebroeck  *	watchdog timer on these machines, as a result they reboot after five
137b7e04f8cSWim Van Sebroeck  *	minutes.
138b7e04f8cSWim Van Sebroeck  *
139b7e04f8cSWim Van Sebroeck  *	NOTE: You may leave the Watchdog function disabled in the SuperMicro
140b7e04f8cSWim Van Sebroeck  *	BIOS to avoid a "boot-race"... This driver will enable watchdog
141b7e04f8cSWim Van Sebroeck  *	functionality even if it's disabled in the BIOS once the /dev/watchdog
142b7e04f8cSWim Van Sebroeck  *	file is opened.
143b7e04f8cSWim Van Sebroeck  */
144b7e04f8cSWim Van Sebroeck 
145b7e04f8cSWim Van Sebroeck /* I/O Port's */
146b7e04f8cSWim Van Sebroeck #define SM_REGINDEX	0x2e		/* SuperMicro ICH4+ Register Index */
147b7e04f8cSWim Van Sebroeck #define SM_DATAIO	0x2f		/* SuperMicro ICH4+ Register Data I/O */
148b7e04f8cSWim Van Sebroeck 
149b7e04f8cSWim Van Sebroeck /* Control Register's */
150b7e04f8cSWim Van Sebroeck #define SM_CTLPAGESW	0x07		/* SuperMicro ICH4+ Control Page Switch */
151b7e04f8cSWim Van Sebroeck #define SM_CTLPAGE		0x08	/* SuperMicro ICH4+ Control Page Num */
152b7e04f8cSWim Van Sebroeck 
153b7e04f8cSWim Van Sebroeck #define SM_WATCHENABLE	0x30		/* Watchdog enable: Bit 0: 0=off, 1=on */
154b7e04f8cSWim Van Sebroeck 
155b7e04f8cSWim Van Sebroeck #define SM_WATCHPAGE	0x87		/* Watchdog unlock control page */
156b7e04f8cSWim Van Sebroeck 
157b7e04f8cSWim Van Sebroeck #define SM_ENDWATCH	0xAA		/* Watchdog lock control page */
158b7e04f8cSWim Van Sebroeck 
159b7e04f8cSWim Van Sebroeck #define SM_COUNTMODE	0xf5		/* Watchdog count mode select */
160b7e04f8cSWim Van Sebroeck 					/* (Bit 3: 0 = seconds, 1 = minutes */
161b7e04f8cSWim Van Sebroeck 
162b7e04f8cSWim Van Sebroeck #define SM_WATCHTIMER	0xf6		/* 8-bits, Watchdog timer counter (RW) */
163b7e04f8cSWim Van Sebroeck 
164b7e04f8cSWim Van Sebroeck #define SM_RESETCONTROL	0xf7		/* Watchdog reset control */
165b7e04f8cSWim Van Sebroeck 					/* Bit 6: timer is reset by kbd interrupt */
166b7e04f8cSWim Van Sebroeck 					/* Bit 7: timer is reset by mouse interrupt */
167b7e04f8cSWim Van Sebroeck 
168b7e04f8cSWim Van Sebroeck static void supermicro_new_unlock_watchdog(void)
169b7e04f8cSWim Van Sebroeck {
170b7e04f8cSWim Van Sebroeck 	outb(SM_WATCHPAGE, SM_REGINDEX);	/* Write 0x87 to port 0x2e twice */
171b7e04f8cSWim Van Sebroeck 	outb(SM_WATCHPAGE, SM_REGINDEX);
172b7e04f8cSWim Van Sebroeck 
173b7e04f8cSWim Van Sebroeck 	outb(SM_CTLPAGESW, SM_REGINDEX);	/* Switch to watchdog control page */
174b7e04f8cSWim Van Sebroeck 	outb(SM_CTLPAGE, SM_DATAIO);
175b7e04f8cSWim Van Sebroeck }
176b7e04f8cSWim Van Sebroeck 
177b7e04f8cSWim Van Sebroeck static void supermicro_new_lock_watchdog(void)
178b7e04f8cSWim Van Sebroeck {
179b7e04f8cSWim Van Sebroeck 	outb(SM_ENDWATCH, SM_REGINDEX);
180b7e04f8cSWim Van Sebroeck }
181b7e04f8cSWim Van Sebroeck 
182b7e04f8cSWim Van Sebroeck static void supermicro_new_pre_start(unsigned int heartbeat)
183b7e04f8cSWim Van Sebroeck {
184b7e04f8cSWim Van Sebroeck 	unsigned int val;
185b7e04f8cSWim Van Sebroeck 
186b7e04f8cSWim Van Sebroeck 	supermicro_new_unlock_watchdog();
187b7e04f8cSWim Van Sebroeck 
188b7e04f8cSWim Van Sebroeck 	/* Watchdog timer setting needs to be in seconds*/
189b7e04f8cSWim Van Sebroeck 	outb(SM_COUNTMODE, SM_REGINDEX);
190b7e04f8cSWim Van Sebroeck 	val = inb(SM_DATAIO);
191b7e04f8cSWim Van Sebroeck 	val &= 0xF7;
192b7e04f8cSWim Van Sebroeck 	outb(val, SM_DATAIO);
193b7e04f8cSWim Van Sebroeck 
194b7e04f8cSWim Van Sebroeck 	/* Write heartbeat interval to WDOG */
195b7e04f8cSWim Van Sebroeck 	outb (SM_WATCHTIMER, SM_REGINDEX);
196b7e04f8cSWim Van Sebroeck 	outb((heartbeat & 255), SM_DATAIO);
197b7e04f8cSWim Van Sebroeck 
198b7e04f8cSWim Van Sebroeck 	/* Make sure keyboard/mouse interrupts don't interfere */
199b7e04f8cSWim Van Sebroeck 	outb(SM_RESETCONTROL, SM_REGINDEX);
200b7e04f8cSWim Van Sebroeck 	val = inb(SM_DATAIO);
201b7e04f8cSWim Van Sebroeck 	val &= 0x3f;
202b7e04f8cSWim Van Sebroeck 	outb(val, SM_DATAIO);
203b7e04f8cSWim Van Sebroeck 
204b7e04f8cSWim Van Sebroeck 	/* enable watchdog by setting bit 0 of Watchdog Enable to 1 */
205b7e04f8cSWim Van Sebroeck 	outb(SM_WATCHENABLE, SM_REGINDEX);
206b7e04f8cSWim Van Sebroeck 	val = inb(SM_DATAIO);
207b7e04f8cSWim Van Sebroeck 	val |= 0x01;
208b7e04f8cSWim Van Sebroeck 	outb(val, SM_DATAIO);
209b7e04f8cSWim Van Sebroeck 
210b7e04f8cSWim Van Sebroeck 	supermicro_new_lock_watchdog();
211b7e04f8cSWim Van Sebroeck }
212b7e04f8cSWim Van Sebroeck 
213b7e04f8cSWim Van Sebroeck static void supermicro_new_pre_stop(void)
214b7e04f8cSWim Van Sebroeck {
215b7e04f8cSWim Van Sebroeck 	unsigned int val;
216b7e04f8cSWim Van Sebroeck 
217b7e04f8cSWim Van Sebroeck 	supermicro_new_unlock_watchdog();
218b7e04f8cSWim Van Sebroeck 
219b7e04f8cSWim Van Sebroeck 	/* disable watchdog by setting bit 0 of Watchdog Enable to 0 */
220b7e04f8cSWim Van Sebroeck 	outb(SM_WATCHENABLE, SM_REGINDEX);
221b7e04f8cSWim Van Sebroeck 	val = inb(SM_DATAIO);
222b7e04f8cSWim Van Sebroeck 	val &= 0xFE;
223b7e04f8cSWim Van Sebroeck 	outb(val, SM_DATAIO);
224b7e04f8cSWim Van Sebroeck 
225b7e04f8cSWim Van Sebroeck 	supermicro_new_lock_watchdog();
226b7e04f8cSWim Van Sebroeck }
227b7e04f8cSWim Van Sebroeck 
228b7e04f8cSWim Van Sebroeck static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
229b7e04f8cSWim Van Sebroeck {
230b7e04f8cSWim Van Sebroeck 	supermicro_new_unlock_watchdog();
231b7e04f8cSWim Van Sebroeck 
232b7e04f8cSWim Van Sebroeck 	/* reset watchdog timeout to heartveat value */
233b7e04f8cSWim Van Sebroeck 	outb(SM_WATCHTIMER, SM_REGINDEX);
234b7e04f8cSWim Van Sebroeck 	outb((heartbeat & 255), SM_DATAIO);
235b7e04f8cSWim Van Sebroeck 
236b7e04f8cSWim Van Sebroeck 	supermicro_new_lock_watchdog();
237b7e04f8cSWim Van Sebroeck }
238b7e04f8cSWim Van Sebroeck 
239b7e04f8cSWim Van Sebroeck /*
240b7e04f8cSWim Van Sebroeck  *	Generic Support Functions
241b7e04f8cSWim Van Sebroeck  */
242b7e04f8cSWim Van Sebroeck 
243b7e04f8cSWim Van Sebroeck void iTCO_vendor_pre_start(unsigned long acpibase,
244b7e04f8cSWim Van Sebroeck 			   unsigned int heartbeat)
245b7e04f8cSWim Van Sebroeck {
246b7e04f8cSWim Van Sebroeck 	if (vendorsupport == SUPERMICRO_OLD_BOARD)
247b7e04f8cSWim Van Sebroeck 		supermicro_old_pre_start(acpibase);
248b7e04f8cSWim Van Sebroeck 	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
249b7e04f8cSWim Van Sebroeck 		supermicro_new_pre_start(heartbeat);
250b7e04f8cSWim Van Sebroeck }
251b7e04f8cSWim Van Sebroeck EXPORT_SYMBOL(iTCO_vendor_pre_start);
252b7e04f8cSWim Van Sebroeck 
253b7e04f8cSWim Van Sebroeck void iTCO_vendor_pre_stop(unsigned long acpibase)
254b7e04f8cSWim Van Sebroeck {
255b7e04f8cSWim Van Sebroeck 	if (vendorsupport == SUPERMICRO_OLD_BOARD)
256b7e04f8cSWim Van Sebroeck 		supermicro_old_pre_stop(acpibase);
257b7e04f8cSWim Van Sebroeck 	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
258b7e04f8cSWim Van Sebroeck 		supermicro_new_pre_stop();
259b7e04f8cSWim Van Sebroeck }
260b7e04f8cSWim Van Sebroeck EXPORT_SYMBOL(iTCO_vendor_pre_stop);
261b7e04f8cSWim Van Sebroeck 
262b7e04f8cSWim Van Sebroeck void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat)
263b7e04f8cSWim Van Sebroeck {
264b7e04f8cSWim Van Sebroeck 	if (vendorsupport == SUPERMICRO_OLD_BOARD)
265b7e04f8cSWim Van Sebroeck 		supermicro_old_pre_keepalive(acpibase);
266b7e04f8cSWim Van Sebroeck 	else if (vendorsupport == SUPERMICRO_NEW_BOARD)
267b7e04f8cSWim Van Sebroeck 		supermicro_new_pre_set_heartbeat(heartbeat);
268b7e04f8cSWim Van Sebroeck }
269b7e04f8cSWim Van Sebroeck EXPORT_SYMBOL(iTCO_vendor_pre_keepalive);
270b7e04f8cSWim Van Sebroeck 
271b7e04f8cSWim Van Sebroeck void iTCO_vendor_pre_set_heartbeat(unsigned int heartbeat)
272b7e04f8cSWim Van Sebroeck {
273b7e04f8cSWim Van Sebroeck 	if (vendorsupport == SUPERMICRO_NEW_BOARD)
274b7e04f8cSWim Van Sebroeck 		supermicro_new_pre_set_heartbeat(heartbeat);
275b7e04f8cSWim Van Sebroeck }
276b7e04f8cSWim Van Sebroeck EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat);
277b7e04f8cSWim Van Sebroeck 
278b7e04f8cSWim Van Sebroeck int iTCO_vendor_check_noreboot_on(void)
279b7e04f8cSWim Van Sebroeck {
280b7e04f8cSWim Van Sebroeck 	switch(vendorsupport) {
281b7e04f8cSWim Van Sebroeck 	case SUPERMICRO_OLD_BOARD:
282b7e04f8cSWim Van Sebroeck 		return 0;
283b7e04f8cSWim Van Sebroeck 	default:
284b7e04f8cSWim Van Sebroeck 		return 1;
285b7e04f8cSWim Van Sebroeck 	}
286b7e04f8cSWim Van Sebroeck }
287b7e04f8cSWim Van Sebroeck EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on);
288b7e04f8cSWim Van Sebroeck 
289b7e04f8cSWim Van Sebroeck static int __init iTCO_vendor_init_module(void)
290b7e04f8cSWim Van Sebroeck {
291b7e04f8cSWim Van Sebroeck 	printk (KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
292b7e04f8cSWim Van Sebroeck 	return 0;
293b7e04f8cSWim Van Sebroeck }
294b7e04f8cSWim Van Sebroeck 
295b7e04f8cSWim Van Sebroeck static void __exit iTCO_vendor_exit_module(void)
296b7e04f8cSWim Van Sebroeck {
297b7e04f8cSWim Van Sebroeck 	printk (KERN_INFO PFX "Module Unloaded\n");
298b7e04f8cSWim Van Sebroeck }
299b7e04f8cSWim Van Sebroeck 
300b7e04f8cSWim Van Sebroeck module_init(iTCO_vendor_init_module);
301b7e04f8cSWim Van Sebroeck module_exit(iTCO_vendor_exit_module);
302b7e04f8cSWim Van Sebroeck 
303b7e04f8cSWim Van Sebroeck MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>, R. Seretny <lkpatches@paypc.com>");
304b7e04f8cSWim Van Sebroeck MODULE_DESCRIPTION("Intel TCO Vendor Specific WatchDog Timer Driver Support");
305b7e04f8cSWim Van Sebroeck MODULE_VERSION(DRV_VERSION);
306b7e04f8cSWim Van Sebroeck MODULE_LICENSE("GPL");
307b7e04f8cSWim Van Sebroeck 
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